usb: dwc3: gadget: allow clock gating to work

The dwc3 core has internal clock gating support.

Let's allow that to happen by clearing the disable
bit in GCTL register.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

2 files changed, 14 insertions, 0 deletions

diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index a763ba705bff..29a8e1679e12 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -161,6 +161,7 @@
 #define DWC3_GCTL_CORESOFTRESET (1 << 11)
 #define DWC3_GCTL_SCALEDOWN(n)  (n << 4)
 #define DWC3_GCTL_DISSCRAMBLE   (1 << 3)
+#define DWC3_GCTL_DSBLCLKGTNG   (1 << 0)
 
 /* Global USB2 PHY Configuration Register */
 #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31)
@@ -170,6 +171,11 @@
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
 #define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
 
+/* Global HWPARAMS1 Register */
+#define DWC3_GHWPARAMS1_EN_PWROPT(n)    ((n & (3 << 24)) >> 24)
+#define DWC3_GHWPARAMS1_EN_PWROPT_NO    0
+#define DWC3_GHWPARAMS1_EN_PWROPT_CLK   1
+
 /* Device Configuration Register */
 #define DWC3_DCFG_DEVADDR(addr) ((addr) << 3)
 #define DWC3_DCFG_DEVADDR_MASK  DWC3_DCFG_DEVADDR(0x7f)
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 8d8502373db6..fd1ac4dd5600 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1164,6 +1164,14 @@ static int dwc3_gadget_start(struct usb_gadget *g,
         reg &= ~DWC3_GCTL_DISSCRAMBLE;
         reg |= DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_DEVICE);
 
+        switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams0)) {
+        case DWC3_GHWPARAMS1_EN_PWROPT_CLK:
+                reg &= ~DWC3_GCTL_DSBLCLKGTNG;
+                break;
+        default:
+                dev_dbg(dwc->dev, "No power optimization available\n");
+        }
+
         /*
          * WORKAROUND: DWC3 revisions <1.90a have a bug
          * when The device fails to connect at SuperSpeed