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authorH Hartley Sweeten <hartleys@visionengravers.com>2013-05-24 19:23:38 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-05-30 08:54:02 -0400
commitaa919769c625e2b2c4a70c6bd62a1a83f9f64aa5 (patch)
treee5485cddb20f703a9a778be321f9cda2bfe82f47
parent53e2e380891facf2b0fdb43482b8febb6e17f7f6 (diff)
misc/ep93xx_pwm: remove ep93xx_pwm_write_dc() inline function
This is a simple wrapper around writel(), remove it. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Ryan Mallon <rmallon@gmail.com> Cc: Matthieu Crapet <mcrapet@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/misc/ep93xx_pwm.c15
1 files changed, 6 insertions, 9 deletions
diff --git a/drivers/misc/ep93xx_pwm.c b/drivers/misc/ep93xx_pwm.c
index ab5a48135508..7a133042e92c 100644
--- a/drivers/misc/ep93xx_pwm.c
+++ b/drivers/misc/ep93xx_pwm.c
@@ -44,11 +44,6 @@ static inline u16 ep93xx_pwm_read_tc(struct ep93xx_pwm *pwm)
44 return readl(pwm->mmio_base + EP93XX_PWMx_TERM_COUNT); 44 return readl(pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
45} 45}
46 46
47static inline void ep93xx_pwm_write_dc(struct ep93xx_pwm *pwm, u16 value)
48{
49 writel(value, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
50}
51
52static inline void ep93xx_pwm_enable(struct ep93xx_pwm *pwm) 47static inline void ep93xx_pwm_enable(struct ep93xx_pwm *pwm)
53{ 48{
54 writel(0x1, pwm->mmio_base + EP93XX_PWMx_ENABLE); 49 writel(0x1, pwm->mmio_base + EP93XX_PWMx_ENABLE);
@@ -153,9 +148,9 @@ static ssize_t ep93xx_pwm_set_freq(struct device *dev,
153 /* If pwm is running, order is important */ 148 /* If pwm is running, order is important */
154 if (val > term) { 149 if (val > term) {
155 writel(val, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT); 150 writel(val, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
156 ep93xx_pwm_write_dc(pwm, duty); 151 writel(duty, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
157 } else { 152 } else {
158 ep93xx_pwm_write_dc(pwm, duty); 153 writel(duty, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
159 writel(val, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT); 154 writel(val, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
160 } 155 }
161 156
@@ -191,7 +186,9 @@ static ssize_t ep93xx_pwm_set_duty_percent(struct device *dev,
191 186
192 if (val > 0 && val < 100) { 187 if (val > 0 && val < 100) {
193 u32 term = ep93xx_pwm_read_tc(pwm); 188 u32 term = ep93xx_pwm_read_tc(pwm);
194 ep93xx_pwm_write_dc(pwm, ((term + 1) * val / 100) - 1); 189 u32 duty = ((term + 1) * val / 100) - 1;
190
191 writel(duty, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
195 pwm->duty_percent = val; 192 pwm->duty_percent = val;
196 return count; 193 return count;
197 } 194 }
@@ -286,7 +283,7 @@ static int __init ep93xx_pwm_probe(struct platform_device *pdev)
286 /* disable pwm at startup. Avoids zero value. */ 283 /* disable pwm at startup. Avoids zero value. */
287 ep93xx_pwm_disable(pwm); 284 ep93xx_pwm_disable(pwm);
288 writel(EP93XX_PWM_MAX_COUNT, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT); 285 writel(EP93XX_PWM_MAX_COUNT, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
289 ep93xx_pwm_write_dc(pwm, EP93XX_PWM_MAX_COUNT / 2); 286 writel(EP93XX_PWM_MAX_COUNT/2, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
290 287
291 clk_enable(pwm->clk); 288 clk_enable(pwm->clk);
292 289