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authorLarry Finger <Larry.Finger@lwfinger.net>2014-02-28 16:16:43 -0500
committerJohn W. Linville <linville@tuxdriver.com>2014-03-04 13:18:28 -0500
commitaa45a673b291fd761275493bc15316d79555ed55 (patch)
tree4b27260c71479bed2c67f79798c272ab1bc8d515
parentc24782e612dce377cf9149ad787998af7694f757 (diff)
rtlwifi: btcoexist: Add new mini driver
A new driver in the rtlwifi family for the RTL8723BE will soon be added. The bluetooth coexistence code for this device has been split into a separate mini driver as it will be shared with other devices. This commit adds the the headers and sources, and modifies Kconfig and Makefile to configure and build this driver. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat
-rw-r--r--drivers/net/wireless/rtlwifi/Kconfig8
-rw-r--r--drivers/net/wireless/rtlwifi/Makefile1
-rw-r--r--drivers/net/wireless/rtlwifi/btcoexist/Makefile7
-rw-r--r--drivers/net/wireless/rtlwifi/btcoexist/halbt_precomp.h87
-rw-r--r--drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.c3698
-rw-r--r--drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.h173
-rw-r--r--drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.c1011
-rw-r--r--drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.h559
-rw-r--r--drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.c218
-rw-r--r--drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.h52
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8723com/fw_common.c849
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8723com/fw_common.h50
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8723com/phy_common.h75
-rw-r--r--drivers/net/wireless/rtlwifi/wifi.h60
14 files changed, 6847 insertions, 1 deletions
diff --git a/drivers/net/wireless/rtlwifi/Kconfig b/drivers/net/wireless/rtlwifi/Kconfig
index c2ffce7a907c..29c6ce5c3371 100644
--- a/drivers/net/wireless/rtlwifi/Kconfig
+++ b/drivers/net/wireless/rtlwifi/Kconfig
@@ -5,7 +5,7 @@ menuconfig RTL_CARDS
5 ---help--- 5 ---help---
6 This option will enable support for the Realtek mac80211-based 6 This option will enable support for the Realtek mac80211-based
7 wireless drivers. Drivers rtl8192ce, rtl8192cu, rtl8192se, rtl8192de, 7 wireless drivers. Drivers rtl8192ce, rtl8192cu, rtl8192se, rtl8192de,
8 rtl8723eu, and rtl8188eu share some common code. 8 rtl8723ae, and rtl8188ae share some common code.
9 9
10if RTL_CARDS 10if RTL_CARDS
11 11
@@ -48,6 +48,7 @@ config RTL8723AE
48 depends on PCI 48 depends on PCI
49 select RTLWIFI 49 select RTLWIFI
50 select RTLWIFI_PCI 50 select RTLWIFI_PCI
51 select RTLBTCOEXIST
51 ---help--- 52 ---help---
52 This is the driver for Realtek RTL8723AE 802.11n PCIe 53 This is the driver for Realtek RTL8723AE 802.11n PCIe
53 wireless network adapters. 54 wireless network adapters.
@@ -101,4 +102,9 @@ config RTL8192C_COMMON
101 depends on RTL8192CE || RTL8192CU 102 depends on RTL8192CE || RTL8192CU
102 default y 103 default y
103 104
105config RTLBTCOEXIST
106 tristate
107 depends on RTL8723AE
108 default y
109
104endif 110endif
diff --git a/drivers/net/wireless/rtlwifi/Makefile b/drivers/net/wireless/rtlwifi/Makefile
index d56f023a4b90..f354c5f9aed5 100644
--- a/drivers/net/wireless/rtlwifi/Makefile
+++ b/drivers/net/wireless/rtlwifi/Makefile
@@ -25,5 +25,6 @@ obj-$(CONFIG_RTL8192SE) += rtl8192se/
25obj-$(CONFIG_RTL8192DE) += rtl8192de/ 25obj-$(CONFIG_RTL8192DE) += rtl8192de/
26obj-$(CONFIG_RTL8723AE) += rtl8723ae/ 26obj-$(CONFIG_RTL8723AE) += rtl8723ae/
27obj-$(CONFIG_RTL8188EE) += rtl8188ee/ 27obj-$(CONFIG_RTL8188EE) += rtl8188ee/
28obj-$(CONFIG_RTLBTCOEXIST) += btcoexist/
28 29
29ccflags-y += -D__CHECK_ENDIAN__ 30ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/rtlwifi/btcoexist/Makefile b/drivers/net/wireless/rtlwifi/btcoexist/Makefile
new file mode 100644
index 000000000000..47ceecfcb7dc
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/btcoexist/Makefile
@@ -0,0 +1,7 @@
1btcoexist-objs := halbtc8723b2ant.o \
2 halbtcoutsrc.o \
3 rtl_btc.o
4
5obj-$(CONFIG_RTLBTCOEXIST) += btcoexist.o
6
7ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/rtlwifi/btcoexist/halbt_precomp.h b/drivers/net/wireless/rtlwifi/btcoexist/halbt_precomp.h
new file mode 100644
index 000000000000..582532fc199a
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/btcoexist/halbt_precomp.h
@@ -0,0 +1,87 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 * Larry Finger <Larry.Finger@lwfinger.net>
22 *
23 ******************************************************************************/
24
25#ifndef __HALBT_PRECOMP_H__
26#define __HALBT_PRECOMP_H__
27/*************************************************************
28 * include files
29 *************************************************************/
30#include "../wifi.h"
31#include "../efuse.h"
32#include "../base.h"
33#include "../regd.h"
34#include "../cam.h"
35#include "../ps.h"
36#include "../pci.h"
37
38#include "halbtcoutsrc.h"
39
40#include "halbtc8723b2ant.h"
41
42#define BIT0 0x00000001
43#define BIT1 0x00000002
44#define BIT2 0x00000004
45#define BIT3 0x00000008
46#define BIT4 0x00000010
47#define BIT5 0x00000020
48#define BIT6 0x00000040
49#define BIT7 0x00000080
50#define BIT8 0x00000100
51#define BIT9 0x00000200
52#define BIT10 0x00000400
53#define BIT11 0x00000800
54#define BIT12 0x00001000
55#define BIT13 0x00002000
56#define BIT14 0x00004000
57#define BIT15 0x00008000
58#define BIT16 0x00010000
59#define BIT17 0x00020000
60#define BIT18 0x00040000
61#define BIT19 0x00080000
62#define BIT20 0x00100000
63#define BIT21 0x00200000
64#define BIT22 0x00400000
65#define BIT23 0x00800000
66#define BIT24 0x01000000
67#define BIT25 0x02000000
68#define BIT26 0x04000000
69#define BIT27 0x08000000
70#define BIT28 0x10000000
71#define BIT29 0x20000000
72#define BIT30 0x40000000
73#define BIT31 0x80000000
74
75#define MASKBYTE0 0xff
76#define MASKBYTE1 0xff00
77#define MASKBYTE2 0xff0000
78#define MASKBYTE3 0xff000000
79#define MASKHWORD 0xffff0000
80#define MASKLWORD 0x0000ffff
81#define MASKDWORD 0xffffffff
82#define MASK12BITS 0xfff
83#define MASKH4BITS 0xf0000000
84#define MASKOFDM_D 0xffc00000
85#define MASKCCK 0x3f3f3f3f
86
87#endif /* __HALBT_PRECOMP_H__ */
diff --git a/drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.c b/drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.c
new file mode 100644
index 000000000000..d916ab9f3c38
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.c
@@ -0,0 +1,3698 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25/***************************************************************
26 * Description:
27 *
28 * This file is for RTL8723B Co-exist mechanism
29 *
30 * History
31 * 2012/11/15 Cosa first check in.
32 *
33 **************************************************************/
34/**************************************************************
35 * include files
36 **************************************************************/
37#include "halbt_precomp.h"
38/**************************************************************
39 * Global variables, these are static variables
40 **************************************************************/
41static struct coex_dm_8723b_2ant glcoex_dm_8723b_2ant;
42static struct coex_dm_8723b_2ant *coex_dm = &glcoex_dm_8723b_2ant;
43static struct coex_sta_8723b_2ant glcoex_sta_8723b_2ant;
44static struct coex_sta_8723b_2ant *coex_sta = &glcoex_sta_8723b_2ant;
45
46static const char *const glbt_info_src_8723b_2ant[] = {
47 "BT Info[wifi fw]",
48 "BT Info[bt rsp]",
49 "BT Info[bt auto report]",
50};
51
52static u32 glcoex_ver_date_8723b_2ant = 20130731;
53static u32 glcoex_ver_8723b_2ant = 0x3b;
54
55/**************************************************************
56 * local function proto type if needed
57 **************************************************************/
58/**************************************************************
59 * local function start with btc8723b2ant_
60 **************************************************************/
61static u8 btc8723b2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh,
62 u8 rssi_thresh1)
63{
64 s32 bt_rssi = 0;
65 u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
66
67 bt_rssi = coex_sta->bt_rssi;
68
69 if (level_num == 2) {
70 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
71 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
72 if (bt_rssi >= rssi_thresh +
73 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT) {
74 bt_rssi_state = BTC_RSSI_STATE_HIGH;
75 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
76 "[BTCoex], BT Rssi state "
77 "switch to High\n");
78 } else {
79 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
80 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
81 "[BTCoex], BT Rssi state "
82 "stay at Low\n");
83 }
84 } else {
85 if (bt_rssi < rssi_thresh) {
86 bt_rssi_state = BTC_RSSI_STATE_LOW;
87 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
88 "[BTCoex], BT Rssi state "
89 "switch to Low\n");
90 } else {
91 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
92 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
93 "[BTCoex], BT Rssi state "
94 "stay at High\n");
95 }
96 }
97 } else if (level_num == 3) {
98 if (rssi_thresh > rssi_thresh1) {
99 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
100 "[BTCoex], BT Rssi thresh error!!\n");
101 return coex_sta->pre_bt_rssi_state;
102 }
103
104 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
105 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
106 if (bt_rssi >= rssi_thresh +
107 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT) {
108 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
109 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
110 "[BTCoex], BT Rssi state "
111 "switch to Medium\n");
112 } else {
113 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
114 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
115 "[BTCoex], BT Rssi state "
116 "stay at Low\n");
117 }
118 } else if ((coex_sta->pre_bt_rssi_state ==
119 BTC_RSSI_STATE_MEDIUM) ||
120 (coex_sta->pre_bt_rssi_state ==
121 BTC_RSSI_STATE_STAY_MEDIUM)) {
122 if (bt_rssi >= rssi_thresh1 +
123 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT) {
124 bt_rssi_state = BTC_RSSI_STATE_HIGH;
125 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
126 "[BTCoex], BT Rssi state "
127 "switch to High\n");
128 } else if (bt_rssi < rssi_thresh) {
129 bt_rssi_state = BTC_RSSI_STATE_LOW;
130 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
131 "[BTCoex], BT Rssi state "
132 "switch to Low\n");
133 } else {
134 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
135 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
136 "[BTCoex], BT Rssi state "
137 "stay at Medium\n");
138 }
139 } else {
140 if (bt_rssi < rssi_thresh1) {
141 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
142 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
143 "[BTCoex], BT Rssi state "
144 "switch to Medium\n");
145 } else {
146 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
147 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
148 "[BTCoex], BT Rssi state "
149 "stay at High\n");
150 }
151 }
152 }
153
154 coex_sta->pre_bt_rssi_state = bt_rssi_state;
155
156 return bt_rssi_state;
157}
158
159static u8 btc8723b2ant_wifi_rssi_state(struct btc_coexist *btcoexist,
160 u8 index, u8 level_num,
161 u8 rssi_thresh, u8 rssi_thresh1)
162{
163 s32 wifi_rssi = 0;
164 u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
165
166 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
167
168 if (level_num == 2) {
169 if ((coex_sta->pre_wifi_rssi_state[index] ==
170 BTC_RSSI_STATE_LOW) ||
171 (coex_sta->pre_wifi_rssi_state[index] ==
172 BTC_RSSI_STATE_STAY_LOW)) {
173 if (wifi_rssi >= rssi_thresh +
174 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT) {
175 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
176 BTC_PRINT(BTC_MSG_ALGORITHM,
177 ALGO_WIFI_RSSI_STATE,
178 "[BTCoex], wifi RSSI state "
179 "switch to High\n");
180 } else {
181 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
182 BTC_PRINT(BTC_MSG_ALGORITHM,
183 ALGO_WIFI_RSSI_STATE,
184 "[BTCoex], wifi RSSI state "
185 "stay at Low\n");
186 }
187 } else {
188 if (wifi_rssi < rssi_thresh) {
189 wifi_rssi_state = BTC_RSSI_STATE_LOW;
190 BTC_PRINT(BTC_MSG_ALGORITHM,
191 ALGO_WIFI_RSSI_STATE,
192 "[BTCoex], wifi RSSI state "
193 "switch to Low\n");
194 } else {
195 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
196 BTC_PRINT(BTC_MSG_ALGORITHM,
197 ALGO_WIFI_RSSI_STATE,
198 "[BTCoex], wifi RSSI state "
199 "stay at High\n");
200 }
201 }
202 } else if (level_num == 3) {
203 if (rssi_thresh > rssi_thresh1) {
204 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE,
205 "[BTCoex], wifi RSSI thresh error!!\n");
206 return coex_sta->pre_wifi_rssi_state[index];
207 }
208
209 if ((coex_sta->pre_wifi_rssi_state[index] ==
210 BTC_RSSI_STATE_LOW) ||
211 (coex_sta->pre_wifi_rssi_state[index] ==
212 BTC_RSSI_STATE_STAY_LOW)) {
213 if (wifi_rssi >= rssi_thresh +
214 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT) {
215 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
216 BTC_PRINT(BTC_MSG_ALGORITHM,
217 ALGO_WIFI_RSSI_STATE,
218 "[BTCoex], wifi RSSI state "
219 "switch to Medium\n");
220 } else {
221 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
222 BTC_PRINT(BTC_MSG_ALGORITHM,
223 ALGO_WIFI_RSSI_STATE,
224 "[BTCoex], wifi RSSI state "
225 "stay at Low\n");
226 }
227 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
228 BTC_RSSI_STATE_MEDIUM) ||
229 (coex_sta->pre_wifi_rssi_state[index] ==
230 BTC_RSSI_STATE_STAY_MEDIUM)) {
231 if (wifi_rssi >= rssi_thresh1 +
232 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT) {
233 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
234 BTC_PRINT(BTC_MSG_ALGORITHM,
235 ALGO_WIFI_RSSI_STATE,
236 "[BTCoex], wifi RSSI state "
237 "switch to High\n");
238 } else if (wifi_rssi < rssi_thresh) {
239 wifi_rssi_state = BTC_RSSI_STATE_LOW;
240 BTC_PRINT(BTC_MSG_ALGORITHM,
241 ALGO_WIFI_RSSI_STATE,
242 "[BTCoex], wifi RSSI state "
243 "switch to Low\n");
244 } else {
245 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
246 BTC_PRINT(BTC_MSG_ALGORITHM,
247 ALGO_WIFI_RSSI_STATE,
248 "[BTCoex], wifi RSSI state "
249 "stay at Medium\n");
250 }
251 } else {
252 if (wifi_rssi < rssi_thresh1) {
253 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
254 BTC_PRINT(BTC_MSG_ALGORITHM,
255 ALGO_WIFI_RSSI_STATE,
256 "[BTCoex], wifi RSSI state "
257 "switch to Medium\n");
258 } else {
259 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
260 BTC_PRINT(BTC_MSG_ALGORITHM,
261 ALGO_WIFI_RSSI_STATE,
262 "[BTCoex], wifi RSSI state "
263 "stay at High\n");
264 }
265 }
266 }
267
268 coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
269
270 return wifi_rssi_state;
271}
272
273static void btc8723b2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
274{
275 u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
276 u32 reg_hp_tx = 0, reg_hp_rx = 0;
277 u32 reg_lp_tx = 0, reg_lp_rx = 0;
278
279 reg_hp_txrx = 0x770;
280 reg_lp_txrx = 0x774;
281
282 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
283 reg_hp_tx = u32tmp & MASKLWORD;
284 reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
285
286 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
287 reg_lp_tx = u32tmp & MASKLWORD;
288 reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
289
290 coex_sta->high_priority_tx = reg_hp_tx;
291 coex_sta->high_priority_rx = reg_hp_rx;
292 coex_sta->low_priority_tx = reg_lp_tx;
293 coex_sta->low_priority_rx = reg_lp_rx;
294
295 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
296 "[BTCoex], High Priority Tx/Rx(reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
297 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
298 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
299 "[BTCoex], Low Priority Tx/Rx(reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
300 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
301
302 /* reset counter */
303 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
304}
305
306static bool btc8723b2ant_is_wifi_status_changed(struct btc_coexist *btcoexist)
307{
308 static bool pre_wifi_busy;
309 static bool pre_under_4way;
310 static bool pre_bt_hs_on;
311 bool wifi_busy = false, under_4way = false, bt_hs_on = false;
312 bool wifi_connected = false;
313
314 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
315 &wifi_connected);
316 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
317 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
318 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
319 &under_4way);
320
321 if (wifi_connected) {
322 if (wifi_busy != pre_wifi_busy) {
323 pre_wifi_busy = wifi_busy;
324 return true;
325 }
326
327 if (under_4way != pre_under_4way) {
328 pre_under_4way = under_4way;
329 return true;
330 }
331
332 if (bt_hs_on != pre_bt_hs_on) {
333 pre_bt_hs_on = bt_hs_on;
334 return true;
335 }
336 }
337
338 return false;
339}
340
341static void btc8723b2ant_update_bt_link_info(struct btc_coexist *btcoexist)
342{
343 /*struct btc_stack_info *stack_info = &btcoexist->stack_info;*/
344 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
345 bool bt_hs_on = false;
346
347#if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 1) /* profile from bt patch */
348 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
349
350 bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
351 bt_link_info->sco_exist = coex_sta->sco_exist;
352 bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
353 bt_link_info->pan_exist = coex_sta->pan_exist;
354 bt_link_info->hid_exist = coex_sta->hid_exist;
355
356 /* work around for HS mode. */
357 if (bt_hs_on) {
358 bt_link_info->pan_exist = true;
359 bt_link_info->bt_link_exist = true;
360 }
361#else /* profile from bt stack */
362 bt_link_info->bt_link_exist = stack_info->bt_link_exist;
363 bt_link_info->sco_exist = stack_info->sco_exist;
364 bt_link_info->a2dp_exist = stack_info->a2dp_exist;
365 bt_link_info->pan_exist = stack_info->pan_exist;
366 bt_link_info->hid_exist = stack_info->hid_exist;
367
368 /*for win-8 stack HID report error*/
369 if (!stack_info->hid_exist)
370 stack_info->hid_exist = coex_sta->hid_exist;
371 /*sync BTInfo with BT firmware and stack*/
372 /* when stack HID report error, here we use the info from bt fw.*/
373 if (!stack_info->bt_link_exist)
374 stack_info->bt_link_exist = coex_sta->bt_link_exist;
375#endif
376 /* check if Sco only */
377 if (bt_link_info->sco_exist && !bt_link_info->a2dp_exist &&
378 !bt_link_info->pan_exist && !bt_link_info->hid_exist)
379 bt_link_info->sco_only = true;
380 else
381 bt_link_info->sco_only = false;
382
383 /* check if A2dp only */
384 if (!bt_link_info->sco_exist && bt_link_info->a2dp_exist &&
385 !bt_link_info->pan_exist && !bt_link_info->hid_exist)
386 bt_link_info->a2dp_only = true;
387 else
388 bt_link_info->a2dp_only = false;
389
390 /* check if Pan only */
391 if (!bt_link_info->sco_exist && !bt_link_info->a2dp_exist &&
392 bt_link_info->pan_exist && !bt_link_info->hid_exist)
393 bt_link_info->pan_only = true;
394 else
395 bt_link_info->pan_only = false;
396
397 /* check if Hid only */
398 if (!bt_link_info->sco_exist && !bt_link_info->a2dp_exist &&
399 !bt_link_info->pan_exist && bt_link_info->hid_exist)
400 bt_link_info->hid_only = true;
401 else
402 bt_link_info->hid_only = false;
403}
404
405static u8 btc8723b2ant_action_algorithm(struct btc_coexist *btcoexist)
406{
407 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
408 bool bt_hs_on = false;
409 u8 algorithm = BT_8723B_2ANT_COEX_ALGO_UNDEFINED;
410 u8 num_of_diff_profile = 0;
411
412 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
413
414 if (!bt_link_info->bt_link_exist) {
415 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
416 "[BTCoex], No BT link exists!!!\n");
417 return algorithm;
418 }
419
420 if (bt_link_info->sco_exist)
421 num_of_diff_profile++;
422 if (bt_link_info->hid_exist)
423 num_of_diff_profile++;
424 if (bt_link_info->pan_exist)
425 num_of_diff_profile++;
426 if (bt_link_info->a2dp_exist)
427 num_of_diff_profile++;
428
429 if (num_of_diff_profile == 1) {
430 if (bt_link_info->sco_exist) {
431 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
432 "[BTCoex], SCO only\n");
433 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
434 } else {
435 if (bt_link_info->hid_exist) {
436 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
437 "[BTCoex], HID only\n");
438 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
439 } else if (bt_link_info->a2dp_exist) {
440 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
441 "[BTCoex], A2DP only\n");
442 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP;
443 } else if (bt_link_info->pan_exist) {
444 if (bt_hs_on) {
445 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
446 "[BTCoex], PAN(HS) only\n");
447 algorithm =
448 BT_8723B_2ANT_COEX_ALGO_PANHS;
449 } else {
450 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
451 "[BTCoex], PAN(EDR) only\n");
452 algorithm =
453 BT_8723B_2ANT_COEX_ALGO_PANEDR;
454 }
455 }
456 }
457 } else if (num_of_diff_profile == 2) {
458 if (bt_link_info->sco_exist) {
459 if (bt_link_info->hid_exist) {
460 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
461 "[BTCoex], SCO + HID\n");
462 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
463 } else if (bt_link_info->a2dp_exist) {
464 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
465 "[BTCoex], SCO + A2DP ==> SCO\n");
466 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
467 } else if (bt_link_info->pan_exist) {
468 if (bt_hs_on) {
469 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
470 "[BTCoex], SCO + PAN(HS)\n");
471 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
472 } else {
473 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
474 "[BTCoex], SCO + PAN(EDR)\n");
475 algorithm =
476 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
477 }
478 }
479 } else {
480 if (bt_link_info->hid_exist &&
481 bt_link_info->a2dp_exist) {
482 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
483 "[BTCoex], HID + A2DP\n");
484 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
485 } else if (bt_link_info->hid_exist &&
486 bt_link_info->pan_exist) {
487 if (bt_hs_on) {
488 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
489 "[BTCoex], HID + PAN(HS)\n");
490 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
491 } else {
492 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
493 "[BTCoex], HID + PAN(EDR)\n");
494 algorithm =
495 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
496 }
497 } else if (bt_link_info->pan_exist &&
498 bt_link_info->a2dp_exist) {
499 if (bt_hs_on) {
500 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
501 "[BTCoex], A2DP + PAN(HS)\n");
502 algorithm =
503 BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS;
504 } else {
505 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
506 "[BTCoex],A2DP + PAN(EDR)\n");
507 algorithm =
508 BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP;
509 }
510 }
511 }
512 } else if (num_of_diff_profile == 3) {
513 if (bt_link_info->sco_exist) {
514 if (bt_link_info->hid_exist &&
515 bt_link_info->a2dp_exist) {
516 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
517 "[BTCoex], SCO + HID + A2DP"
518 " ==> HID\n");
519 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
520 } else if (bt_link_info->hid_exist &&
521 bt_link_info->pan_exist) {
522 if (bt_hs_on) {
523 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
524 "[BTCoex], SCO + HID + "
525 "PAN(HS)\n");
526 algorithm =
527 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
528 } else {
529 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
530 "[BTCoex], SCO + HID + "
531 "PAN(EDR)\n");
532 algorithm =
533 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
534 }
535 } else if (bt_link_info->pan_exist &&
536 bt_link_info->a2dp_exist) {
537 if (bt_hs_on) {
538 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
539 "[BTCoex], SCO + A2DP + "
540 "PAN(HS)\n");
541 algorithm =
542 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
543 } else {
544 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
545 "[BTCoex], SCO + A2DP + "
546 "PAN(EDR) ==> HID\n");
547 algorithm =
548 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
549 }
550 }
551 } else {
552 if (bt_link_info->hid_exist &&
553 bt_link_info->pan_exist &&
554 bt_link_info->a2dp_exist) {
555 if (bt_hs_on) {
556 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
557 "[BTCoex], HID + A2DP + "
558 "PAN(HS)\n");
559 algorithm =
560 BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
561 } else {
562 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
563 "[BTCoex], HID + A2DP + "
564 "PAN(EDR)\n");
565 algorithm =
566 BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
567 }
568 }
569 }
570 } else if (num_of_diff_profile >= 3) {
571 if (bt_link_info->sco_exist) {
572 if (bt_link_info->hid_exist &&
573 bt_link_info->pan_exist &&
574 bt_link_info->a2dp_exist) {
575 if (bt_hs_on) {
576 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
577 "[BTCoex], Error!!! SCO + HID"
578 " + A2DP + PAN(HS)\n");
579 } else {
580 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
581 "[BTCoex], SCO + HID + A2DP +"
582 " PAN(EDR)==>PAN(EDR)+HID\n");
583 algorithm =
584 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
585 }
586 }
587 }
588 }
589 return algorithm;
590}
591
592static bool btc8723b_need_dec_pwr(struct btc_coexist *btcoexist)
593{
594 bool ret = false;
595 bool bt_hs_on = false, wifi_connected = false;
596 s32 bt_hs_rssi = 0;
597 u8 bt_rssi_state;
598
599 if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on))
600 return false;
601 if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
602 &wifi_connected))
603 return false;
604 if (!btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi))
605 return false;
606
607 bt_rssi_state = btc8723b2ant_bt_rssi_state(2, 35, 0);
608
609 if (wifi_connected) {
610 if (bt_hs_on) {
611 if (bt_hs_rssi > 37) {
612 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
613 "[BTCoex], Need to decrease bt "
614 "power for HS mode!!\n");
615 ret = true;
616 }
617 } else {
618 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
619 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
620 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
621 "[BTCoex], Need to decrease bt "
622 "power for Wifi is connected!!\n");
623 ret = true;
624 }
625 }
626 }
627
628 return ret;
629}
630
631static void btc8723b2ant_set_fw_dac_swing_level(struct btc_coexist *btcoexist,
632 u8 dac_swing_lvl)
633{
634 u8 h2c_parameter[1] = {0};
635
636 /* There are several type of dacswing
637 * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
638 */
639 h2c_parameter[0] = dac_swing_lvl;
640
641 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
642 "[BTCoex], Set Dac Swing Level=0x%x\n", dac_swing_lvl);
643 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
644 "[BTCoex], FW write 0x64=0x%x\n", h2c_parameter[0]);
645
646 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
647}
648
649static void btc8723b2ant_set_fw_dec_bt_pwr(struct btc_coexist *btcoexist,
650 bool dec_bt_pwr)
651{
652 u8 h2c_parameter[1] = {0};
653
654 h2c_parameter[0] = 0;
655
656 if (dec_bt_pwr)
657 h2c_parameter[0] |= BIT1;
658
659 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
660 "[BTCoex], decrease Bt Power : %s, FW write 0x62=0x%x\n",
661 (dec_bt_pwr ? "Yes!!" : "No!!"), h2c_parameter[0]);
662
663 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
664}
665
666static void btc8723b2ant_dec_bt_pwr(struct btc_coexist *btcoexist,
667 bool force_exec, bool dec_bt_pwr)
668{
669 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
670 "[BTCoex], %s Dec BT power = %s\n",
671 (force_exec ? "force to" : ""), (dec_bt_pwr ? "ON" : "OFF"));
672 coex_dm->cur_dec_bt_pwr = dec_bt_pwr;
673
674 if (!force_exec) {
675 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
676 "[BTCoex], bPreDecBtPwr=%d, bCurDecBtPwr=%d\n",
677 coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
678
679 if (coex_dm->pre_dec_bt_pwr == coex_dm->cur_dec_bt_pwr)
680 return;
681 }
682 btc8723b2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr);
683
684 coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
685}
686
687static void btc8723b2ant_fw_dac_swing_lvl(struct btc_coexist *btcoexist,
688 bool force_exec, u8 fw_dac_swing_lvl)
689{
690 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
691 "[BTCoex], %s set FW Dac Swing level = %d\n",
692 (force_exec ? "force to" : ""), fw_dac_swing_lvl);
693 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
694
695 if (!force_exec) {
696 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
697 "[BTCoex], preFwDacSwingLvl=%d, "
698 "curFwDacSwingLvl=%d\n",
699 coex_dm->pre_fw_dac_swing_lvl,
700 coex_dm->cur_fw_dac_swing_lvl);
701
702 if (coex_dm->pre_fw_dac_swing_lvl ==
703 coex_dm->cur_fw_dac_swing_lvl)
704 return;
705 }
706
707 btc8723b2ant_set_fw_dac_swing_level(btcoexist,
708 coex_dm->cur_fw_dac_swing_lvl);
709 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
710}
711
712static void btc8723b2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
713 bool rx_rf_shrink_on)
714{
715 if (rx_rf_shrink_on) {
716 /* Shrink RF Rx LPF corner */
717 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
718 "[BTCoex], Shrink RF Rx LPF corner!!\n");
719 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
720 0xfffff, 0xffffc);
721 } else {
722 /* Resume RF Rx LPF corner */
723 /* After initialized, we can use coex_dm->btRf0x1eBackup */
724 if (btcoexist->initilized) {
725 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
726 "[BTCoex], Resume RF Rx LPF corner!!\n");
727 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
728 0xfffff,
729 coex_dm->bt_rf0x1e_backup);
730 }
731 }
732}
733
734static void btc8723b2ant_rf_shrink(struct btc_coexist *btcoexist,
735 bool force_exec, bool rx_rf_shrink_on)
736{
737 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
738 "[BTCoex], %s turn Rx RF Shrink = %s\n",
739 (force_exec ? "force to" : ""), (rx_rf_shrink_on ?
740 "ON" : "OFF"));
741 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
742
743 if (!force_exec) {
744 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
745 "[BTCoex], bPreRfRxLpfShrink=%d, "
746 "bCurRfRxLpfShrink=%d\n",
747 coex_dm->pre_rf_rx_lpf_shrink,
748 coex_dm->cur_rf_rx_lpf_shrink);
749
750 if (coex_dm->pre_rf_rx_lpf_shrink ==
751 coex_dm->cur_rf_rx_lpf_shrink)
752 return;
753 }
754 btc8723b2ant_set_sw_rf_rx_lpf_corner(btcoexist,
755 coex_dm->cur_rf_rx_lpf_shrink);
756
757 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
758}
759
760static void btc8723b_set_penalty_txrate(struct btc_coexist *btcoexist,
761 bool low_penalty_ra)
762{
763 u8 h2c_parameter[6] = {0};
764
765 h2c_parameter[0] = 0x6; /* opCode, 0x6= Retry_Penalty*/
766
767 if (low_penalty_ra) {
768 h2c_parameter[1] |= BIT0;
769 /*normal rate except MCS7/6/5, OFDM54/48/36*/
770 h2c_parameter[2] = 0x00;
771 h2c_parameter[3] = 0xf7; /*MCS7 or OFDM54*/
772 h2c_parameter[4] = 0xf8; /*MCS6 or OFDM48*/
773 h2c_parameter[5] = 0xf9; /*MCS5 or OFDM36*/
774 }
775
776 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
777 "[BTCoex], set WiFi Low-Penalty Retry: %s",
778 (low_penalty_ra ? "ON!!" : "OFF!!"));
779
780 btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
781}
782
783static void btc8723b2ant_low_penalty_ra(struct btc_coexist *btcoexist,
784 bool force_exec, bool low_penalty_ra)
785{
786 /*return; */
787 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
788 "[BTCoex], %s turn LowPenaltyRA = %s\n",
789 (force_exec ? "force to" : ""), (low_penalty_ra ?
790 "ON" : "OFF"));
791 coex_dm->cur_low_penalty_ra = low_penalty_ra;
792
793 if (!force_exec) {
794 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
795 "[BTCoex], bPreLowPenaltyRa=%d, "
796 "bCurLowPenaltyRa=%d\n",
797 coex_dm->pre_low_penalty_ra,
798 coex_dm->cur_low_penalty_ra);
799
800 if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
801 return;
802 }
803 btc8723b_set_penalty_txrate(btcoexist, coex_dm->cur_low_penalty_ra);
804
805 coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
806}
807
808static void btc8723b2ant_set_dac_swing_reg(struct btc_coexist *btcoexist,
809 u32 level)
810{
811 u8 val = (u8) level;
812 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
813 "[BTCoex], Write SwDacSwing = 0x%x\n", level);
814 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
815}
816
817static void btc8723b2ant_set_sw_fulltime_dac_swing(struct btc_coexist *btcoex,
818 bool sw_dac_swing_on,
819 u32 sw_dac_swing_lvl)
820{
821 if (sw_dac_swing_on)
822 btc8723b2ant_set_dac_swing_reg(btcoex, sw_dac_swing_lvl);
823 else
824 btc8723b2ant_set_dac_swing_reg(btcoex, 0x18);
825}
826
827
828static void btc8723b2ant_dac_swing(struct btc_coexist *btcoexist,
829 bool force_exec, bool dac_swing_on,
830 u32 dac_swing_lvl)
831{
832 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
833 "[BTCoex], %s turn DacSwing=%s, dac_swing_lvl=0x%x\n",
834 (force_exec ? "force to" : ""),
835 (dac_swing_on ? "ON" : "OFF"), dac_swing_lvl);
836 coex_dm->cur_dac_swing_on = dac_swing_on;
837 coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
838
839 if (!force_exec) {
840 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
841 "[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x,"
842 " bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n",
843 coex_dm->pre_dac_swing_on, coex_dm->pre_dac_swing_lvl,
844 coex_dm->cur_dac_swing_on,
845 coex_dm->cur_dac_swing_lvl);
846
847 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
848 (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl))
849 return;
850 }
851 mdelay(30);
852 btc8723b2ant_set_sw_fulltime_dac_swing(btcoexist, dac_swing_on,
853 dac_swing_lvl);
854
855 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
856 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
857}
858
859static void btc8723b2ant_set_agc_table(struct btc_coexist *btcoexist,
860 bool agc_table_en)
861{
862 u8 rssi_adjust_val = 0;
863
864 /* BB AGC Gain Table */
865 if (agc_table_en) {
866 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
867 "[BTCoex], BB Agc Table On!\n");
868 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6e1A0001);
869 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6d1B0001);
870 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6c1C0001);
871 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6b1D0001);
872 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6a1E0001);
873 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x691F0001);
874 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x68200001);
875 } else {
876 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
877 "[BTCoex], BB Agc Table Off!\n");
878 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
879 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
880 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
881 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
882 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
883 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
884 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa4200001);
885 }
886
887
888 /* RF Gain */
889 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
890 if (agc_table_en) {
891 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
892 "[BTCoex], Agc Table On!\n");
893 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b,
894 0xfffff, 0x38fff);
895 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b,
896 0xfffff, 0x38ffe);
897 } else {
898 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
899 "[BTCoex], Agc Table Off!\n");
900 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b,
901 0xfffff, 0x380c3);
902 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b,
903 0xfffff, 0x28ce6);
904 }
905 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
906
907 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
908
909 if (agc_table_en) {
910 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
911 "[BTCoex], Agc Table On!\n");
912 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40,
913 0xfffff, 0x38fff);
914 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40,
915 0xfffff, 0x38ffe);
916 } else {
917 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
918 "[BTCoex], Agc Table Off!\n");
919 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40,
920 0xfffff, 0x380c3);
921 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40,
922 0xfffff, 0x28ce6);
923 }
924 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
925
926 /* set rssiAdjustVal for wifi module. */
927 if (agc_table_en)
928 rssi_adjust_val = 8;
929 btcoexist->btc_set(btcoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
930 &rssi_adjust_val);
931}
932
933static void btc8723b2ant_agc_table(struct btc_coexist *btcoexist,
934 bool force_exec, bool agc_table_en)
935{
936 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
937 "[BTCoex], %s %s Agc Table\n",
938 (force_exec ? "force to" : ""),
939 (agc_table_en ? "Enable" : "Disable"));
940 coex_dm->cur_agc_table_en = agc_table_en;
941
942 if (!force_exec) {
943 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
944 "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
945 coex_dm->pre_agc_table_en, coex_dm->cur_agc_table_en);
946
947 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
948 return;
949 }
950 btc8723b2ant_set_agc_table(btcoexist, agc_table_en);
951
952 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
953}
954
955static void btc8723b2ant_set_coex_table(struct btc_coexist *btcoexist,
956 u32 val0x6c0, u32 val0x6c4,
957 u32 val0x6c8, u8 val0x6cc)
958{
959 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
960 "[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0);
961 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
962
963 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
964 "[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4);
965 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
966
967 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
968 "[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8);
969 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
970
971 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
972 "[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc);
973 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
974}
975
976static void btc8723b2ant_coex_table(struct btc_coexist *btcoexist,
977 bool force_exec, u32 val0x6c0,
978 u32 val0x6c4, u32 val0x6c8,
979 u8 val0x6cc)
980{
981 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
982 "[BTCoex], %s write Coex Table 0x6c0=0x%x,"
983 " 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
984 (force_exec ? "force to" : ""), val0x6c0,
985 val0x6c4, val0x6c8, val0x6cc);
986 coex_dm->cur_val0x6c0 = val0x6c0;
987 coex_dm->cur_val0x6c4 = val0x6c4;
988 coex_dm->cur_val0x6c8 = val0x6c8;
989 coex_dm->cur_val0x6cc = val0x6cc;
990
991 if (!force_exec) {
992 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
993 "[BTCoex], preVal0x6c0=0x%x, "
994 "preVal0x6c4=0x%x, preVal0x6c8=0x%x, "
995 "preVal0x6cc=0x%x !!\n",
996 coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4,
997 coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc);
998 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
999 "[BTCoex], curVal0x6c0=0x%x, "
1000 "curVal0x6c4=0x%x, curVal0x6c8=0x%x, "
1001 "curVal0x6cc=0x%x !!\n",
1002 coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4,
1003 coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc);
1004
1005 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1006 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1007 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1008 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1009 return;
1010 }
1011 btc8723b2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
1012 val0x6c8, val0x6cc);
1013
1014 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1015 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1016 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1017 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1018}
1019
1020static void btc8723b_coex_tbl_type(struct btc_coexist *btcoexist,
1021 bool force_exec, u8 type)
1022{
1023 switch (type) {
1024 case 0:
1025 btc8723b2ant_coex_table(btcoexist, force_exec, 0x55555555,
1026 0x55555555, 0xffff, 0x3);
1027 break;
1028 case 1:
1029 btc8723b2ant_coex_table(btcoexist, force_exec, 0x55555555,
1030 0x5afa5afa, 0xffff, 0x3);
1031 break;
1032 case 2:
1033 btc8723b2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
1034 0x5a5a5a5a, 0xffff, 0x3);
1035 break;
1036 case 3:
1037 btc8723b2ant_coex_table(btcoexist, force_exec, 0xaaaaaaaa,
1038 0xaaaaaaaa, 0xffff, 0x3);
1039 break;
1040 case 4:
1041 btc8723b2ant_coex_table(btcoexist, force_exec, 0xffffffff,
1042 0xffffffff, 0xffff, 0x3);
1043 break;
1044 case 5:
1045 btc8723b2ant_coex_table(btcoexist, force_exec, 0x5fff5fff,
1046 0x5fff5fff, 0xffff, 0x3);
1047 break;
1048 case 6:
1049 btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
1050 0x5a5a5a5a, 0xffff, 0x3);
1051 break;
1052 case 7:
1053 btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
1054 0x5afa5afa, 0xffff, 0x3);
1055 break;
1056 case 8:
1057 btc8723b2ant_coex_table(btcoexist, force_exec, 0x5aea5aea,
1058 0x5aea5aea, 0xffff, 0x3);
1059 break;
1060 case 9:
1061 btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
1062 0x5aea5aea, 0xffff, 0x3);
1063 break;
1064 case 10:
1065 btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
1066 0x5aff5aff, 0xffff, 0x3);
1067 break;
1068 case 11:
1069 btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
1070 0x5a5f5a5f, 0xffff, 0x3);
1071 break;
1072 case 12:
1073 btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
1074 0x5f5f5f5f, 0xffff, 0x3);
1075 break;
1076 default:
1077 break;
1078 }
1079}
1080
1081static void btc8723b2ant_set_fw_ignore_wlan_act(struct btc_coexist *btcoexist,
1082 bool enable)
1083{
1084 u8 h2c_parameter[1] = {0};
1085
1086 if (enable)
1087 h2c_parameter[0] |= BIT0;/* function enable*/
1088
1089 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1090 "[BTCoex], set FW for BT Ignore Wlan_Act, "
1091 "FW write 0x63=0x%x\n", h2c_parameter[0]);
1092
1093 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1094}
1095
1096static void btc8723b2ant_ignore_wlan_act(struct btc_coexist *btcoexist,
1097 bool force_exec, bool enable)
1098{
1099 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1100 "[BTCoex], %s turn Ignore WlanAct %s\n",
1101 (force_exec ? "force to" : ""), (enable ? "ON" : "OFF"));
1102 coex_dm->cur_ignore_wlan_act = enable;
1103
1104 if (!force_exec) {
1105 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1106 "[BTCoex], bPreIgnoreWlanAct = %d, "
1107 "bCurIgnoreWlanAct = %d!!\n",
1108 coex_dm->pre_ignore_wlan_act,
1109 coex_dm->cur_ignore_wlan_act);
1110
1111 if (coex_dm->pre_ignore_wlan_act ==
1112 coex_dm->cur_ignore_wlan_act)
1113 return;
1114 }
1115 btc8723b2ant_set_fw_ignore_wlan_act(btcoexist, enable);
1116
1117 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1118}
1119
1120static void btc8723b2ant_set_fw_ps_tdma(struct btc_coexist *btcoexist, u8 byte1,
1121 u8 byte2, u8 byte3, u8 byte4, u8 byte5)
1122{
1123 u8 h2c_parameter[5];
1124
1125 h2c_parameter[0] = byte1;
1126 h2c_parameter[1] = byte2;
1127 h2c_parameter[2] = byte3;
1128 h2c_parameter[3] = byte4;
1129 h2c_parameter[4] = byte5;
1130
1131 coex_dm->ps_tdma_para[0] = byte1;
1132 coex_dm->ps_tdma_para[1] = byte2;
1133 coex_dm->ps_tdma_para[2] = byte3;
1134 coex_dm->ps_tdma_para[3] = byte4;
1135 coex_dm->ps_tdma_para[4] = byte5;
1136
1137 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1138 "[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n",
1139 h2c_parameter[0],
1140 h2c_parameter[1] << 24 | h2c_parameter[2] << 16 |
1141 h2c_parameter[3] << 8 | h2c_parameter[4]);
1142
1143 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1144}
1145
1146static void btc8723b2ant_sw_mechanism1(struct btc_coexist *btcoexist,
1147 bool shrink_rx_lpf, bool low_penalty_ra,
1148 bool limited_dig, bool bt_lna_constrain)
1149{
1150 btc8723b2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1151 btc8723b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
1152}
1153
1154static void btc8723b2ant_sw_mechanism2(struct btc_coexist *btcoexist,
1155 bool agc_table_shift, bool adc_backoff,
1156 bool sw_dac_swing, u32 dac_swing_lvl)
1157{
1158 btc8723b2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift);
1159 btc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1160 dac_swing_lvl);
1161}
1162
1163static void btc8723b2ant_ps_tdma(struct btc_coexist *btcoexist, bool force_exec,
1164 bool turn_on, u8 type)
1165{
1166 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1167 "[BTCoex], %s turn %s PS TDMA, type=%d\n",
1168 (force_exec ? "force to" : ""),
1169 (turn_on ? "ON" : "OFF"), type);
1170 coex_dm->cur_ps_tdma_on = turn_on;
1171 coex_dm->cur_ps_tdma = type;
1172
1173 if (!force_exec) {
1174 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1175 "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
1176 coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on);
1177 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1178 "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
1179 coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma);
1180
1181 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1182 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1183 return;
1184 }
1185 if (turn_on) {
1186 switch (type) {
1187 case 1:
1188 default:
1189 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
1190 0x1a, 0xe1, 0x90);
1191 break;
1192 case 2:
1193 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
1194 0x12, 0xe1, 0x90);
1195 break;
1196 case 3:
1197 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
1198 0x3, 0xf1, 0x90);
1199 break;
1200 case 4:
1201 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10,
1202 0x03, 0xf1, 0x90);
1203 break;
1204 case 5:
1205 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
1206 0x1a, 0x60, 0x90);
1207 break;
1208 case 6:
1209 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
1210 0x12, 0x60, 0x90);
1211 break;
1212 case 7:
1213 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
1214 0x3, 0x70, 0x90);
1215 break;
1216 case 8:
1217 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x10,
1218 0x3, 0x70, 0x90);
1219 break;
1220 case 9:
1221 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
1222 0x1a, 0xe1, 0x90);
1223 break;
1224 case 10:
1225 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
1226 0x12, 0xe1, 0x90);
1227 break;
1228 case 11:
1229 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0xa,
1230 0xa, 0xe1, 0x90);
1231 break;
1232 case 12:
1233 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5,
1234 0x5, 0xe1, 0x90);
1235 break;
1236 case 13:
1237 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
1238 0x1a, 0x60, 0x90);
1239 break;
1240 case 14:
1241 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
1242 0x12, 0x60, 0x90);
1243 break;
1244 case 15:
1245 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0xa,
1246 0xa, 0x60, 0x90);
1247 break;
1248 case 16:
1249 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5,
1250 0x5, 0x60, 0x90);
1251 break;
1252 case 17:
1253 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x2f,
1254 0x2f, 0x60, 0x90);
1255 break;
1256 case 18:
1257 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5,
1258 0x5, 0xe1, 0x90);
1259 break;
1260 case 19:
1261 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25,
1262 0x25, 0xe1, 0x90);
1263 break;
1264 case 20:
1265 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25,
1266 0x25, 0x60, 0x90);
1267 break;
1268 case 21:
1269 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x15,
1270 0x03, 0x70, 0x90);
1271 break;
1272 case 71:
1273 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
1274 0x1a, 0xe1, 0x90);
1275 break;
1276 }
1277 } else {
1278 /* disable PS tdma */
1279 switch (type) {
1280 case 0:
1281 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0,
1282 0x40, 0x0);
1283 break;
1284 case 1:
1285 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0,
1286 0x48, 0x0);
1287 break;
1288 default:
1289 btc8723b2ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0,
1290 0x40, 0x0);
1291 break;
1292 }
1293 }
1294
1295 /* update pre state */
1296 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1297 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1298}
1299
1300static void btc8723b2ant_coex_alloff(struct btc_coexist *btcoexist)
1301{
1302 /* fw all off */
1303 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1304 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1305 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1306
1307 /* sw all off */
1308 btc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
1309 btc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1310
1311 /* hw all off */
1312 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
1313 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 0);
1314}
1315
1316static void btc8723b2ant_init_coex_dm(struct btc_coexist *btcoexist)
1317{
1318 /* force to reset coex mechanism*/
1319
1320 btc8723b2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1321 btc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1322 btc8723b2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, false);
1323
1324 btc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
1325 btc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1326}
1327
1328static void btc8723b2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
1329{
1330 bool wifi_connected = false;
1331 bool low_pwr_disable = true;
1332
1333 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1334 &low_pwr_disable);
1335 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1336 &wifi_connected);
1337
1338 if (wifi_connected) {
1339 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
1340 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1341 } else {
1342 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 0);
1343 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1344 }
1345 btc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1346 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1347
1348 btc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
1349 btc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1350
1351 coex_dm->need_recover_0x948 = true;
1352 coex_dm->backup_0x948 = btcoexist->btc_read_2byte(btcoexist, 0x948);
1353
1354 btcoexist->btc_write_2byte(btcoexist, 0x948, 0x280);
1355}
1356
1357static bool btc8723b2ant_is_common_action(struct btc_coexist *btcoexist)
1358{
1359 bool common = false, wifi_connected = false;
1360 bool wifi_busy = false;
1361 bool bt_hs_on = false, low_pwr_disable = false;
1362
1363 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
1364 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1365 &wifi_connected);
1366 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1367
1368 if (!wifi_connected) {
1369 low_pwr_disable = false;
1370 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1371 &low_pwr_disable);
1372
1373 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1374 "[BTCoex], Wifi non-connected idle!!\n");
1375
1376 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
1377 0x0);
1378 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 0);
1379 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1380 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1381 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1382
1383 btc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
1384 false);
1385 btc8723b2ant_sw_mechanism2(btcoexist, false, false, false,
1386 0x18);
1387
1388 common = true;
1389 } else {
1390 if (BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1391 coex_dm->bt_status) {
1392 low_pwr_disable = false;
1393 btcoexist->btc_set(btcoexist,
1394 BTC_SET_ACT_DISABLE_LOW_POWER,
1395 &low_pwr_disable);
1396
1397 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1398 "[BTCoex], Wifi connected + "
1399 "BT non connected-idle!!\n");
1400
1401 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
1402 0xfffff, 0x0);
1403 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 0);
1404 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1405 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
1406 0xb);
1407 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
1408 false);
1409
1410 btc8723b2ant_sw_mechanism1(btcoexist, false, false,
1411 false, false);
1412 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
1413 false, 0x18);
1414
1415 common = true;
1416 } else if (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE ==
1417 coex_dm->bt_status) {
1418 low_pwr_disable = true;
1419 btcoexist->btc_set(btcoexist,
1420 BTC_SET_ACT_DISABLE_LOW_POWER,
1421 &low_pwr_disable);
1422
1423 if (bt_hs_on)
1424 return false;
1425 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1426 "[BTCoex], Wifi connected + "
1427 "BT connected-idle!!\n");
1428
1429 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
1430 0xfffff, 0x0);
1431 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 0);
1432 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1433 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
1434 0xb);
1435 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
1436 false);
1437
1438 btc8723b2ant_sw_mechanism1(btcoexist, true, false,
1439 false, false);
1440 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
1441 false, 0x18);
1442
1443 common = true;
1444 } else {
1445 low_pwr_disable = true;
1446 btcoexist->btc_set(btcoexist,
1447 BTC_SET_ACT_DISABLE_LOW_POWER,
1448 &low_pwr_disable);
1449
1450 if (wifi_busy) {
1451 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1452 "[BTCoex], Wifi Connected-Busy + "
1453 "BT Busy!!\n");
1454 common = false;
1455 } else {
1456 if (bt_hs_on)
1457 return false;
1458
1459 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1460 "[BTCoex], Wifi Connected-Idle + "
1461 "BT Busy!!\n");
1462
1463 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
1464 0x1, 0xfffff, 0x0);
1465 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC,
1466 7);
1467 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1468 true, 21);
1469 btc8723b2ant_fw_dac_swing_lvl(btcoexist,
1470 NORMAL_EXEC,
1471 0xb);
1472 if (btc8723b_need_dec_pwr(btcoexist))
1473 btc8723b2ant_dec_bt_pwr(btcoexist,
1474 NORMAL_EXEC,
1475 true);
1476 else
1477 btc8723b2ant_dec_bt_pwr(btcoexist,
1478 NORMAL_EXEC,
1479 false);
1480 btc8723b2ant_sw_mechanism1(btcoexist, false,
1481 false, false,
1482 false);
1483 btc8723b2ant_sw_mechanism2(btcoexist, false,
1484 false, false,
1485 0x18);
1486 common = true;
1487 }
1488 }
1489 }
1490
1491 return common;
1492}
1493
1494static void set_tdma_int1(struct btc_coexist *btcoexist, bool tx_pause,
1495 s32 result)
1496{
1497 /* Set PS TDMA for max interval == 1 */
1498 if (tx_pause) {
1499 BTC_PRINT(BTC_MSG_ALGORITHM,
1500 ALGO_TRACE_FW_DETAIL,
1501 "[BTCoex], TxPause = 1\n");
1502
1503 if (coex_dm->cur_ps_tdma == 71) {
1504 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1505 true, 5);
1506 coex_dm->tdma_adj_type = 5;
1507 } else if (coex_dm->cur_ps_tdma == 1) {
1508 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1509 true, 5);
1510 coex_dm->tdma_adj_type = 5;
1511 } else if (coex_dm->cur_ps_tdma == 2) {
1512 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1513 true, 6);
1514 coex_dm->tdma_adj_type = 6;
1515 } else if (coex_dm->cur_ps_tdma == 3) {
1516 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1517 true, 7);
1518 coex_dm->tdma_adj_type = 7;
1519 } else if (coex_dm->cur_ps_tdma == 4) {
1520 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1521 true, 8);
1522 coex_dm->tdma_adj_type = 8;
1523 } else if (coex_dm->cur_ps_tdma == 9) {
1524 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1525 true, 13);
1526 coex_dm->tdma_adj_type = 13;
1527 } else if (coex_dm->cur_ps_tdma == 10) {
1528 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1529 true, 14);
1530 coex_dm->tdma_adj_type = 14;
1531 } else if (coex_dm->cur_ps_tdma == 11) {
1532 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1533 true, 15);
1534 coex_dm->tdma_adj_type = 15;
1535 } else if (coex_dm->cur_ps_tdma == 12) {
1536 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1537 true, 16);
1538 coex_dm->tdma_adj_type = 16;
1539 }
1540
1541 if (result == -1) {
1542 if (coex_dm->cur_ps_tdma == 5) {
1543 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1544 true, 6);
1545 coex_dm->tdma_adj_type = 6;
1546 } else if (coex_dm->cur_ps_tdma == 6) {
1547 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1548 true, 7);
1549 coex_dm->tdma_adj_type = 7;
1550 } else if (coex_dm->cur_ps_tdma == 7) {
1551 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1552 true, 8);
1553 coex_dm->tdma_adj_type = 8;
1554 } else if (coex_dm->cur_ps_tdma == 13) {
1555 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1556 true, 14);
1557 coex_dm->tdma_adj_type = 14;
1558 } else if (coex_dm->cur_ps_tdma == 14) {
1559 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1560 true, 15);
1561 coex_dm->tdma_adj_type = 15;
1562 } else if (coex_dm->cur_ps_tdma == 15) {
1563 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1564 true, 16);
1565 coex_dm->tdma_adj_type = 16;
1566 }
1567 } else if (result == 1) {
1568 if (coex_dm->cur_ps_tdma == 8) {
1569 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1570 true, 7);
1571 coex_dm->tdma_adj_type = 7;
1572 } else if (coex_dm->cur_ps_tdma == 7) {
1573 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1574 true, 6);
1575 coex_dm->tdma_adj_type = 6;
1576 } else if (coex_dm->cur_ps_tdma == 6) {
1577 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1578 true, 5);
1579 coex_dm->tdma_adj_type = 5;
1580 } else if (coex_dm->cur_ps_tdma == 16) {
1581 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1582 true, 15);
1583 coex_dm->tdma_adj_type = 15;
1584 } else if (coex_dm->cur_ps_tdma == 15) {
1585 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1586 true, 14);
1587 coex_dm->tdma_adj_type = 14;
1588 } else if (coex_dm->cur_ps_tdma == 14) {
1589 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1590 true, 13);
1591 coex_dm->tdma_adj_type = 13;
1592 }
1593 }
1594 } else {
1595 BTC_PRINT(BTC_MSG_ALGORITHM,
1596 ALGO_TRACE_FW_DETAIL,
1597 "[BTCoex], TxPause = 0\n");
1598 if (coex_dm->cur_ps_tdma == 5) {
1599 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 71);
1600 coex_dm->tdma_adj_type = 71;
1601 } else if (coex_dm->cur_ps_tdma == 6) {
1602 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2);
1603 coex_dm->tdma_adj_type = 2;
1604 } else if (coex_dm->cur_ps_tdma == 7) {
1605 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1606 coex_dm->tdma_adj_type = 3;
1607 } else if (coex_dm->cur_ps_tdma == 8) {
1608 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
1609 coex_dm->tdma_adj_type = 4;
1610 } else if (coex_dm->cur_ps_tdma == 13) {
1611 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
1612 coex_dm->tdma_adj_type = 9;
1613 } else if (coex_dm->cur_ps_tdma == 14) {
1614 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
1615 coex_dm->tdma_adj_type = 10;
1616 } else if (coex_dm->cur_ps_tdma == 15) {
1617 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
1618 coex_dm->tdma_adj_type = 11;
1619 } else if (coex_dm->cur_ps_tdma == 16) {
1620 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 12);
1621 coex_dm->tdma_adj_type = 12;
1622 }
1623
1624 if (result == -1) {
1625 if (coex_dm->cur_ps_tdma == 71) {
1626 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1627 true, 1);
1628 coex_dm->tdma_adj_type = 1;
1629 } else if (coex_dm->cur_ps_tdma == 1) {
1630 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1631 true, 2);
1632 coex_dm->tdma_adj_type = 2;
1633 } else if (coex_dm->cur_ps_tdma == 2) {
1634 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1635 true, 3);
1636 coex_dm->tdma_adj_type = 3;
1637 } else if (coex_dm->cur_ps_tdma == 3) {
1638 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1639 true, 4);
1640 coex_dm->tdma_adj_type = 4;
1641 } else if (coex_dm->cur_ps_tdma == 9) {
1642 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1643 true, 10);
1644 coex_dm->tdma_adj_type = 10;
1645 } else if (coex_dm->cur_ps_tdma == 10) {
1646 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1647 true, 11);
1648 coex_dm->tdma_adj_type = 11;
1649 } else if (coex_dm->cur_ps_tdma == 11) {
1650 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1651 true, 12);
1652 coex_dm->tdma_adj_type = 12;
1653 }
1654 } else if (result == 1) {
1655 int tmp = coex_dm->cur_ps_tdma;
1656 switch (tmp) {
1657 case 4:
1658 case 3:
1659 case 2:
1660 case 12:
1661 case 11:
1662 case 10:
1663 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1664 true, tmp - 1);
1665 coex_dm->tdma_adj_type = tmp - 1;
1666 break;
1667 case 1:
1668 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1669 true, 71);
1670 coex_dm->tdma_adj_type = 71;
1671 break;
1672 }
1673 }
1674 }
1675}
1676
1677static void set_tdma_int2(struct btc_coexist *btcoexist, bool tx_pause,
1678 s32 result)
1679{
1680 /* Set PS TDMA for max interval == 2 */
1681 if (tx_pause) {
1682 BTC_PRINT(BTC_MSG_ALGORITHM,
1683 ALGO_TRACE_FW_DETAIL,
1684 "[BTCoex], TxPause = 1\n");
1685 if (coex_dm->cur_ps_tdma == 1) {
1686 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
1687 coex_dm->tdma_adj_type = 6;
1688 } else if (coex_dm->cur_ps_tdma == 2) {
1689 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
1690 coex_dm->tdma_adj_type = 6;
1691 } else if (coex_dm->cur_ps_tdma == 3) {
1692 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 7);
1693 coex_dm->tdma_adj_type = 7;
1694 } else if (coex_dm->cur_ps_tdma == 4) {
1695 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8);
1696 coex_dm->tdma_adj_type = 8;
1697 } else if (coex_dm->cur_ps_tdma == 9) {
1698 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
1699 coex_dm->tdma_adj_type = 14;
1700 } else if (coex_dm->cur_ps_tdma == 10) {
1701 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
1702 coex_dm->tdma_adj_type = 14;
1703 } else if (coex_dm->cur_ps_tdma == 11) {
1704 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 15);
1705 coex_dm->tdma_adj_type = 15;
1706 } else if (coex_dm->cur_ps_tdma == 12) {
1707 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
1708 coex_dm->tdma_adj_type = 16;
1709 }
1710 if (result == -1) {
1711 if (coex_dm->cur_ps_tdma == 5) {
1712 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1713 true, 6);
1714 coex_dm->tdma_adj_type = 6;
1715 } else if (coex_dm->cur_ps_tdma == 6) {
1716 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1717 true, 7);
1718 coex_dm->tdma_adj_type = 7;
1719 } else if (coex_dm->cur_ps_tdma == 7) {
1720 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1721 true, 8);
1722 coex_dm->tdma_adj_type = 8;
1723 } else if (coex_dm->cur_ps_tdma == 13) {
1724 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1725 true, 14);
1726 coex_dm->tdma_adj_type = 14;
1727 } else if (coex_dm->cur_ps_tdma == 14) {
1728 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1729 true, 15);
1730 coex_dm->tdma_adj_type = 15;
1731 } else if (coex_dm->cur_ps_tdma == 15) {
1732 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1733 true, 16);
1734 coex_dm->tdma_adj_type = 16;
1735 }
1736 } else if (result == 1) {
1737 if (coex_dm->cur_ps_tdma == 8) {
1738 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1739 true, 7);
1740 coex_dm->tdma_adj_type = 7;
1741 } else if (coex_dm->cur_ps_tdma == 7) {
1742 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1743 true, 6);
1744 coex_dm->tdma_adj_type = 6;
1745 } else if (coex_dm->cur_ps_tdma == 6) {
1746 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1747 true, 6);
1748 coex_dm->tdma_adj_type = 6;
1749 } else if (coex_dm->cur_ps_tdma == 16) {
1750 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1751 true, 15);
1752 coex_dm->tdma_adj_type = 15;
1753 } else if (coex_dm->cur_ps_tdma == 15) {
1754 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1755 true, 14);
1756 coex_dm->tdma_adj_type = 14;
1757 } else if (coex_dm->cur_ps_tdma == 14) {
1758 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1759 true, 14);
1760 coex_dm->tdma_adj_type = 14;
1761 }
1762 }
1763 } else {
1764 BTC_PRINT(BTC_MSG_ALGORITHM,
1765 ALGO_TRACE_FW_DETAIL,
1766 "[BTCoex], TxPause = 0\n");
1767 if (coex_dm->cur_ps_tdma == 5) {
1768 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2);
1769 coex_dm->tdma_adj_type = 2;
1770 } else if (coex_dm->cur_ps_tdma == 6) {
1771 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2);
1772 coex_dm->tdma_adj_type = 2;
1773 } else if (coex_dm->cur_ps_tdma == 7) {
1774 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1775 coex_dm->tdma_adj_type = 3;
1776 } else if (coex_dm->cur_ps_tdma == 8) {
1777 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
1778 coex_dm->tdma_adj_type = 4;
1779 } else if (coex_dm->cur_ps_tdma == 13) {
1780 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
1781 coex_dm->tdma_adj_type = 10;
1782 } else if (coex_dm->cur_ps_tdma == 14) {
1783 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
1784 coex_dm->tdma_adj_type = 10;
1785 } else if (coex_dm->cur_ps_tdma == 15) {
1786 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
1787 coex_dm->tdma_adj_type = 11;
1788 } else if (coex_dm->cur_ps_tdma == 16) {
1789 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 12);
1790 coex_dm->tdma_adj_type = 12;
1791 }
1792 if (result == -1) {
1793 if (coex_dm->cur_ps_tdma == 1) {
1794 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1795 true, 2);
1796 coex_dm->tdma_adj_type = 2;
1797 } else if (coex_dm->cur_ps_tdma == 2) {
1798 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1799 true, 3);
1800 coex_dm->tdma_adj_type = 3;
1801 } else if (coex_dm->cur_ps_tdma == 3) {
1802 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1803 true, 4);
1804 coex_dm->tdma_adj_type = 4;
1805 } else if (coex_dm->cur_ps_tdma == 9) {
1806 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1807 true, 10);
1808 coex_dm->tdma_adj_type = 10;
1809 } else if (coex_dm->cur_ps_tdma == 10) {
1810 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1811 true, 11);
1812 coex_dm->tdma_adj_type = 11;
1813 } else if (coex_dm->cur_ps_tdma == 11) {
1814 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1815 true, 12);
1816 coex_dm->tdma_adj_type = 12;
1817 }
1818 } else if (result == 1) {
1819 if (coex_dm->cur_ps_tdma == 4) {
1820 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1821 true, 3);
1822 coex_dm->tdma_adj_type = 3;
1823 } else if (coex_dm->cur_ps_tdma == 3) {
1824 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1825 true, 2);
1826 coex_dm->tdma_adj_type = 2;
1827 } else if (coex_dm->cur_ps_tdma == 2) {
1828 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1829 true, 2);
1830 coex_dm->tdma_adj_type = 2;
1831 } else if (coex_dm->cur_ps_tdma == 12) {
1832 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1833 true, 11);
1834 coex_dm->tdma_adj_type = 11;
1835 } else if (coex_dm->cur_ps_tdma == 11) {
1836 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1837 true, 10);
1838 coex_dm->tdma_adj_type = 10;
1839 } else if (coex_dm->cur_ps_tdma == 10) {
1840 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1841 true, 10);
1842 coex_dm->tdma_adj_type = 10;
1843 }
1844 }
1845 }
1846}
1847
1848static void set_tdma_int3(struct btc_coexist *btcoexist, bool tx_pause,
1849 s32 result)
1850{
1851 /* Set PS TDMA for max interval == 3 */
1852 if (tx_pause) {
1853 BTC_PRINT(BTC_MSG_ALGORITHM,
1854 ALGO_TRACE_FW_DETAIL,
1855 "[BTCoex], TxPause = 1\n");
1856 if (coex_dm->cur_ps_tdma == 1) {
1857 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 7);
1858 coex_dm->tdma_adj_type = 7;
1859 } else if (coex_dm->cur_ps_tdma == 2) {
1860 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 7);
1861 coex_dm->tdma_adj_type = 7;
1862 } else if (coex_dm->cur_ps_tdma == 3) {
1863 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 7);
1864 coex_dm->tdma_adj_type = 7;
1865 } else if (coex_dm->cur_ps_tdma == 4) {
1866 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8);
1867 coex_dm->tdma_adj_type = 8;
1868 } else if (coex_dm->cur_ps_tdma == 9) {
1869 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 15);
1870 coex_dm->tdma_adj_type = 15;
1871 } else if (coex_dm->cur_ps_tdma == 10) {
1872 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 15);
1873 coex_dm->tdma_adj_type = 15;
1874 } else if (coex_dm->cur_ps_tdma == 11) {
1875 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 15);
1876 coex_dm->tdma_adj_type = 15;
1877 } else if (coex_dm->cur_ps_tdma == 12) {
1878 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
1879 coex_dm->tdma_adj_type = 16;
1880 }
1881 if (result == -1) {
1882 if (coex_dm->cur_ps_tdma == 5) {
1883 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1884 true, 7);
1885 coex_dm->tdma_adj_type = 7;
1886 } else if (coex_dm->cur_ps_tdma == 6) {
1887 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1888 true, 7);
1889 coex_dm->tdma_adj_type = 7;
1890 } else if (coex_dm->cur_ps_tdma == 7) {
1891 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1892 true, 8);
1893 coex_dm->tdma_adj_type = 8;
1894 } else if (coex_dm->cur_ps_tdma == 13) {
1895 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1896 true, 15);
1897 coex_dm->tdma_adj_type = 15;
1898 } else if (coex_dm->cur_ps_tdma == 14) {
1899 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1900 true, 15);
1901 coex_dm->tdma_adj_type = 15;
1902 } else if (coex_dm->cur_ps_tdma == 15) {
1903 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1904 true, 16);
1905 coex_dm->tdma_adj_type = 16;
1906 }
1907 } else if (result == 1) {
1908 if (coex_dm->cur_ps_tdma == 8) {
1909 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1910 true, 7);
1911 coex_dm->tdma_adj_type = 7;
1912 } else if (coex_dm->cur_ps_tdma == 7) {
1913 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1914 true, 7);
1915 coex_dm->tdma_adj_type = 7;
1916 } else if (coex_dm->cur_ps_tdma == 6) {
1917 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1918 true, 7);
1919 coex_dm->tdma_adj_type = 7;
1920 } else if (coex_dm->cur_ps_tdma == 16) {
1921 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1922 true, 15);
1923 coex_dm->tdma_adj_type = 15;
1924 } else if (coex_dm->cur_ps_tdma == 15) {
1925 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1926 true, 15);
1927 coex_dm->tdma_adj_type = 15;
1928 } else if (coex_dm->cur_ps_tdma == 14) {
1929 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1930 true, 15);
1931 coex_dm->tdma_adj_type = 15;
1932 }
1933 }
1934 } else {
1935 BTC_PRINT(BTC_MSG_ALGORITHM,
1936 ALGO_TRACE_FW_DETAIL,
1937 "[BTCoex], TxPause = 0\n");
1938 switch (coex_dm->cur_ps_tdma) {
1939 case 5:
1940 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1941 coex_dm->tdma_adj_type = 3;
1942 break;
1943 case 6:
1944 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1945 coex_dm->tdma_adj_type = 3;
1946 break;
1947 case 7:
1948 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1949 coex_dm->tdma_adj_type = 3;
1950 break;
1951 case 8:
1952 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
1953 coex_dm->tdma_adj_type = 4;
1954 break;
1955 case 13:
1956 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
1957 coex_dm->tdma_adj_type = 11;
1958 break;
1959 case 14:
1960 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
1961 coex_dm->tdma_adj_type = 11;
1962 break;
1963 case 15:
1964 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
1965 coex_dm->tdma_adj_type = 11;
1966 break;
1967 case 16:
1968 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 12);
1969 coex_dm->tdma_adj_type = 12;
1970 break;
1971 }
1972 if (result == -1) {
1973 switch (coex_dm->cur_ps_tdma) {
1974 case 1:
1975 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1976 true, 3);
1977 coex_dm->tdma_adj_type = 3;
1978 break;
1979 case 2:
1980 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1981 true, 3);
1982 coex_dm->tdma_adj_type = 3;
1983 break;
1984 case 3:
1985 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1986 true, 4);
1987 coex_dm->tdma_adj_type = 4;
1988 break;
1989 case 9:
1990 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1991 true, 11);
1992 coex_dm->tdma_adj_type = 11;
1993 break;
1994 case 10:
1995 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1996 true, 11);
1997 coex_dm->tdma_adj_type = 11;
1998 break;
1999 case 11:
2000 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2001 true, 12);
2002 coex_dm->tdma_adj_type = 12;
2003 break;
2004 }
2005 } else if (result == 1) {
2006 switch (coex_dm->cur_ps_tdma) {
2007 case 4:
2008 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2009 true, 3);
2010 coex_dm->tdma_adj_type = 3;
2011 break;
2012 case 3:
2013 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2014 true, 3);
2015 coex_dm->tdma_adj_type = 3;
2016 break;
2017 case 2:
2018 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2019 true, 3);
2020 coex_dm->tdma_adj_type = 3;
2021 break;
2022 case 12:
2023 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2024 true, 11);
2025 coex_dm->tdma_adj_type = 11;
2026 break;
2027 case 11:
2028 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2029 true, 11);
2030 coex_dm->tdma_adj_type = 11;
2031 break;
2032 case 10:
2033 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2034 true, 11);
2035 coex_dm->tdma_adj_type = 11;
2036 }
2037 }
2038 }
2039}
2040
2041static void btc8723b2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
2042 bool sco_hid, bool tx_pause,
2043 u8 max_interval)
2044{
2045 static s32 up, dn, m, n, wait_count;
2046 /*0: no change, +1: increase WiFi duration, -1: decrease WiFi duration*/
2047 s32 result;
2048 u8 retry_count = 0;
2049
2050 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
2051 "[BTCoex], TdmaDurationAdjust()\n");
2052
2053 if (!coex_dm->auto_tdma_adjust) {
2054 coex_dm->auto_tdma_adjust = true;
2055 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2056 "[BTCoex], first run TdmaDurationAdjust()!!\n");
2057 if (sco_hid) {
2058 if (tx_pause) {
2059 if (max_interval == 1) {
2060 btc8723b2ant_ps_tdma(btcoexist,
2061 NORMAL_EXEC,
2062 true, 13);
2063 coex_dm->tdma_adj_type = 13;
2064 } else if (max_interval == 2) {
2065 btc8723b2ant_ps_tdma(btcoexist,
2066 NORMAL_EXEC,
2067 true, 14);
2068 coex_dm->tdma_adj_type = 14;
2069 } else if (max_interval == 3) {
2070 btc8723b2ant_ps_tdma(btcoexist,
2071 NORMAL_EXEC,
2072 true, 15);
2073 coex_dm->tdma_adj_type = 15;
2074 } else {
2075 btc8723b2ant_ps_tdma(btcoexist,
2076 NORMAL_EXEC,
2077 true, 15);
2078 coex_dm->tdma_adj_type = 15;
2079 }
2080 } else {
2081 if (max_interval == 1) {
2082 btc8723b2ant_ps_tdma(btcoexist,
2083 NORMAL_EXEC,
2084 true, 9);
2085 coex_dm->tdma_adj_type = 9;
2086 } else if (max_interval == 2) {
2087 btc8723b2ant_ps_tdma(btcoexist,
2088 NORMAL_EXEC,
2089 true, 10);
2090 coex_dm->tdma_adj_type = 10;
2091 } else if (max_interval == 3) {
2092 btc8723b2ant_ps_tdma(btcoexist,
2093 NORMAL_EXEC,
2094 true, 11);
2095 coex_dm->tdma_adj_type = 11;
2096 } else {
2097 btc8723b2ant_ps_tdma(btcoexist,
2098 NORMAL_EXEC,
2099 true, 11);
2100 coex_dm->tdma_adj_type = 11;
2101 }
2102 }
2103 } else {
2104 if (tx_pause) {
2105 if (max_interval == 1) {
2106 btc8723b2ant_ps_tdma(btcoexist,
2107 NORMAL_EXEC,
2108 true, 5);
2109 coex_dm->tdma_adj_type = 5;
2110 } else if (max_interval == 2) {
2111 btc8723b2ant_ps_tdma(btcoexist,
2112 NORMAL_EXEC,
2113 true, 6);
2114 coex_dm->tdma_adj_type = 6;
2115 } else if (max_interval == 3) {
2116 btc8723b2ant_ps_tdma(btcoexist,
2117 NORMAL_EXEC,
2118 true, 7);
2119 coex_dm->tdma_adj_type = 7;
2120 } else {
2121 btc8723b2ant_ps_tdma(btcoexist,
2122 NORMAL_EXEC,
2123 true, 7);
2124 coex_dm->tdma_adj_type = 7;
2125 }
2126 } else {
2127 if (max_interval == 1) {
2128 btc8723b2ant_ps_tdma(btcoexist,
2129 NORMAL_EXEC,
2130 true, 1);
2131 coex_dm->tdma_adj_type = 1;
2132 } else if (max_interval == 2) {
2133 btc8723b2ant_ps_tdma(btcoexist,
2134 NORMAL_EXEC,
2135 true, 2);
2136 coex_dm->tdma_adj_type = 2;
2137 } else if (max_interval == 3) {
2138 btc8723b2ant_ps_tdma(btcoexist,
2139 NORMAL_EXEC,
2140 true, 3);
2141 coex_dm->tdma_adj_type = 3;
2142 } else {
2143 btc8723b2ant_ps_tdma(btcoexist,
2144 NORMAL_EXEC,
2145 true, 3);
2146 coex_dm->tdma_adj_type = 3;
2147 }
2148 }
2149 }
2150
2151 up = 0;
2152 dn = 0;
2153 m = 1;
2154 n = 3;
2155 result = 0;
2156 wait_count = 0;
2157 } else {
2158 /*accquire the BT TRx retry count from BT_Info byte2*/
2159 retry_count = coex_sta->bt_retry_cnt;
2160 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2161 "[BTCoex], retry_count = %d\n", retry_count);
2162 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2163 "[BTCoex], up=%d, dn=%d, m=%d, n=%d, wait_count=%d\n",
2164 up, dn, m, n, wait_count);
2165 result = 0;
2166 wait_count++;
2167 /* no retry in the last 2-second duration*/
2168 if (retry_count == 0) {
2169 up++;
2170 dn--;
2171
2172 if (dn <= 0)
2173 dn = 0;
2174
2175 if (up >= n) {
2176 wait_count = 0;
2177 n = 3;
2178 up = 0;
2179 dn = 0;
2180 result = 1;
2181 BTC_PRINT(BTC_MSG_ALGORITHM,
2182 ALGO_TRACE_FW_DETAIL,
2183 "[BTCoex], Increase wifi "
2184 "duration!!\n");
2185 } /* <=3 retry in the last 2-second duration*/
2186 } else if (retry_count <= 3) {
2187 up--;
2188 dn++;
2189
2190 if (up <= 0)
2191 up = 0;
2192
2193 if (dn == 2) {
2194 if (wait_count <= 2)
2195 m++;
2196 else
2197 m = 1;
2198
2199 if (m >= 20)
2200 m = 20;
2201
2202 n = 3 * m;
2203 up = 0;
2204 dn = 0;
2205 wait_count = 0;
2206 result = -1;
2207 BTC_PRINT(BTC_MSG_ALGORITHM,
2208 ALGO_TRACE_FW_DETAIL,
2209 "[BTCoex], Decrease wifi duration "
2210 "for retry_counter<3!!\n");
2211 }
2212 } else {
2213 if (wait_count == 1)
2214 m++;
2215 else
2216 m = 1;
2217
2218 if (m >= 20)
2219 m = 20;
2220
2221 n = 3 * m;
2222 up = 0;
2223 dn = 0;
2224 wait_count = 0;
2225 result = -1;
2226 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2227 "[BTCoex], Decrease wifi duration "
2228 "for retry_counter>3!!\n");
2229 }
2230
2231 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2232 "[BTCoex], max Interval = %d\n", max_interval);
2233 if (max_interval == 1)
2234 set_tdma_int1(btcoexist, tx_pause, result);
2235 else if (max_interval == 2)
2236 set_tdma_int2(btcoexist, tx_pause, result);
2237 else if (max_interval == 3)
2238 set_tdma_int3(btcoexist, tx_pause, result);
2239 }
2240
2241 /*if current PsTdma not match with the recorded one (when scan, dhcp..),
2242 *then we have to adjust it back to the previous recorded one.
2243 */
2244 if (coex_dm->cur_ps_tdma != coex_dm->tdma_adj_type) {
2245 bool scan = false, link = false, roam = false;
2246 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2247 "[BTCoex], PsTdma type dismatch!!!, "
2248 "curPsTdma=%d, recordPsTdma=%d\n",
2249 coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type);
2250
2251 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2252 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2253 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2254
2255 if (!scan && !link && !roam)
2256 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2257 coex_dm->tdma_adj_type);
2258 else
2259 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2260 "[BTCoex], roaming/link/scan is under"
2261 " progress, will adjust next time!!!\n");
2262 }
2263}
2264
2265/* SCO only or SCO+PAN(HS) */
2266static void btc8723b2ant_action_sco(struct btc_coexist *btcoexist)
2267{
2268 u8 wifi_rssi_state;
2269 u32 wifi_bw;
2270
2271 wifi_rssi_state = btc8723b2ant_wifi_rssi_state(btcoexist,
2272 0, 2, 15, 0);
2273
2274 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2275
2276 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4);
2277
2278 if (btc8723b_need_dec_pwr(btcoexist))
2279 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2280 else
2281 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2282
2283 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2284
2285 /*for SCO quality at 11b/g mode*/
2286 if (BTC_WIFI_BW_LEGACY == wifi_bw)
2287 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 2);
2288 else /*for SCO quality & wifi performance balance at 11n mode*/
2289 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 8);
2290
2291 /*for voice quality */
2292 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2293
2294 /* sw mechanism */
2295 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2296 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2297 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2298 btc8723b2ant_sw_mechanism1(btcoexist, true, true,
2299 false, false);
2300 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2301 true, 0x4);
2302 } else {
2303 btc8723b2ant_sw_mechanism1(btcoexist, true, true,
2304 false, false);
2305 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2306 true, 0x4);
2307 }
2308 } else {
2309 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2310 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2311 btc8723b2ant_sw_mechanism1(btcoexist, false, true,
2312 false, false);
2313 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2314 true, 0x4);
2315 } else {
2316 btc8723b2ant_sw_mechanism1(btcoexist, false, true,
2317 false, false);
2318 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2319 true, 0x4);
2320 }
2321 }
2322}
2323
2324static void btc8723b2ant_action_hid(struct btc_coexist *btcoexist)
2325{
2326 u8 wifi_rssi_state, bt_rssi_state;
2327 u32 wifi_bw;
2328
2329 wifi_rssi_state = btc8723b2ant_wifi_rssi_state(btcoexist,
2330 0, 2, 15, 0);
2331 bt_rssi_state = btc8723b2ant_bt_rssi_state(2, 35, 0);
2332
2333 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2334
2335 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2336
2337 if (btc8723b_need_dec_pwr(btcoexist))
2338 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2339 else
2340 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2341
2342 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2343
2344 if (BTC_WIFI_BW_LEGACY == wifi_bw) /*/for HID at 11b/g mode*/
2345 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
2346 else /*for HID quality & wifi performance balance at 11n mode*/
2347 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 9);
2348
2349 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2350 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2351 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2352 else
2353 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2354
2355 /* sw mechanism */
2356 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2357 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2358 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2359 btc8723b2ant_sw_mechanism1(btcoexist, true, true,
2360 false, false);
2361 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2362 false, 0x18);
2363 } else {
2364 btc8723b2ant_sw_mechanism1(btcoexist, true, true,
2365 false, false);
2366 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2367 false, 0x18);
2368 }
2369 } else {
2370 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2371 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2372 btc8723b2ant_sw_mechanism1(btcoexist, false, true,
2373 false, false);
2374 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2375 false, 0x18);
2376 } else {
2377 btc8723b2ant_sw_mechanism1(btcoexist, false, true,
2378 false, false);
2379 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2380 false, 0x18);
2381 }
2382 }
2383}
2384
2385/*A2DP only / PAN(EDR) only/ A2DP+PAN(HS)*/
2386static void btc8723b2ant_action_a2dp(struct btc_coexist *btcoexist)
2387{
2388 u8 wifi_rssi_state, bt_rssi_state;
2389 u32 wifi_bw;
2390
2391 wifi_rssi_state = btc8723b2ant_wifi_rssi_state(btcoexist,
2392 0, 2, 15, 0);
2393 bt_rssi_state = btc8723b2ant_bt_rssi_state(2, 35, 0);
2394
2395 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2396
2397 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2398
2399 if (btc8723b_need_dec_pwr(btcoexist))
2400 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2401 else
2402 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2403
2404 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
2405
2406 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2407 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2408 btc8723b2ant_tdma_duration_adjust(btcoexist, false,
2409 false, 1);
2410 else
2411 btc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 1);
2412
2413 /* sw mechanism */
2414 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2415 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2416 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2417 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2418 btc8723b2ant_sw_mechanism1(btcoexist, true, false,
2419 false, false);
2420 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2421 false, 0x18);
2422 } else {
2423 btc8723b2ant_sw_mechanism1(btcoexist, true, false,
2424 false, false);
2425 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2426 false, 0x18);
2427 }
2428 } else {
2429 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2430 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2431 btc8723b2ant_sw_mechanism1(btcoexist, false, false,
2432 false, false);
2433 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2434 false, 0x18);
2435 } else {
2436 btc8723b2ant_sw_mechanism1(btcoexist, false, false,
2437 false, false);
2438 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2439 false, 0x18);
2440 }
2441 }
2442}
2443
2444static void btc8723b2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
2445{
2446 u8 wifi_rssi_state;
2447 u32 wifi_bw;
2448
2449 wifi_rssi_state = btc8723b2ant_wifi_rssi_state(btcoexist,
2450 0, 2, 15, 0);
2451
2452 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2453
2454 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2455
2456 if (btc8723b_need_dec_pwr(btcoexist))
2457 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2458 else
2459 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2460
2461 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
2462
2463 btc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 2);
2464
2465 /* sw mechanism */
2466 btcoexist->btc_get(btcoexist,
2467 BTC_GET_U4_WIFI_BW, &wifi_bw);
2468 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2469 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2470 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2471 btc8723b2ant_sw_mechanism1(btcoexist, true, false,
2472 false, false);
2473 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2474 false, 0x18);
2475 } else {
2476 btc8723b2ant_sw_mechanism1(btcoexist, true, false,
2477 false, false);
2478 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2479 false, 0x18);
2480 }
2481 } else {
2482 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2483 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2484 btc8723b2ant_sw_mechanism1(btcoexist, false, false,
2485 false, false);
2486 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2487 false, 0x18);
2488 } else {
2489 btc8723b2ant_sw_mechanism1(btcoexist, false, false,
2490 false, false);
2491 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2492 false, 0x18);
2493 }
2494 }
2495}
2496
2497static void btc8723b2ant_action_pan_edr(struct btc_coexist *btcoexist)
2498{
2499 u8 wifi_rssi_state, bt_rssi_state;
2500 u32 wifi_bw;
2501
2502 wifi_rssi_state = btc8723b2ant_wifi_rssi_state(btcoexist,
2503 0, 2, 15, 0);
2504 bt_rssi_state = btc8723b2ant_bt_rssi_state(2, 35, 0);
2505
2506 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2507
2508 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2509
2510 if (btc8723b_need_dec_pwr(btcoexist))
2511 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2512 else
2513 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2514
2515 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 10);
2516
2517 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2518 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2519 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2520 else
2521 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2522
2523 /* sw mechanism */
2524 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2525 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2526 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2527 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2528 btc8723b2ant_sw_mechanism1(btcoexist, true, false,
2529 false, false);
2530 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2531 false, 0x18);
2532 } else {
2533 btc8723b2ant_sw_mechanism1(btcoexist, true, false,
2534 false, false);
2535 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2536 false, 0x18);
2537 }
2538 } else {
2539 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2540 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2541 btc8723b2ant_sw_mechanism1(btcoexist, false, false,
2542 false, false);
2543 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2544 false, 0x18);
2545 } else {
2546 btc8723b2ant_sw_mechanism1(btcoexist, false, false,
2547 false, false);
2548 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2549 false, 0x18);
2550 }
2551 }
2552}
2553
2554/*PAN(HS) only*/
2555static void btc8723b2ant_action_pan_hs(struct btc_coexist *btcoexist)
2556{
2557 u8 wifi_rssi_state;
2558 u32 wifi_bw;
2559
2560 wifi_rssi_state = btc8723b2ant_wifi_rssi_state(btcoexist,
2561 0, 2, 15, 0);
2562
2563 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2564
2565 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2566
2567 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2568 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2569 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2570 else
2571 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2572
2573 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
2574
2575 btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
2576
2577 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2578 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2579 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2580 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2581 btc8723b2ant_sw_mechanism1(btcoexist, true, false,
2582 false, false);
2583 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2584 false, 0x18);
2585 } else {
2586 btc8723b2ant_sw_mechanism1(btcoexist, true, false,
2587 false, false);
2588 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2589 false, 0x18);
2590 }
2591 } else {
2592 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2593 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2594 btc8723b2ant_sw_mechanism1(btcoexist, false, false,
2595 false, false);
2596 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2597 false, 0x18);
2598 } else {
2599 btc8723b2ant_sw_mechanism1(btcoexist, false, false,
2600 false, false);
2601 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2602 false, 0x18);
2603 }
2604 }
2605}
2606
2607/*PAN(EDR)+A2DP*/
2608static void btc8723b2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
2609{
2610 u8 wifi_rssi_state, bt_rssi_state;
2611 u32 wifi_bw;
2612
2613 wifi_rssi_state = btc8723b2ant_wifi_rssi_state(btcoexist,
2614 0, 2, 15, 0);
2615 bt_rssi_state = btc8723b2ant_bt_rssi_state(2, 35, 0);
2616
2617 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2618
2619 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2620
2621 if (btc8723b_need_dec_pwr(btcoexist))
2622 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2623 else
2624 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2625
2626 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2627
2628 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2629 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2630 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 12);
2631 if (BTC_WIFI_BW_HT40 == wifi_bw)
2632 btc8723b2ant_tdma_duration_adjust(btcoexist, false,
2633 true, 3);
2634 else
2635 btc8723b2ant_tdma_duration_adjust(btcoexist, false,
2636 false, 3);
2637 } else {
2638 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
2639 btc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 3);
2640 }
2641
2642 /* sw mechanism */
2643 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2644 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2645 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2646 btc8723b2ant_sw_mechanism1(btcoexist, true, false,
2647 false, false);
2648 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2649 false, 0x18);
2650 } else {
2651 btc8723b2ant_sw_mechanism1(btcoexist, true, false,
2652 false, false);
2653 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2654 false, 0x18);
2655 }
2656 } else {
2657 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2658 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2659 btc8723b2ant_sw_mechanism1(btcoexist, false, false,
2660 false, false);
2661 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2662 false, 0x18);
2663 } else {
2664 btc8723b2ant_sw_mechanism1(btcoexist, false, false,
2665 false, false);
2666 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2667 false, 0x18);
2668 }
2669 }
2670}
2671
2672static void btc8723b2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
2673{
2674 u8 wifi_rssi_state, bt_rssi_state;
2675 u32 wifi_bw;
2676
2677 wifi_rssi_state = btc8723b2ant_wifi_rssi_state(btcoexist,
2678 0, 2, 15, 0);
2679 bt_rssi_state = btc8723b2ant_bt_rssi_state(2, 35, 0);
2680 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2681
2682 if (btc8723b_need_dec_pwr(btcoexist))
2683 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2684 else
2685 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2686
2687 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2688 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2689 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2690 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
2691 3);
2692 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 11);
2693 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
2694 0xfffff, 0x780);
2695 } else {
2696 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
2697 6);
2698 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
2699 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
2700 0xfffff, 0x0);
2701 }
2702 btc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 2);
2703 } else {
2704 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2705 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 11);
2706 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
2707 0x0);
2708 btc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 2);
2709 }
2710
2711 /* sw mechanism */
2712 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2713 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2714 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2715 btc8723b2ant_sw_mechanism1(btcoexist, true, true,
2716 false, false);
2717 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2718 false, 0x18);
2719 } else {
2720 btc8723b2ant_sw_mechanism1(btcoexist, true, true,
2721 false, false);
2722 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2723 false, 0x18);
2724 }
2725 } else {
2726 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2727 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2728 btc8723b2ant_sw_mechanism1(btcoexist, false, true,
2729 false, false);
2730 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2731 false, 0x18);
2732 } else {
2733 btc8723b2ant_sw_mechanism1(btcoexist, false, true,
2734 false, false);
2735 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2736 false, 0x18);
2737 }
2738 }
2739}
2740
2741/* HID+A2DP+PAN(EDR) */
2742static void btc8723b2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
2743{
2744 u8 wifi_rssi_state, bt_rssi_state;
2745 u32 wifi_bw;
2746
2747 wifi_rssi_state = btc8723b2ant_wifi_rssi_state(btcoexist,
2748 0, 2, 15, 0);
2749 bt_rssi_state = btc8723b2ant_bt_rssi_state(2, 35, 0);
2750
2751 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2752
2753 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2754
2755 if (btc8723b_need_dec_pwr(btcoexist))
2756 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2757 else
2758 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2759
2760 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2761
2762 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
2763
2764 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2765 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2766 if (BTC_WIFI_BW_HT40 == wifi_bw)
2767 btc8723b2ant_tdma_duration_adjust(btcoexist, true,
2768 true, 2);
2769 else
2770 btc8723b2ant_tdma_duration_adjust(btcoexist, true,
2771 false, 3);
2772 } else {
2773 btc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3);
2774 }
2775
2776 /* sw mechanism */
2777 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2778 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2779 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2780 btc8723b2ant_sw_mechanism1(btcoexist, true, true,
2781 false, false);
2782 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2783 false, 0x18);
2784 } else {
2785 btc8723b2ant_sw_mechanism1(btcoexist, true, true,
2786 false, false);
2787 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2788 false, 0x18);
2789 }
2790 } else {
2791 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2792 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2793 btc8723b2ant_sw_mechanism1(btcoexist, false, true,
2794 false, false);
2795 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2796 false, 0x18);
2797 } else {
2798 btc8723b2ant_sw_mechanism1(btcoexist, false, true,
2799 false, false);
2800 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2801 false, 0x18);
2802 }
2803 }
2804}
2805
2806static void btc8723b2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
2807{
2808 u8 wifi_rssi_state, bt_rssi_state;
2809 u32 wifi_bw;
2810
2811 wifi_rssi_state = btc8723b2ant_wifi_rssi_state(btcoexist,
2812 0, 2, 15, 0);
2813 bt_rssi_state = btc8723b2ant_bt_rssi_state(2, 35, 0);
2814
2815 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
2816
2817 btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2818
2819 if (btc8723b_need_dec_pwr(btcoexist))
2820 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2821 else
2822 btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2823
2824 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2825
2826 btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
2827
2828 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2829 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2830 btc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 2);
2831 else
2832 btc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 2);
2833
2834 /* sw mechanism */
2835 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2836 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2837 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2838 btc8723b2ant_sw_mechanism1(btcoexist, true, true,
2839 false, false);
2840 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2841 false, 0x18);
2842 } else {
2843 btc8723b2ant_sw_mechanism1(btcoexist, true, true,
2844 false, false);
2845 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2846 false, 0x18);
2847 }
2848 } else {
2849 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2850 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2851 btc8723b2ant_sw_mechanism1(btcoexist, false, true,
2852 false, false);
2853 btc8723b2ant_sw_mechanism2(btcoexist, true, false,
2854 false, 0x18);
2855 } else {
2856 btc8723b2ant_sw_mechanism1(btcoexist, false, true,
2857 false, false);
2858 btc8723b2ant_sw_mechanism2(btcoexist, false, false,
2859 false, 0x18);
2860 }
2861 }
2862}
2863
2864static void btc8723b2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
2865{
2866 u8 algorithm = 0;
2867
2868 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2869 "[BTCoex], RunCoexistMechanism()===>\n");
2870
2871 if (btcoexist->manual_control) {
2872 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2873 "[BTCoex], RunCoexistMechanism(), "
2874 "return for Manual CTRL <===\n");
2875 return;
2876 }
2877
2878 if (coex_sta->under_ips) {
2879 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2880 "[BTCoex], wifi is under IPS !!!\n");
2881 return;
2882 }
2883
2884 algorithm = btc8723b2ant_action_algorithm(btcoexist);
2885 if (coex_sta->c2h_bt_inquiry_page &&
2886 (BT_8723B_2ANT_COEX_ALGO_PANHS != algorithm)) {
2887 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2888 "[BTCoex], BT is under inquiry/page scan !!\n");
2889 btc8723b2ant_action_bt_inquiry(btcoexist);
2890 return;
2891 } else {
2892 if (coex_dm->need_recover_0x948) {
2893 coex_dm->need_recover_0x948 = false;
2894 btcoexist->btc_write_2byte(btcoexist, 0x948,
2895 coex_dm->backup_0x948);
2896 }
2897 }
2898
2899 coex_dm->cur_algorithm = algorithm;
2900 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, "[BTCoex], Algorithm = %d\n",
2901 coex_dm->cur_algorithm);
2902
2903 if (btc8723b2ant_is_common_action(btcoexist)) {
2904 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2905 "[BTCoex], Action 2-Ant common.\n");
2906 coex_dm->auto_tdma_adjust = false;
2907 } else {
2908 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
2909 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2910 "[BTCoex], preAlgorithm=%d, "
2911 "curAlgorithm=%d\n", coex_dm->pre_algorithm,
2912 coex_dm->cur_algorithm);
2913 coex_dm->auto_tdma_adjust = false;
2914 }
2915 switch (coex_dm->cur_algorithm) {
2916 case BT_8723B_2ANT_COEX_ALGO_SCO:
2917 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2918 "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
2919 btc8723b2ant_action_sco(btcoexist);
2920 break;
2921 case BT_8723B_2ANT_COEX_ALGO_HID:
2922 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2923 "[BTCoex], Action 2-Ant, algorithm = HID.\n");
2924 btc8723b2ant_action_hid(btcoexist);
2925 break;
2926 case BT_8723B_2ANT_COEX_ALGO_A2DP:
2927 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2928 "[BTCoex], Action 2-Ant, "
2929 "algorithm = A2DP.\n");
2930 btc8723b2ant_action_a2dp(btcoexist);
2931 break;
2932 case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS:
2933 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2934 "[BTCoex], Action 2-Ant, "
2935 "algorithm = A2DP+PAN(HS).\n");
2936 btc8723b2ant_action_a2dp_pan_hs(btcoexist);
2937 break;
2938 case BT_8723B_2ANT_COEX_ALGO_PANEDR:
2939 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2940 "[BTCoex], Action 2-Ant, "
2941 "algorithm = PAN(EDR).\n");
2942 btc8723b2ant_action_pan_edr(btcoexist);
2943 break;
2944 case BT_8723B_2ANT_COEX_ALGO_PANHS:
2945 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2946 "[BTCoex], Action 2-Ant, "
2947 "algorithm = HS mode.\n");
2948 btc8723b2ant_action_pan_hs(btcoexist);
2949 break;
2950 case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP:
2951 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2952 "[BTCoex], Action 2-Ant, "
2953 "algorithm = PAN+A2DP.\n");
2954 btc8723b2ant_action_pan_edr_a2dp(btcoexist);
2955 break;
2956 case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID:
2957 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2958 "[BTCoex], Action 2-Ant, "
2959 "algorithm = PAN(EDR)+HID.\n");
2960 btc8723b2ant_action_pan_edr_hid(btcoexist);
2961 break;
2962 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
2963 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2964 "[BTCoex], Action 2-Ant, "
2965 "algorithm = HID+A2DP+PAN.\n");
2966 btc8723b2ant_action_hid_a2dp_pan_edr(btcoexist);
2967 break;
2968 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP:
2969 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2970 "[BTCoex], Action 2-Ant, "
2971 "algorithm = HID+A2DP.\n");
2972 btc8723b2ant_action_hid_a2dp(btcoexist);
2973 break;
2974 default:
2975 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2976 "[BTCoex], Action 2-Ant, "
2977 "algorithm = coexist All Off!!\n");
2978 btc8723b2ant_coex_alloff(btcoexist);
2979 break;
2980 }
2981 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
2982 }
2983}
2984
2985
2986
2987/*********************************************************************
2988 * work around function start with wa_btc8723b2ant_
2989 *********************************************************************/
2990/*********************************************************************
2991 * extern function start with EXbtc8723b2ant_
2992 *********************************************************************/
2993void ex_halbtc8723b2ant_init_hwconfig(struct btc_coexist *btcoexist)
2994{
2995 struct btc_board_info *board_info = &btcoexist->board_info;
2996 u32 u32tmp = 0, fw_ver;
2997 u8 u8tmp = 0;
2998 u8 h2c_parameter[2] = {0};
2999
3000
3001 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3002 "[BTCoex], 2Ant Init HW Config!!\n");
3003
3004 /* backup rf 0x1e value */
3005 coex_dm->bt_rf0x1e_backup = btcoexist->btc_get_rf_reg(btcoexist,
3006 BTC_RF_A, 0x1e,
3007 0xfffff);
3008
3009 /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */
3010 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
3011 u32tmp &= ~BIT23;
3012 u32tmp |= BIT24;
3013 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
3014
3015 btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
3016 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x944, 0x3, 0x3);
3017 btcoexist->btc_write_1byte(btcoexist, 0x930, 0x77);
3018 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x1);
3019
3020 /* Antenna switch control parameter */
3021 /* btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);*/
3022
3023 /*Force GNT_BT to low*/
3024 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x765, 0x18, 0x0);
3025 btcoexist->btc_write_2byte(btcoexist, 0x948, 0x0);
3026
3027 /* 0x790[5:0]=0x5 */
3028 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3029 u8tmp &= 0xc0;
3030 u8tmp |= 0x5;
3031 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3032
3033
3034 /*Antenna config */
3035 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3036
3037 /*ext switch for fw ver < 0xc */
3038 if (fw_ver < 0xc00) {
3039 if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
3040 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x92c,
3041 0x3, 0x1);
3042 /*Main Ant to BT for IPS case 0x4c[23]=1*/
3043 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1,
3044 0x1);
3045
3046 /*tell firmware "no antenna inverse"*/
3047 h2c_parameter[0] = 0;
3048 h2c_parameter[1] = 1; /* ext switch type */
3049 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
3050 h2c_parameter);
3051 } else {
3052 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x92c,
3053 0x3, 0x2);
3054 /*Aux Ant to BT for IPS case 0x4c[23]=1*/
3055 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1,
3056 0x0);
3057
3058 /*tell firmware "antenna inverse"*/
3059 h2c_parameter[0] = 1;
3060 h2c_parameter[1] = 1; /*ext switch type*/
3061 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
3062 h2c_parameter);
3063 }
3064 } else {
3065 /*ext switch always at s1 (if exist) */
3066 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x92c, 0x3, 0x1);
3067 /*Main Ant to BT for IPS case 0x4c[23]=1*/
3068 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1, 0x1);
3069
3070 if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
3071 /*tell firmware "no antenna inverse"*/
3072 h2c_parameter[0] = 0;
3073 h2c_parameter[1] = 0; /*ext switch type*/
3074 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
3075 h2c_parameter);
3076 } else {
3077 /*tell firmware "antenna inverse"*/
3078 h2c_parameter[0] = 1;
3079 h2c_parameter[1] = 0; /*ext switch type*/
3080 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
3081 h2c_parameter);
3082 }
3083 }
3084
3085 /* PTA parameter */
3086 btc8723b_coex_tbl_type(btcoexist, FORCE_EXEC, 0);
3087
3088 /* Enable counter statistics */
3089 /*0x76e[3] =1, WLAN_Act control by PTA*/
3090 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
3091 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3092 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
3093}
3094
3095void ex_halbtc8723b2ant_init_coex_dm(struct btc_coexist *btcoexist)
3096{
3097 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3098 "[BTCoex], Coex Mechanism Init!!\n");
3099 btc8723b2ant_init_coex_dm(btcoexist);
3100}
3101
3102void ex_halbtc8723b2ant_display_coex_info(struct btc_coexist *btcoexist)
3103{
3104 struct btc_board_info *board_info = &btcoexist->board_info;
3105 struct btc_stack_info *stack_info = &btcoexist->stack_info;
3106 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
3107 u8 *cli_buf = btcoexist->cli_buf;
3108 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3109 u32 u32tmp[4];
3110 bool roam = false, scan = false;
3111 bool link = false, wifi_under_5g = false;
3112 bool bt_hs_on = false, wifi_busy = false;
3113 s32 wifi_rssi = 0, bt_hs_rssi = 0;
3114 u32 wifi_bw, wifi_traffic_dir, fa_ofdm, fa_cck;
3115 u8 wifi_dot11_chnl, wifi_hs_chnl;
3116 u32 fw_ver = 0, bt_patch_ver = 0;
3117
3118 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3119 "\r\n ============[BT Coexist info]============");
3120 CL_PRINTF(cli_buf);
3121
3122 if (btcoexist->manual_control) {
3123 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3124 "\r\n ==========[Under Manual Control]============");
3125 CL_PRINTF(cli_buf);
3126 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3127 "\r\n ==========================================");
3128 CL_PRINTF(cli_buf);
3129 }
3130
3131 if (!board_info->bt_exist) {
3132 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
3133 CL_PRINTF(cli_buf);
3134 return;
3135 }
3136
3137 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3138 "Ant PG number/ Ant mechanism:",
3139 board_info->pg_ant_num, board_info->btdm_ant_num);
3140 CL_PRINTF(cli_buf);
3141
3142 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d",
3143 "BT stack/ hci ext ver",
3144 ((stack_info->profile_notified) ? "Yes" : "No"),
3145 stack_info->hci_version);
3146 CL_PRINTF(cli_buf);
3147
3148 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3149 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3150 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3151 "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)",
3152 "CoexVer/ FwVer/ PatchVer",
3153 glcoex_ver_date_8723b_2ant, glcoex_ver_8723b_2ant,
3154 fw_ver, bt_patch_ver, bt_patch_ver);
3155 CL_PRINTF(cli_buf);
3156
3157 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
3158 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL,
3159 &wifi_dot11_chnl);
3160 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl);
3161
3162 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)",
3163 "Dot11 channel / HsChnl(HsMode)",
3164 wifi_dot11_chnl, wifi_hs_chnl, bt_hs_on);
3165 CL_PRINTF(cli_buf);
3166
3167 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
3168 "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info[0],
3169 coex_dm->wifi_chnl_info[1], coex_dm->wifi_chnl_info[2]);
3170 CL_PRINTF(cli_buf);
3171
3172 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
3173 btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi);
3174 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3175 "Wifi rssi/ HS rssi", wifi_rssi, bt_hs_rssi);
3176 CL_PRINTF(cli_buf);
3177
3178 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
3179 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
3180 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
3181 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3182 "Wifi link/ roam/ scan", link, roam, scan);
3183 CL_PRINTF(cli_buf);
3184
3185 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
3186 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3187 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
3188 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
3189 &wifi_traffic_dir);
3190 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ",
3191 "Wifi status", (wifi_under_5g ? "5G" : "2.4G"),
3192 ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" :
3193 (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))),
3194 ((!wifi_busy) ? "idle" :
3195 ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ?
3196 "uplink" : "downlink")));
3197 CL_PRINTF(cli_buf);
3198
3199 CL_PRINTF(cli_buf);
3200
3201 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d",
3202 "SCO/HID/PAN/A2DP",
3203 bt_link_info->sco_exist, bt_link_info->hid_exist,
3204 bt_link_info->pan_exist, bt_link_info->a2dp_exist);
3205 CL_PRINTF(cli_buf);
3206 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
3207
3208 bt_info_ext = coex_sta->bt_info_ext;
3209 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
3210 "BT Info A2DP rate",
3211 (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate");
3212 CL_PRINTF(cli_buf);
3213
3214 for (i = 0; i < BT_INFO_SRC_8723B_2ANT_MAX; i++) {
3215 if (coex_sta->bt_info_c2h_cnt[i]) {
3216 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3217 "\r\n %-35s = %02x %02x %02x "
3218 "%02x %02x %02x %02x(%d)",
3219 glbt_info_src_8723b_2ant[i],
3220 coex_sta->bt_info_c2h[i][0],
3221 coex_sta->bt_info_c2h[i][1],
3222 coex_sta->bt_info_c2h[i][2],
3223 coex_sta->bt_info_c2h[i][3],
3224 coex_sta->bt_info_c2h[i][4],
3225 coex_sta->bt_info_c2h[i][5],
3226 coex_sta->bt_info_c2h[i][6],
3227 coex_sta->bt_info_c2h_cnt[i]);
3228 CL_PRINTF(cli_buf);
3229 }
3230 }
3231
3232 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s",
3233 "PS state, IPS/LPS",
3234 ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")),
3235 ((coex_sta->under_lps ? "LPS ON" : "LPS OFF")));
3236 CL_PRINTF(cli_buf);
3237 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
3238
3239 /* Sw mechanism */
3240 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3241 "\r\n %-35s", "============[Sw mechanism]============");
3242 CL_PRINTF(cli_buf);
3243 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3244 "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink,
3245 coex_dm->cur_low_penalty_ra, coex_dm->limited_dig);
3246 CL_PRINTF(cli_buf);
3247 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3248 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3249 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3250 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3251 CL_PRINTF(cli_buf);
3252
3253 /* Fw mechanism */
3254 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3255 "============[Fw mechanism]============");
3256 CL_PRINTF(cli_buf);
3257
3258 ps_tdma_case = coex_dm->cur_ps_tdma;
3259 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3260 "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
3261 "PS TDMA", coex_dm->ps_tdma_para[0],
3262 coex_dm->ps_tdma_para[1], coex_dm->ps_tdma_para[2],
3263 coex_dm->ps_tdma_para[3], coex_dm->ps_tdma_para[4],
3264 ps_tdma_case, coex_dm->auto_tdma_adjust);
3265 CL_PRINTF(cli_buf);
3266
3267 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3268 "DecBtPwr/ IgnWlanAct", coex_dm->cur_dec_bt_pwr,
3269 coex_dm->cur_ignore_wlan_act);
3270 CL_PRINTF(cli_buf);
3271
3272 /* Hw setting */
3273 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3274 "============[Hw setting]============");
3275 CL_PRINTF(cli_buf);
3276
3277 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
3278 "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup);
3279 CL_PRINTF(cli_buf);
3280
3281 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3282 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x880);
3283 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3284 "0x778/0x880[29:25]", u8tmp[0],
3285 (u32tmp[0]&0x3e000000) >> 25);
3286 CL_PRINTF(cli_buf);
3287
3288 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
3289 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x67);
3290 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x765);
3291 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3292 "0x948/ 0x67[5] / 0x765",
3293 u32tmp[0], ((u8tmp[0]&0x20) >> 5), u8tmp[1]);
3294 CL_PRINTF(cli_buf);
3295
3296 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x92c);
3297 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x930);
3298 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x944);
3299 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3300 "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]",
3301 u32tmp[0]&0x3, u32tmp[1]&0xff, u32tmp[2]&0x3);
3302 CL_PRINTF(cli_buf);
3303
3304
3305 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x39);
3306 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3307 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c);
3308 u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x64);
3309 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3310 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3311 "0x38[11]/0x40/0x4c[24:23]/0x64[0]",
3312 ((u8tmp[0] & 0x8)>>3), u8tmp[1],
3313 ((u32tmp[0]&0x01800000)>>23), u8tmp[2]&0x1);
3314 CL_PRINTF(cli_buf);
3315
3316 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3317 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3318 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3319 "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]);
3320 CL_PRINTF(cli_buf);
3321
3322 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3323 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x49c);
3324 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3325 "0xc50(dig)/0x49c(null-drop)", u32tmp[0]&0xff, u8tmp[0]);
3326 CL_PRINTF(cli_buf);
3327
3328 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xda0);
3329 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xda4);
3330 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0xda8);
3331 u32tmp[3] = btcoexist->btc_read_4byte(btcoexist, 0xcf0);
3332
3333 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b);
3334 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c);
3335
3336 fa_ofdm = ((u32tmp[0]&0xffff0000) >> 16) +
3337 ((u32tmp[1]&0xffff0000) >> 16) +
3338 (u32tmp[1] & 0xffff) +
3339 (u32tmp[2] & 0xffff) +
3340 ((u32tmp[3]&0xffff0000) >> 16) +
3341 (u32tmp[3] & 0xffff);
3342 fa_cck = (u8tmp[0] << 8) + u8tmp[1];
3343
3344 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3345 "OFDM-CCA/OFDM-FA/CCK-FA",
3346 u32tmp[0]&0xffff, fa_ofdm, fa_cck);
3347 CL_PRINTF(cli_buf);
3348
3349 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3350 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3351 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
3352 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
3353 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3354 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3355 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
3356 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
3357 CL_PRINTF(cli_buf);
3358
3359 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3360 "0x770(high-pri rx/tx)",
3361 coex_sta->high_priority_rx, coex_sta->high_priority_tx);
3362 CL_PRINTF(cli_buf);
3363 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3364 "0x774(low-pri rx/tx)", coex_sta->low_priority_rx,
3365 coex_sta->low_priority_tx);
3366 CL_PRINTF(cli_buf);
3367#if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 1)
3368 btc8723b2ant_monitor_bt_ctr(btcoexist);
3369#endif
3370 btcoexist->btc_disp_dbg_msg(btcoexist,
3371 BTC_DBG_DISP_COEX_STATISTICS);
3372}
3373
3374
3375void ex_halbtc8723b2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
3376{
3377 if (BTC_IPS_ENTER == type) {
3378 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3379 "[BTCoex], IPS ENTER notify\n");
3380 coex_sta->under_ips = true;
3381 btc8723b2ant_coex_alloff(btcoexist);
3382 } else if (BTC_IPS_LEAVE == type) {
3383 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3384 "[BTCoex], IPS LEAVE notify\n");
3385 coex_sta->under_ips = false;
3386 }
3387}
3388
3389void ex_halbtc8723b2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
3390{
3391 if (BTC_LPS_ENABLE == type) {
3392 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3393 "[BTCoex], LPS ENABLE notify\n");
3394 coex_sta->under_lps = true;
3395 } else if (BTC_LPS_DISABLE == type) {
3396 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3397 "[BTCoex], LPS DISABLE notify\n");
3398 coex_sta->under_lps = false;
3399 }
3400}
3401
3402void ex_halbtc8723b2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
3403{
3404 if (BTC_SCAN_START == type)
3405 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3406 "[BTCoex], SCAN START notify\n");
3407 else if (BTC_SCAN_FINISH == type)
3408 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3409 "[BTCoex], SCAN FINISH notify\n");
3410}
3411
3412void ex_halbtc8723b2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
3413{
3414 if (BTC_ASSOCIATE_START == type)
3415 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3416 "[BTCoex], CONNECT START notify\n");
3417 else if (BTC_ASSOCIATE_FINISH == type)
3418 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3419 "[BTCoex], CONNECT FINISH notify\n");
3420}
3421
3422void btc8723b_med_stat_notify(struct btc_coexist *btcoexist,
3423 u8 type)
3424{
3425 u8 h2c_parameter[3] = {0};
3426 u32 wifi_bw;
3427 u8 wifi_central_chnl;
3428
3429 if (BTC_MEDIA_CONNECT == type)
3430 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3431 "[BTCoex], MEDIA connect notify\n");
3432 else
3433 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3434 "[BTCoex], MEDIA disconnect notify\n");
3435
3436 /* only 2.4G we need to inform bt the chnl mask */
3437 btcoexist->btc_get(btcoexist,
3438 BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifi_central_chnl);
3439 if ((BTC_MEDIA_CONNECT == type) &&
3440 (wifi_central_chnl <= 14)) {
3441 h2c_parameter[0] = 0x1;
3442 h2c_parameter[1] = wifi_central_chnl;
3443 btcoexist->btc_get(btcoexist,
3444 BTC_GET_U4_WIFI_BW, &wifi_bw);
3445 if (BTC_WIFI_BW_HT40 == wifi_bw)
3446 h2c_parameter[2] = 0x30;
3447 else
3448 h2c_parameter[2] = 0x20;
3449 }
3450
3451 coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
3452 coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
3453 coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
3454
3455 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
3456 "[BTCoex], FW write 0x66=0x%x\n",
3457 h2c_parameter[0] << 16 | h2c_parameter[1] << 8 |
3458 h2c_parameter[2]);
3459
3460 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
3461}
3462
3463void ex_halbtc8723b2ant_special_packet_notify(struct btc_coexist *btcoexist,
3464 u8 type)
3465{
3466 if (type == BTC_PACKET_DHCP)
3467 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3468 "[BTCoex], DHCP Packet notify\n");
3469}
3470
3471void ex_halbtc8723b2ant_bt_info_notify(struct btc_coexist *btcoexist,
3472 u8 *tmpbuf, u8 length)
3473{
3474 u8 bt_info = 0;
3475 u8 i, rsp_source = 0;
3476 bool bt_busy = false, limited_dig = false;
3477 bool wifi_connected = false;
3478
3479 coex_sta->c2h_bt_info_req_sent = false;
3480
3481 rsp_source = tmpbuf[0]&0xf;
3482 if (rsp_source >= BT_INFO_SRC_8723B_2ANT_MAX)
3483 rsp_source = BT_INFO_SRC_8723B_2ANT_WIFI_FW;
3484 coex_sta->bt_info_c2h_cnt[rsp_source]++;
3485
3486 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3487 "[BTCoex], Bt info[%d], length=%d, hex data=[",
3488 rsp_source, length);
3489 for (i = 0; i < length; i++) {
3490 coex_sta->bt_info_c2h[rsp_source][i] = tmpbuf[i];
3491 if (i == 1)
3492 bt_info = tmpbuf[i];
3493 if (i == length-1)
3494 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3495 "0x%02x]\n", tmpbuf[i]);
3496 else
3497 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3498 "0x%02x, ", tmpbuf[i]);
3499 }
3500
3501 if (btcoexist->manual_control) {
3502 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3503 "[BTCoex], BtInfoNotify(), "
3504 "return for Manual CTRL<===\n");
3505 return;
3506 }
3507
3508 if (BT_INFO_SRC_8723B_2ANT_WIFI_FW != rsp_source) {
3509 coex_sta->bt_retry_cnt = /* [3:0]*/
3510 coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
3511
3512 coex_sta->bt_rssi =
3513 coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
3514
3515 coex_sta->bt_info_ext =
3516 coex_sta->bt_info_c2h[rsp_source][4];
3517
3518 /* Here we need to resend some wifi info to BT
3519 * because bt is reset and loss of the info.
3520 */
3521 if ((coex_sta->bt_info_ext & BIT1)) {
3522 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3523 "[BTCoex], BT ext info bit1 check,"
3524 " send wifi BW&Chnl to BT!!\n");
3525 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
3526 &wifi_connected);
3527 if (wifi_connected)
3528 btc8723b_med_stat_notify(btcoexist,
3529 BTC_MEDIA_CONNECT);
3530 else
3531 btc8723b_med_stat_notify(btcoexist,
3532 BTC_MEDIA_DISCONNECT);
3533 }
3534
3535 if ((coex_sta->bt_info_ext & BIT3)) {
3536 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3537 "[BTCoex], BT ext info bit3 check, "
3538 "set BT NOT to ignore Wlan active!!\n");
3539 btc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC,
3540 false);
3541 } else {
3542 /* BT already NOT ignore Wlan active, do nothing here.*/
3543 }
3544#if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
3545 if ((coex_sta->bt_info_ext & BIT4)) {
3546 /* BT auto report already enabled, do nothing*/
3547 } else {
3548 btc8723b2ant_bt_auto_report(btcoexist, FORCE_EXEC,
3549 true);
3550 }
3551#endif
3552 }
3553
3554 /* check BIT2 first ==> check if bt is under inquiry or page scan*/
3555 if (bt_info & BT_INFO_8723B_2ANT_B_INQ_PAGE)
3556 coex_sta->c2h_bt_inquiry_page = true;
3557 else
3558 coex_sta->c2h_bt_inquiry_page = false;
3559
3560 /* set link exist status*/
3561 if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) {
3562 coex_sta->bt_link_exist = false;
3563 coex_sta->pan_exist = false;
3564 coex_sta->a2dp_exist = false;
3565 coex_sta->hid_exist = false;
3566 coex_sta->sco_exist = false;
3567 } else { /* connection exists */
3568 coex_sta->bt_link_exist = true;
3569 if (bt_info & BT_INFO_8723B_2ANT_B_FTP)
3570 coex_sta->pan_exist = true;
3571 else
3572 coex_sta->pan_exist = false;
3573 if (bt_info & BT_INFO_8723B_2ANT_B_A2DP)
3574 coex_sta->a2dp_exist = true;
3575 else
3576 coex_sta->a2dp_exist = false;
3577 if (bt_info & BT_INFO_8723B_2ANT_B_HID)
3578 coex_sta->hid_exist = true;
3579 else
3580 coex_sta->hid_exist = false;
3581 if (bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO)
3582 coex_sta->sco_exist = true;
3583 else
3584 coex_sta->sco_exist = false;
3585 }
3586
3587 btc8723b2ant_update_bt_link_info(btcoexist);
3588
3589 if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) {
3590 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
3591 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3592 "[BTCoex], BtInfoNotify(), "
3593 "BT Non-Connected idle!!!\n");
3594 /* connection exists but no busy */
3595 } else if (bt_info == BT_INFO_8723B_2ANT_B_CONNECTION) {
3596 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE;
3597 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3598 "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
3599 } else if ((bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO) ||
3600 (bt_info & BT_INFO_8723B_2ANT_B_SCO_BUSY)) {
3601 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_SCO_BUSY;
3602 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3603 "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
3604 } else if (bt_info & BT_INFO_8723B_2ANT_B_ACL_BUSY) {
3605 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_ACL_BUSY;
3606 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3607 "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
3608 } else {
3609 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_MAX;
3610 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3611 "[BTCoex], BtInfoNotify(), "
3612 "BT Non-Defined state!!!\n");
3613 }
3614
3615 if ((BT_8723B_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
3616 (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
3617 (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
3618 bt_busy = true;
3619 limited_dig = true;
3620 } else {
3621 bt_busy = false;
3622 limited_dig = false;
3623 }
3624
3625 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
3626
3627 coex_dm->limited_dig = limited_dig;
3628 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
3629
3630 btc8723b2ant_run_coexist_mechanism(btcoexist);
3631}
3632
3633void ex_halbtc8723b2ant_stack_operation_notify(struct btc_coexist *btcoexist,
3634 u8 type)
3635{
3636 if (BTC_STACK_OP_INQ_PAGE_PAIR_START == type)
3637 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3638 "[BTCoex],StackOP Inquiry/page/pair start notify\n");
3639 else if (BTC_STACK_OP_INQ_PAGE_PAIR_FINISH == type)
3640 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3641 "[BTCoex],StackOP Inquiry/page/pair finish notify\n");
3642}
3643
3644void ex_halbtc8723b2ant_halt_notify(struct btc_coexist *btcoexist)
3645{
3646 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, "[BTCoex], Halt notify\n");
3647
3648 btc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
3649 btc8723b_med_stat_notify(btcoexist, BTC_MEDIA_DISCONNECT);
3650}
3651
3652void ex_halbtc8723b2ant_periodical(struct btc_coexist *btcoexist)
3653{
3654 struct btc_board_info *board_info = &btcoexist->board_info;
3655 struct btc_stack_info *stack_info = &btcoexist->stack_info;
3656 static u8 dis_ver_info_cnt;
3657 u32 fw_ver = 0, bt_patch_ver = 0;
3658
3659 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3660 "[BTCoex], =========================="
3661 "Periodical===========================\n");
3662
3663 if (dis_ver_info_cnt <= 5) {
3664 dis_ver_info_cnt += 1;
3665 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3666 "[BTCoex], ****************************"
3667 "************************************\n");
3668 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3669 "[BTCoex], Ant PG Num/ Ant Mech/ "
3670 "Ant Pos = %d/ %d/ %d\n", board_info->pg_ant_num,
3671 board_info->btdm_ant_num, board_info->btdm_ant_pos);
3672 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3673 "[BTCoex], BT stack/ hci ext ver = %s / %d\n",
3674 ((stack_info->profile_notified) ? "Yes" : "No"),
3675 stack_info->hci_version);
3676 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
3677 &bt_patch_ver);
3678 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3679 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3680 "[BTCoex], CoexVer/ FwVer/ PatchVer = "
3681 "%d_%x/ 0x%x/ 0x%x(%d)\n",
3682 glcoex_ver_date_8723b_2ant, glcoex_ver_8723b_2ant,
3683 fw_ver, bt_patch_ver, bt_patch_ver);
3684 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3685 "[BTCoex], *****************************"
3686 "***********************************\n");
3687 }
3688
3689#if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
3690 btc8723b2ant_query_bt_info(btcoexist);
3691 btc8723b2ant_monitor_bt_ctr(btcoexist);
3692 btc8723b2ant_monitor_bt_enable_disable(btcoexist);
3693#else
3694 if (btc8723b2ant_is_wifi_status_changed(btcoexist) ||
3695 coex_dm->auto_tdma_adjust)
3696 btc8723b2ant_run_coexist_mechanism(btcoexist);
3697#endif
3698}
diff --git a/drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.h b/drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.h
new file mode 100644
index 000000000000..e0ad8e545f82
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.h
@@ -0,0 +1,173 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25#ifndef _HAL8723B_2_ANT
26#define _HAL8723B_2_ANT
27
28/************************************************************************
29 * The following is for 8723B 2Ant BT Co-exist definition
30 ************************************************************************/
31#define BT_AUTO_REPORT_ONLY_8723B_2ANT 1
32
33#define BT_INFO_8723B_2ANT_B_FTP BIT7
34#define BT_INFO_8723B_2ANT_B_A2DP BIT6
35#define BT_INFO_8723B_2ANT_B_HID BIT5
36#define BT_INFO_8723B_2ANT_B_SCO_BUSY BIT4
37#define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT3
38#define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT2
39#define BT_INFO_8723B_2ANT_B_SCO_ESCO BIT1
40#define BT_INFO_8723B_2ANT_B_CONNECTION BIT0
41
42#define BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT 2
43
44enum BT_INFO_SRC_8723B_2ANT {
45 BT_INFO_SRC_8723B_2ANT_WIFI_FW = 0x0,
46 BT_INFO_SRC_8723B_2ANT_BT_RSP = 0x1,
47 BT_INFO_SRC_8723B_2ANT_BT_ACTIVE_SEND = 0x2,
48 BT_INFO_SRC_8723B_2ANT_MAX
49};
50
51enum BT_8723B_2ANT_BT_STATUS {
52 BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
53 BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
54 BT_8723B_2ANT_BT_STATUS_INQ_PAGE = 0x2,
55 BT_8723B_2ANT_BT_STATUS_ACL_BUSY = 0x3,
56 BT_8723B_2ANT_BT_STATUS_SCO_BUSY = 0x4,
57 BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
58 BT_8723B_2ANT_BT_STATUS_MAX
59};
60
61enum BT_8723B_2ANT_COEX_ALGO {
62 BT_8723B_2ANT_COEX_ALGO_UNDEFINED = 0x0,
63 BT_8723B_2ANT_COEX_ALGO_SCO = 0x1,
64 BT_8723B_2ANT_COEX_ALGO_HID = 0x2,
65 BT_8723B_2ANT_COEX_ALGO_A2DP = 0x3,
66 BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
67 BT_8723B_2ANT_COEX_ALGO_PANEDR = 0x5,
68 BT_8723B_2ANT_COEX_ALGO_PANHS = 0x6,
69 BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
70 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
71 BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
72 BT_8723B_2ANT_COEX_ALGO_HID_A2DP = 0xa,
73 BT_8723B_2ANT_COEX_ALGO_MAX = 0xb,
74};
75
76struct coex_dm_8723b_2ant {
77 /* fw mechanism */
78 bool pre_dec_bt_pwr;
79 bool cur_dec_bt_pwr;
80 u8 pre_fw_dac_swing_lvl;
81 u8 cur_fw_dac_swing_lvl;
82 bool cur_ignore_wlan_act;
83 bool pre_ignore_wlan_act;
84 u8 pre_ps_tdma;
85 u8 cur_ps_tdma;
86 u8 ps_tdma_para[5];
87 u8 tdma_adj_type;
88 bool reset_tdma_adjust;
89 bool auto_tdma_adjust;
90 bool pre_ps_tdma_on;
91 bool cur_ps_tdma_on;
92 bool pre_bt_auto_report;
93 bool cur_bt_auto_report;
94
95 /* sw mechanism */
96 bool pre_rf_rx_lpf_shrink;
97 bool cur_rf_rx_lpf_shrink;
98 u32 bt_rf0x1e_backup;
99 bool pre_low_penalty_ra;
100 bool cur_low_penalty_ra;
101 bool pre_dac_swing_on;
102 u32 pre_dac_swing_lvl;
103 bool cur_dac_swing_on;
104 u32 cur_dac_swing_lvl;
105 bool pre_adc_back_off;
106 bool cur_adc_back_off;
107 bool pre_agc_table_en;
108 bool cur_agc_table_en;
109 u32 pre_val0x6c0;
110 u32 cur_val0x6c0;
111 u32 pre_val0x6c4;
112 u32 cur_val0x6c4;
113 u32 pre_val0x6c8;
114 u32 cur_val0x6c8;
115 u8 pre_val0x6cc;
116 u8 cur_val0x6cc;
117 bool limited_dig;
118
119 /* algorithm related */
120 u8 pre_algorithm;
121 u8 cur_algorithm;
122 u8 bt_status;
123 u8 wifi_chnl_info[3];
124
125 bool need_recover_0x948;
126 u16 backup_0x948;
127};
128
129struct coex_sta_8723b_2ant {
130 bool bt_link_exist;
131 bool sco_exist;
132 bool a2dp_exist;
133 bool hid_exist;
134 bool pan_exist;
135
136 bool under_lps;
137 bool under_ips;
138 u32 high_priority_tx;
139 u32 high_priority_rx;
140 u32 low_priority_tx;
141 u32 low_priority_rx;
142 u8 bt_rssi;
143 u8 pre_bt_rssi_state;
144 u8 pre_wifi_rssi_state[4];
145 bool c2h_bt_info_req_sent;
146 u8 bt_info_c2h[BT_INFO_SRC_8723B_2ANT_MAX][10];
147 u32 bt_info_c2h_cnt[BT_INFO_SRC_8723B_2ANT_MAX];
148 bool c2h_bt_inquiry_page;
149 u8 bt_retry_cnt;
150 u8 bt_info_ext;
151};
152
153/*********************************************************************
154 * The following is interface which will notify coex module.
155 *********************************************************************/
156void ex_halbtc8723b2ant_init_hwconfig(struct btc_coexist *btcoexist);
157void ex_halbtc8723b2ant_init_coex_dm(struct btc_coexist *btcoexist);
158void ex_halbtc8723b2ant_ips_notify(struct btc_coexist *btcoexist, u8 type);
159void ex_halbtc8723b2ant_lps_notify(struct btc_coexist *btcoexist, u8 type);
160void ex_halbtc8723b2ant_scan_notify(struct btc_coexist *btcoexist, u8 type);
161void ex_halbtc8723b2ant_connect_notify(struct btc_coexist *btcoexist, u8 type);
162void btc8723b_med_stat_notify(struct btc_coexist *btcoexist, u8 type);
163void ex_halbtc8723b2ant_special_packet_notify(struct btc_coexist *btcoexist,
164 u8 type);
165void ex_halbtc8723b2ant_bt_info_notify(struct btc_coexist *btcoexist,
166 u8 *tmpbuf, u8 length);
167void ex_halbtc8723b2ant_stack_operation_notify(struct btc_coexist *btcoexist,
168 u8 type);
169void ex_halbtc8723b2ant_halt_notify(struct btc_coexist *btcoexist);
170void ex_halbtc8723b2ant_periodical(struct btc_coexist *btcoexist);
171void ex_halbtc8723b2ant_display_coex_info(struct btc_coexist *btcoexist);
172
173#endif
diff --git a/drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.c b/drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.c
new file mode 100644
index 000000000000..9e1217f2c966
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.c
@@ -0,0 +1,1011 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 ******************************************************************************/
25
26#include "halbt_precomp.h"
27
28/***********************************************
29 * Global variables
30 ***********************************************/
31
32struct btc_coexist gl_bt_coexist;
33
34u32 btc_dbg_type[BTC_MSG_MAX];
35static u8 btc_dbg_buf[100];
36
37/***************************************************
38 * Debug related function
39 ***************************************************/
40static bool halbtc_is_bt_coexist_available(struct btc_coexist *btcoexist)
41{
42 if (!btcoexist->binded || NULL == btcoexist->adapter)
43 return false;
44
45 return true;
46}
47
48static bool halbtc_is_wifi_busy(struct rtl_priv *rtlpriv)
49{
50 if (rtlpriv->link_info.busytraffic)
51 return true;
52 else
53 return false;
54}
55
56static void halbtc_dbg_init(void)
57{
58 u8 i;
59
60 for (i = 0; i < BTC_MSG_MAX; i++)
61 btc_dbg_type[i] = 0;
62
63 btc_dbg_type[BTC_MSG_INTERFACE] =
64/* INTF_INIT | */
65/* INTF_NOTIFY | */
66 0;
67
68 btc_dbg_type[BTC_MSG_ALGORITHM] =
69/* ALGO_BT_RSSI_STATE | */
70/* ALGO_WIFI_RSSI_STATE | */
71/* ALGO_BT_MONITOR | */
72/* ALGO_TRACE | */
73/* ALGO_TRACE_FW | */
74/* ALGO_TRACE_FW_DETAIL | */
75/* ALGO_TRACE_FW_EXEC | */
76/* ALGO_TRACE_SW | */
77/* ALGO_TRACE_SW_DETAIL | */
78/* ALGO_TRACE_SW_EXEC | */
79 0;
80}
81
82static bool halbtc_is_bt40(struct rtl_priv *adapter)
83{
84 struct rtl_priv *rtlpriv = adapter;
85 struct rtl_phy *rtlphy = &(rtlpriv->phy);
86 bool is_ht40 = true;
87 enum ht_channel_width bw = rtlphy->current_chan_bw;
88
89 if (bw == HT_CHANNEL_WIDTH_20)
90 is_ht40 = false;
91 else if (bw == HT_CHANNEL_WIDTH_20_40)
92 is_ht40 = true;
93
94 return is_ht40;
95}
96
97static bool halbtc_legacy(struct rtl_priv *adapter)
98{
99 struct rtl_priv *rtlpriv = adapter;
100 struct rtl_mac *mac = rtl_mac(rtlpriv);
101
102 bool is_legacy = false;
103
104 if ((mac->mode == WIRELESS_MODE_B) || (mac->mode == WIRELESS_MODE_B))
105 is_legacy = true;
106
107 return is_legacy;
108}
109
110bool halbtc_is_wifi_uplink(struct rtl_priv *adapter)
111{
112 struct rtl_priv *rtlpriv = adapter;
113
114 if (rtlpriv->link_info.tx_busy_traffic)
115 return true;
116 else
117 return false;
118}
119
120static u32 halbtc_get_wifi_bw(struct btc_coexist *btcoexist)
121{
122 struct rtl_priv *rtlpriv =
123 (struct rtl_priv *)btcoexist->adapter;
124 u32 wifi_bw = BTC_WIFI_BW_HT20;
125
126 if (halbtc_is_bt40(rtlpriv)) {
127 wifi_bw = BTC_WIFI_BW_HT40;
128 } else {
129 if (halbtc_legacy(rtlpriv))
130 wifi_bw = BTC_WIFI_BW_LEGACY;
131 else
132 wifi_bw = BTC_WIFI_BW_HT20;
133 }
134 return wifi_bw;
135}
136
137static u8 halbtc_get_wifi_central_chnl(struct btc_coexist *btcoexist)
138{
139 struct rtl_priv *rtlpriv = btcoexist->adapter;
140 struct rtl_phy *rtlphy = &(rtlpriv->phy);
141 u8 chnl = 1;
142
143 if (rtlphy->current_channel != 0)
144 chnl = rtlphy->current_channel;
145 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
146 "static halbtc_get_wifi_central_chnl:%d\n", chnl);
147 return chnl;
148}
149
150static void halbtc_leave_lps(struct btc_coexist *btcoexist)
151{
152 struct rtl_priv *rtlpriv;
153 struct rtl_ps_ctl *ppsc;
154 bool ap_enable = false;
155
156 rtlpriv = btcoexist->adapter;
157 ppsc = rtl_psc(rtlpriv);
158
159 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
160 &ap_enable);
161
162 if (ap_enable) {
163 pr_info("halbtc_leave_lps()<--dont leave lps under AP mode\n");
164 return;
165 }
166
167 btcoexist->bt_info.bt_ctrl_lps = true;
168 btcoexist->bt_info.bt_lps_on = false;
169}
170
171static void halbtc_enter_lps(struct btc_coexist *btcoexist)
172{
173 struct rtl_priv *rtlpriv;
174 struct rtl_ps_ctl *ppsc;
175 bool ap_enable = false;
176
177 rtlpriv = btcoexist->adapter;
178 ppsc = rtl_psc(rtlpriv);
179
180 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
181 &ap_enable);
182
183 if (ap_enable) {
184 pr_info("halbtc_enter_lps()<--dont enter lps under AP mode\n");
185 return;
186 }
187
188 btcoexist->bt_info.bt_ctrl_lps = true;
189 btcoexist->bt_info.bt_lps_on = false;
190}
191
192static void halbtc_normal_lps(struct btc_coexist *btcoexist)
193{
194 if (btcoexist->bt_info.bt_ctrl_lps) {
195 btcoexist->bt_info.bt_lps_on = false;
196 btcoexist->bt_info.bt_ctrl_lps = false;
197 }
198}
199
200static void halbtc_leave_low_power(void)
201{
202}
203
204static void halbtc_nomal_low_power(void)
205{
206}
207
208static void halbtc_disable_low_power(void)
209{
210}
211
212static void halbtc_aggregation_check(void)
213{
214}
215
216static u32 halbtc_get_bt_patch_version(struct btc_coexist *btcoexist)
217{
218 return 0;
219}
220
221static s32 halbtc_get_wifi_rssi(struct rtl_priv *adapter)
222{
223 struct rtl_priv *rtlpriv = adapter;
224 s32 undec_sm_pwdb = 0;
225
226 if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
227 undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb;
228 else /* associated entry pwdb */
229 undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb;
230 return undec_sm_pwdb;
231}
232
233static bool halbtc_get(void *void_btcoexist, u8 get_type, void *out_buf)
234{
235 struct btc_coexist *btcoexist = (struct btc_coexist *)void_btcoexist;
236 struct rtl_priv *rtlpriv = btcoexist->adapter;
237 struct rtl_phy *rtlphy = &(rtlpriv->phy);
238 struct rtl_mac *mac = rtl_mac(rtlpriv);
239 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
240 bool *bool_tmp = (bool *)out_buf;
241 int *s32_tmp = (int *)out_buf;
242 u32 *u32_tmp = (u32 *)out_buf;
243 u8 *u8_tmp = (u8 *)out_buf;
244 bool tmp = false;
245
246 if (!halbtc_is_bt_coexist_available(btcoexist))
247 return false;
248
249 switch (get_type) {
250 case BTC_GET_BL_HS_OPERATION:
251 *bool_tmp = false;
252 break;
253 case BTC_GET_BL_HS_CONNECTING:
254 *bool_tmp = false;
255 break;
256 case BTC_GET_BL_WIFI_CONNECTED:
257 if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
258 tmp = true;
259 *bool_tmp = tmp;
260 break;
261 case BTC_GET_BL_WIFI_BUSY:
262 if (halbtc_is_wifi_busy(rtlpriv))
263 *bool_tmp = true;
264 else
265 *bool_tmp = false;
266 break;
267 case BTC_GET_BL_WIFI_SCAN:
268 if (mac->act_scanning)
269 *bool_tmp = true;
270 else
271 *bool_tmp = false;
272 break;
273 case BTC_GET_BL_WIFI_LINK:
274 if (mac->link_state == MAC80211_LINKING)
275 *bool_tmp = true;
276 else
277 *bool_tmp = false;
278 break;
279 case BTC_GET_BL_WIFI_ROAM: /*TODO*/
280 if (mac->link_state == MAC80211_LINKING)
281 *bool_tmp = true;
282 else
283 *bool_tmp = false;
284 break;
285 case BTC_GET_BL_WIFI_4_WAY_PROGRESS: /*TODO*/
286 *bool_tmp = false;
287
288 break;
289 case BTC_GET_BL_WIFI_UNDER_5G:
290 *bool_tmp = false; /*TODO*/
291
292 case BTC_GET_BL_WIFI_DHCP: /*TODO*/
293 break;
294 case BTC_GET_BL_WIFI_SOFTAP_IDLE:
295 *bool_tmp = true;
296 break;
297 case BTC_GET_BL_WIFI_SOFTAP_LINKING:
298 *bool_tmp = false;
299 break;
300 case BTC_GET_BL_WIFI_IN_EARLY_SUSPEND:
301 *bool_tmp = false;
302 break;
303 case BTC_GET_BL_WIFI_AP_MODE_ENABLE:
304 *bool_tmp = false;
305 break;
306 case BTC_GET_BL_WIFI_ENABLE_ENCRYPTION:
307 if (NO_ENCRYPTION == rtlpriv->sec.pairwise_enc_algorithm)
308 *bool_tmp = false;
309 else
310 *bool_tmp = true;
311 break;
312 case BTC_GET_BL_WIFI_UNDER_B_MODE:
313 *bool_tmp = false; /*TODO*/
314 break;
315 case BTC_GET_BL_EXT_SWITCH:
316 *bool_tmp = false;
317 break;
318 case BTC_GET_S4_WIFI_RSSI:
319 *s32_tmp = halbtc_get_wifi_rssi(rtlpriv);
320 break;
321 case BTC_GET_S4_HS_RSSI: /*TODO*/
322 *s32_tmp = halbtc_get_wifi_rssi(rtlpriv);
323 break;
324 case BTC_GET_U4_WIFI_BW:
325 *u32_tmp = halbtc_get_wifi_bw(btcoexist);
326 break;
327 case BTC_GET_U4_WIFI_TRAFFIC_DIRECTION:
328 if (halbtc_is_wifi_uplink(rtlpriv))
329 *u32_tmp = BTC_WIFI_TRAFFIC_TX;
330 else
331 *u32_tmp = BTC_WIFI_TRAFFIC_RX;
332 break;
333 case BTC_GET_U4_WIFI_FW_VER:
334 *u32_tmp = rtlhal->fw_version;
335 break;
336 case BTC_GET_U4_BT_PATCH_VER:
337 *u32_tmp = halbtc_get_bt_patch_version(btcoexist);
338 break;
339 case BTC_GET_U1_WIFI_DOT11_CHNL:
340 *u8_tmp = rtlphy->current_channel;
341 break;
342 case BTC_GET_U1_WIFI_CENTRAL_CHNL:
343 *u8_tmp = halbtc_get_wifi_central_chnl(btcoexist);
344 break;
345 case BTC_GET_U1_WIFI_HS_CHNL:
346 *u8_tmp = 1;/*BT_OperateChnl(rtlpriv);*/
347 break;
348 case BTC_GET_U1_MAC_PHY_MODE:
349 *u8_tmp = BTC_MP_UNKNOWN;
350 break;
351
352 /************* 1Ant **************/
353 case BTC_GET_U1_LPS_MODE:
354 *u8_tmp = btcoexist->pwr_mode_val[0];
355 break;
356
357 default:
358 break;
359 }
360
361 return true;
362}
363
364static bool halbtc_set(void *void_btcoexist, u8 set_type, void *in_buf)
365{
366 struct btc_coexist *btcoexist = (struct btc_coexist *)void_btcoexist;
367 bool *bool_tmp = (bool *)in_buf;
368 u8 *u8_tmp = (u8 *)in_buf;
369 u32 *u32_tmp = (u32 *)in_buf;
370
371 if (!halbtc_is_bt_coexist_available(btcoexist))
372 return false;
373
374 switch (set_type) {
375 /* set some bool type variables. */
376 case BTC_SET_BL_BT_DISABLE:
377 btcoexist->bt_info.bt_disabled = *bool_tmp;
378 break;
379 case BTC_SET_BL_BT_TRAFFIC_BUSY:
380 btcoexist->bt_info.bt_busy = *bool_tmp;
381 break;
382 case BTC_SET_BL_BT_LIMITED_DIG:
383 btcoexist->bt_info.limited_dig = *bool_tmp;
384 break;
385 case BTC_SET_BL_FORCE_TO_ROAM:
386 btcoexist->bt_info.force_to_roam = *bool_tmp;
387 break;
388 case BTC_SET_BL_TO_REJ_AP_AGG_PKT:
389 btcoexist->bt_info.reject_agg_pkt = *bool_tmp;
390 break;
391 case BTC_SET_BL_BT_CTRL_AGG_SIZE:
392 btcoexist->bt_info.b_bt_ctrl_buf_size = *bool_tmp;
393 break;
394 case BTC_SET_BL_INC_SCAN_DEV_NUM:
395 btcoexist->bt_info.increase_scan_dev_num = *bool_tmp;
396 break;
397 /* set some u1Byte type variables. */
398 case BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON:
399 btcoexist->bt_info.rssi_adjust_for_agc_table_on = *u8_tmp;
400 break;
401 case BTC_SET_U1_AGG_BUF_SIZE:
402 btcoexist->bt_info.agg_buf_size = *u8_tmp;
403 break;
404 /* the following are some action which will be triggered */
405 case BTC_SET_ACT_GET_BT_RSSI:
406 /*BTHCI_SendGetBtRssiEvent(rtlpriv);*/
407 break;
408 case BTC_SET_ACT_AGGREGATE_CTRL:
409 halbtc_aggregation_check();
410 break;
411
412 /* 1Ant */
413 case BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE:
414 btcoexist->bt_info.rssi_adjust_for_1ant_coex_type = *u8_tmp;
415 break;
416 case BTC_SET_UI_SCAN_SIG_COMPENSATION:
417 /* rtlpriv->mlmepriv.scan_compensation = *u8_tmp; */
418 break;
419 case BTC_SET_U1_1ANT_LPS:
420 btcoexist->bt_info.lps_1ant = *u8_tmp;
421 break;
422 case BTC_SET_U1_1ANT_RPWM:
423 btcoexist->bt_info.rpwm_1ant = *u8_tmp;
424 break;
425 /* the following are some action which will be triggered */
426 case BTC_SET_ACT_LEAVE_LPS:
427 halbtc_leave_lps(btcoexist);
428 break;
429 case BTC_SET_ACT_ENTER_LPS:
430 halbtc_enter_lps(btcoexist);
431 break;
432 case BTC_SET_ACT_NORMAL_LPS:
433 halbtc_normal_lps(btcoexist);
434 break;
435 case BTC_SET_ACT_DISABLE_LOW_POWER:
436 halbtc_disable_low_power();
437 break;
438 case BTC_SET_ACT_UPDATE_ra_mask:
439 btcoexist->bt_info.ra_mask = *u32_tmp;
440 break;
441 case BTC_SET_ACT_SEND_MIMO_PS:
442 break;
443 case BTC_SET_ACT_INC_FORCE_EXEC_PWR_CMD_CNT:
444 btcoexist->bt_info.force_exec_pwr_cmd_cnt++;
445 break;
446 case BTC_SET_ACT_CTRL_BT_INFO: /*wait for 8812/8821*/
447 break;
448 case BTC_SET_ACT_CTRL_BT_COEX:
449 break;
450 default:
451 break;
452 }
453
454 return true;
455}
456
457static void halbtc_display_coex_statistics(struct btc_coexist *btcoexist)
458{
459}
460
461static void halbtc_display_bt_link_info(struct btc_coexist *btcoexist)
462{
463}
464
465static void halbtc_display_bt_fw_info(struct btc_coexist *btcoexist)
466{
467}
468
469static void halbtc_display_fw_pwr_mode_cmd(struct btc_coexist *btcoexist)
470{
471}
472
473/************************************************************
474 * IO related function
475 ************************************************************/
476static u8 halbtc_read_1byte(void *bt_context, u32 reg_addr)
477{
478 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
479 struct rtl_priv *rtlpriv = btcoexist->adapter;
480
481 return rtl_read_byte(rtlpriv, reg_addr);
482}
483
484static u16 halbtc_read_2byte(void *bt_context, u32 reg_addr)
485{
486 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
487 struct rtl_priv *rtlpriv = btcoexist->adapter;
488
489 return rtl_read_word(rtlpriv, reg_addr);
490}
491
492static u32 halbtc_read_4byte(void *bt_context, u32 reg_addr)
493{
494 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
495 struct rtl_priv *rtlpriv = btcoexist->adapter;
496
497 return rtl_read_dword(rtlpriv, reg_addr);
498}
499
500static void halbtc_write_1byte(void *bt_context, u32 reg_addr, u8 data)
501{
502 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
503 struct rtl_priv *rtlpriv = btcoexist->adapter;
504
505 rtl_write_byte(rtlpriv, reg_addr, data);
506}
507
508static void halbtc_bitmask_write_1byte(void *bt_context, u32 reg_addr,
509 u32 bit_mask, u8 data)
510{
511 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
512 struct rtl_priv *rtlpriv = btcoexist->adapter;
513 u8 original_value, bit_shift = 0;
514 u8 i;
515
516 if (bit_mask != MASKDWORD) {/*if not "double word" write*/
517 original_value = rtl_read_byte(rtlpriv, reg_addr);
518 for (i = 0; i <= 7; i++) {
519 if ((bit_mask>>i) & 0x1)
520 break;
521 }
522 bit_shift = i;
523 data = (original_value & (~bit_mask)) |
524 ((data << bit_shift) & bit_mask);
525 }
526 rtl_write_byte(rtlpriv, reg_addr, data);
527}
528
529static void halbtc_write_2byte(void *bt_context, u32 reg_addr, u16 data)
530{
531 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
532 struct rtl_priv *rtlpriv = btcoexist->adapter;
533
534 rtl_write_word(rtlpriv, reg_addr, data);
535}
536
537static void halbtc_write_4byte(void *bt_context, u32 reg_addr, u32 data)
538{
539 struct btc_coexist *btcoexist =
540 (struct btc_coexist *)bt_context;
541 struct rtl_priv *rtlpriv = btcoexist->adapter;
542
543 rtl_write_dword(rtlpriv, reg_addr, data);
544}
545
546static void halbtc_set_bbreg(void *bt_context, u32 reg_addr, u32 bit_mask,
547 u32 data)
548{
549 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
550 struct rtl_priv *rtlpriv = btcoexist->adapter;
551
552 rtl_set_bbreg(rtlpriv->mac80211.hw, reg_addr, bit_mask, data);
553}
554
555static u32 halbtc_get_bbreg(void *bt_context, u32 reg_addr, u32 bit_mask)
556{
557 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
558 struct rtl_priv *rtlpriv = btcoexist->adapter;
559
560 return rtl_get_bbreg(rtlpriv->mac80211.hw, reg_addr, bit_mask);
561}
562
563static void halbtc_set_rfreg(void *bt_context, u8 rf_path, u32 reg_addr,
564 u32 bit_mask, u32 data)
565{
566 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
567 struct rtl_priv *rtlpriv = btcoexist->adapter;
568
569 rtl_set_rfreg(rtlpriv->mac80211.hw, rf_path, reg_addr, bit_mask, data);
570}
571
572static u32 halbtc_get_rfreg(void *bt_context, u8 rf_path, u32 reg_addr,
573 u32 bit_mask)
574{
575 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
576 struct rtl_priv *rtlpriv = btcoexist->adapter;
577
578 return rtl_get_rfreg(rtlpriv->mac80211.hw, rf_path, reg_addr, bit_mask);
579}
580
581static void halbtc_fill_h2c_cmd(void *bt_context, u8 element_id,
582 u32 cmd_len, u8 *cmd_buf)
583{
584 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
585 struct rtl_priv *rtlpriv = btcoexist->adapter;
586
587 rtlpriv->cfg->ops->fill_h2c_cmd(rtlpriv->mac80211.hw, element_id,
588 cmd_len, cmd_buf);
589}
590
591static void halbtc_display_dbg_msg(void *bt_context, u8 disp_type)
592{
593 struct btc_coexist *btcoexist = (struct btc_coexist *)bt_context;
594 switch (disp_type) {
595 case BTC_DBG_DISP_COEX_STATISTICS:
596 halbtc_display_coex_statistics(btcoexist);
597 break;
598 case BTC_DBG_DISP_BT_LINK_INFO:
599 halbtc_display_bt_link_info(btcoexist);
600 break;
601 case BTC_DBG_DISP_BT_FW_VER:
602 halbtc_display_bt_fw_info(btcoexist);
603 break;
604 case BTC_DBG_DISP_FW_PWR_MODE_CMD:
605 halbtc_display_fw_pwr_mode_cmd(btcoexist);
606 break;
607 default:
608 break;
609 }
610}
611
612/*****************************************************************
613 * Extern functions called by other module
614 *****************************************************************/
615bool exhalbtc_initlize_variables(struct rtl_priv *adapter)
616{
617 struct btc_coexist *btcoexist = &gl_bt_coexist;
618
619 btcoexist->statistics.cnt_bind++;
620
621 halbtc_dbg_init();
622
623 if (btcoexist->binded)
624 return false;
625 else
626 btcoexist->binded = true;
627
628#if (defined(CONFIG_PCI_HCI))
629 btcoexist->chip_interface = BTC_INTF_PCI;
630#elif (defined(CONFIG_USB_HCI))
631 btcoexist->chip_interface = BTC_INTF_USB;
632#elif (defined(CONFIG_SDIO_HCI))
633 btcoexist->chip_interface = BTC_INTF_SDIO;
634#elif (defined(CONFIG_GSPI_HCI))
635 btcoexist->chip_interface = BTC_INTF_GSPI;
636#else
637 btcoexist->chip_interface = BTC_INTF_UNKNOWN;
638#endif
639
640 if (NULL == btcoexist->adapter)
641 btcoexist->adapter = adapter;
642
643 btcoexist->stack_info.profile_notified = false;
644
645 btcoexist->btc_read_1byte = halbtc_read_1byte;
646 btcoexist->btc_write_1byte = halbtc_write_1byte;
647 btcoexist->btc_write_1byte_bitmask = halbtc_bitmask_write_1byte;
648 btcoexist->btc_read_2byte = halbtc_read_2byte;
649 btcoexist->btc_write_2byte = halbtc_write_2byte;
650 btcoexist->btc_read_4byte = halbtc_read_4byte;
651 btcoexist->btc_write_4byte = halbtc_write_4byte;
652
653 btcoexist->btc_set_bb_reg = halbtc_set_bbreg;
654 btcoexist->btc_get_bb_reg = halbtc_get_bbreg;
655
656 btcoexist->btc_set_rf_reg = halbtc_set_rfreg;
657 btcoexist->btc_get_rf_reg = halbtc_get_rfreg;
658
659 btcoexist->btc_fill_h2c = halbtc_fill_h2c_cmd;
660 btcoexist->btc_disp_dbg_msg = halbtc_display_dbg_msg;
661
662 btcoexist->btc_get = halbtc_get;
663 btcoexist->btc_set = halbtc_set;
664
665 btcoexist->cli_buf = &btc_dbg_buf[0];
666
667 btcoexist->bt_info.b_bt_ctrl_buf_size = false;
668 btcoexist->bt_info.agg_buf_size = 5;
669
670 btcoexist->bt_info.increase_scan_dev_num = false;
671 return true;
672}
673
674void exhalbtc_init_hw_config(struct btc_coexist *btcoexist)
675{
676 struct rtl_priv *rtlpriv = btcoexist->adapter;
677 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
678
679 if (!halbtc_is_bt_coexist_available(btcoexist))
680 return;
681
682 btcoexist->statistics.cnt_init_hw_config++;
683
684 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
685 ex_halbtc8723b2ant_init_hwconfig(btcoexist);
686}
687
688void exhalbtc_init_coex_dm(struct btc_coexist *btcoexist)
689{
690 struct rtl_priv *rtlpriv = btcoexist->adapter;
691 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
692
693 if (!halbtc_is_bt_coexist_available(btcoexist))
694 return;
695
696 btcoexist->statistics.cnt_init_coex_dm++;
697
698 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
699 ex_halbtc8723b2ant_init_coex_dm(btcoexist);
700
701 btcoexist->initilized = true;
702}
703
704void exhalbtc_ips_notify(struct btc_coexist *btcoexist, u8 type)
705{
706 struct rtl_priv *rtlpriv = btcoexist->adapter;
707 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
708 u8 ips_type;
709
710 if (!halbtc_is_bt_coexist_available(btcoexist))
711 return;
712 btcoexist->statistics.cnt_ips_notify++;
713 if (btcoexist->manual_control)
714 return;
715
716 if (ERFOFF == type)
717 ips_type = BTC_IPS_ENTER;
718 else
719 ips_type = BTC_IPS_LEAVE;
720
721 halbtc_leave_low_power();
722
723 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
724 ex_halbtc8723b2ant_ips_notify(btcoexist, ips_type);
725
726 halbtc_nomal_low_power();
727}
728
729void exhalbtc_lps_notify(struct btc_coexist *btcoexist, u8 type)
730{
731 struct rtl_priv *rtlpriv = btcoexist->adapter;
732 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
733 u8 lps_type;
734
735 if (!halbtc_is_bt_coexist_available(btcoexist))
736 return;
737 btcoexist->statistics.cnt_lps_notify++;
738 if (btcoexist->manual_control)
739 return;
740
741 if (EACTIVE == type)
742 lps_type = BTC_LPS_DISABLE;
743 else
744 lps_type = BTC_LPS_ENABLE;
745
746 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
747 ex_halbtc8723b2ant_lps_notify(btcoexist, lps_type);
748}
749
750void exhalbtc_scan_notify(struct btc_coexist *btcoexist, u8 type)
751{
752 struct rtl_priv *rtlpriv = btcoexist->adapter;
753 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
754 u8 scan_type;
755
756 if (!halbtc_is_bt_coexist_available(btcoexist))
757 return;
758 btcoexist->statistics.cnt_scan_notify++;
759 if (btcoexist->manual_control)
760 return;
761
762 if (type)
763 scan_type = BTC_SCAN_START;
764 else
765 scan_type = BTC_SCAN_FINISH;
766
767 halbtc_leave_low_power();
768
769 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
770 ex_halbtc8723b2ant_scan_notify(btcoexist, scan_type);
771
772 halbtc_nomal_low_power();
773}
774
775void exhalbtc_connect_notify(struct btc_coexist *btcoexist, u8 action)
776{
777 struct rtl_priv *rtlpriv = btcoexist->adapter;
778 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
779 u8 asso_type;
780
781 if (!halbtc_is_bt_coexist_available(btcoexist))
782 return;
783 btcoexist->statistics.cnt_connect_notify++;
784 if (btcoexist->manual_control)
785 return;
786
787 if (action)
788 asso_type = BTC_ASSOCIATE_START;
789 else
790 asso_type = BTC_ASSOCIATE_FINISH;
791
792 halbtc_leave_low_power();
793
794 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
795 ex_halbtc8723b2ant_connect_notify(btcoexist, asso_type);
796}
797
798void exhalbtc_mediastatus_notify(struct btc_coexist *btcoexist,
799 enum _RT_MEDIA_STATUS media_status)
800{
801 struct rtl_priv *rtlpriv = btcoexist->adapter;
802 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
803 u8 status;
804
805 if (!halbtc_is_bt_coexist_available(btcoexist))
806 return;
807 btcoexist->statistics.cnt_media_status_notify++;
808 if (btcoexist->manual_control)
809 return;
810
811 if (RT_MEDIA_CONNECT == media_status)
812 status = BTC_MEDIA_CONNECT;
813 else
814 status = BTC_MEDIA_DISCONNECT;
815
816 halbtc_leave_low_power();
817
818 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
819 btc8723b_med_stat_notify(btcoexist, status);
820
821 halbtc_nomal_low_power();
822}
823
824void exhalbtc_special_packet_notify(struct btc_coexist *btcoexist, u8 pkt_type)
825{
826 struct rtl_priv *rtlpriv = btcoexist->adapter;
827 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
828 u8 packet_type;
829
830 if (!halbtc_is_bt_coexist_available(btcoexist))
831 return;
832 btcoexist->statistics.cnt_special_packet_notify++;
833 if (btcoexist->manual_control)
834 return;
835
836 packet_type = BTC_PACKET_DHCP;
837
838 halbtc_leave_low_power();
839
840 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
841 ex_halbtc8723b2ant_special_packet_notify(btcoexist,
842 packet_type);
843
844 halbtc_nomal_low_power();
845}
846
847void exhalbtc_bt_info_notify(struct btc_coexist *btcoexist,
848 u8 *tmp_buf, u8 length)
849{
850 struct rtl_priv *rtlpriv = btcoexist->adapter;
851 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
852 if (!halbtc_is_bt_coexist_available(btcoexist))
853 return;
854 btcoexist->statistics.cnt_bt_info_notify++;
855
856 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
857 ex_halbtc8723b2ant_bt_info_notify(btcoexist, tmp_buf, length);
858}
859
860void exhalbtc_stack_operation_notify(struct btc_coexist *btcoexist, u8 type)
861{
862 struct rtl_priv *rtlpriv = btcoexist->adapter;
863 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
864 u8 stack_op_type;
865
866 if (!halbtc_is_bt_coexist_available(btcoexist))
867 return;
868 btcoexist->statistics.cnt_stack_operation_notify++;
869 if (btcoexist->manual_control)
870 return;
871
872 stack_op_type = BTC_STACK_OP_NONE;
873
874 halbtc_leave_low_power();
875
876 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
877 ex_halbtc8723b2ant_stack_operation_notify(btcoexist,
878 stack_op_type);
879
880 halbtc_nomal_low_power();
881}
882
883void exhalbtc_halt_notify(struct btc_coexist *btcoexist)
884{
885 struct rtl_priv *rtlpriv = btcoexist->adapter;
886 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
887 if (!halbtc_is_bt_coexist_available(btcoexist))
888 return;
889
890 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
891 ex_halbtc8723b2ant_halt_notify(btcoexist);
892}
893
894void exhalbtc_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state)
895{
896 if (!halbtc_is_bt_coexist_available(btcoexist))
897 return;
898}
899
900void exhalbtc_periodical(struct btc_coexist *btcoexist)
901{
902 struct rtl_priv *rtlpriv = btcoexist->adapter;
903 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
904 if (!halbtc_is_bt_coexist_available(btcoexist))
905 return;
906 btcoexist->statistics.cnt_periodical++;
907
908 halbtc_leave_low_power();
909
910 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
911 ex_halbtc8723b2ant_periodical(btcoexist);
912
913 halbtc_nomal_low_power();
914}
915
916void exhalbtc_dbg_control(struct btc_coexist *btcoexist,
917 u8 code, u8 len, u8 *data)
918{
919 if (!halbtc_is_bt_coexist_available(btcoexist))
920 return;
921 btcoexist->statistics.cnt_dbg_ctrl++;
922}
923
924void exhalbtc_stack_update_profile_info(void)
925{
926}
927
928void exhalbtc_update_min_bt_rssi(char bt_rssi)
929{
930 struct btc_coexist *btcoexist = &gl_bt_coexist;
931
932 if (!halbtc_is_bt_coexist_available(btcoexist))
933 return;
934
935 btcoexist->stack_info.min_bt_rssi = bt_rssi;
936}
937
938void exhalbtc_set_hci_version(u16 hci_version)
939{
940 struct btc_coexist *btcoexist = &gl_bt_coexist;
941
942 if (!halbtc_is_bt_coexist_available(btcoexist))
943 return;
944
945 btcoexist->stack_info.hci_version = hci_version;
946}
947
948void exhalbtc_set_bt_patch_version(u16 bt_hci_version, u16 bt_patch_version)
949{
950 struct btc_coexist *btcoexist = &gl_bt_coexist;
951
952 if (!halbtc_is_bt_coexist_available(btcoexist))
953 return;
954
955 btcoexist->bt_info.bt_real_fw_ver = bt_patch_version;
956 btcoexist->bt_info.bt_hci_ver = bt_hci_version;
957}
958
959void exhalbtc_set_bt_exist(bool bt_exist)
960{
961 gl_bt_coexist.board_info.bt_exist = bt_exist;
962}
963
964void exhalbtc_set_chip_type(u8 chip_type)
965{
966 switch (chip_type) {
967 default:
968 case BT_2WIRE:
969 case BT_ISSC_3WIRE:
970 case BT_ACCEL:
971 case BT_RTL8756:
972 gl_bt_coexist.board_info.bt_chip_type = BTC_CHIP_UNDEF;
973 break;
974 case BT_CSR_BC4:
975 gl_bt_coexist.board_info.bt_chip_type = BTC_CHIP_CSR_BC4;
976 break;
977 case BT_CSR_BC8:
978 gl_bt_coexist.board_info.bt_chip_type = BTC_CHIP_CSR_BC8;
979 break;
980 case BT_RTL8723A:
981 gl_bt_coexist.board_info.bt_chip_type = BTC_CHIP_RTL8723A;
982 break;
983 case BT_RTL8821:
984 gl_bt_coexist.board_info.bt_chip_type = BTC_CHIP_RTL8821;
985 break;
986 case BT_RTL8723B:
987 gl_bt_coexist.board_info.bt_chip_type = BTC_CHIP_RTL8723B;
988 break;
989 }
990}
991
992void exhalbtc_set_ant_num(u8 type, u8 ant_num)
993{
994 if (BT_COEX_ANT_TYPE_PG == type) {
995 gl_bt_coexist.board_info.pg_ant_num = ant_num;
996 gl_bt_coexist.board_info.btdm_ant_num = ant_num;
997 } else if (BT_COEX_ANT_TYPE_ANTDIV == type) {
998 gl_bt_coexist.board_info.btdm_ant_num = ant_num;
999 }
1000}
1001
1002void exhalbtc_display_bt_coex_info(struct btc_coexist *btcoexist)
1003{
1004 struct rtl_priv *rtlpriv = btcoexist->adapter;
1005 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1006 if (!halbtc_is_bt_coexist_available(btcoexist))
1007 return;
1008
1009 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE)
1010 ex_halbtc8723b2ant_display_coex_info(btcoexist);
1011}
diff --git a/drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.h b/drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.h
new file mode 100644
index 000000000000..871fc3c6d559
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.h
@@ -0,0 +1,559 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25#ifndef __HALBTC_OUT_SRC_H__
26#define __HALBTC_OUT_SRC_H__
27
28#include "../wifi.h"
29
30#define NORMAL_EXEC false
31#define FORCE_EXEC true
32
33#define BTC_RF_A RF90_PATH_A
34#define BTC_RF_B RF90_PATH_B
35#define BTC_RF_C RF90_PATH_C
36#define BTC_RF_D RF90_PATH_D
37
38#define BTC_SMSP SINGLEMAC_SINGLEPHY
39#define BTC_DMDP DUALMAC_DUALPHY
40#define BTC_DMSP DUALMAC_SINGLEPHY
41#define BTC_MP_UNKNOWN 0xff
42
43#define IN
44#define OUT
45
46#define BT_TMP_BUF_SIZE 100
47
48#define BT_COEX_ANT_TYPE_PG 0
49#define BT_COEX_ANT_TYPE_ANTDIV 1
50#define BT_COEX_ANT_TYPE_DETECTED 2
51
52#define BTC_MIMO_PS_STATIC 0
53#define BTC_MIMO_PS_DYNAMIC 1
54
55#define BTC_RATE_DISABLE 0
56#define BTC_RATE_ENABLE 1
57
58#define BTC_ANT_PATH_WIFI 0
59#define BTC_ANT_PATH_BT 1
60#define BTC_ANT_PATH_PTA 2
61
62enum btc_chip_interface {
63 BTC_INTF_UNKNOWN = 0,
64 BTC_INTF_PCI = 1,
65 BTC_INTF_USB = 2,
66 BTC_INTF_SDIO = 3,
67 BTC_INTF_GSPI = 4,
68 BTC_INTF_MAX
69};
70
71enum BTC_CHIP_TYPE {
72 BTC_CHIP_UNDEF = 0,
73 BTC_CHIP_CSR_BC4 = 1,
74 BTC_CHIP_CSR_BC8 = 2,
75 BTC_CHIP_RTL8723A = 3,
76 BTC_CHIP_RTL8821 = 4,
77 BTC_CHIP_RTL8723B = 5,
78 BTC_CHIP_MAX
79};
80
81enum BTC_MSG_TYPE {
82 BTC_MSG_INTERFACE = 0x0,
83 BTC_MSG_ALGORITHM = 0x1,
84 BTC_MSG_MAX
85};
86extern u32 btc_dbg_type[];
87
88/* following is for BTC_MSG_INTERFACE */
89#define INTF_INIT BIT0
90#define INTF_NOTIFY BIT2
91
92/* following is for BTC_ALGORITHM */
93#define ALGO_BT_RSSI_STATE BIT0
94#define ALGO_WIFI_RSSI_STATE BIT1
95#define ALGO_BT_MONITOR BIT2
96#define ALGO_TRACE BIT3
97#define ALGO_TRACE_FW BIT4
98#define ALGO_TRACE_FW_DETAIL BIT5
99#define ALGO_TRACE_FW_EXEC BIT6
100#define ALGO_TRACE_SW BIT7
101#define ALGO_TRACE_SW_DETAIL BIT8
102#define ALGO_TRACE_SW_EXEC BIT9
103
104#define BT_COEX_ANT_TYPE_PG 0
105#define BT_COEX_ANT_TYPE_ANTDIV 1
106#define BT_COEX_ANT_TYPE_DETECTED 2
107#define BTC_MIMO_PS_STATIC 0
108#define BTC_MIMO_PS_DYNAMIC 1
109#define BTC_RATE_DISABLE 0
110#define BTC_RATE_ENABLE 1
111#define BTC_ANT_PATH_WIFI 0
112#define BTC_ANT_PATH_BT 1
113#define BTC_ANT_PATH_PTA 2
114
115
116#define CL_SPRINTF snprintf
117#define CL_PRINTF printk
118
119#define BTC_PRINT(dbgtype, dbgflag, printstr, ...) \
120 do { \
121 if (unlikely(btc_dbg_type[dbgtype] & dbgflag)) {\
122 printk(printstr, ##__VA_ARGS__); \
123 } \
124 } while (0)
125
126#define BTC_PRINT_F(dbgtype, dbgflag, printstr, ...) \
127 do { \
128 if (unlikely(btc_dbg_type[dbgtype] & dbgflag)) {\
129 pr_info("%s: ", __func__); \
130 printk(printstr, ##__VA_ARGS__); \
131 } \
132 } while (0)
133
134#define BTC_PRINT_ADDR(dbgtype, dbgflag, printstr, _ptr) \
135 do { \
136 if (unlikely(btc_dbg_type[dbgtype] & dbgflag)) { \
137 int __i; \
138 u8 *__ptr = (u8 *)_ptr; \
139 printk printstr; \
140 for (__i = 0; __i < 6; __i++) \
141 printk("%02X%s", __ptr[__i], (__i == 5) ? \
142 "" : "-"); \
143 pr_info("\n"); \
144 } \
145 } while (0)
146
147#define BTC_PRINT_DATA(dbgtype, dbgflag, _titlestring, _hexdata, _hexdatalen) \
148 do { \
149 if (unlikely(btc_dbg_type[dbgtype] & dbgflag)) { \
150 int __i; \
151 u8 *__ptr = (u8 *)_hexdata; \
152 printk(_titlestring); \
153 for (__i = 0; __i < (int)_hexdatalen; __i++) { \
154 printk("%02X%s", __ptr[__i], (((__i + 1) % 4) \
155 == 0) ? " " : " ");\
156 if (((__i + 1) % 16) == 0) \
157 printk("\n"); \
158 } \
159 pr_debug("\n"); \
160 } \
161 } while (0)
162
163#define BTC_ANT_PATH_WIFI 0
164#define BTC_ANT_PATH_BT 1
165#define BTC_ANT_PATH_PTA 2
166
167enum btc_power_save_type {
168 BTC_PS_WIFI_NATIVE = 0,
169 BTC_PS_LPS_ON = 1,
170 BTC_PS_LPS_OFF = 2,
171 BTC_PS_LPS_MAX
172};
173
174struct btc_board_info {
175 /* The following is some board information */
176 u8 bt_chip_type;
177 u8 pg_ant_num; /* pg ant number */
178 u8 btdm_ant_num; /* ant number for btdm */
179 u8 btdm_ant_pos;
180 bool bt_exist;
181};
182
183enum btc_dbg_opcode {
184 BTC_DBG_SET_COEX_NORMAL = 0x0,
185 BTC_DBG_SET_COEX_WIFI_ONLY = 0x1,
186 BTC_DBG_SET_COEX_BT_ONLY = 0x2,
187 BTC_DBG_MAX
188};
189
190enum btc_rssi_state {
191 BTC_RSSI_STATE_HIGH = 0x0,
192 BTC_RSSI_STATE_MEDIUM = 0x1,
193 BTC_RSSI_STATE_LOW = 0x2,
194 BTC_RSSI_STATE_STAY_HIGH = 0x3,
195 BTC_RSSI_STATE_STAY_MEDIUM = 0x4,
196 BTC_RSSI_STATE_STAY_LOW = 0x5,
197 BTC_RSSI_MAX
198};
199
200enum btc_wifi_role {
201 BTC_ROLE_STATION = 0x0,
202 BTC_ROLE_AP = 0x1,
203 BTC_ROLE_IBSS = 0x2,
204 BTC_ROLE_HS_MODE = 0x3,
205 BTC_ROLE_MAX
206};
207
208enum btc_wifi_bw_mode {
209 BTC_WIFI_BW_LEGACY = 0x0,
210 BTC_WIFI_BW_HT20 = 0x1,
211 BTC_WIFI_BW_HT40 = 0x2,
212 BTC_WIFI_BW_MAX
213};
214
215enum btc_wifi_traffic_dir {
216 BTC_WIFI_TRAFFIC_TX = 0x0,
217 BTC_WIFI_TRAFFIC_RX = 0x1,
218 BTC_WIFI_TRAFFIC_MAX
219};
220
221enum btc_wifi_pnp {
222 BTC_WIFI_PNP_WAKE_UP = 0x0,
223 BTC_WIFI_PNP_SLEEP = 0x1,
224 BTC_WIFI_PNP_MAX
225};
226
227
228enum btc_get_type {
229 /* type bool */
230 BTC_GET_BL_HS_OPERATION,
231 BTC_GET_BL_HS_CONNECTING,
232 BTC_GET_BL_WIFI_CONNECTED,
233 BTC_GET_BL_WIFI_BUSY,
234 BTC_GET_BL_WIFI_SCAN,
235 BTC_GET_BL_WIFI_LINK,
236 BTC_GET_BL_WIFI_DHCP,
237 BTC_GET_BL_WIFI_SOFTAP_IDLE,
238 BTC_GET_BL_WIFI_SOFTAP_LINKING,
239 BTC_GET_BL_WIFI_IN_EARLY_SUSPEND,
240 BTC_GET_BL_WIFI_ROAM,
241 BTC_GET_BL_WIFI_4_WAY_PROGRESS,
242 BTC_GET_BL_WIFI_UNDER_5G,
243 BTC_GET_BL_WIFI_AP_MODE_ENABLE,
244 BTC_GET_BL_WIFI_ENABLE_ENCRYPTION,
245 BTC_GET_BL_WIFI_UNDER_B_MODE,
246 BTC_GET_BL_EXT_SWITCH,
247
248 /* type s4Byte */
249 BTC_GET_S4_WIFI_RSSI,
250 BTC_GET_S4_HS_RSSI,
251
252 /* type u32 */
253 BTC_GET_U4_WIFI_BW,
254 BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
255 BTC_GET_U4_WIFI_FW_VER,
256 BTC_GET_U4_BT_PATCH_VER,
257
258 /* type u1Byte */
259 BTC_GET_U1_WIFI_DOT11_CHNL,
260 BTC_GET_U1_WIFI_CENTRAL_CHNL,
261 BTC_GET_U1_WIFI_HS_CHNL,
262 BTC_GET_U1_MAC_PHY_MODE,
263
264 /* for 1Ant */
265 BTC_GET_U1_LPS_MODE,
266 BTC_GET_BL_BT_SCO_BUSY,
267
268 /* for test mode */
269 BTC_GET_DRIVER_TEST_CFG,
270 BTC_GET_MAX
271};
272
273
274enum btc_set_type {
275 /* type bool */
276 BTC_SET_BL_BT_DISABLE,
277 BTC_SET_BL_BT_TRAFFIC_BUSY,
278 BTC_SET_BL_BT_LIMITED_DIG,
279 BTC_SET_BL_FORCE_TO_ROAM,
280 BTC_SET_BL_TO_REJ_AP_AGG_PKT,
281 BTC_SET_BL_BT_CTRL_AGG_SIZE,
282 BTC_SET_BL_INC_SCAN_DEV_NUM,
283
284 /* type u1Byte */
285 BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
286 BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE,
287 BTC_SET_UI_SCAN_SIG_COMPENSATION,
288 BTC_SET_U1_AGG_BUF_SIZE,
289
290 /* type trigger some action */
291 BTC_SET_ACT_GET_BT_RSSI,
292 BTC_SET_ACT_AGGREGATE_CTRL,
293
294 /********* for 1Ant **********/
295 /* type bool */
296 BTC_SET_BL_BT_SCO_BUSY,
297 /* type u1Byte */
298 BTC_SET_U1_1ANT_LPS,
299 BTC_SET_U1_1ANT_RPWM,
300 /* type trigger some action */
301 BTC_SET_ACT_LEAVE_LPS,
302 BTC_SET_ACT_ENTER_LPS,
303 BTC_SET_ACT_NORMAL_LPS,
304 BTC_SET_ACT_INC_FORCE_EXEC_PWR_CMD_CNT,
305 BTC_SET_ACT_DISABLE_LOW_POWER,
306 BTC_SET_ACT_UPDATE_ra_mask,
307 BTC_SET_ACT_SEND_MIMO_PS,
308 /* BT Coex related */
309 BTC_SET_ACT_CTRL_BT_INFO,
310 BTC_SET_ACT_CTRL_BT_COEX,
311 /***************************/
312 BTC_SET_MAX
313};
314
315enum btc_dbg_disp_type {
316 BTC_DBG_DISP_COEX_STATISTICS = 0x0,
317 BTC_DBG_DISP_BT_LINK_INFO = 0x1,
318 BTC_DBG_DISP_BT_FW_VER = 0x2,
319 BTC_DBG_DISP_FW_PWR_MODE_CMD = 0x3,
320 BTC_DBG_DISP_MAX
321};
322
323enum btc_notify_type_ips {
324 BTC_IPS_LEAVE = 0x0,
325 BTC_IPS_ENTER = 0x1,
326 BTC_IPS_MAX
327};
328
329enum btc_notify_type_lps {
330 BTC_LPS_DISABLE = 0x0,
331 BTC_LPS_ENABLE = 0x1,
332 BTC_LPS_MAX
333};
334
335enum btc_notify_type_scan {
336 BTC_SCAN_FINISH = 0x0,
337 BTC_SCAN_START = 0x1,
338 BTC_SCAN_MAX
339};
340
341enum btc_notify_type_associate {
342 BTC_ASSOCIATE_FINISH = 0x0,
343 BTC_ASSOCIATE_START = 0x1,
344 BTC_ASSOCIATE_MAX
345};
346
347enum btc_notify_type_media_status {
348 BTC_MEDIA_DISCONNECT = 0x0,
349 BTC_MEDIA_CONNECT = 0x1,
350 BTC_MEDIA_MAX
351};
352
353enum btc_notify_type_special_packet {
354 BTC_PACKET_UNKNOWN = 0x0,
355 BTC_PACKET_DHCP = 0x1,
356 BTC_PACKET_ARP = 0x2,
357 BTC_PACKET_EAPOL = 0x3,
358 BTC_PACKET_MAX
359};
360
361enum btc_notify_type_stack_operation {
362 BTC_STACK_OP_NONE = 0x0,
363 BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1,
364 BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2,
365 BTC_STACK_OP_MAX
366};
367
368
369typedef u8 (*bfp_btc_r1)(void *btc_context, u32 reg_addr);
370
371typedef u16 (*bfp_btc_r2)(void *btc_context, u32 reg_addr);
372
373typedef u32 (*bfp_btc_r4)(void *btc_context, u32 reg_addr);
374
375typedef void (*bfp_btc_w1)(void *btc_context, u32 reg_addr, u8 data);
376
377typedef void (*bfp_btc_w1_bit_mak)(void *btc_context, u32 reg_addr,
378 u32 bit_mask, u8 data1b);
379
380typedef void (*bfp_btc_w2)(void *btc_context, u32 reg_addr, u16 data);
381
382typedef void (*bfp_btc_w4)(void *btc_context, u32 reg_addr, u32 data);
383
384typedef void (*bfp_btc_wr_1byte_bit_mask)(void *btc_context, u32 reg_addr,
385 u8 bit_mask, u8 data);
386
387typedef void (*bfp_btc_set_bb_reg)(void *btc_context, u32 reg_addr,
388 u32 bit_mask, u32 data);
389
390typedef u32 (*bfp_btc_get_bb_reg)(void *btc_context, u32 reg_addr,
391 u32 bit_mask);
392
393typedef void (*bfp_btc_set_rf_reg)(void *btc_context, u8 rf_path, u32 reg_addr,
394 u32 bit_mask, u32 data);
395
396typedef u32 (*bfp_btc_get_rf_reg)(void *btc_context, u8 rf_path,
397 u32 reg_addr, u32 bit_mask);
398
399typedef void (*bfp_btc_fill_h2c)(void *btc_context, u8 element_id,
400 u32 cmd_len, u8 *cmd_buffer);
401
402typedef bool (*bfp_btc_get)(void *btcoexist, u8 get_type, void *out_buf);
403
404typedef bool (*bfp_btc_set)(void *btcoexist, u8 set_type, void *in_buf);
405
406typedef void (*bfp_btc_disp_dbg_msg)(void *btcoexist, u8 disp_type);
407
408struct btc_bt_info {
409 bool bt_disabled;
410 u8 rssi_adjust_for_agc_table_on;
411 u8 rssi_adjust_for_1ant_coex_type;
412 bool bt_busy;
413 u8 agg_buf_size;
414 bool limited_dig;
415 bool reject_agg_pkt;
416 bool b_bt_ctrl_buf_size;
417 bool increase_scan_dev_num;
418 u16 bt_hci_ver;
419 u16 bt_real_fw_ver;
420 u8 bt_fw_ver;
421
422 /* the following is for 1Ant solution */
423 bool bt_ctrl_lps;
424 bool bt_pwr_save_mode;
425 bool bt_lps_on;
426 bool force_to_roam;
427 u8 force_exec_pwr_cmd_cnt;
428 u8 lps_1ant;
429 u8 rpwm_1ant;
430 u32 ra_mask;
431};
432
433struct btc_stack_info {
434 bool profile_notified;
435 u16 hci_version; /* stack hci version */
436 u8 num_of_link;
437 bool bt_link_exist;
438 bool sco_exist;
439 bool acl_exist;
440 bool a2dp_exist;
441 bool hid_exist;
442 u8 num_of_hid;
443 bool pan_exist;
444 bool unknown_acl_exist;
445 char min_bt_rssi;
446};
447
448struct btc_statistics {
449 u32 cnt_bind;
450 u32 cnt_init_hw_config;
451 u32 cnt_init_coex_dm;
452 u32 cnt_ips_notify;
453 u32 cnt_lps_notify;
454 u32 cnt_scan_notify;
455 u32 cnt_connect_notify;
456 u32 cnt_media_status_notify;
457 u32 cnt_special_packet_notify;
458 u32 cnt_bt_info_notify;
459 u32 cnt_periodical;
460 u32 cnt_stack_operation_notify;
461 u32 cnt_dbg_ctrl;
462};
463
464struct btc_bt_link_info {
465 bool bt_link_exist;
466 bool sco_exist;
467 bool sco_only;
468 bool a2dp_exist;
469 bool a2dp_only;
470 bool hid_exist;
471 bool hid_only;
472 bool pan_exist;
473 bool pan_only;
474};
475
476enum btc_antenna_pos {
477 BTC_ANTENNA_AT_MAIN_PORT = 0x1,
478 BTC_ANTENNA_AT_AUX_PORT = 0x2,
479};
480
481struct btc_coexist {
482 /* make sure only one adapter can bind the data context */
483 bool binded;
484 /* default adapter */
485 void *adapter;
486 struct btc_board_info board_info;
487 /* some bt info referenced by non-bt module */
488 struct btc_bt_info bt_info;
489 struct btc_stack_info stack_info;
490 enum btc_chip_interface chip_interface;
491 struct btc_bt_link_info bt_link_info;
492
493 bool initilized;
494 bool stop_coex_dm;
495 bool manual_control;
496 u8 *cli_buf;
497 struct btc_statistics statistics;
498 u8 pwr_mode_val[10];
499
500 /* function pointers - io related */
501 bfp_btc_r1 btc_read_1byte;
502 bfp_btc_w1 btc_write_1byte;
503 bfp_btc_w1_bit_mak btc_write_1byte_bitmask;
504 bfp_btc_r2 btc_read_2byte;
505 bfp_btc_w2 btc_write_2byte;
506 bfp_btc_r4 btc_read_4byte;
507 bfp_btc_w4 btc_write_4byte;
508
509 bfp_btc_set_bb_reg btc_set_bb_reg;
510 bfp_btc_get_bb_reg btc_get_bb_reg;
511
512
513 bfp_btc_set_rf_reg btc_set_rf_reg;
514 bfp_btc_get_rf_reg btc_get_rf_reg;
515
516 bfp_btc_fill_h2c btc_fill_h2c;
517
518 bfp_btc_disp_dbg_msg btc_disp_dbg_msg;
519
520 bfp_btc_get btc_get;
521 bfp_btc_set btc_set;
522};
523
524bool halbtc_is_wifi_uplink(struct rtl_priv *adapter);
525
526extern struct btc_coexist gl_bt_coexist;
527
528bool exhalbtc_initlize_variables(struct rtl_priv *adapter);
529void exhalbtc_init_hw_config(struct btc_coexist *btcoexist);
530void exhalbtc_init_coex_dm(struct btc_coexist *btcoexist);
531void exhalbtc_ips_notify(struct btc_coexist *btcoexist, u8 type);
532void exhalbtc_lps_notify(struct btc_coexist *btcoexist, u8 type);
533void exhalbtc_scan_notify(struct btc_coexist *btcoexist, u8 type);
534void exhalbtc_connect_notify(struct btc_coexist *btcoexist, u8 action);
535void exhalbtc_mediastatus_notify(struct btc_coexist *btcoexist,
536 enum _RT_MEDIA_STATUS media_status);
537void exhalbtc_special_packet_notify(struct btc_coexist *btcoexist, u8 pkt_type);
538void exhalbtc_bt_info_notify(struct btc_coexist *btcoexist, u8 *tmp_buf,
539 u8 length);
540void exhalbtc_stack_operation_notify(struct btc_coexist *btcoexist, u8 type);
541void exhalbtc_halt_notify(struct btc_coexist *btcoexist);
542void exhalbtc_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state);
543void exhalbtc_periodical(struct btc_coexist *btcoexist);
544void exhalbtc_dbg_control(struct btc_coexist *btcoexist, u8 code, u8 len,
545 u8 *data);
546void exhalbtc_stack_update_profile_info(void);
547void exhalbtc_set_hci_version(u16 hci_version);
548void exhalbtc_set_bt_patch_version(u16 bt_hci_version, u16 bt_patch_version);
549void exhalbtc_update_min_bt_rssi(char bt_rssi);
550void exhalbtc_set_bt_exist(bool bt_exist);
551void exhalbtc_set_chip_type(u8 chip_type);
552void exhalbtc_set_ant_num(u8 type, u8 ant_num);
553void exhalbtc_display_bt_coex_info(struct btc_coexist *btcoexist);
554void exhalbtc_signal_compensation(struct btc_coexist *btcoexist,
555 u8 *rssi_wifi, u8 *rssi_bt);
556void exhalbtc_lps_leave(struct btc_coexist *btcoexist);
557void exhalbtc_low_wifi_traffic_notify(struct btc_coexist *btcoexist);
558
559#endif
diff --git a/drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.c b/drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.c
new file mode 100644
index 000000000000..0ab94fe4cbbe
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.c
@@ -0,0 +1,218 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2009-2013 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26#include "../wifi.h"
27#include "rtl_btc.h"
28#include "halbt_precomp.h"
29
30#include <linux/vmalloc.h>
31#include <linux/module.h>
32
33static struct rtl_btc_ops rtl_btc_operation = {
34 .btc_init_variables = rtl_btc_init_variables,
35 .btc_init_hal_vars = rtl_btc_init_hal_vars,
36 .btc_init_hw_config = rtl_btc_init_hw_config,
37 .btc_ips_notify = rtl_btc_ips_notify,
38 .btc_scan_notify = rtl_btc_scan_notify,
39 .btc_connect_notify = rtl_btc_connect_notify,
40 .btc_mediastatus_notify = rtl_btc_mediastatus_notify,
41 .btc_periodical = rtl_btc_periodical,
42 .btc_halt_notify = rtl_btc_halt_notify,
43 .btc_btinfo_notify = rtl_btc_btinfo_notify,
44 .btc_is_limited_dig = rtl_btc_is_limited_dig,
45 .btc_is_disable_edca_turbo = rtl_btc_is_disable_edca_turbo,
46 .btc_is_bt_disabled = rtl_btc_is_bt_disabled,
47};
48
49void rtl_btc_init_variables(struct rtl_priv *rtlpriv)
50{
51 exhalbtc_initlize_variables(rtlpriv);
52}
53
54void rtl_btc_init_hal_vars(struct rtl_priv *rtlpriv)
55{
56 u8 ant_num;
57 u8 bt_exist;
58 u8 bt_type;
59
60 ant_num = rtl_get_hwpg_ant_num(rtlpriv);
61 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
62 "%s, antNum is %d\n", __func__, ant_num);
63
64 bt_exist = rtl_get_hwpg_bt_exist(rtlpriv);
65 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
66 "%s, bt_exist is %d\n", __func__, bt_exist);
67 exhalbtc_set_bt_exist(bt_exist);
68
69 bt_type = rtl_get_hwpg_bt_type(rtlpriv);
70 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%s, bt_type is %d\n",
71 __func__, bt_type);
72 exhalbtc_set_chip_type(bt_type);
73
74 exhalbtc_set_ant_num(BT_COEX_ANT_TYPE_PG, ant_num);
75}
76
77void rtl_btc_init_hw_config(struct rtl_priv *rtlpriv)
78{
79 exhalbtc_init_hw_config(&gl_bt_coexist);
80 exhalbtc_init_coex_dm(&gl_bt_coexist);
81}
82
83void rtl_btc_ips_notify(struct rtl_priv *rtlpriv, u8 type)
84{
85 exhalbtc_ips_notify(&gl_bt_coexist, type);
86}
87
88void rtl_btc_scan_notify(struct rtl_priv *rtlpriv, u8 scantype)
89{
90 exhalbtc_scan_notify(&gl_bt_coexist, scantype);
91}
92
93void rtl_btc_connect_notify(struct rtl_priv *rtlpriv, u8 action)
94{
95 exhalbtc_connect_notify(&gl_bt_coexist, action);
96}
97
98void rtl_btc_mediastatus_notify(struct rtl_priv *rtlpriv,
99 enum _RT_MEDIA_STATUS mstatus)
100{
101 exhalbtc_mediastatus_notify(&gl_bt_coexist, mstatus);
102}
103
104void rtl_btc_periodical(struct rtl_priv *rtlpriv)
105{
106 exhalbtc_periodical(&gl_bt_coexist);
107}
108
109void rtl_btc_halt_notify(void)
110{
111 exhalbtc_halt_notify(&gl_bt_coexist);
112}
113
114void rtl_btc_btinfo_notify(struct rtl_priv *rtlpriv, u8 *tmp_buf, u8 length)
115{
116 exhalbtc_bt_info_notify(&gl_bt_coexist, tmp_buf, length);
117}
118
119bool rtl_btc_is_limited_dig(struct rtl_priv *rtlpriv)
120{
121 return gl_bt_coexist.bt_info.limited_dig;
122}
123
124bool rtl_btc_is_disable_edca_turbo(struct rtl_priv *rtlpriv)
125{
126 bool bt_change_edca = false;
127 u32 cur_edca_val;
128 u32 edca_bt_hs_uplink = 0x5ea42b, edca_bt_hs_downlink = 0x5ea42b;
129 u32 edca_hs;
130 u32 edca_addr = 0x504;
131
132 cur_edca_val = rtl_read_dword(rtlpriv, edca_addr);
133 if (halbtc_is_wifi_uplink(rtlpriv)) {
134 if (cur_edca_val != edca_bt_hs_uplink) {
135 edca_hs = edca_bt_hs_uplink;
136 bt_change_edca = true;
137 }
138 } else {
139 if (cur_edca_val != edca_bt_hs_downlink) {
140 edca_hs = edca_bt_hs_downlink;
141 bt_change_edca = true;
142 }
143 }
144
145 if (bt_change_edca)
146 rtl_write_dword(rtlpriv, edca_addr, edca_hs);
147
148 return true;
149}
150
151bool rtl_btc_is_bt_disabled(struct rtl_priv *rtlpriv)
152{
153 if (gl_bt_coexist.bt_info.bt_disabled)
154 return true;
155 else
156 return false;
157}
158
159struct rtl_btc_ops *rtl_btc_get_ops_pointer(void)
160{
161 return &rtl_btc_operation;
162}
163EXPORT_SYMBOL(rtl_btc_get_ops_pointer);
164
165u8 rtl_get_hwpg_ant_num(struct rtl_priv *rtlpriv)
166{
167 u8 num;
168
169 if (rtlpriv->btcoexist.btc_info.ant_num == ANT_X2)
170 num = 2;
171 else
172 num = 1;
173
174 return num;
175}
176
177enum _RT_MEDIA_STATUS mgnt_link_status_query(struct ieee80211_hw *hw)
178{
179 struct rtl_priv *rtlpriv = rtl_priv(hw);
180 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
181 enum _RT_MEDIA_STATUS m_status = RT_MEDIA_DISCONNECT;
182
183 u8 bibss = (mac->opmode == NL80211_IFTYPE_ADHOC) ? 1 : 0;
184
185 if (bibss || rtlpriv->mac80211.link_state >= MAC80211_LINKED)
186 m_status = RT_MEDIA_CONNECT;
187
188 return m_status;
189}
190
191u8 rtl_get_hwpg_bt_exist(struct rtl_priv *rtlpriv)
192{
193 return rtlpriv->btcoexist.btc_info.btcoexist;
194}
195
196u8 rtl_get_hwpg_bt_type(struct rtl_priv *rtlpriv)
197{
198 return rtlpriv->btcoexist.btc_info.bt_type;
199}
200
201MODULE_AUTHOR("Page He <page_he@realsil.com.cn>");
202MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
203MODULE_AUTHOR("Larry Finger <Larry.FInger@lwfinger.net>");
204MODULE_LICENSE("GPL");
205MODULE_DESCRIPTION("Realtek 802.11n PCI wireless core");
206
207static int __init rtl_btcoexist_module_init(void)
208{
209 return 0;
210}
211
212static void __exit rtl_btcoexist_module_exit(void)
213{
214 return;
215}
216
217module_init(rtl_btcoexist_module_init);
218module_exit(rtl_btcoexist_module_exit);
diff --git a/drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.h b/drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.h
new file mode 100644
index 000000000000..805b22cc8fc8
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.h
@@ -0,0 +1,52 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2009-2010 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 * Larry Finger <Larry.Finger@lwfinger.net>
22 *
23 *****************************************************************************/
24
25#ifndef __RTL_BTC_H__
26#define __RTL_BTC_H__
27
28#include "halbt_precomp.h"
29
30void rtl_btc_init_variables(struct rtl_priv *rtlpriv);
31void rtl_btc_init_hal_vars(struct rtl_priv *rtlpriv);
32void rtl_btc_init_hw_config(struct rtl_priv *rtlpriv);
33void rtl_btc_ips_notify(struct rtl_priv *rtlpriv, u8 type);
34void rtl_btc_scan_notify(struct rtl_priv *rtlpriv, u8 scantype);
35void rtl_btc_connect_notify(struct rtl_priv *rtlpriv, u8 action);
36void rtl_btc_mediastatus_notify(struct rtl_priv *rtlpriv,
37 enum _RT_MEDIA_STATUS mstatus);
38void rtl_btc_periodical(struct rtl_priv *rtlpriv);
39void rtl_btc_halt_notify(void);
40void rtl_btc_btinfo_notify(struct rtl_priv *rtlpriv, u8 *tmpbuf, u8 length);
41bool rtl_btc_is_limited_dig(struct rtl_priv *rtlpriv);
42bool rtl_btc_is_disable_edca_turbo(struct rtl_priv *rtlpriv);
43bool rtl_btc_is_bt_disabled(struct rtl_priv *rtlpriv);
44
45struct rtl_btc_ops *rtl_btc_get_ops_pointer(void);
46
47u8 rtl_get_hwpg_ant_num(struct rtl_priv *rtlpriv);
48u8 rtl_get_hwpg_bt_exist(struct rtl_priv *rtlpriv);
49u8 rtl_get_hwpg_bt_type(struct rtl_priv *rtlpriv);
50enum _RT_MEDIA_STATUS mgnt_link_status_query(struct ieee80211_hw *hw);
51
52#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8723com/fw_common.c b/drivers/net/wireless/rtlwifi/rtl8723com/fw_common.c
new file mode 100644
index 000000000000..83ca4e25ee50
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8723com/fw_common.c
@@ -0,0 +1,849 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2009-2014 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26#include "../wifi.h"
27#include "fw_common.h"
28#include <linux/module.h>
29
30#define BEACON_PG 0 /* ->1 */
31#define PSPOLL_PG 2
32#define NULL_PG 3
33#define PROBERSP_PG 4 /* ->5 */
34
35#define TOTAL_RESERVED_PKT_LEN 768
36
37static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
38 /* page 0 beacon */
39 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
40 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x02, 0xB1, 0x78,
41 0xEC, 0x1A, 0x59, 0x0B, 0xAD, 0xD4, 0x20, 0x00,
42 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
43 0x64, 0x00, 0x10, 0x04, 0x00, 0x05, 0x54, 0x65,
44 0x73, 0x74, 0x32, 0x01, 0x08, 0x82, 0x84, 0x0B,
45 0x16, 0x24, 0x30, 0x48, 0x6C, 0x03, 0x01, 0x06,
46 0x06, 0x02, 0x00, 0x00, 0x2A, 0x01, 0x02, 0x32,
47 0x04, 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C,
48 0x09, 0x03, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
49 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
50 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
51 0x00, 0x3D, 0x00, 0xDD, 0x07, 0x00, 0xE0, 0x4C,
52 0x02, 0x02, 0x00, 0x00, 0xDD, 0x18, 0x00, 0x50,
53 0xF2, 0x01, 0x01, 0x00, 0x00, 0x50, 0xF2, 0x04,
54 0x01, 0x00, 0x00, 0x50, 0xF2, 0x04, 0x01, 0x00,
55
56 /* page 1 beacon */
57 0x00, 0x50, 0xF2, 0x02, 0x00, 0x00, 0x00, 0x00,
58 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
59 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
60 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
61 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
62 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
63 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
64 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
65 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
66 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
67 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
68 0x10, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
69 0x00, 0x00, 0x00, 0x00, 0x00, 0x81, 0x00, 0x00,
70 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
71 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
72 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
73
74 /* page 2 ps-poll */
75 0xA4, 0x10, 0x01, 0xC0, 0xEC, 0x1A, 0x59, 0x0B,
76 0xAD, 0xD4, 0x00, 0xE0, 0x4C, 0x02, 0xB1, 0x78,
77 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
78 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
79 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
80 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
81 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
82 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
83 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
84 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
85 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
86 0x18, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
87 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
88 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
89 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
90 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
91
92 /* page 3 null */
93 0x48, 0x01, 0x00, 0x00, 0xEC, 0x1A, 0x59, 0x0B,
94 0xAD, 0xD4, 0x00, 0xE0, 0x4C, 0x02, 0xB1, 0x78,
95 0xEC, 0x1A, 0x59, 0x0B, 0xAD, 0xD4, 0x00, 0x00,
96 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
97 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
98 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
99 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
100 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
102 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
103 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
104 0x72, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
105 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
106 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
107 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
108 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
109
110 /* page 4 probe_resp */
111 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
112 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
113 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
114 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
115 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
116 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
117 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
118 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
119 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
120 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
121 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
122 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
124 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
125 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
126 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
127
128 /* page 5 probe_resp */
129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
131 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
132 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
133 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
134 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
135 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
136 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
137 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
138 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
139 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
140 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
141 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
142 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
143 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
144 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
145};
146
147void rtl8723_enable_fw_download(struct ieee80211_hw *hw, bool enable)
148{
149 struct rtl_priv *rtlpriv = rtl_priv(hw);
150 u8 tmp;
151
152 if (enable) {
153 tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
154 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, tmp | 0x04);
155
156 tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
157 rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp | 0x01);
158
159 tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL + 2);
160 rtl_write_byte(rtlpriv, REG_MCUFWDL + 2, tmp & 0xf7);
161 } else {
162 tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
163 rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp & 0xfe);
164
165 rtl_write_byte(rtlpriv, REG_MCUFWDL + 1, 0x00);
166 }
167}
168EXPORT_SYMBOL_GPL(rtl8723_enable_fw_download);
169
170void rtl8723_fw_block_write(struct ieee80211_hw *hw,
171 const u8 *buffer, u32 size)
172{
173 struct rtl_priv *rtlpriv = rtl_priv(hw);
174 u32 blocksize = sizeof(u32);
175 u8 *bufferptr = (u8 *)buffer;
176 u32 *pu4byteptr = (u32 *)buffer;
177 u32 i, offset, blockcount, remainsize;
178
179 blockcount = size / blocksize;
180 remainsize = size % blocksize;
181
182 for (i = 0; i < blockcount; i++) {
183 offset = i * blocksize;
184 rtl_write_dword(rtlpriv, (FW_8192C_START_ADDRESS + offset),
185 *(pu4byteptr + i));
186 }
187 if (remainsize) {
188 offset = blockcount * blocksize;
189 bufferptr += offset;
190 for (i = 0; i < remainsize; i++) {
191 rtl_write_byte(rtlpriv,
192 (FW_8192C_START_ADDRESS + offset + i),
193 *(bufferptr + i));
194 }
195 }
196}
197EXPORT_SYMBOL_GPL(rtl8723_fw_block_write);
198
199void rtl8723_fw_page_write(struct ieee80211_hw *hw,
200 u32 page, const u8 *buffer, u32 size)
201{
202 struct rtl_priv *rtlpriv = rtl_priv(hw);
203 u8 value8;
204 u8 u8page = (u8) (page & 0x07);
205
206 value8 = (rtl_read_byte(rtlpriv, REG_MCUFWDL + 2) & 0xF8) | u8page;
207
208 rtl_write_byte(rtlpriv, (REG_MCUFWDL + 2), value8);
209 rtl8723_fw_block_write(hw, buffer, size);
210}
211EXPORT_SYMBOL_GPL(rtl8723_fw_page_write);
212
213static void rtl8723_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
214{
215 u32 fwlen = *pfwlen;
216 u8 remain = (u8) (fwlen % 4);
217
218 remain = (remain == 0) ? 0 : (4 - remain);
219
220 while (remain > 0) {
221 pfwbuf[fwlen] = 0;
222 fwlen++;
223 remain--;
224 }
225 *pfwlen = fwlen;
226}
227
228void rtl8723_write_fw(struct ieee80211_hw *hw,
229 enum version_8723be version,
230 u8 *buffer, u32 size)
231{
232 struct rtl_priv *rtlpriv = rtl_priv(hw);
233 u8 *bufferptr = (u8 *)buffer;
234 u32 pagenums, remainsize;
235 u32 page, offset;
236
237 RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "FW size is %d bytes,\n", size);
238
239 _rtl8723be_fill_dummy(bufferptr, &size);
240
241 pagenums = size / FW_8192C_PAGE_SIZE;
242 remainsize = size % FW_8192C_PAGE_SIZE;
243
244 if (pagenums > 8) {
245 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
246 "Page numbers should not greater then 8\n");
247 }
248 for (page = 0; page < pagenums; page++) {
249 offset = page * FW_8192C_PAGE_SIZE;
250 rtl8723_fw_page_write(hw, page, (bufferptr + offset),
251 FW_8192C_PAGE_SIZE);
252 }
253 if (remainsize) {
254 offset = pagenums * FW_8192C_PAGE_SIZE;
255 page = pagenums;
256 rtl8723_fw_page_write(hw, page, (bufferptr + offset),
257 remainsize);
258 }
259}
260EXPORT_SYMBOL_GPL(rtl8723_write_fw);
261
262void rtl8723ae_firmware_selfreset(struct ieee80211_hw *hw)
263{
264 u8 u1tmp;
265 u8 delay = 100;
266 struct rtl_priv *rtlpriv = rtl_priv(hw);
267
268 rtl_write_byte(rtlpriv, REG_HMETFR + 3, 0x20);
269 u1tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
270
271 while (u1tmp & BIT(2)) {
272 delay--;
273 if (delay == 0)
274 break;
275 udelay(50);
276 u1tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
277 }
278 if (delay == 0) {
279 u1tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
280 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, u1tmp&(~BIT(2)));
281 }
282}
283EXPORT_SYMBOL_GPL(rtl8723ae_firmware_selfreset);
284
285void rtl8723be_firmware_selfreset(struct ieee80211_hw *hw)
286{
287 u8 u1b_tmp;
288 struct rtl_priv *rtlpriv = rtl_priv(hw);
289
290 u1b_tmp = rtl_read_byte(rtlpriv, REG_RSV_CTRL + 1);
291 rtl_write_byte(rtlpriv, REG_RSV_CTRL + 1, (u1b_tmp & (~BIT(0))));
292
293 u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
294 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, (u1b_tmp & (~BIT(2))));
295 udelay(50);
296
297 u1b_tmp = rtl_read_byte(rtlpriv, REG_RSV_CTRL + 1);
298 rtl_write_byte(rtlpriv, REG_RSV_CTRL + 1, (u1b_tmp | BIT(0)));
299
300 u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
301 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, (u1b_tmp | BIT(2)));
302
303 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
304 " _8051Reset8723be(): 8051 reset success .\n");
305}
306EXPORT_SYMBOL_GPL(rtl8723be_firmware_selfreset);
307
308int rtl8723_fw_free_to_go(struct ieee80211_hw *hw, bool is_8723be)
309{
310 struct rtl_priv *rtlpriv = rtl_priv(hw);
311 int err = -EIO;
312 u32 counter = 0;
313 u32 value32;
314
315 do {
316 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
317 } while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
318 (!(value32 & FWDL_CHKSUM_RPT)));
319
320 if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
321 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
322 "chksum report faill ! REG_MCUFWDL:0x%08x .\n",
323 value32);
324 goto exit;
325 }
326 RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
327 "Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32);
328
329 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
330 value32 |= MCUFWDL_RDY;
331 value32 &= ~WINTINI_RDY;
332 rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
333
334 if (is_8723be)
335 rtl8723be_firmware_selfreset(hw);
336 counter = 0;
337
338 do {
339 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
340 if (value32 & WINTINI_RDY) {
341 RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
342 "Polling FW ready success!! "
343 "REG_MCUFWDL:0x%08x .\n",
344 value32);
345 err = 0;
346 goto exit;
347 }
348 udelay(FW_8192C_POLLING_DELAY);
349
350 } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
351
352 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
353 "Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n",
354 value32);
355
356exit:
357 return err;
358}
359EXPORT_SYMBOL_GPL(rtl8723_fw_free_to_go);
360
361int rtl8723_download_fw(struct ieee80211_hw *hw,
362 bool is_8723be)
363{
364 struct rtl_priv *rtlpriv = rtl_priv(hw);
365 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
366 struct rtl92c_firmware_header *pfwheader;
367 u8 *pfwdata;
368 u32 fwsize;
369 int err;
370 enum version_8723e version = rtlhal->version;
371
372 if (!rtlhal->pfirmware)
373 return 1;
374
375 pfwheader = (struct rtl92c_firmware_header *)rtlhal->pfirmware;
376 pfwdata = (u8 *)rtlhal->pfirmware;
377 fwsize = rtlhal->fwsize;
378 RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
379 "normal Firmware SIZE %d\n", fwsize);
380
381 if (IS_FW_HEADER_EXIST(pfwheader)) {
382 RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
383 "Firmware Version(%d), Signature(%#x), Size(%d)\n",
384 pfwheader->version, pfwheader->signature,
385 (int)sizeof(struct rtl92c_firmware_header));
386
387 pfwdata = pfwdata + sizeof(struct rtl92c_firmware_header);
388 fwsize = fwsize - sizeof(struct rtl92c_firmware_header);
389 }
390 if (rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) {
391 rtl_write_byte(rtlpriv, REG_MCUFWDL, 0);
392 if (is_8723be)
393 rtl8723be_firmware_selfreset(hw);
394 else
395 rtl8723ae_firmware_selfreset(hw);
396 }
397 rtl8723_enable_fw_download(hw, is_8723be);
398 rtl8723_write_fw(hw, version, pfwdata, fwsize);
399 rtl8723_enable_fw_download(hw, is_8723be);
400
401 err = rtl8723_fw_free_to_go(hw, is_8723be);
402 if (err) {
403 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
404 "Firmware is not ready to run!\n");
405 } else {
406 RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD,
407 "Firmware is ready to run!\n");
408 }
409 return 0;
410}
411EXPORT_SYMBOL_GPL(rtl8723_download_fw);
412
413bool rtl8723_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum)
414{
415 struct rtl_priv *rtlpriv = rtl_priv(hw);
416 u8 val_hmetfr, val_mcutst_1;
417 bool result = false;
418
419 val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
420 val_mcutst_1 = rtl_read_byte(rtlpriv, (REG_MCUTST_1 + boxnum));
421
422 if (((val_hmetfr >> boxnum) & BIT(0)) == 0 && val_mcutst_1 == 0)
423 result = true;
424 return result;
425}
426EXPORT_SYMBOL_GPL(rtl8723_check_fw_read_last_h2c);
427
428void rtl8723_fill_h2c_command(struct ieee80211_hw *hw, u8 element_id,
429 u32 cmd_len, u8 *p_cmdbuffer)
430{
431 struct rtl_priv *rtlpriv = rtl_priv(hw);
432 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
433 u8 boxnum;
434 u16 box_reg = 0, box_extreg = 0;
435 u8 u1b_tmp;
436 bool isfw_read = false;
437 u8 buf_index = 0;
438 bool bwrite_sucess = false;
439 u8 wait_h2c_limit = 100;
440 u8 wait_writeh2c_limit = 100;
441 u8 boxcontent[4], boxextcontent[4];
442 u32 h2c_waitcounter = 0;
443 unsigned long flag;
444 u8 idx;
445
446 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "come in\n");
447
448 while (true) {
449 spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
450 if (rtlhal->h2c_setinprogress) {
451 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
452 "H2C set in progress! Wait to set.."
453 "element_id(%d).\n", element_id);
454
455 while (rtlhal->h2c_setinprogress) {
456 spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
457 flag);
458 h2c_waitcounter++;
459 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
460 "Wait 100 us (%d times)...\n",
461 h2c_waitcounter);
462 udelay(100);
463
464 if (h2c_waitcounter > 1000)
465 return;
466 spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
467 flag);
468 }
469 spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
470 } else {
471 rtlhal->h2c_setinprogress = true;
472 spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
473 break;
474 }
475 }
476 while (!bwrite_sucess) {
477 wait_writeh2c_limit--;
478 if (wait_writeh2c_limit == 0) {
479 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
480 "Write H2C fail because no trigger "
481 "for FW INT!\n");
482 break;
483 }
484 boxnum = rtlhal->last_hmeboxnum;
485 switch (boxnum) {
486 case 0:
487 box_reg = REG_HMEBOX_0;
488 box_extreg = REG_HMEBOX_EXT_0;
489 break;
490 case 1:
491 box_reg = REG_HMEBOX_1;
492 box_extreg = REG_HMEBOX_EXT_1;
493 break;
494 case 2:
495 box_reg = REG_HMEBOX_2;
496 box_extreg = REG_HMEBOX_EXT_2;
497 break;
498 case 3:
499 box_reg = REG_HMEBOX_3;
500 box_extreg = REG_HMEBOX_EXT_3;
501 break;
502 default:
503 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
504 "switch case not processed\n");
505 break;
506 }
507 isfw_read = rtl8723_check_fw_read_last_h2c(hw, boxnum);
508 while (!isfw_read) {
509 wait_h2c_limit--;
510 if (wait_h2c_limit == 0) {
511 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
512 "Waiting too long for FW read "
513 "clear HMEBox(%d)!\n", boxnum);
514 break;
515 }
516 udelay(10);
517
518 isfw_read = rtl8723_check_fw_read_last_h2c(hw,
519 boxnum);
520 }
521 if (!isfw_read) {
522 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
523 "Write H2C register BOX[%d] fail!!!!! "
524 "Fw do not read.\n", boxnum);
525 break;
526 }
527 memset(boxcontent, 0, sizeof(boxcontent));
528 memset(boxextcontent, 0, sizeof(boxextcontent));
529 boxcontent[0] = element_id;
530 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
531 "Write element_id box_reg(%4x) = %2x\n",
532 box_reg, element_id);
533
534 switch (cmd_len) {
535 case 1:
536 case 2:
537 case 3:
538 /*boxcontent[0] &= ~(BIT(7));*/
539 memcpy((u8 *)(boxcontent) + 1,
540 p_cmdbuffer + buf_index, cmd_len);
541
542 for (idx = 0; idx < 4; idx++) {
543 rtl_write_byte(rtlpriv, box_reg + idx,
544 boxcontent[idx]);
545 }
546 break;
547 case 4:
548 case 5:
549 case 6:
550 case 7:
551 /*boxcontent[0] |= (BIT(7));*/
552 memcpy((u8 *)(boxextcontent),
553 p_cmdbuffer + buf_index+3, cmd_len-3);
554 memcpy((u8 *)(boxcontent) + 1,
555 p_cmdbuffer + buf_index, 3);
556
557 for (idx = 0; idx < 4; idx++) {
558 rtl_write_byte(rtlpriv, box_extreg + idx,
559 boxextcontent[idx]);
560 }
561 for (idx = 0; idx < 4; idx++) {
562 rtl_write_byte(rtlpriv, box_reg + idx,
563 boxcontent[idx]);
564 }
565 break;
566 default:
567 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
568 "switch case not process\n");
569 break;
570 }
571 bwrite_sucess = true;
572
573 rtlhal->last_hmeboxnum = boxnum + 1;
574 if (rtlhal->last_hmeboxnum == 4)
575 rtlhal->last_hmeboxnum = 0;
576
577 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
578 "pHalData->last_hmeboxnum = %d\n",
579 rtlhal->last_hmeboxnum);
580 }
581 if (!rtlpriv) {
582 pr_err("rtlpriv bad\n");
583 return;
584 }
585 if (!rtlhal) {
586 pr_err("rtlhal bad\n");
587 return;
588 }
589 spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
590 rtlhal->h2c_setinprogress = false;
591 spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
592
593 RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "go out\n");
594}
595EXPORT_SYMBOL_GPL(rtl8723_fill_h2c_command);
596
597void rtl8723_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
598 u32 cmd_len, u8 *p_cmdbuffer)
599{
600 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
601 u32 tmp_cmdbuf[2];
602
603 if (!rtlhal->fw_ready) {
604 RT_ASSERT(false,
605 "return H2C cmd because of Fw download fail!!!\n");
606 return;
607 }
608 memset(tmp_cmdbuf, 0, 8);
609 memcpy(tmp_cmdbuf, p_cmdbuffer, cmd_len);
610 rtl8723_fill_h2c_command(hw, element_id, cmd_len,
611 (u8 *)&tmp_cmdbuf);
612 return;
613}
614EXPORT_SYMBOL_GPL(rtl8723_fill_h2c_cmd);
615
616void rtl8723_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
617{
618 u8 u1_joinbssrpt_parm[1] = { 0 };
619
620 SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
621
622 rtl8723_fill_h2c_cmd(hw, H2C_JOINBSSRPT, 1, u1_joinbssrpt_parm);
623}
624EXPORT_SYMBOL_GPL(rtl8723_set_fw_joinbss_report_cmd);
625
626bool rtl8723_cmd_send_packet(struct ieee80211_hw *hw,
627 struct sk_buff *skb)
628{
629 struct rtl_priv *rtlpriv = rtl_priv(hw);
630 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
631 struct rtl8192_tx_ring *ring;
632 struct rtl_tx_desc *pdesc;
633 struct sk_buff *pskb = NULL;
634 u8 own;
635 unsigned long flags;
636
637 ring = &rtlpci->tx_ring[BEACON_QUEUE];
638
639 pskb = __skb_dequeue(&ring->queue);
640 if (pskb)
641 kfree_skb(pskb);
642
643 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
644
645 pdesc = &ring->desc[0];
646 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *)pdesc, true, HW_DESC_OWN);
647
648 rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *)pdesc, 1, 1, skb);
649
650 __skb_queue_tail(&ring->queue, skb);
651
652 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
653
654 rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
655
656 return true;
657}
658EXPORT_SYMBOL_GPL(rtl8723_cmd_send_packet);
659
660void rtl8723_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool dl_finished)
661{
662 struct rtl_priv *rtlpriv = rtl_priv(hw);
663 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
664 struct sk_buff *skb = NULL;
665
666 u32 totalpacketlen;
667 bool rtstatus;
668 u8 u1rsvdpageloc[5] = { 0 };
669 bool dlok = false;
670
671 u8 *beacon;
672 u8 *p_pspoll;
673 u8 *nullfunc;
674 u8 *p_probersp;
675 /*---------------------------------------------------------
676 * (1) beacon
677 *---------------------------------------------------------
678 */
679 beacon = &reserved_page_packet[BEACON_PG * 128];
680 SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
681 SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
682
683 /*-------------------------------------------------------
684 * (2) ps-poll
685 *-------------------------------------------------------
686 */
687 p_pspoll = &reserved_page_packet[PSPOLL_PG * 128];
688 SET_80211_PS_POLL_AID(p_pspoll, (mac->assoc_id | 0xc000));
689 SET_80211_PS_POLL_BSSID(p_pspoll, mac->bssid);
690 SET_80211_PS_POLL_TA(p_pspoll, mac->mac_addr);
691
692 SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1rsvdpageloc, PSPOLL_PG);
693
694 /*--------------------------------------------------------
695 * (3) null data
696 *--------------------------------------------------------
697 */
698 nullfunc = &reserved_page_packet[NULL_PG * 128];
699 SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
700 SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
701 SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
702
703 SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1rsvdpageloc, NULL_PG);
704
705 /*---------------------------------------------------------
706 * (4) probe response
707 *---------------------------------------------------------
708 */
709 p_probersp = &reserved_page_packet[PROBERSP_PG * 128];
710 SET_80211_HDR_ADDRESS1(p_probersp, mac->bssid);
711 SET_80211_HDR_ADDRESS2(p_probersp, mac->mac_addr);
712 SET_80211_HDR_ADDRESS3(p_probersp, mac->bssid);
713
714 SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1rsvdpageloc, PROBERSP_PG);
715
716 totalpacketlen = TOTAL_RESERVED_PKT_LEN;
717
718 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
719 "rtl8723be_set_fw_rsvdpagepkt(): "
720 "HW_VAR_SET_TX_CMD: ALL\n",
721 &reserved_page_packet[0], totalpacketlen);
722 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
723 "rtl8723be_set_fw_rsvdpagepkt(): "
724 "HW_VAR_SET_TX_CMD: ALL\n", u1rsvdpageloc, 3);
725
726
727 skb = dev_alloc_skb(totalpacketlen);
728 memcpy((u8 *)skb_put(skb, totalpacketlen),
729 &reserved_page_packet, totalpacketlen);
730
731 rtstatus = rtl8723_cmd_send_packet(hw, skb);
732
733 if (rtstatus)
734 dlok = true;
735
736 if (dlok) {
737 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
738 "Set RSVD page location to Fw.\n");
739 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG, "H2C_RSVDPAGE:\n",
740 u1rsvdpageloc, 3);
741 rtl8723_fill_h2c_cmd(hw, H2C_88E_RSVDPAGE,
742 sizeof(u1rsvdpageloc), u1rsvdpageloc);
743 } else {
744 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
745 "Set RSVD page location to Fw FAIL!!!!!!.\n");
746 }
747}
748EXPORT_SYMBOL_GPL(rtl8723_set_fw_rsvdpagepkt);
749
750/*Should check FW support p2p or not.*/
751void rtl8723_set_p2p_ctw_period_cmd(struct ieee80211_hw *hw, u8 ctwindow)
752{
753 u8 u1_ctwindow_period[1] = {ctwindow};
754
755 rtl8723_fill_h2c_cmd(hw, H2C_88E_P2P_PS_CTW_CMD, 1,
756 u1_ctwindow_period);
757}
758EXPORT_SYMBOL_GPL(rtl8723_set_p2p_ctw_period_cmd);
759
760void rtl8723_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state)
761{
762 struct rtl_priv *rtlpriv = rtl_priv(hw);
763 struct rtl_ps_ctl *rtlps = rtl_psc(rtl_priv(hw));
764 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
765 struct rtl_p2p_ps_info *p2pinfo = &(rtlps->p2p_ps_info);
766 struct p2p_ps_offload_t *p2p_ps_offload = &rtlhal->p2p_ps_offload;
767 u8 i;
768 u16 ctwindow;
769 u32 start_time, tsf_low;
770
771 switch (p2p_ps_state) {
772 case P2P_PS_DISABLE:
773 RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_DISABLE\n");
774 memset(p2p_ps_offload, 0, sizeof(struct p2p_ps_offload_t *));
775 break;
776 case P2P_PS_ENABLE:
777 RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_ENABLE\n");
778 /* update CTWindow value. */
779 if (p2pinfo->ctwindow > 0) {
780 p2p_ps_offload->ctwindow_en = 1;
781 ctwindow = p2pinfo->ctwindow;
782 rtl8723_set_p2p_ctw_period_cmd(hw, ctwindow);
783 }
784 /* hw only support 2 set of NoA */
785 for (i = 0; i < p2pinfo->noa_num; i++) {
786 /* To control the register setting
787 * for which NOA
788 */
789 rtl_write_byte(rtlpriv, 0x5cf, (i << 4));
790 if (i == 0)
791 p2p_ps_offload->noa0_en = 1;
792 else
793 p2p_ps_offload->noa1_en = 1;
794
795 /* config P2P NoA Descriptor Register */
796 rtl_write_dword(rtlpriv, 0x5E0,
797 p2pinfo->noa_duration[i]);
798 rtl_write_dword(rtlpriv, 0x5E4,
799 p2pinfo->noa_interval[i]);
800
801 /*Get Current TSF value */
802 tsf_low = rtl_read_dword(rtlpriv, REG_TSFTR);
803
804 start_time = p2pinfo->noa_start_time[i];
805 if (p2pinfo->noa_count_type[i] != 1) {
806 while (start_time <= (tsf_low + (50 * 1024))) {
807 start_time += p2pinfo->noa_interval[i];
808 if (p2pinfo->noa_count_type[i] != 255)
809 p2pinfo->noa_count_type[i]--;
810 }
811 }
812 rtl_write_dword(rtlpriv, 0x5E8, start_time);
813 rtl_write_dword(rtlpriv, 0x5EC,
814 p2pinfo->noa_count_type[i]);
815 }
816 if ((p2pinfo->opp_ps == 1) ||
817 (p2pinfo->noa_num > 0)) {
818 /* rst p2p circuit */
819 rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, BIT(4));
820
821 p2p_ps_offload->offload_en = 1;
822
823 if (P2P_ROLE_GO == rtlpriv->mac80211.p2p) {
824 p2p_ps_offload->role = 1;
825 p2p_ps_offload->allstasleep = 0;
826 } else {
827 p2p_ps_offload->role = 0;
828 }
829 p2p_ps_offload->discovery = 0;
830 }
831 break;
832 case P2P_PS_SCAN:
833 RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN\n");
834 p2p_ps_offload->discovery = 1;
835 break;
836 case P2P_PS_SCAN_DONE:
837 RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN_DONE\n");
838 p2p_ps_offload->discovery = 0;
839 p2pinfo->p2p_ps_state = P2P_PS_ENABLE;
840 break;
841 default:
842 break;
843 }
844 rtl8723_fill_h2c_cmd(hw, H2C_88E_P2P_PS_OFFLOAD, 1,
845 (u8 *)p2p_ps_offload);
846}
847EXPORT_SYMBOL_GPL(rtl8723_set_p2p_ps_offload_cmd);
848
849#endif
diff --git a/drivers/net/wireless/rtlwifi/rtl8723com/fw_common.h b/drivers/net/wireless/rtlwifi/rtl8723com/fw_common.h
new file mode 100644
index 000000000000..0890e5deddfa
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8723com/fw_common.h
@@ -0,0 +1,50 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2009-2014 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26#ifndef __FW_COMMON_H__
27#define __FW_COMMON_H__#endif
28
29void rtl8723_enable_fw_download(struct ieee80211_hw *hw, bool enable);
30void rtl8723_fw_block_write(struct ieee80211_hw *hw,
31 const u8 *buffer, u32 size);
32void rtl8723_fw_page_write(struct ieee80211_hw *hw,
33 u32 page, const u8 *buffer, u32 size);
34void rtl8723_write_fw(struct ieee80211_hw *hw,
35 enum version_8723be version,
36 u8 *buffer, u32 size);
37int rtl8723_fw_free_to_go(struct ieee80211_hw *hw, bool is_8723be);
38int rtl8723_download_fw(struct ieee80211_hw *hw,
39 bool buse_wake_on_wlan_fw, bool is_8723be);
40bool rtl8723_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum);
41void rtl8723_fill_h2c_command(struct ieee80211_hw *hw, u8 element_id,
42 u32 cmd_len, u8 *p_cmdbuffer);
43void rtl8723_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
44 u32 cmd_len, u8 *p_cmdbuffer);
45void rtl8723_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus);
46bool rtl8723_cmd_send_packet(struct ieee80211_hw *hw,
47 struct sk_buff *skb);
48void rtl8723_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool dl_finished);
49void rtl8723_set_p2p_ctw_period_cmd(struct ieee80211_hw *hw, u8 ctwindow);
50void rtl8723_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state);
diff --git a/drivers/net/wireless/rtlwifi/rtl8723com/phy_common.h b/drivers/net/wireless/rtlwifi/rtl8723com/phy_common.h
new file mode 100644
index 000000000000..8f451d0584df
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8723com/phy_common.h
@@ -0,0 +1,75 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2009-2014 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26#ifndef __PHY_COMMON__
27#define __PHY_COMMON__
28
29u32 rtl8723_phy_query_bb_reg(struct ieee80211_hw *hw,
30 u32 regaddr, u32 bitmask);
31void rtl8723_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr,
32 u32 bitmask, u32 data);
33u32 rtl8723_phy_calculate_bit_shift(u32 bitmask);
34u32 rtl8723_phy_rf_serial_read(struct ieee80211_hw *hw,
35 enum radio_path rfpath, u32 offset);
36void rtl8723_phy_rf_serial_write(struct ieee80211_hw *hw,
37 enum radio_path rfpath,
38 u32 offset, u32 data);
39u32 rtl8723_phy_query_bb_reg(struct ieee80211_hw *hw,
40 u32 regaddr, u32 bitmask);
41u32 rtl8723_phy_calculate_bit_shift(u32 bitmask);
42void rtl8723_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr,
43 u32 bitmask, u32 data);
44long rtl8723_phy_txpwr_idx_to_dbm(struct ieee80211_hw *hw,
45 enum wireless_mode wirelessmode,
46 u8 txpwridx);
47void rtl8723_phy_init_bb_rf_reg_def(struct ieee80211_hw *hw);
48bool rtl8723_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
49 u32 cmdtableidx,
50 u32 cmdtablesz,
51 enum swchnlcmd_id cmdid,
52 u32 para1, u32 para2,
53 u32 msdelay);
54void rtl8723_phy_path_a_fill_iqk_matrix(struct ieee80211_hw *hw,
55 bool iqk_ok,
56 long result[][8],
57 u8 final_candidate,
58 bool btxonly);
59void rtl8723_save_adda_registers(struct ieee80211_hw *hw, u32 *addareg,
60 u32 *addabackup, u32 registernum);
61static void rtl8723_phy_save_mac_registers(struct ieee80211_hw *hw,
62 u32 *macreg, u32 *macbackup);
63void rtl8723_phy_reload_adda_registers(struct ieee80211_hw *hw,
64 u32 *addareg, u32 *addabackup,
65 u32 regiesternum);
66void rtl8723_phy_reload_mac_registers(struct ieee80211_hw *hw,
67 u32 *macreg, u32 *macbackup);
68void rtl8723_phy_path_adda_on(struct ieee80211_hw *hw, u32 *addareg,
69 bool is_patha_on, bool is2t);
70void rtl8723_phy_mac_setting_calibration(struct ieee80211_hw *hw,
71 u32 *macreg, u32 *macbackup);
72void rtl8723_phy_path_a_standby(struct ieee80211_hw *hw);
73void rtl8723_phy_pi_mode_switch(struct ieee80211_hw *hw, bool pi_mode);
74
75#endif
diff --git a/drivers/net/wireless/rtlwifi/wifi.h b/drivers/net/wireless/rtlwifi/wifi.h
index 8c647391bedf..de91c82f87fd 100644
--- a/drivers/net/wireless/rtlwifi/wifi.h
+++ b/drivers/net/wireless/rtlwifi/wifi.h
@@ -49,6 +49,7 @@
49 49
50#define IQK_ADDA_REG_NUM 16 50#define IQK_ADDA_REG_NUM 16
51#define IQK_MAC_REG_NUM 4 51#define IQK_MAC_REG_NUM 4
52#define IQK_THRESHOLD 8
52 53
53#define MAX_KEY_LEN 61 54#define MAX_KEY_LEN 61
54#define KEY_BUF_SIZE 5 55#define KEY_BUF_SIZE 5
@@ -96,6 +97,7 @@
96#define CHANNEL_MAX_NUMBER_2G 14 97#define CHANNEL_MAX_NUMBER_2G 14
97#define AVG_THERMAL_NUM 8 98#define AVG_THERMAL_NUM 8
98#define AVG_THERMAL_NUM_88E 4 99#define AVG_THERMAL_NUM_88E 4
100#define AVG_THERMAL_NUM_8723BE 4
99#define MAX_TID_COUNT 9 101#define MAX_TID_COUNT 9
100 102
101/* for early mode */ 103/* for early mode */
@@ -115,6 +117,8 @@ struct txpower_info_2g {
115 u8 ofdm_diff[MAX_RF_PATH][MAX_TX_COUNT]; 117 u8 ofdm_diff[MAX_RF_PATH][MAX_TX_COUNT];
116 u8 bw20_diff[MAX_RF_PATH][MAX_TX_COUNT]; 118 u8 bw20_diff[MAX_RF_PATH][MAX_TX_COUNT];
117 u8 bw40_diff[MAX_RF_PATH][MAX_TX_COUNT]; 119 u8 bw40_diff[MAX_RF_PATH][MAX_TX_COUNT];
120 u8 bw80_diff[MAX_RF_PATH][MAX_TX_COUNT];
121 u8 bw160_diff[MAX_RF_PATH][MAX_TX_COUNT];
118}; 122};
119 123
120struct txpower_info_5g { 124struct txpower_info_5g {
@@ -158,6 +162,7 @@ enum hardware_type {
158 HARDWARE_TYPE_RTL8192DU, 162 HARDWARE_TYPE_RTL8192DU,
159 HARDWARE_TYPE_RTL8723AE, 163 HARDWARE_TYPE_RTL8723AE,
160 HARDWARE_TYPE_RTL8723U, 164 HARDWARE_TYPE_RTL8723U,
165 HARDWARE_TYPE_RTL8723BE,
161 HARDWARE_TYPE_RTL8188EE, 166 HARDWARE_TYPE_RTL8188EE,
162 167
163 /* keep it last */ 168 /* keep it last */
@@ -1986,6 +1991,44 @@ struct rtl_global_var {
1986 spinlock_t glb_list_lock; 1991 spinlock_t glb_list_lock;
1987}; 1992};
1988 1993
1994struct rtl_btc_info {
1995 u8 bt_type;
1996 u8 btcoexist;
1997 u8 ant_num;
1998};
1999
2000struct rtl_bt_coexist {
2001 struct rtl_btc_ops *btc_ops;
2002 struct rtl_btc_info btc_info;
2003};
2004
2005struct rtl_btc_ops {
2006 void (*btc_init_variables) (struct rtl_priv *rtlpriv);
2007 void (*btc_init_hal_vars) (struct rtl_priv *rtlpriv);
2008 void (*btc_init_hw_config) (struct rtl_priv *rtlpriv);
2009 void (*btc_ips_notify) (struct rtl_priv *rtlpriv, u8 type);
2010 void (*btc_scan_notify) (struct rtl_priv *rtlpriv, u8 scantype);
2011 void (*btc_connect_notify) (struct rtl_priv *rtlpriv, u8 action);
2012 void (*btc_mediastatus_notify) (struct rtl_priv *rtlpriv,
2013 enum _RT_MEDIA_STATUS mstatus);
2014 void (*btc_periodical) (struct rtl_priv *rtlpriv);
2015 void (*btc_halt_notify) (void);
2016 void (*btc_btinfo_notify) (struct rtl_priv *rtlpriv,
2017 u8 *tmp_buf, u8 length);
2018 bool (*btc_is_limited_dig) (struct rtl_priv *rtlpriv);
2019 bool (*btc_is_disable_edca_turbo) (struct rtl_priv *rtlpriv);
2020 bool (*btc_is_bt_disabled) (struct rtl_priv *rtlpriv);
2021};
2022
2023struct proxim {
2024 bool proxim_on;
2025
2026 void *proximity_priv;
2027 int (*proxim_rx)(struct ieee80211_hw *hw, struct rtl_stats *status,
2028 struct sk_buff *skb);
2029 u8 (*proxim_get_var)(struct ieee80211_hw *hw, u8 type);
2030};
2031
1989struct rtl_priv { 2032struct rtl_priv {
1990 struct ieee80211_hw *hw; 2033 struct ieee80211_hw *hw;
1991 struct completion firmware_loading_complete; 2034 struct completion firmware_loading_complete;
@@ -2048,6 +2091,20 @@ struct rtl_priv {
2048 bool enter_ps; /* true when entering PS */ 2091 bool enter_ps; /* true when entering PS */
2049 u8 rate_mask[5]; 2092 u8 rate_mask[5];
2050 2093
2094 /* intel Proximity, should be alloc mem
2095 * in intel Proximity module and can only
2096 * be used in intel Proximity mode
2097 */
2098 struct proxim proximity;
2099
2100 /*for bt coexist use*/
2101 struct rtl_bt_coexist btcoexist;
2102
2103 /* separate 92ee from other ICs,
2104 * 92ee use new trx flow.
2105 */
2106 bool use_new_trx_flow;
2107
2051 /*This must be the last item so 2108 /*This must be the last item so
2052 that it points to the data allocated 2109 that it points to the data allocated
2053 beyond this structure like: 2110 beyond this structure like:
@@ -2079,6 +2136,9 @@ enum bt_co_type {
2079 BT_CSR_BC8 = 4, 2136 BT_CSR_BC8 = 4,
2080 BT_RTL8756 = 5, 2137 BT_RTL8756 = 5,
2081 BT_RTL8723A = 6, 2138 BT_RTL8723A = 6,
2139 BT_RTL8821 = 7,
2140 BT_RTL8723B = 8,
2141 BT_RTL8192E = 9,
2082}; 2142};
2083 2143
2084enum bt_cur_state { 2144enum bt_cur_state {
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-21 02:24:30 -0400