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authorMarkos Chandras <markos.chandras@imgtec.com>2014-04-08 07:47:13 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-05-30 09:54:39 -0400
commita8e897ad00d3cfd0ab9029978f0c3f8ecd6fba61 (patch)
treeddd6a13c011c4330e9897ea354943e27c27330ed
parentd6b3314b49e12e8c349deb4ca28e7028db00728f (diff)
MIPS: uasm: Add mul uasm instruction
It will be used later on by bpf-jit [ralf@linux-mips.org: Resolved conflict.] Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/6736/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/uasm.h1
-rw-r--r--arch/mips/include/uapi/asm/inst.h1
-rw-r--r--arch/mips/mm/uasm-micromips.c1
-rw-r--r--arch/mips/mm/uasm-mips.c1
-rw-r--r--arch/mips/mm/uasm.c3
5 files changed, 6 insertions, 1 deletions
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index a096581168df..95954ba24d31 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -134,6 +134,7 @@ Ip_u3u1u2(_lwx);
134Ip_u1u2u3(_mfc0); 134Ip_u1u2u3(_mfc0);
135Ip_u1(_mfhi); 135Ip_u1(_mfhi);
136Ip_u1u2u3(_mtc0); 136Ip_u1u2u3(_mtc0);
137Ip_u3u1u2(_mul);
137Ip_u3u1u2(_or); 138Ip_u3u1u2(_or);
138Ip_u2u1u3(_ori); 139Ip_u2u1u3(_ori);
139Ip_u2s3u1(_pref); 140Ip_u2s3u1(_pref);
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index aa37373bfd64..67933839ce6a 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -269,6 +269,7 @@ enum mm_32a_minor_op {
269 mm_addu32_op = 0x150, 269 mm_addu32_op = 0x150,
270 mm_subu32_op = 0x1d0, 270 mm_subu32_op = 0x1d0,
271 mm_wsbh_op = 0x1ec, 271 mm_wsbh_op = 0x1ec,
272 mm_mul_op = 0x210,
272 mm_and_op = 0x250, 273 mm_and_op = 0x250,
273 mm_or32_op = 0x290, 274 mm_or32_op = 0x290,
274 mm_xor32_op = 0x310, 275 mm_xor32_op = 0x310,
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c
index 99d63d9825ed..9d42f1066a1f 100644
--- a/arch/mips/mm/uasm-micromips.c
+++ b/arch/mips/mm/uasm-micromips.c
@@ -90,6 +90,7 @@ static struct insn insn_table_MM[] = {
90 { insn_mfc0, M(mm_pool32a_op, 0, 0, 0, mm_mfc0_op, mm_pool32axf_op), RT | RS | RD }, 90 { insn_mfc0, M(mm_pool32a_op, 0, 0, 0, mm_mfc0_op, mm_pool32axf_op), RT | RS | RD },
91 { insn_mfhi, M(mm_pool32a_op, 0, 0, 0, mm_mfhi32_op, mm_pool32axf_op), RS }, 91 { insn_mfhi, M(mm_pool32a_op, 0, 0, 0, mm_mfhi32_op, mm_pool32axf_op), RS },
92 { insn_mtc0, M(mm_pool32a_op, 0, 0, 0, mm_mtc0_op, mm_pool32axf_op), RT | RS | RD }, 92 { insn_mtc0, M(mm_pool32a_op, 0, 0, 0, mm_mtc0_op, mm_pool32axf_op), RT | RS | RD },
93 { insn_mul, M(mm_pool32a_op, 0, 0, 0, 0, mm_mul_op), RT | RS | RD },
93 { insn_or, M(mm_pool32a_op, 0, 0, 0, 0, mm_or32_op), RT | RS | RD }, 94 { insn_or, M(mm_pool32a_op, 0, 0, 0, 0, mm_or32_op), RT | RS | RD },
94 { insn_ori, M(mm_ori32_op, 0, 0, 0, 0, 0), RT | RS | UIMM }, 95 { insn_ori, M(mm_ori32_op, 0, 0, 0, 0, 0), RT | RS | UIMM },
95 { insn_pref, M(mm_pool32c_op, 0, 0, (mm_pref_func << 1), 0, 0), RT | RS | SIMM }, 96 { insn_pref, M(mm_pool32c_op, 0, 0, (mm_pref_func << 1), 0, 0), RT | RS | SIMM },
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index cb75d452ec0e..9dd15168e849 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -97,6 +97,7 @@ static struct insn insn_table[] = {
97 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET}, 97 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
98 { insn_mfhi, M(spec_op, 0, 0, 0, 0, mfhi_op), RD }, 98 { insn_mfhi, M(spec_op, 0, 0, 0, 0, mfhi_op), RD },
99 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET}, 99 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
100 { insn_mul, M(spec2_op, 0, 0, 0, 0, mul_op), RS | RT | RD},
100 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, 101 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
101 { insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD }, 102 { insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD },
102 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 103 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 6ffb60136f91..1c8bed31ec3d 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -51,7 +51,7 @@ enum opcode {
51 insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, insn_dsubu, insn_eret, 51 insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, insn_dsubu, insn_eret,
52 insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld, 52 insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld,
53 insn_ldx, insn_lh, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, 53 insn_ldx, insn_lh, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx,
54 insn_mfc0, insn_mfhi, insn_mtc0, insn_or, insn_ori, insn_pref, 54 insn_mfc0, insn_mfhi, insn_mtc0, insn_mul, insn_or, insn_ori, insn_pref,
55 insn_rfe, insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sllv, 55 insn_rfe, insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll, insn_sllv,
56 insn_sltiu, insn_sltu, insn_sra, insn_srl, insn_srlv, insn_subu, 56 insn_sltiu, insn_sltu, insn_sra, insn_srl, insn_srlv, insn_subu,
57 insn_sw, insn_sync, insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi, 57 insn_sw, insn_sync, insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi,
@@ -277,6 +277,7 @@ I_u2s3u1(_lw)
277I_u1u2u3(_mfc0) 277I_u1u2u3(_mfc0)
278I_u1(_mfhi) 278I_u1(_mfhi)
279I_u1u2u3(_mtc0) 279I_u1u2u3(_mtc0)
280I_u3u1u2(_mul)
280I_u2u1u3(_ori) 281I_u2u1u3(_ori)
281I_u3u1u2(_or) 282I_u3u1u2(_or)
282I_0(_rfe) 283I_0(_rfe)