spi: davinci: add support to configure gpio cs through dt

Currently driver supports only configuration of GPIO CS through platform data. This patch enhances the driver to configure GPIO CS through DT. Also update the DT binding documentation to reflect the availability of cs-gpios. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
author: Murali Karicheri <m-karicheri2@ti.com> 2014-08-01 12:40:32 -0400
committer: Mark Brown <broonie@linaro.org> 2014-08-01 14:20:52 -0400
commit: a88e34ea213e1bdbd9b2dfca1e1e5fa68b9649a0 (patch)
tree: 98c14456c50633d5ed50da96ef7c98cccc215823
parent: 7480e755c6e6e890200e8998597e8d0baa51fa8e (diff)
2 files changed, 64 insertions, 9 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt
index 6d0ac8d0ad9b..f80887bca0d6 100644
--- a/Documentation/devicetree/bindings/spi/spi-davinci.txt
+++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt
@@ -8,7 +8,8 @@ Required properties:
        - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
        - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
 - reg: Offset and length of SPI controller register space
- num-cs: Number of chip selects
+- num-cs: Number of chip selects. This includes internal as well as
+        GPIO chip selects.
 - ti,davinci-spi-intr-line: interrupt line used to connect the SPI
        IP to the interrupt controller within the SoC. Possible values
        are 0 and 1. Manual says one of the two possible interrupt
@@ -17,6 +18,12 @@ Required properties:
 - interrupts: interrupt number mapped to CPU.
 - clocks: spi clk phandle
+Optional:
+- cs-gpios: gpio chip selects
+        For example to have 3 internal CS and 2 GPIO CS, user could define
+        cs-gpios = <0>, <0>, <0>, <&gpio1 30 0>, <&gpio1 31 0>;
+        where first three are internal CS and last two are GPIO CS.
 Example of a NOR flash slave device (n25q032) connected to DaVinci
 SPI controller device over the SPI bus.
diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c
index 2477af4bc1c7..ac4414e00bb9 100644
--- a/drivers/spi/spi-davinci.c
+++ b/drivers/spi/spi-davinci.c
@@ -30,6 +30,7 @@
 #include <linux/edma.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/of_gpio.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/spi_bitbang.h>
 #include <linux/slab.h>
@@ -207,17 +208,28 @@ static inline void clear_io_bits(void __iomem *addr, u32 bits)
 static void davinci_spi_chipselect(struct spi_device *spi, int value)
 {
        struct davinci_spi *dspi;
+        struct device_node *np = spi->dev.of_node;
        struct davinci_spi_platform_data *pdata;
+        struct spi_master *master = spi->master;
        u8 chip_sel = spi->chip_select;
        u16 spidat1 = CS_DEFAULT;
        bool gpio_chipsel = false;
+        int gpio;
        dspi = spi_master_get_devdata(spi->master);
        pdata = &dspi->pdata;
-        if (pdata->chip_sel && chip_sel < pdata->num_chipselect &&
+        if (np && master->cs_gpios != NULL && spi->cs_gpio >= 0) {
-                                pdata->chip_sel[chip_sel] != SPI_INTERN_CS)
+                /* SPI core parse and update master->cs_gpio */
                gpio_chipsel = true;
+                gpio = spi->cs_gpio;
+        } else if (pdata->chip_sel &&
+                   chip_sel < pdata->num_chipselect &&
+                   pdata->chip_sel[chip_sel] != SPI_INTERN_CS) {
+                /* platform data defines chip_sel */
+                gpio_chipsel = true;
+                gpio = pdata->chip_sel[chip_sel];
+        }
        /*
         * Board specific chip select logic decides the polarity and cs
@@ -225,9 +237,9 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
         */
        if (gpio_chipsel) {
                if (value == BITBANG_CS_ACTIVE)
-                        gpio_set_value(pdata->chip_sel[chip_sel], 0);
+                        gpio_set_value(gpio, 0);
                else
-                        gpio_set_value(pdata->chip_sel[chip_sel], 1);
+                        gpio_set_value(gpio, 1);
        } else {
                if (value == BITBANG_CS_ACTIVE) {
                        spidat1 |= SPIDAT1_CSHOLD_MASK;
@@ -390,17 +402,41 @@ static int davinci_spi_setup(struct spi_device *spi)
        int retval = 0;
        struct davinci_spi *dspi;
        struct davinci_spi_platform_data *pdata;
+        struct spi_master *master = spi->master;
+        struct device_node *np = spi->dev.of_node;
+        bool internal_cs = true;
        dspi = spi_master_get_devdata(spi->master);
        pdata = &dspi->pdata;
        if (!(spi->mode & SPI_NO_CS)) {
-                if ((pdata->chip_sel == NULL) ||
+                if (np && (master->cs_gpios != NULL) && (spi->cs_gpio >= 0)) {
-                    (pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS))
+                        unsigned long flags;
-                        set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select);
+                        flags = GPIOF_DIR_OUT;
+                        if (spi->mode & SPI_CS_HIGH)
+                                flags |= GPIOF_INIT_LOW;
+                        else
+                                flags |= GPIOF_INIT_HIGH;
+                        retval = gpio_request_one(spi->cs_gpio,
+                                                  flags, dev_name(&spi->dev));
+                        if (retval) {
+                                dev_err(&spi->dev,
+                                        "GPIO %d request failed (%d)\n",
+                                        spi->cs_gpio, retval);
+                                return retval;
+                        }
+                        internal_cs = false;
+                } else if (pdata->chip_sel &&
+                           spi->chip_select < pdata->num_chipselect &&
+                           pdata->chip_sel[spi->chip_select] != SPI_INTERN_CS) {
+                        internal_cs = false;
+                }
        }
+        if (internal_cs)
+                set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select);
        if (spi->mode & SPI_READY)
                set_io_bits(dspi->base + SPIPC0, SPIPC0_SPIENA_MASK);
@@ -412,6 +448,15 @@ static int davinci_spi_setup(struct spi_device *spi)
        return retval;
 }
+static void davinci_spi_cleanup(struct spi_device *spi)
+{
+        struct spi_master *master = spi->master;
+        struct device_node *np = spi->dev.of_node;
+        if (np && (master->cs_gpios != NULL) && (spi->cs_gpio >= 0))
+                gpio_free(spi->cs_gpio);
+}
 static int davinci_spi_check_error(struct davinci_spi *dspi, int int_status)
 {
        struct device *sdev = dspi->bitbang.master->dev.parent;
@@ -810,6 +855,8 @@ static int spi_davinci_get_pdata(struct platform_device *pdev,
        /*
         * default num_cs is 1 and all chipsel are internal to the chip
+         * indicated by chip_sel being NULL or cs_gpios being NULL or
+         * set to -ENOENT. num-cs includes internal as well as gpios.
         * indicated by chip_sel being NULL. GPIO based CS is not
         * supported yet in DT bindings.
         */
@@ -921,6 +968,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
        master->num_chipselect = pdata->num_chipselect;
        master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16);
        master->setup = davinci_spi_setup;
+        master->cleanup = davinci_spi_cleanup;
        dspi->bitbang.chipselect = davinci_spi_chipselect;
        dspi->bitbang.setup_transfer = davinci_spi_setup_transfer;
author	Murali Karicheri <m-karicheri2@ti.com>	2014-08-01 12:40:32 -0400
committer	Mark Brown <broonie@linaro.org>	2014-08-01 14:20:52 -0400
commit	a88e34ea213e1bdbd9b2dfca1e1e5fa68b9649a0 (patch)
tree	98c14456c50633d5ed50da96ef7c98cccc215823
parent	7480e755c6e6e890200e8998597e8d0baa51fa8e (diff)

diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt index 6d0ac8d0ad9b..f80887bca0d6 100644 --- a/Documentation/devicetree/bindings/spi/spi-davinci.txt +++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt
@@ -8,7 +8,8 @@ Required properties:
8	- "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family	8	- "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
9	- "ti,da830-spi" for SPI used similar to that on DA8xx SoC family	9	- "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
10	- reg: Offset and length of SPI controller register space	10	- reg: Offset and length of SPI controller register space
11	- num-cs: Number of chip selects	11	- num-cs: Number of chip selects. This includes internal as well as
		12	GPIO chip selects.
12	- ti,davinci-spi-intr-line: interrupt line used to connect the SPI	13	- ti,davinci-spi-intr-line: interrupt line used to connect the SPI
13	IP to the interrupt controller within the SoC. Possible values	14	IP to the interrupt controller within the SoC. Possible values
14	are 0 and 1. Manual says one of the two possible interrupt	15	are 0 and 1. Manual says one of the two possible interrupt
@@ -17,6 +18,12 @@ Required properties:
17	- interrupts: interrupt number mapped to CPU.	18	- interrupts: interrupt number mapped to CPU.
18	- clocks: spi clk phandle	19	- clocks: spi clk phandle
19		20
		21	Optional:
		22	- cs-gpios: gpio chip selects
		23	For example to have 3 internal CS and 2 GPIO CS, user could define
		24	cs-gpios = <0>, <0>, <0>, <&gpio1 30 0>, <&gpio1 31 0>;
		25	where first three are internal CS and last two are GPIO CS.
		26
20	Example of a NOR flash slave device (n25q032) connected to DaVinci	27	Example of a NOR flash slave device (n25q032) connected to DaVinci
21	SPI controller device over the SPI bus.	28	SPI controller device over the SPI bus.
22		29


diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 2477af4bc1c7..ac4414e00bb9 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c
@@ -30,6 +30,7 @@
30	#include <linux/edma.h>	30	#include <linux/edma.h>
31	#include <linux/of.h>	31	#include <linux/of.h>
32	#include <linux/of_device.h>	32	#include <linux/of_device.h>
		33	#include <linux/of_gpio.h>
33	#include <linux/spi/spi.h>	34	#include <linux/spi/spi.h>
34	#include <linux/spi/spi_bitbang.h>	35	#include <linux/spi/spi_bitbang.h>
35	#include <linux/slab.h>	36	#include <linux/slab.h>
@@ -207,17 +208,28 @@ static inline void clear_io_bits(void __iomem *addr, u32 bits)
207	static void davinci_spi_chipselect(struct spi_device *spi, int value)	208	static void davinci_spi_chipselect(struct spi_device *spi, int value)
208	{	209	{
209	struct davinci_spi *dspi;	210	struct davinci_spi *dspi;
		211	struct device_node *np = spi->dev.of_node;
210	struct davinci_spi_platform_data *pdata;	212	struct davinci_spi_platform_data *pdata;
		213	struct spi_master *master = spi->master;
211	u8 chip_sel = spi->chip_select;	214	u8 chip_sel = spi->chip_select;
212	u16 spidat1 = CS_DEFAULT;	215	u16 spidat1 = CS_DEFAULT;
213	bool gpio_chipsel = false;	216	bool gpio_chipsel = false;
		217	int gpio;
214		218
215	dspi = spi_master_get_devdata(spi->master);	219	dspi = spi_master_get_devdata(spi->master);
216	pdata = &dspi->pdata;	220	pdata = &dspi->pdata;
217		221
218	if (pdata->chip_sel && chip_sel < pdata->num_chipselect &&	222	if (np && master->cs_gpios != NULL && spi->cs_gpio >= 0) {
219	pdata->chip_sel[chip_sel] != SPI_INTERN_CS)	223	/* SPI core parse and update master->cs_gpio */
220	gpio_chipsel = true;	224	gpio_chipsel = true;
		225	gpio = spi->cs_gpio;
		226	} else if (pdata->chip_sel &&
		227	chip_sel < pdata->num_chipselect &&
		228	pdata->chip_sel[chip_sel] != SPI_INTERN_CS) {
		229	/* platform data defines chip_sel */
		230	gpio_chipsel = true;
		231	gpio = pdata->chip_sel[chip_sel];
		232	}
221		233
222	/*	234	/*
223	* Board specific chip select logic decides the polarity and cs	235	* Board specific chip select logic decides the polarity and cs
@@ -225,9 +237,9 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value)
225	*/	237	*/
226	if (gpio_chipsel) {	238	if (gpio_chipsel) {
227	if (value == BITBANG_CS_ACTIVE)	239	if (value == BITBANG_CS_ACTIVE)
228	gpio_set_value(pdata->chip_sel[chip_sel], 0);	240	gpio_set_value(gpio, 0);
229	else	241	else
230	gpio_set_value(pdata->chip_sel[chip_sel], 1);	242	gpio_set_value(gpio, 1);
231	} else {	243	} else {
232	if (value == BITBANG_CS_ACTIVE) {	244	if (value == BITBANG_CS_ACTIVE) {
233	spidat1 \|= SPIDAT1_CSHOLD_MASK;	245	spidat1 \|= SPIDAT1_CSHOLD_MASK;
@@ -390,17 +402,41 @@ static int davinci_spi_setup(struct spi_device *spi)
390	int retval = 0;	402	int retval = 0;
391	struct davinci_spi *dspi;	403	struct davinci_spi *dspi;
392	struct davinci_spi_platform_data *pdata;	404	struct davinci_spi_platform_data *pdata;
		405	struct spi_master *master = spi->master;
		406	struct device_node *np = spi->dev.of_node;
		407	bool internal_cs = true;
393		408
394	dspi = spi_master_get_devdata(spi->master);	409	dspi = spi_master_get_devdata(spi->master);
395	pdata = &dspi->pdata;	410	pdata = &dspi->pdata;
396		411
397	if (!(spi->mode & SPI_NO_CS)) {	412	if (!(spi->mode & SPI_NO_CS)) {
398	if ((pdata->chip_sel == NULL) \|\|	413	if (np && (master->cs_gpios != NULL) && (spi->cs_gpio >= 0)) {
399	(pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS))	414	unsigned long flags;
400	set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select);	415
401		416	flags = GPIOF_DIR_OUT;
		417	if (spi->mode & SPI_CS_HIGH)
		418	flags \|= GPIOF_INIT_LOW;
		419	else
		420	flags \|= GPIOF_INIT_HIGH;
		421	retval = gpio_request_one(spi->cs_gpio,
		422	flags, dev_name(&spi->dev));
		423	if (retval) {
		424	dev_err(&spi->dev,
		425	"GPIO %d request failed (%d)\n",
		426	spi->cs_gpio, retval);
		427	return retval;
		428	}
		429	internal_cs = false;
		430	} else if (pdata->chip_sel &&
		431	spi->chip_select < pdata->num_chipselect &&
		432	pdata->chip_sel[spi->chip_select] != SPI_INTERN_CS) {
		433	internal_cs = false;
		434	}
402	}	435	}
403		436
		437	if (internal_cs)
		438	set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select);
		439
404	if (spi->mode & SPI_READY)	440	if (spi->mode & SPI_READY)
405	set_io_bits(dspi->base + SPIPC0, SPIPC0_SPIENA_MASK);	441	set_io_bits(dspi->base + SPIPC0, SPIPC0_SPIENA_MASK);
406		442
@@ -412,6 +448,15 @@ static int davinci_spi_setup(struct spi_device *spi)
412	return retval;	448	return retval;
413	}	449	}
414		450
		451	static void davinci_spi_cleanup(struct spi_device *spi)
		452	{
		453	struct spi_master *master = spi->master;
		454	struct device_node *np = spi->dev.of_node;
		455
		456	if (np && (master->cs_gpios != NULL) && (spi->cs_gpio >= 0))
		457	gpio_free(spi->cs_gpio);
		458	}
		459
415	static int davinci_spi_check_error(struct davinci_spi *dspi, int int_status)	460	static int davinci_spi_check_error(struct davinci_spi *dspi, int int_status)
416	{	461	{
417	struct device *sdev = dspi->bitbang.master->dev.parent;	462	struct device *sdev = dspi->bitbang.master->dev.parent;
@@ -810,6 +855,8 @@ static int spi_davinci_get_pdata(struct platform_device *pdev,
810		855
811	/*	856	/*
812	* default num_cs is 1 and all chipsel are internal to the chip	857	* default num_cs is 1 and all chipsel are internal to the chip
		858	* indicated by chip_sel being NULL or cs_gpios being NULL or
		859	* set to -ENOENT. num-cs includes internal as well as gpios.
813	* indicated by chip_sel being NULL. GPIO based CS is not	860	* indicated by chip_sel being NULL. GPIO based CS is not
814	* supported yet in DT bindings.	861	* supported yet in DT bindings.
815	*/	862	*/
@@ -921,6 +968,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
921	master->num_chipselect = pdata->num_chipselect;	968	master->num_chipselect = pdata->num_chipselect;
922	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16);	969	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16);
923	master->setup = davinci_spi_setup;	970	master->setup = davinci_spi_setup;
		971	master->cleanup = davinci_spi_cleanup;
924		972
925	dspi->bitbang.chipselect = davinci_spi_chipselect;	973	dspi->bitbang.chipselect = davinci_spi_chipselect;
926	dspi->bitbang.setup_transfer = davinci_spi_setup_transfer;	974	dspi->bitbang.setup_transfer = davinci_spi_setup_transfer;