diff options
author | Becky Bruce <bgill@freescale.com> | 2006-02-08 17:41:26 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-02-10 00:52:00 -0500 |
commit | a7cb03375d794d3494561bbad90aeab13ff7e4d0 (patch) | |
tree | 4d813b2a02a0b22912ce19402dfcb507871aa48e | |
parent | fbc94e7c3d78d53c7fa671e02e5bb6fbb3254f85 (diff) |
[PATCH] powerpc/ppc: Add missing isyncs in head_fsl_booke.S
The e500 core reference manual indicates that isync is required
after mtmsr(DE bit) and mtspr DBCR0. Add isyncs to make the code
conform to the spec.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r-- | arch/powerpc/kernel/head_fsl_booke.S | 4 | ||||
-rw-r--r-- | arch/ppc/kernel/head_fsl_booke.S | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 8d60fa99fc4b..0abd05f14f87 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
@@ -316,6 +316,7 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
316 | */ | 316 | */ |
317 | lis r2,DBCR0_IDM@h | 317 | lis r2,DBCR0_IDM@h |
318 | mtspr SPRN_DBCR0,r2 | 318 | mtspr SPRN_DBCR0,r2 |
319 | isync | ||
319 | /* clear any residual debug events */ | 320 | /* clear any residual debug events */ |
320 | li r2,-1 | 321 | li r2,-1 |
321 | mtspr SPRN_DBSR,r2 | 322 | mtspr SPRN_DBSR,r2 |
@@ -1002,12 +1003,15 @@ _GLOBAL(giveup_fpu) | |||
1002 | _GLOBAL(abort) | 1003 | _GLOBAL(abort) |
1003 | li r13,0 | 1004 | li r13,0 |
1004 | mtspr SPRN_DBCR0,r13 /* disable all debug events */ | 1005 | mtspr SPRN_DBCR0,r13 /* disable all debug events */ |
1006 | isync | ||
1005 | mfmsr r13 | 1007 | mfmsr r13 |
1006 | ori r13,r13,MSR_DE@l /* Enable Debug Events */ | 1008 | ori r13,r13,MSR_DE@l /* Enable Debug Events */ |
1007 | mtmsr r13 | 1009 | mtmsr r13 |
1010 | isync | ||
1008 | mfspr r13,SPRN_DBCR0 | 1011 | mfspr r13,SPRN_DBCR0 |
1009 | lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h | 1012 | lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h |
1010 | mtspr SPRN_DBCR0,r13 | 1013 | mtspr SPRN_DBCR0,r13 |
1014 | isync | ||
1011 | 1015 | ||
1012 | _GLOBAL(set_context) | 1016 | _GLOBAL(set_context) |
1013 | 1017 | ||
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S index 8d60fa99fc4b..0abd05f14f87 100644 --- a/arch/ppc/kernel/head_fsl_booke.S +++ b/arch/ppc/kernel/head_fsl_booke.S | |||
@@ -316,6 +316,7 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
316 | */ | 316 | */ |
317 | lis r2,DBCR0_IDM@h | 317 | lis r2,DBCR0_IDM@h |
318 | mtspr SPRN_DBCR0,r2 | 318 | mtspr SPRN_DBCR0,r2 |
319 | isync | ||
319 | /* clear any residual debug events */ | 320 | /* clear any residual debug events */ |
320 | li r2,-1 | 321 | li r2,-1 |
321 | mtspr SPRN_DBSR,r2 | 322 | mtspr SPRN_DBSR,r2 |
@@ -1002,12 +1003,15 @@ _GLOBAL(giveup_fpu) | |||
1002 | _GLOBAL(abort) | 1003 | _GLOBAL(abort) |
1003 | li r13,0 | 1004 | li r13,0 |
1004 | mtspr SPRN_DBCR0,r13 /* disable all debug events */ | 1005 | mtspr SPRN_DBCR0,r13 /* disable all debug events */ |
1006 | isync | ||
1005 | mfmsr r13 | 1007 | mfmsr r13 |
1006 | ori r13,r13,MSR_DE@l /* Enable Debug Events */ | 1008 | ori r13,r13,MSR_DE@l /* Enable Debug Events */ |
1007 | mtmsr r13 | 1009 | mtmsr r13 |
1010 | isync | ||
1008 | mfspr r13,SPRN_DBCR0 | 1011 | mfspr r13,SPRN_DBCR0 |
1009 | lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h | 1012 | lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h |
1010 | mtspr SPRN_DBCR0,r13 | 1013 | mtspr SPRN_DBCR0,r13 |
1014 | isync | ||
1011 | 1015 | ||
1012 | _GLOBAL(set_context) | 1016 | _GLOBAL(set_context) |
1013 | 1017 | ||