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authorH. Peter Anvin <hpa@linux.intel.com>2010-05-19 16:40:14 -0400
committerH. Peter Anvin <hpa@linux.intel.com>2010-05-19 16:47:11 -0400
commita75af580bb1fd261bf63cc00e4b324e17ceb15cf (patch)
tree4e49d335c4211b580dc4bcbbdad1a5e609ef46e8
parenta875c01944f0d750eeb1ef3133feceb13f13c4b3 (diff)
x86, mrst: make mrst_identify_cpu() an inline returning enum
We have an enum, might as well use it. While we're at it, make it an inline... there is really no point in calling a function for this stuff. LKML-Reference: <1274295685-6774-3-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
-rw-r--r--arch/x86/include/asm/mrst.h7
-rw-r--r--arch/x86/kernel/mrst.c17
2 files changed, 12 insertions, 12 deletions
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index 67ad31545778..1869c18d15ca 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -11,7 +11,6 @@
11#ifndef _ASM_X86_MRST_H 11#ifndef _ASM_X86_MRST_H
12#define _ASM_X86_MRST_H 12#define _ASM_X86_MRST_H
13extern int pci_mrst_init(void); 13extern int pci_mrst_init(void);
14extern int mrst_identify_cpu(void);
15extern int mrst_timer_options __cpuinitdata; 14extern int mrst_timer_options __cpuinitdata;
16int __init sfi_parse_mrtc(struct sfi_table_header *table); 15int __init sfi_parse_mrtc(struct sfi_table_header *table);
17 16
@@ -27,6 +26,12 @@ enum mrst_cpu_type {
27 MRST_CPU_CHIP_PENWELL, 26 MRST_CPU_CHIP_PENWELL,
28}; 27};
29 28
29extern enum mrst_cpu_type __mrst_cpu_chip;
30static enum mrst_cpu_type mrst_identify_cpu(void)
31{
32 return __mrst_cpu_chip;
33}
34
30enum mrst_timer_options { 35enum mrst_timer_options {
31 MRST_TIMER_DEFAULT, 36 MRST_TIMER_DEFAULT,
32 MRST_TIMER_APBT_ONLY, 37 MRST_TIMER_APBT_ONLY,
diff --git a/arch/x86/kernel/mrst.c b/arch/x86/kernel/mrst.c
index 636b53bd4198..967f2686adb0 100644
--- a/arch/x86/kernel/mrst.c
+++ b/arch/x86/kernel/mrst.c
@@ -50,7 +50,8 @@ int mrst_timer_options __cpuinitdata;
50 50
51static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM]; 51static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
52static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM]; 52static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
53static int mrst_cpu_chip; 53enum mrst_cpu_type __mrst_cpu_chip;
54EXPORT_SYMBOL_GPL(__mrst_cpu_chip);
54 55
55int sfi_mtimer_num; 56int sfi_mtimer_num;
56 57
@@ -233,25 +234,19 @@ void __init mrst_rtc_init(void)
233 sfi_table_parse(SFI_SIG_MRTC, NULL, NULL, sfi_parse_mrtc); 234 sfi_table_parse(SFI_SIG_MRTC, NULL, NULL, sfi_parse_mrtc);
234} 235}
235 236
236int mrst_identify_cpu(void)
237{
238 return mrst_cpu_chip;
239}
240EXPORT_SYMBOL_GPL(mrst_identify_cpu);
241
242void __cpuinit mrst_arch_setup(void) 237void __cpuinit mrst_arch_setup(void)
243{ 238{
244 if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27) 239 if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27)
245 mrst_cpu_chip = MRST_CPU_CHIP_PENWELL; 240 __mrst_cpu_chip = MRST_CPU_CHIP_PENWELL;
246 else if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x26) 241 else if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x26)
247 mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; 242 __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT;
248 else { 243 else {
249 pr_err("Unknown Moorestown CPU (%d:%d), default to Lincroft\n", 244 pr_err("Unknown Moorestown CPU (%d:%d), default to Lincroft\n",
250 boot_cpu_data.x86, boot_cpu_data.x86_model); 245 boot_cpu_data.x86, boot_cpu_data.x86_model);
251 mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; 246 __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT;
252 } 247 }
253 pr_debug("Moorestown CPU %s identified\n", 248 pr_debug("Moorestown CPU %s identified\n",
254 (mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) ? 249 (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) ?
255 "Lincroft" : "Penwell"); 250 "Lincroft" : "Penwell");
256} 251}
257 252