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authorBjorn Helgaas <bhelgaas@google.com>2013-12-18 16:04:29 -0500
committerBjorn Helgaas <bhelgaas@google.com>2013-12-18 16:04:29 -0500
commita737f76baee3d44cb25285986812e9cd97fd6002 (patch)
treecca60bf6d4ec750b744838babfc733eaa3bebd02
parent765147f85a79aba1ba2a45b42eee00e63f783bc9 (diff)
parentaf9ab791e34147952a8b97c998fa257d8292c5d6 (diff)
Merge branch 'pci/pciehp' into next
* pci/pciehp: PCI: pciehp: Move Attention & Power Indicator support tests to accessors PCI: pciehp: Use symbolic constants for Slot Control fields PCI: pciehp: Use symbolic constants, not hard-coded bitmask PCI: pciehp: Simplify "Power Fault Detected" checking/clearing PCI: pciehp: Announce slot capabilities (slot #, button, LEDs, etc) PCI: pciehp: Make various functions void since they can't fail PCI: pciehp: Remove error checks when accessing PCIe Capability PCI: pciehp: Drop pciehp_readw()/pciehp_writew() wrappers
-rw-r--r--drivers/pci/hotplug/pciehp.h14
-rw-r--r--drivers/pci/hotplug/pciehp_core.c15
-rw-r--r--drivers/pci/hotplug/pciehp_ctrl.c90
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c380
-rw-r--r--drivers/pci/hotplug/pciehp_pci.c6
-rw-r--r--include/uapi/linux/pci_regs.h8
6 files changed, 185 insertions, 328 deletions
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index 21e865ded1dc..ffe6a6b336cf 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -140,15 +140,15 @@ struct controller *pcie_init(struct pcie_device *dev);
140int pcie_init_notification(struct controller *ctrl); 140int pcie_init_notification(struct controller *ctrl);
141int pciehp_enable_slot(struct slot *p_slot); 141int pciehp_enable_slot(struct slot *p_slot);
142int pciehp_disable_slot(struct slot *p_slot); 142int pciehp_disable_slot(struct slot *p_slot);
143int pcie_enable_notification(struct controller *ctrl); 143void pcie_enable_notification(struct controller *ctrl);
144int pciehp_power_on_slot(struct slot *slot); 144int pciehp_power_on_slot(struct slot *slot);
145int pciehp_power_off_slot(struct slot *slot); 145void pciehp_power_off_slot(struct slot *slot);
146int pciehp_get_power_status(struct slot *slot, u8 *status); 146void pciehp_get_power_status(struct slot *slot, u8 *status);
147int pciehp_get_attention_status(struct slot *slot, u8 *status); 147void pciehp_get_attention_status(struct slot *slot, u8 *status);
148 148
149int pciehp_set_attention_status(struct slot *slot, u8 status); 149void pciehp_set_attention_status(struct slot *slot, u8 status);
150int pciehp_get_latch_status(struct slot *slot, u8 *status); 150void pciehp_get_latch_status(struct slot *slot, u8 *status);
151int pciehp_get_adapter_status(struct slot *slot, u8 *status); 151void pciehp_get_adapter_status(struct slot *slot, u8 *status);
152int pciehp_query_power_fault(struct slot *slot); 152int pciehp_query_power_fault(struct slot *slot);
153void pciehp_green_led_on(struct slot *slot); 153void pciehp_green_led_on(struct slot *slot);
154void pciehp_green_led_off(struct slot *slot); 154void pciehp_green_led_off(struct slot *slot);
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index bbd48bbe4e9b..143a389d81fa 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -160,7 +160,8 @@ static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
160 ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n", 160 ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
161 __func__, slot_name(slot)); 161 __func__, slot_name(slot));
162 162
163 return pciehp_set_attention_status(slot, status); 163 pciehp_set_attention_status(slot, status);
164 return 0;
164} 165}
165 166
166 167
@@ -192,7 +193,8 @@ static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
192 ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n", 193 ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
193 __func__, slot_name(slot)); 194 __func__, slot_name(slot));
194 195
195 return pciehp_get_power_status(slot, value); 196 pciehp_get_power_status(slot, value);
197 return 0;
196} 198}
197 199
198static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value) 200static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
@@ -202,7 +204,8 @@ static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
202 ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n", 204 ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
203 __func__, slot_name(slot)); 205 __func__, slot_name(slot));
204 206
205 return pciehp_get_attention_status(slot, value); 207 pciehp_get_attention_status(slot, value);
208 return 0;
206} 209}
207 210
208static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value) 211static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
@@ -212,7 +215,8 @@ static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
212 ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n", 215 ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
213 __func__, slot_name(slot)); 216 __func__, slot_name(slot));
214 217
215 return pciehp_get_latch_status(slot, value); 218 pciehp_get_latch_status(slot, value);
219 return 0;
216} 220}
217 221
218static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value) 222static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
@@ -222,7 +226,8 @@ static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
222 ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n", 226 ctrl_dbg(slot->ctrl, "%s: physical_slot = %s\n",
223 __func__, slot_name(slot)); 227 __func__, slot_name(slot));
224 228
225 return pciehp_get_adapter_status(slot, value); 229 pciehp_get_adapter_status(slot, value);
230 return 0;
226} 231}
227 232
228static int reset_slot(struct hotplug_slot *hotplug_slot, int probe) 233static int reset_slot(struct hotplug_slot *hotplug_slot, int probe)
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c
index 38f018679175..50628487597d 100644
--- a/drivers/pci/hotplug/pciehp_ctrl.c
+++ b/drivers/pci/hotplug/pciehp_ctrl.c
@@ -158,11 +158,8 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot)
158{ 158{
159 /* turn off slot, turn on Amber LED, turn off Green LED if supported*/ 159 /* turn off slot, turn on Amber LED, turn off Green LED if supported*/
160 if (POWER_CTRL(ctrl)) { 160 if (POWER_CTRL(ctrl)) {
161 if (pciehp_power_off_slot(pslot)) { 161 pciehp_power_off_slot(pslot);
162 ctrl_err(ctrl, 162
163 "Issue of Slot Power Off command failed\n");
164 return;
165 }
166 /* 163 /*
167 * After turning power off, we must wait for at least 1 second 164 * After turning power off, we must wait for at least 1 second
168 * before taking any action that relies on power having been 165 * before taking any action that relies on power having been
@@ -171,16 +168,8 @@ static void set_slot_off(struct controller *ctrl, struct slot * pslot)
171 msleep(1000); 168 msleep(1000);
172 } 169 }
173 170
174 if (PWR_LED(ctrl)) 171 pciehp_green_led_off(pslot);
175 pciehp_green_led_off(pslot); 172 pciehp_set_attention_status(pslot, 1);
176
177 if (ATTN_LED(ctrl)) {
178 if (pciehp_set_attention_status(pslot, 1)) {
179 ctrl_err(ctrl,
180 "Issue of Set Attention Led command failed\n");
181 return;
182 }
183 }
184} 173}
185 174
186/** 175/**
@@ -203,8 +192,7 @@ static int board_added(struct slot *p_slot)
203 return retval; 192 return retval;
204 } 193 }
205 194
206 if (PWR_LED(ctrl)) 195 pciehp_green_led_blink(p_slot);
207 pciehp_green_led_blink(p_slot);
208 196
209 /* Check link training status */ 197 /* Check link training status */
210 retval = pciehp_check_link_status(ctrl); 198 retval = pciehp_check_link_status(ctrl);
@@ -227,9 +215,7 @@ static int board_added(struct slot *p_slot)
227 goto err_exit; 215 goto err_exit;
228 } 216 }
229 217
230 if (PWR_LED(ctrl)) 218 pciehp_green_led_on(p_slot);
231 pciehp_green_led_on(p_slot);
232
233 return 0; 219 return 0;
234 220
235err_exit: 221err_exit:
@@ -243,7 +229,7 @@ err_exit:
243 */ 229 */
244static int remove_board(struct slot *p_slot) 230static int remove_board(struct slot *p_slot)
245{ 231{
246 int retval = 0; 232 int retval;
247 struct controller *ctrl = p_slot->ctrl; 233 struct controller *ctrl = p_slot->ctrl;
248 234
249 retval = pciehp_unconfigure_device(p_slot); 235 retval = pciehp_unconfigure_device(p_slot);
@@ -251,13 +237,8 @@ static int remove_board(struct slot *p_slot)
251 return retval; 237 return retval;
252 238
253 if (POWER_CTRL(ctrl)) { 239 if (POWER_CTRL(ctrl)) {
254 /* power off slot */ 240 pciehp_power_off_slot(p_slot);
255 retval = pciehp_power_off_slot(p_slot); 241
256 if (retval) {
257 ctrl_err(ctrl,
258 "Issue of Slot Disable command failed\n");
259 return retval;
260 }
261 /* 242 /*
262 * After turning power off, we must wait for at least 1 second 243 * After turning power off, we must wait for at least 1 second
263 * before taking any action that relies on power having been 244 * before taking any action that relies on power having been
@@ -267,9 +248,7 @@ static int remove_board(struct slot *p_slot)
267 } 248 }
268 249
269 /* turn off Green LED */ 250 /* turn off Green LED */
270 if (PWR_LED(ctrl)) 251 pciehp_green_led_off(p_slot);
271 pciehp_green_led_off(p_slot);
272
273 return 0; 252 return 0;
274} 253}
275 254
@@ -305,7 +284,7 @@ static void pciehp_power_thread(struct work_struct *work)
305 break; 284 break;
306 case POWERON_STATE: 285 case POWERON_STATE:
307 mutex_unlock(&p_slot->lock); 286 mutex_unlock(&p_slot->lock);
308 if (pciehp_enable_slot(p_slot) && PWR_LED(p_slot->ctrl)) 287 if (pciehp_enable_slot(p_slot))
309 pciehp_green_led_off(p_slot); 288 pciehp_green_led_off(p_slot);
310 mutex_lock(&p_slot->lock); 289 mutex_lock(&p_slot->lock);
311 p_slot->state = STATIC_STATE; 290 p_slot->state = STATIC_STATE;
@@ -372,11 +351,8 @@ static void handle_button_press_event(struct slot *p_slot)
372 "press.\n", slot_name(p_slot)); 351 "press.\n", slot_name(p_slot));
373 } 352 }
374 /* blink green LED and turn off amber */ 353 /* blink green LED and turn off amber */
375 if (PWR_LED(ctrl)) 354 pciehp_green_led_blink(p_slot);
376 pciehp_green_led_blink(p_slot); 355 pciehp_set_attention_status(p_slot, 0);
377 if (ATTN_LED(ctrl))
378 pciehp_set_attention_status(p_slot, 0);
379
380 queue_delayed_work(p_slot->wq, &p_slot->work, 5*HZ); 356 queue_delayed_work(p_slot->wq, &p_slot->work, 5*HZ);
381 break; 357 break;
382 case BLINKINGOFF_STATE: 358 case BLINKINGOFF_STATE:
@@ -389,14 +365,11 @@ static void handle_button_press_event(struct slot *p_slot)
389 ctrl_info(ctrl, "Button cancel on Slot(%s)\n", slot_name(p_slot)); 365 ctrl_info(ctrl, "Button cancel on Slot(%s)\n", slot_name(p_slot));
390 cancel_delayed_work(&p_slot->work); 366 cancel_delayed_work(&p_slot->work);
391 if (p_slot->state == BLINKINGOFF_STATE) { 367 if (p_slot->state == BLINKINGOFF_STATE) {
392 if (PWR_LED(ctrl)) 368 pciehp_green_led_on(p_slot);
393 pciehp_green_led_on(p_slot);
394 } else { 369 } else {
395 if (PWR_LED(ctrl)) 370 pciehp_green_led_off(p_slot);
396 pciehp_green_led_off(p_slot);
397 } 371 }
398 if (ATTN_LED(ctrl)) 372 pciehp_set_attention_status(p_slot, 0);
399 pciehp_set_attention_status(p_slot, 0);
400 ctrl_info(ctrl, "PCI slot #%s - action canceled " 373 ctrl_info(ctrl, "PCI slot #%s - action canceled "
401 "due to button press\n", slot_name(p_slot)); 374 "due to button press\n", slot_name(p_slot));
402 p_slot->state = STATIC_STATE; 375 p_slot->state = STATIC_STATE;
@@ -456,10 +429,8 @@ static void interrupt_event_handler(struct work_struct *work)
456 case INT_POWER_FAULT: 429 case INT_POWER_FAULT:
457 if (!POWER_CTRL(ctrl)) 430 if (!POWER_CTRL(ctrl))
458 break; 431 break;
459 if (ATTN_LED(ctrl)) 432 pciehp_set_attention_status(p_slot, 1);
460 pciehp_set_attention_status(p_slot, 1); 433 pciehp_green_led_off(p_slot);
461 if (PWR_LED(ctrl))
462 pciehp_green_led_off(p_slot);
463 break; 434 break;
464 case INT_PRESENCE_ON: 435 case INT_PRESENCE_ON:
465 case INT_PRESENCE_OFF: 436 case INT_PRESENCE_OFF:
@@ -482,14 +453,14 @@ int pciehp_enable_slot(struct slot *p_slot)
482 int rc; 453 int rc;
483 struct controller *ctrl = p_slot->ctrl; 454 struct controller *ctrl = p_slot->ctrl;
484 455
485 rc = pciehp_get_adapter_status(p_slot, &getstatus); 456 pciehp_get_adapter_status(p_slot, &getstatus);
486 if (rc || !getstatus) { 457 if (!getstatus) {
487 ctrl_info(ctrl, "No adapter on slot(%s)\n", slot_name(p_slot)); 458 ctrl_info(ctrl, "No adapter on slot(%s)\n", slot_name(p_slot));
488 return -ENODEV; 459 return -ENODEV;
489 } 460 }
490 if (MRL_SENS(p_slot->ctrl)) { 461 if (MRL_SENS(p_slot->ctrl)) {
491 rc = pciehp_get_latch_status(p_slot, &getstatus); 462 pciehp_get_latch_status(p_slot, &getstatus);
492 if (rc || getstatus) { 463 if (getstatus) {
493 ctrl_info(ctrl, "Latch open on slot(%s)\n", 464 ctrl_info(ctrl, "Latch open on slot(%s)\n",
494 slot_name(p_slot)); 465 slot_name(p_slot));
495 return -ENODEV; 466 return -ENODEV;
@@ -497,8 +468,8 @@ int pciehp_enable_slot(struct slot *p_slot)
497 } 468 }
498 469
499 if (POWER_CTRL(p_slot->ctrl)) { 470 if (POWER_CTRL(p_slot->ctrl)) {
500 rc = pciehp_get_power_status(p_slot, &getstatus); 471 pciehp_get_power_status(p_slot, &getstatus);
501 if (rc || getstatus) { 472 if (getstatus) {
502 ctrl_info(ctrl, "Already enabled on slot(%s)\n", 473 ctrl_info(ctrl, "Already enabled on slot(%s)\n",
503 slot_name(p_slot)); 474 slot_name(p_slot));
504 return -EINVAL; 475 return -EINVAL;
@@ -518,15 +489,14 @@ int pciehp_enable_slot(struct slot *p_slot)
518int pciehp_disable_slot(struct slot *p_slot) 489int pciehp_disable_slot(struct slot *p_slot)
519{ 490{
520 u8 getstatus = 0; 491 u8 getstatus = 0;
521 int ret = 0;
522 struct controller *ctrl = p_slot->ctrl; 492 struct controller *ctrl = p_slot->ctrl;
523 493
524 if (!p_slot->ctrl) 494 if (!p_slot->ctrl)
525 return 1; 495 return 1;
526 496
527 if (!HP_SUPR_RM(p_slot->ctrl)) { 497 if (!HP_SUPR_RM(p_slot->ctrl)) {
528 ret = pciehp_get_adapter_status(p_slot, &getstatus); 498 pciehp_get_adapter_status(p_slot, &getstatus);
529 if (ret || !getstatus) { 499 if (!getstatus) {
530 ctrl_info(ctrl, "No adapter on slot(%s)\n", 500 ctrl_info(ctrl, "No adapter on slot(%s)\n",
531 slot_name(p_slot)); 501 slot_name(p_slot));
532 return -ENODEV; 502 return -ENODEV;
@@ -534,8 +504,8 @@ int pciehp_disable_slot(struct slot *p_slot)
534 } 504 }
535 505
536 if (MRL_SENS(p_slot->ctrl)) { 506 if (MRL_SENS(p_slot->ctrl)) {
537 ret = pciehp_get_latch_status(p_slot, &getstatus); 507 pciehp_get_latch_status(p_slot, &getstatus);
538 if (ret || getstatus) { 508 if (getstatus) {
539 ctrl_info(ctrl, "Latch open on slot(%s)\n", 509 ctrl_info(ctrl, "Latch open on slot(%s)\n",
540 slot_name(p_slot)); 510 slot_name(p_slot));
541 return -ENODEV; 511 return -ENODEV;
@@ -543,8 +513,8 @@ int pciehp_disable_slot(struct slot *p_slot)
543 } 513 }
544 514
545 if (POWER_CTRL(p_slot->ctrl)) { 515 if (POWER_CTRL(p_slot->ctrl)) {
546 ret = pciehp_get_power_status(p_slot, &getstatus); 516 pciehp_get_power_status(p_slot, &getstatus);
547 if (ret || !getstatus) { 517 if (!getstatus) {
548 ctrl_info(ctrl, "Already disabled on slot(%s)\n", 518 ctrl_info(ctrl, "Already disabled on slot(%s)\n",
549 slot_name(p_slot)); 519 slot_name(p_slot));
550 return -EINVAL; 520 return -EINVAL;
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 3eea3fdd4b0b..14acfccb7670 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -41,34 +41,11 @@
41#include "../pci.h" 41#include "../pci.h"
42#include "pciehp.h" 42#include "pciehp.h"
43 43
44static inline int pciehp_readw(struct controller *ctrl, int reg, u16 *value) 44static inline struct pci_dev *ctrl_dev(struct controller *ctrl)
45{ 45{
46 struct pci_dev *dev = ctrl->pcie->port; 46 return ctrl->pcie->port;
47 return pcie_capability_read_word(dev, reg, value);
48} 47}
49 48
50static inline int pciehp_readl(struct controller *ctrl, int reg, u32 *value)
51{
52 struct pci_dev *dev = ctrl->pcie->port;
53 return pcie_capability_read_dword(dev, reg, value);
54}
55
56static inline int pciehp_writew(struct controller *ctrl, int reg, u16 value)
57{
58 struct pci_dev *dev = ctrl->pcie->port;
59 return pcie_capability_write_word(dev, reg, value);
60}
61
62static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value)
63{
64 struct pci_dev *dev = ctrl->pcie->port;
65 return pcie_capability_write_dword(dev, reg, value);
66}
67
68/* Power Control Command */
69#define POWER_ON 0
70#define POWER_OFF PCI_EXP_SLTCTL_PCC
71
72static irqreturn_t pcie_isr(int irq, void *dev_id); 49static irqreturn_t pcie_isr(int irq, void *dev_id);
73static void start_int_poll_timer(struct controller *ctrl, int sec); 50static void start_int_poll_timer(struct controller *ctrl, int sec);
74 51
@@ -129,20 +106,23 @@ static inline void pciehp_free_irq(struct controller *ctrl)
129 106
130static int pcie_poll_cmd(struct controller *ctrl) 107static int pcie_poll_cmd(struct controller *ctrl)
131{ 108{
109 struct pci_dev *pdev = ctrl_dev(ctrl);
132 u16 slot_status; 110 u16 slot_status;
133 int err, timeout = 1000; 111 int timeout = 1000;
134 112
135 err = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); 113 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
136 if (!err && (slot_status & PCI_EXP_SLTSTA_CC)) { 114 if (slot_status & PCI_EXP_SLTSTA_CC) {
137 pciehp_writew(ctrl, PCI_EXP_SLTSTA, PCI_EXP_SLTSTA_CC); 115 pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
116 PCI_EXP_SLTSTA_CC);
138 return 1; 117 return 1;
139 } 118 }
140 while (timeout > 0) { 119 while (timeout > 0) {
141 msleep(10); 120 msleep(10);
142 timeout -= 10; 121 timeout -= 10;
143 err = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); 122 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
144 if (!err && (slot_status & PCI_EXP_SLTSTA_CC)) { 123 if (slot_status & PCI_EXP_SLTSTA_CC) {
145 pciehp_writew(ctrl, PCI_EXP_SLTSTA, PCI_EXP_SLTSTA_CC); 124 pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
125 PCI_EXP_SLTSTA_CC);
146 return 1; 126 return 1;
147 } 127 }
148 } 128 }
@@ -169,21 +149,15 @@ static void pcie_wait_cmd(struct controller *ctrl, int poll)
169 * @cmd: command value written to slot control register 149 * @cmd: command value written to slot control register
170 * @mask: bitmask of slot control register to be modified 150 * @mask: bitmask of slot control register to be modified
171 */ 151 */
172static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) 152static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
173{ 153{
174 int retval = 0; 154 struct pci_dev *pdev = ctrl_dev(ctrl);
175 u16 slot_status; 155 u16 slot_status;
176 u16 slot_ctrl; 156 u16 slot_ctrl;
177 157
178 mutex_lock(&ctrl->ctrl_lock); 158 mutex_lock(&ctrl->ctrl_lock);
179 159
180 retval = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); 160 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
181 if (retval) {
182 ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n",
183 __func__);
184 goto out;
185 }
186
187 if (slot_status & PCI_EXP_SLTSTA_CC) { 161 if (slot_status & PCI_EXP_SLTSTA_CC) {
188 if (!ctrl->no_cmd_complete) { 162 if (!ctrl->no_cmd_complete) {
189 /* 163 /*
@@ -207,24 +181,17 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
207 } 181 }
208 } 182 }
209 183
210 retval = pciehp_readw(ctrl, PCI_EXP_SLTCTL, &slot_ctrl); 184 pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
211 if (retval) {
212 ctrl_err(ctrl, "%s: Cannot read SLOTCTRL register\n", __func__);
213 goto out;
214 }
215
216 slot_ctrl &= ~mask; 185 slot_ctrl &= ~mask;
217 slot_ctrl |= (cmd & mask); 186 slot_ctrl |= (cmd & mask);
218 ctrl->cmd_busy = 1; 187 ctrl->cmd_busy = 1;
219 smp_mb(); 188 smp_mb();
220 retval = pciehp_writew(ctrl, PCI_EXP_SLTCTL, slot_ctrl); 189 pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl);
221 if (retval)
222 ctrl_err(ctrl, "Cannot write to SLOTCTRL register\n");
223 190
224 /* 191 /*
225 * Wait for command completion. 192 * Wait for command completion.
226 */ 193 */
227 if (!retval && !ctrl->no_cmd_complete) { 194 if (!ctrl->no_cmd_complete) {
228 int poll = 0; 195 int poll = 0;
229 /* 196 /*
230 * if hotplug interrupt is not enabled or command 197 * if hotplug interrupt is not enabled or command
@@ -236,19 +203,16 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
236 poll = 1; 203 poll = 1;
237 pcie_wait_cmd(ctrl, poll); 204 pcie_wait_cmd(ctrl, poll);
238 } 205 }
239 out:
240 mutex_unlock(&ctrl->ctrl_lock); 206 mutex_unlock(&ctrl->ctrl_lock);
241 return retval;
242} 207}
243 208
244static bool check_link_active(struct controller *ctrl) 209static bool check_link_active(struct controller *ctrl)
245{ 210{
246 bool ret = false; 211 struct pci_dev *pdev = ctrl_dev(ctrl);
247 u16 lnk_status; 212 u16 lnk_status;
213 bool ret;
248 214
249 if (pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status)) 215 pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
250 return ret;
251
252 ret = !!(lnk_status & PCI_EXP_LNKSTA_DLLLA); 216 ret = !!(lnk_status & PCI_EXP_LNKSTA_DLLLA);
253 217
254 if (ret) 218 if (ret)
@@ -311,9 +275,9 @@ static bool pci_bus_check_dev(struct pci_bus *bus, int devfn)
311 275
312int pciehp_check_link_status(struct controller *ctrl) 276int pciehp_check_link_status(struct controller *ctrl)
313{ 277{
278 struct pci_dev *pdev = ctrl_dev(ctrl);
279 bool found;
314 u16 lnk_status; 280 u16 lnk_status;
315 int retval = 0;
316 bool found = false;
317 281
318 /* 282 /*
319 * Data Link Layer Link Active Reporting must be capable for 283 * Data Link Layer Link Active Reporting must be capable for
@@ -330,52 +294,37 @@ int pciehp_check_link_status(struct controller *ctrl)
330 found = pci_bus_check_dev(ctrl->pcie->port->subordinate, 294 found = pci_bus_check_dev(ctrl->pcie->port->subordinate,
331 PCI_DEVFN(0, 0)); 295 PCI_DEVFN(0, 0));
332 296
333 retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status); 297 pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
334 if (retval) {
335 ctrl_err(ctrl, "Cannot read LNKSTATUS register\n");
336 return retval;
337 }
338
339 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status); 298 ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status);
340 if ((lnk_status & PCI_EXP_LNKSTA_LT) || 299 if ((lnk_status & PCI_EXP_LNKSTA_LT) ||
341 !(lnk_status & PCI_EXP_LNKSTA_NLW)) { 300 !(lnk_status & PCI_EXP_LNKSTA_NLW)) {
342 ctrl_err(ctrl, "Link Training Error occurs \n"); 301 ctrl_err(ctrl, "Link Training Error occurs \n");
343 retval = -1; 302 return -1;
344 return retval;
345 } 303 }
346 304
347 pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status); 305 pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status);
348 306
349 if (!found && !retval) 307 if (!found)
350 retval = -1; 308 return -1;
351 309
352 return retval; 310 return 0;
353} 311}
354 312
355static int __pciehp_link_set(struct controller *ctrl, bool enable) 313static int __pciehp_link_set(struct controller *ctrl, bool enable)
356{ 314{
315 struct pci_dev *pdev = ctrl_dev(ctrl);
357 u16 lnk_ctrl; 316 u16 lnk_ctrl;
358 int retval = 0;
359 317
360 retval = pciehp_readw(ctrl, PCI_EXP_LNKCTL, &lnk_ctrl); 318 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &lnk_ctrl);
361 if (retval) {
362 ctrl_err(ctrl, "Cannot read LNKCTRL register\n");
363 return retval;
364 }
365 319
366 if (enable) 320 if (enable)
367 lnk_ctrl &= ~PCI_EXP_LNKCTL_LD; 321 lnk_ctrl &= ~PCI_EXP_LNKCTL_LD;
368 else 322 else
369 lnk_ctrl |= PCI_EXP_LNKCTL_LD; 323 lnk_ctrl |= PCI_EXP_LNKCTL_LD;
370 324
371 retval = pciehp_writew(ctrl, PCI_EXP_LNKCTL, lnk_ctrl); 325 pcie_capability_write_word(pdev, PCI_EXP_LNKCTL, lnk_ctrl);
372 if (retval) {
373 ctrl_err(ctrl, "Cannot write LNKCTRL register\n");
374 return retval;
375 }
376 ctrl_dbg(ctrl, "%s: lnk_ctrl = %x\n", __func__, lnk_ctrl); 326 ctrl_dbg(ctrl, "%s: lnk_ctrl = %x\n", __func__, lnk_ctrl);
377 327 return 0;
378 return retval;
379} 328}
380 329
381static int pciehp_link_enable(struct controller *ctrl) 330static int pciehp_link_enable(struct controller *ctrl)
@@ -388,223 +337,165 @@ static int pciehp_link_disable(struct controller *ctrl)
388 return __pciehp_link_set(ctrl, false); 337 return __pciehp_link_set(ctrl, false);
389} 338}
390 339
391int pciehp_get_attention_status(struct slot *slot, u8 *status) 340void pciehp_get_attention_status(struct slot *slot, u8 *status)
392{ 341{
393 struct controller *ctrl = slot->ctrl; 342 struct controller *ctrl = slot->ctrl;
343 struct pci_dev *pdev = ctrl_dev(ctrl);
394 u16 slot_ctrl; 344 u16 slot_ctrl;
395 u8 atten_led_state;
396 int retval = 0;
397
398 retval = pciehp_readw(ctrl, PCI_EXP_SLTCTL, &slot_ctrl);
399 if (retval) {
400 ctrl_err(ctrl, "%s: Cannot read SLOTCTRL register\n", __func__);
401 return retval;
402 }
403 345
346 pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
404 ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__, 347 ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__,
405 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); 348 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);
406 349
407 atten_led_state = (slot_ctrl & PCI_EXP_SLTCTL_AIC) >> 6; 350 switch (slot_ctrl & PCI_EXP_SLTCTL_AIC) {
408 351 case PCI_EXP_SLTCTL_ATTN_IND_ON:
409 switch (atten_led_state) {
410 case 0:
411 *status = 0xFF; /* Reserved */
412 break;
413 case 1:
414 *status = 1; /* On */ 352 *status = 1; /* On */
415 break; 353 break;
416 case 2: 354 case PCI_EXP_SLTCTL_ATTN_IND_BLINK:
417 *status = 2; /* Blink */ 355 *status = 2; /* Blink */
418 break; 356 break;
419 case 3: 357 case PCI_EXP_SLTCTL_ATTN_IND_OFF:
420 *status = 0; /* Off */ 358 *status = 0; /* Off */
421 break; 359 break;
422 default: 360 default:
423 *status = 0xFF; 361 *status = 0xFF;
424 break; 362 break;
425 } 363 }
426
427 return 0;
428} 364}
429 365
430int pciehp_get_power_status(struct slot *slot, u8 *status) 366void pciehp_get_power_status(struct slot *slot, u8 *status)
431{ 367{
432 struct controller *ctrl = slot->ctrl; 368 struct controller *ctrl = slot->ctrl;
369 struct pci_dev *pdev = ctrl_dev(ctrl);
433 u16 slot_ctrl; 370 u16 slot_ctrl;
434 u8 pwr_state;
435 int retval = 0;
436 371
437 retval = pciehp_readw(ctrl, PCI_EXP_SLTCTL, &slot_ctrl); 372 pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
438 if (retval) {
439 ctrl_err(ctrl, "%s: Cannot read SLOTCTRL register\n", __func__);
440 return retval;
441 }
442 ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__, 373 ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__,
443 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); 374 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);
444 375
445 pwr_state = (slot_ctrl & PCI_EXP_SLTCTL_PCC) >> 10; 376 switch (slot_ctrl & PCI_EXP_SLTCTL_PCC) {
446 377 case PCI_EXP_SLTCTL_PWR_ON:
447 switch (pwr_state) { 378 *status = 1; /* On */
448 case 0:
449 *status = 1;
450 break; 379 break;
451 case 1: 380 case PCI_EXP_SLTCTL_PWR_OFF:
452 *status = 0; 381 *status = 0; /* Off */
453 break; 382 break;
454 default: 383 default:
455 *status = 0xFF; 384 *status = 0xFF;
456 break; 385 break;
457 } 386 }
458
459 return retval;
460} 387}
461 388
462int pciehp_get_latch_status(struct slot *slot, u8 *status) 389void pciehp_get_latch_status(struct slot *slot, u8 *status)
463{ 390{
464 struct controller *ctrl = slot->ctrl; 391 struct pci_dev *pdev = ctrl_dev(slot->ctrl);
465 u16 slot_status; 392 u16 slot_status;
466 int retval;
467 393
468 retval = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); 394 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
469 if (retval) {
470 ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n",
471 __func__);
472 return retval;
473 }
474 *status = !!(slot_status & PCI_EXP_SLTSTA_MRLSS); 395 *status = !!(slot_status & PCI_EXP_SLTSTA_MRLSS);
475 return 0;
476} 396}
477 397
478int pciehp_get_adapter_status(struct slot *slot, u8 *status) 398void pciehp_get_adapter_status(struct slot *slot, u8 *status)
479{ 399{
480 struct controller *ctrl = slot->ctrl; 400 struct pci_dev *pdev = ctrl_dev(slot->ctrl);
481 u16 slot_status; 401 u16 slot_status;
482 int retval;
483 402
484 retval = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); 403 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
485 if (retval) {
486 ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n",
487 __func__);
488 return retval;
489 }
490 *status = !!(slot_status & PCI_EXP_SLTSTA_PDS); 404 *status = !!(slot_status & PCI_EXP_SLTSTA_PDS);
491 return 0;
492} 405}
493 406
494int pciehp_query_power_fault(struct slot *slot) 407int pciehp_query_power_fault(struct slot *slot)
495{ 408{
496 struct controller *ctrl = slot->ctrl; 409 struct pci_dev *pdev = ctrl_dev(slot->ctrl);
497 u16 slot_status; 410 u16 slot_status;
498 int retval;
499 411
500 retval = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); 412 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
501 if (retval) {
502 ctrl_err(ctrl, "Cannot check for power fault\n");
503 return retval;
504 }
505 return !!(slot_status & PCI_EXP_SLTSTA_PFD); 413 return !!(slot_status & PCI_EXP_SLTSTA_PFD);
506} 414}
507 415
508int pciehp_set_attention_status(struct slot *slot, u8 value) 416void pciehp_set_attention_status(struct slot *slot, u8 value)
509{ 417{
510 struct controller *ctrl = slot->ctrl; 418 struct controller *ctrl = slot->ctrl;
511 u16 slot_cmd; 419 u16 slot_cmd;
512 u16 cmd_mask;
513 420
514 cmd_mask = PCI_EXP_SLTCTL_AIC; 421 if (!ATTN_LED(ctrl))
422 return;
423
515 switch (value) { 424 switch (value) {
516 case 0 : /* turn off */ 425 case 0 : /* turn off */
517 slot_cmd = 0x00C0; 426 slot_cmd = PCI_EXP_SLTCTL_ATTN_IND_OFF;
518 break; 427 break;
519 case 1: /* turn on */ 428 case 1: /* turn on */
520 slot_cmd = 0x0040; 429 slot_cmd = PCI_EXP_SLTCTL_ATTN_IND_ON;
521 break; 430 break;
522 case 2: /* turn blink */ 431 case 2: /* turn blink */
523 slot_cmd = 0x0080; 432 slot_cmd = PCI_EXP_SLTCTL_ATTN_IND_BLINK;
524 break; 433 break;
525 default: 434 default:
526 return -EINVAL; 435 return;
527 } 436 }
528 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, 437 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
529 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); 438 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
530 return pcie_write_cmd(ctrl, slot_cmd, cmd_mask); 439 pcie_write_cmd(ctrl, slot_cmd, PCI_EXP_SLTCTL_AIC);
531} 440}
532 441
533void pciehp_green_led_on(struct slot *slot) 442void pciehp_green_led_on(struct slot *slot)
534{ 443{
535 struct controller *ctrl = slot->ctrl; 444 struct controller *ctrl = slot->ctrl;
536 u16 slot_cmd;
537 u16 cmd_mask;
538 445
539 slot_cmd = 0x0100; 446 if (!PWR_LED(ctrl))
540 cmd_mask = PCI_EXP_SLTCTL_PIC; 447 return;
541 pcie_write_cmd(ctrl, slot_cmd, cmd_mask); 448
449 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_IND_ON, PCI_EXP_SLTCTL_PIC);
542 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, 450 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
543 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); 451 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
452 PCI_EXP_SLTCTL_PWR_IND_ON);
544} 453}
545 454
546void pciehp_green_led_off(struct slot *slot) 455void pciehp_green_led_off(struct slot *slot)
547{ 456{
548 struct controller *ctrl = slot->ctrl; 457 struct controller *ctrl = slot->ctrl;
549 u16 slot_cmd;
550 u16 cmd_mask;
551 458
552 slot_cmd = 0x0300; 459 if (!PWR_LED(ctrl))
553 cmd_mask = PCI_EXP_SLTCTL_PIC; 460 return;
554 pcie_write_cmd(ctrl, slot_cmd, cmd_mask); 461
462 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_IND_OFF, PCI_EXP_SLTCTL_PIC);
555 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, 463 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
556 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); 464 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
465 PCI_EXP_SLTCTL_PWR_IND_OFF);
557} 466}
558 467
559void pciehp_green_led_blink(struct slot *slot) 468void pciehp_green_led_blink(struct slot *slot)
560{ 469{
561 struct controller *ctrl = slot->ctrl; 470 struct controller *ctrl = slot->ctrl;
562 u16 slot_cmd;
563 u16 cmd_mask;
564 471
565 slot_cmd = 0x0200; 472 if (!PWR_LED(ctrl))
566 cmd_mask = PCI_EXP_SLTCTL_PIC; 473 return;
567 pcie_write_cmd(ctrl, slot_cmd, cmd_mask); 474
475 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_IND_BLINK, PCI_EXP_SLTCTL_PIC);
568 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, 476 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
569 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); 477 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
478 PCI_EXP_SLTCTL_PWR_IND_BLINK);
570} 479}
571 480
572int pciehp_power_on_slot(struct slot * slot) 481int pciehp_power_on_slot(struct slot * slot)
573{ 482{
574 struct controller *ctrl = slot->ctrl; 483 struct controller *ctrl = slot->ctrl;
575 u16 slot_cmd; 484 struct pci_dev *pdev = ctrl_dev(ctrl);
576 u16 cmd_mask;
577 u16 slot_status; 485 u16 slot_status;
578 int retval = 0; 486 int retval;
579 487
580 /* Clear sticky power-fault bit from previous power failures */ 488 /* Clear sticky power-fault bit from previous power failures */
581 retval = pciehp_readw(ctrl, PCI_EXP_SLTSTA, &slot_status); 489 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
582 if (retval) { 490 if (slot_status & PCI_EXP_SLTSTA_PFD)
583 ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n", 491 pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
584 __func__); 492 PCI_EXP_SLTSTA_PFD);
585 return retval;
586 }
587 slot_status &= PCI_EXP_SLTSTA_PFD;
588 if (slot_status) {
589 retval = pciehp_writew(ctrl, PCI_EXP_SLTSTA, slot_status);
590 if (retval) {
591 ctrl_err(ctrl,
592 "%s: Cannot write to SLOTSTATUS register\n",
593 __func__);
594 return retval;
595 }
596 }
597 ctrl->power_fault_detected = 0; 493 ctrl->power_fault_detected = 0;
598 494
599 slot_cmd = POWER_ON; 495 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_ON, PCI_EXP_SLTCTL_PCC);
600 cmd_mask = PCI_EXP_SLTCTL_PCC;
601 retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
602 if (retval) {
603 ctrl_err(ctrl, "Write %x command failed!\n", slot_cmd);
604 return retval;
605 }
606 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, 496 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
607 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); 497 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
498 PCI_EXP_SLTCTL_PWR_ON);
608 499
609 retval = pciehp_link_enable(ctrl); 500 retval = pciehp_link_enable(ctrl);
610 if (retval) 501 if (retval)
@@ -613,12 +504,9 @@ int pciehp_power_on_slot(struct slot * slot)
613 return retval; 504 return retval;
614} 505}
615 506
616int pciehp_power_off_slot(struct slot * slot) 507void pciehp_power_off_slot(struct slot * slot)
617{ 508{
618 struct controller *ctrl = slot->ctrl; 509 struct controller *ctrl = slot->ctrl;
619 u16 slot_cmd;
620 u16 cmd_mask;
621 int retval;
622 510
623 /* Disable the link at first */ 511 /* Disable the link at first */
624 pciehp_link_disable(ctrl); 512 pciehp_link_disable(ctrl);
@@ -628,21 +516,16 @@ int pciehp_power_off_slot(struct slot * slot)
628 else 516 else
629 msleep(1000); 517 msleep(1000);
630 518
631 slot_cmd = POWER_OFF; 519 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC);
632 cmd_mask = PCI_EXP_SLTCTL_PCC;
633 retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
634 if (retval) {
635 ctrl_err(ctrl, "Write command failed!\n");
636 return retval;
637 }
638 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, 520 ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
639 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); 521 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
640 return 0; 522 PCI_EXP_SLTCTL_PWR_OFF);
641} 523}
642 524
643static irqreturn_t pcie_isr(int irq, void *dev_id) 525static irqreturn_t pcie_isr(int irq, void *dev_id)
644{ 526{
645 struct controller *ctrl = (struct controller *)dev_id; 527 struct controller *ctrl = (struct controller *)dev_id;
528 struct pci_dev *pdev = ctrl_dev(ctrl);
646 struct slot *slot = ctrl->slot; 529 struct slot *slot = ctrl->slot;
647 u16 detected, intr_loc; 530 u16 detected, intr_loc;
648 531
@@ -653,11 +536,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
653 */ 536 */
654 intr_loc = 0; 537 intr_loc = 0;
655 do { 538 do {
656 if (pciehp_readw(ctrl, PCI_EXP_SLTSTA, &detected)) { 539 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &detected);
657 ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS\n",
658 __func__);
659 return IRQ_NONE;
660 }
661 540
662 detected &= (PCI_EXP_SLTSTA_ABP | PCI_EXP_SLTSTA_PFD | 541 detected &= (PCI_EXP_SLTSTA_ABP | PCI_EXP_SLTSTA_PFD |
663 PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC | 542 PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC |
@@ -666,11 +545,9 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
666 intr_loc |= detected; 545 intr_loc |= detected;
667 if (!intr_loc) 546 if (!intr_loc)
668 return IRQ_NONE; 547 return IRQ_NONE;
669 if (detected && pciehp_writew(ctrl, PCI_EXP_SLTSTA, intr_loc)) { 548 if (detected)
670 ctrl_err(ctrl, "%s: Cannot write to SLOTSTATUS\n", 549 pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
671 __func__); 550 intr_loc);
672 return IRQ_NONE;
673 }
674 } while (detected); 551 } while (detected);
675 552
676 ctrl_dbg(ctrl, "%s: intr_loc %x\n", __func__, intr_loc); 553 ctrl_dbg(ctrl, "%s: intr_loc %x\n", __func__, intr_loc);
@@ -705,7 +582,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
705 return IRQ_HANDLED; 582 return IRQ_HANDLED;
706} 583}
707 584
708int pcie_enable_notification(struct controller *ctrl) 585void pcie_enable_notification(struct controller *ctrl)
709{ 586{
710 u16 cmd, mask; 587 u16 cmd, mask;
711 588
@@ -731,22 +608,18 @@ int pcie_enable_notification(struct controller *ctrl)
731 PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE | 608 PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE |
732 PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE); 609 PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE);
733 610
734 if (pcie_write_cmd(ctrl, cmd, mask)) { 611 pcie_write_cmd(ctrl, cmd, mask);
735 ctrl_err(ctrl, "Cannot enable software notification\n");
736 return -1;
737 }
738 return 0;
739} 612}
740 613
741static void pcie_disable_notification(struct controller *ctrl) 614static void pcie_disable_notification(struct controller *ctrl)
742{ 615{
743 u16 mask; 616 u16 mask;
617
744 mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE | 618 mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE |
745 PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE | 619 PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE |
746 PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE | 620 PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE |
747 PCI_EXP_SLTCTL_DLLSCE); 621 PCI_EXP_SLTCTL_DLLSCE);
748 if (pcie_write_cmd(ctrl, 0, mask)) 622 pcie_write_cmd(ctrl, 0, mask);
749 ctrl_warn(ctrl, "Cannot disable software notification\n");
750} 623}
751 624
752/* 625/*
@@ -758,6 +631,7 @@ static void pcie_disable_notification(struct controller *ctrl)
758int pciehp_reset_slot(struct slot *slot, int probe) 631int pciehp_reset_slot(struct slot *slot, int probe)
759{ 632{
760 struct controller *ctrl = slot->ctrl; 633 struct controller *ctrl = slot->ctrl;
634 struct pci_dev *pdev = ctrl_dev(ctrl);
761 635
762 if (probe) 636 if (probe)
763 return 0; 637 return 0;
@@ -771,7 +645,8 @@ int pciehp_reset_slot(struct slot *slot, int probe)
771 pci_reset_bridge_secondary_bus(ctrl->pcie->port); 645 pci_reset_bridge_secondary_bus(ctrl->pcie->port);
772 646
773 if (HP_SUPR_RM(ctrl)) { 647 if (HP_SUPR_RM(ctrl)) {
774 pciehp_writew(ctrl, PCI_EXP_SLTSTA, PCI_EXP_SLTSTA_PDC); 648 pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
649 PCI_EXP_SLTSTA_PDC);
775 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PDCE, PCI_EXP_SLTCTL_PDCE); 650 pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PDCE, PCI_EXP_SLTCTL_PDCE);
776 if (pciehp_poll_mode) 651 if (pciehp_poll_mode)
777 int_poll_timeout(ctrl->poll_timer.data); 652 int_poll_timeout(ctrl->poll_timer.data);
@@ -784,10 +659,7 @@ int pcie_init_notification(struct controller *ctrl)
784{ 659{
785 if (pciehp_request_irq(ctrl)) 660 if (pciehp_request_irq(ctrl))
786 return -1; 661 return -1;
787 if (pcie_enable_notification(ctrl)) { 662 pcie_enable_notification(ctrl);
788 pciehp_free_irq(ctrl);
789 return -1;
790 }
791 ctrl->notification_enabled = 1; 663 ctrl->notification_enabled = 1;
792 return 0; 664 return 0;
793} 665}
@@ -875,12 +747,14 @@ static inline void dbg_ctrl(struct controller *ctrl)
875 EMI(ctrl) ? "yes" : "no"); 747 EMI(ctrl) ? "yes" : "no");
876 ctrl_info(ctrl, " Command Completed : %3s\n", 748 ctrl_info(ctrl, " Command Completed : %3s\n",
877 NO_CMD_CMPL(ctrl) ? "no" : "yes"); 749 NO_CMD_CMPL(ctrl) ? "no" : "yes");
878 pciehp_readw(ctrl, PCI_EXP_SLTSTA, &reg16); 750 pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &reg16);
879 ctrl_info(ctrl, "Slot Status : 0x%04x\n", reg16); 751 ctrl_info(ctrl, "Slot Status : 0x%04x\n", reg16);
880 pciehp_readw(ctrl, PCI_EXP_SLTCTL, &reg16); 752 pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &reg16);
881 ctrl_info(ctrl, "Slot Control : 0x%04x\n", reg16); 753 ctrl_info(ctrl, "Slot Control : 0x%04x\n", reg16);
882} 754}
883 755
756#define FLAG(x,y) (((x) & (y)) ? '+' : '-')
757
884struct controller *pcie_init(struct pcie_device *dev) 758struct controller *pcie_init(struct pcie_device *dev)
885{ 759{
886 struct controller *ctrl; 760 struct controller *ctrl;
@@ -893,11 +767,7 @@ struct controller *pcie_init(struct pcie_device *dev)
893 goto abort; 767 goto abort;
894 } 768 }
895 ctrl->pcie = dev; 769 ctrl->pcie = dev;
896 if (pciehp_readl(ctrl, PCI_EXP_SLTCAP, &slot_cap)) { 770 pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &slot_cap);
897 ctrl_err(ctrl, "Cannot read SLOTCAP register\n");
898 goto abort_ctrl;
899 }
900
901 ctrl->slot_cap = slot_cap; 771 ctrl->slot_cap = slot_cap;
902 mutex_init(&ctrl->ctrl_lock); 772 mutex_init(&ctrl->ctrl_lock);
903 init_waitqueue_head(&ctrl->queue); 773 init_waitqueue_head(&ctrl->queue);
@@ -913,25 +783,31 @@ struct controller *pcie_init(struct pcie_device *dev)
913 ctrl->no_cmd_complete = 1; 783 ctrl->no_cmd_complete = 1;
914 784
915 /* Check if Data Link Layer Link Active Reporting is implemented */ 785 /* Check if Data Link Layer Link Active Reporting is implemented */
916 if (pciehp_readl(ctrl, PCI_EXP_LNKCAP, &link_cap)) { 786 pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);
917 ctrl_err(ctrl, "%s: Cannot read LNKCAP register\n", __func__);
918 goto abort_ctrl;
919 }
920 if (link_cap & PCI_EXP_LNKCAP_DLLLARC) { 787 if (link_cap & PCI_EXP_LNKCAP_DLLLARC) {
921 ctrl_dbg(ctrl, "Link Active Reporting supported\n"); 788 ctrl_dbg(ctrl, "Link Active Reporting supported\n");
922 ctrl->link_active_reporting = 1; 789 ctrl->link_active_reporting = 1;
923 } 790 }
924 791
925 /* Clear all remaining event bits in Slot Status register */ 792 /* Clear all remaining event bits in Slot Status register */
926 if (pciehp_writew(ctrl, PCI_EXP_SLTSTA, 0x1f)) 793 pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
927 goto abort_ctrl; 794 PCI_EXP_SLTSTA_ABP | PCI_EXP_SLTSTA_PFD |
795 PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC |
796 PCI_EXP_SLTSTA_CC);
928 797
929 /* Disable software notification */ 798 /* Disable software notification */
930 pcie_disable_notification(ctrl); 799 pcie_disable_notification(ctrl);
931 800
932 ctrl_info(ctrl, "HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n", 801 ctrl_info(ctrl, "Slot #%d AttnBtn%c AttnInd%c PwrInd%c PwrCtrl%c MRL%c Interlock%c NoCompl%c LLActRep%c\n",
933 pdev->vendor, pdev->device, pdev->subsystem_vendor, 802 (slot_cap & PCI_EXP_SLTCAP_PSN) >> 19,
934 pdev->subsystem_device); 803 FLAG(slot_cap, PCI_EXP_SLTCAP_ABP),
804 FLAG(slot_cap, PCI_EXP_SLTCAP_AIP),
805 FLAG(slot_cap, PCI_EXP_SLTCAP_PIP),
806 FLAG(slot_cap, PCI_EXP_SLTCAP_PCP),
807 FLAG(slot_cap, PCI_EXP_SLTCAP_MRLSP),
808 FLAG(slot_cap, PCI_EXP_SLTCAP_EIP),
809 FLAG(slot_cap, PCI_EXP_SLTCAP_NCCS),
810 FLAG(link_cap, PCI_EXP_LNKCAP_DLLLARC));
935 811
936 if (pcie_init_slot(ctrl)) 812 if (pcie_init_slot(ctrl))
937 goto abort_ctrl; 813 goto abort_ctrl;
diff --git a/drivers/pci/hotplug/pciehp_pci.c b/drivers/pci/hotplug/pciehp_pci.c
index 0e0d0f7f63fd..198355112ee7 100644
--- a/drivers/pci/hotplug/pciehp_pci.c
+++ b/drivers/pci/hotplug/pciehp_pci.c
@@ -78,7 +78,7 @@ int pciehp_configure_device(struct slot *p_slot)
78 78
79int pciehp_unconfigure_device(struct slot *p_slot) 79int pciehp_unconfigure_device(struct slot *p_slot)
80{ 80{
81 int ret, rc = 0; 81 int rc = 0;
82 u8 bctl = 0; 82 u8 bctl = 0;
83 u8 presence = 0; 83 u8 presence = 0;
84 struct pci_dev *dev, *temp; 84 struct pci_dev *dev, *temp;
@@ -88,9 +88,7 @@ int pciehp_unconfigure_device(struct slot *p_slot)
88 88
89 ctrl_dbg(ctrl, "%s: domain:bus:dev = %04x:%02x:00\n", 89 ctrl_dbg(ctrl, "%s: domain:bus:dev = %04x:%02x:00\n",
90 __func__, pci_domain_nr(parent), parent->number); 90 __func__, pci_domain_nr(parent), parent->number);
91 ret = pciehp_get_adapter_status(p_slot, &presence); 91 pciehp_get_adapter_status(p_slot, &presence);
92 if (ret)
93 presence = 0;
94 92
95 /* 93 /*
96 * Stopping an SR-IOV PF device removes all the associated VFs, 94 * Stopping an SR-IOV PF device removes all the associated VFs,
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 4a98e85438a7..6d03ba42ab23 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -518,8 +518,16 @@
518#define PCI_EXP_SLTCTL_CCIE 0x0010 /* Command Completed Interrupt Enable */ 518#define PCI_EXP_SLTCTL_CCIE 0x0010 /* Command Completed Interrupt Enable */
519#define PCI_EXP_SLTCTL_HPIE 0x0020 /* Hot-Plug Interrupt Enable */ 519#define PCI_EXP_SLTCTL_HPIE 0x0020 /* Hot-Plug Interrupt Enable */
520#define PCI_EXP_SLTCTL_AIC 0x00c0 /* Attention Indicator Control */ 520#define PCI_EXP_SLTCTL_AIC 0x00c0 /* Attention Indicator Control */
521#define PCI_EXP_SLTCTL_ATTN_IND_ON 0x0040 /* Attention Indicator on */
522#define PCI_EXP_SLTCTL_ATTN_IND_BLINK 0x0080 /* Attention Indicator blinking */
523#define PCI_EXP_SLTCTL_ATTN_IND_OFF 0x00c0 /* Attention Indicator off */
521#define PCI_EXP_SLTCTL_PIC 0x0300 /* Power Indicator Control */ 524#define PCI_EXP_SLTCTL_PIC 0x0300 /* Power Indicator Control */
525#define PCI_EXP_SLTCTL_PWR_IND_ON 0x0100 /* Power Indicator on */
526#define PCI_EXP_SLTCTL_PWR_IND_BLINK 0x0200 /* Power Indicator blinking */
527#define PCI_EXP_SLTCTL_PWR_IND_OFF 0x0300 /* Power Indicator off */
522#define PCI_EXP_SLTCTL_PCC 0x0400 /* Power Controller Control */ 528#define PCI_EXP_SLTCTL_PCC 0x0400 /* Power Controller Control */
529#define PCI_EXP_SLTCTL_PWR_ON 0x0000 /* Power On */
530#define PCI_EXP_SLTCTL_PWR_OFF 0x0400 /* Power Off */
523#define PCI_EXP_SLTCTL_EIC 0x0800 /* Electromechanical Interlock Control */ 531#define PCI_EXP_SLTCTL_EIC 0x0800 /* Electromechanical Interlock Control */
524#define PCI_EXP_SLTCTL_DLLSCE 0x1000 /* Data Link Layer State Changed Enable */ 532#define PCI_EXP_SLTCTL_DLLSCE 0x1000 /* Data Link Layer State Changed Enable */
525#define PCI_EXP_SLTSTA 26 /* Slot Status */ 533#define PCI_EXP_SLTSTA 26 /* Slot Status */