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authorKishon Vijay Abraham I <kishon@ti.com>2014-03-03 06:38:12 -0500
committerKishon Vijay Abraham I <kishon@ti.com>2014-03-06 04:19:33 -0500
commita70143bbef6bf06050c32a26d99e917b3e82deb7 (patch)
tree7d84ccb6eddc7768cb688600d7069193a54b9908
parent06c886a95cbb533fb3c4178ec0362460b17926ed (diff)
drivers: phy: usb3/pipe3: Adapt pipe3 driver to Generic PHY Framework
Adapted omap-usb3 PHY driver to Generic PHY Framework and moved phy-omap-usb3 driver in drivers/usb/phy to drivers/phy and also renamed the file to phy-ti-pipe3 since this same driver will be used for SATA PHY and PCIE PHY. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-rw-r--r--drivers/phy/Kconfig11
-rw-r--r--drivers/phy/Makefile1
-rw-r--r--drivers/phy/phy-ti-pipe3.c (renamed from drivers/usb/phy/phy-omap-usb3.c)240
-rw-r--r--drivers/usb/phy/Kconfig11
-rw-r--r--drivers/usb/phy/Makefile1
5 files changed, 158 insertions, 106 deletions
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index dc1756cf5d75..fde4192cc322 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -43,6 +43,17 @@ config OMAP_USB2
43 The USB OTG controller communicates with the comparator using this 43 The USB OTG controller communicates with the comparator using this
44 driver. 44 driver.
45 45
46config TI_PIPE3
47 tristate "TI PIPE3 PHY Driver"
48 depends on ARCH_OMAP2PLUS || COMPILE_TEST
49 select GENERIC_PHY
50 select OMAP_CONTROL_USB
51 help
52 Enable this to support the PIPE3 PHY that is part of TI SOCs. This
53 driver takes care of all the PHY functionality apart from comparator.
54 This driver interacts with the "OMAP Control PHY Driver" to power
55 on/off the PHY.
56
46config TWL4030_USB 57config TWL4030_USB
47 tristate "TWL4030 USB Transceiver Driver" 58 tristate "TWL4030 USB Transceiver Driver"
48 depends on TWL4030_CORE && REGULATOR_TWL4030 && USB_MUSB_OMAP2PLUS 59 depends on TWL4030_CORE && REGULATOR_TWL4030 && USB_MUSB_OMAP2PLUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 5d0b59edaf88..977a50ead5a4 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o
8obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o 8obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o
9obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o 9obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o
10obj-$(CONFIG_OMAP_USB2) += phy-omap-usb2.o 10obj-$(CONFIG_OMAP_USB2) += phy-omap-usb2.o
11obj-$(CONFIG_TI_PIPE3) += phy-ti-pipe3.o
11obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o 12obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o
12obj-$(CONFIG_PHY_EXYNOS5250_SATA) += phy-exynos5250-sata.o 13obj-$(CONFIG_PHY_EXYNOS5250_SATA) += phy-exynos5250-sata.o
13obj-$(CONFIG_PHY_SUN4I_USB) += phy-sun4i-usb.o 14obj-$(CONFIG_PHY_SUN4I_USB) += phy-sun4i-usb.o
diff --git a/drivers/usb/phy/phy-omap-usb3.c b/drivers/phy/phy-ti-pipe3.c
index 0c6ba29bdddd..c8d16746a5e2 100644
--- a/drivers/usb/phy/phy-omap-usb3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * omap-usb3 - USB PHY, talking to dwc3 controller in OMAP. 2 * phy-ti-pipe3 - PIPE3 PHY driver.
3 * 3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com 4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
@@ -19,10 +19,11 @@
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/slab.h> 21#include <linux/slab.h>
22#include <linux/usb/omap_usb.h> 22#include <linux/phy/phy.h>
23#include <linux/of.h> 23#include <linux/of.h>
24#include <linux/clk.h> 24#include <linux/clk.h>
25#include <linux/err.h> 25#include <linux/err.h>
26#include <linux/io.h>
26#include <linux/pm_runtime.h> 27#include <linux/pm_runtime.h>
27#include <linux/delay.h> 28#include <linux/delay.h>
28#include <linux/usb/omap_control_usb.h> 29#include <linux/usb/omap_control_usb.h>
@@ -52,17 +53,34 @@
52 53
53/* 54/*
54 * This is an Empirical value that works, need to confirm the actual 55 * This is an Empirical value that works, need to confirm the actual
55 * value required for the USB3PHY_PLL_CONFIGURATION2.PLL_IDLE status 56 * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
56 * to be correctly reflected in the USB3PHY_PLL_STATUS register. 57 * to be correctly reflected in the PIPE3PHY_PLL_STATUS register.
57 */ 58 */
58# define PLL_IDLE_TIME 100; 59# define PLL_IDLE_TIME 100;
59 60
60struct usb_dpll_map { 61struct pipe3_dpll_params {
62 u16 m;
63 u8 n;
64 u8 freq:3;
65 u8 sd;
66 u32 mf;
67};
68
69struct ti_pipe3 {
70 void __iomem *pll_ctrl_base;
71 struct device *dev;
72 struct device *control_dev;
73 struct clk *wkupclk;
74 struct clk *sys_clk;
75 struct clk *optclk;
76};
77
78struct pipe3_dpll_map {
61 unsigned long rate; 79 unsigned long rate;
62 struct usb_dpll_params params; 80 struct pipe3_dpll_params params;
63}; 81};
64 82
65static struct usb_dpll_map dpll_map[] = { 83static struct pipe3_dpll_map dpll_map[] = {
66 {12000000, {1250, 5, 4, 20, 0} }, /* 12 MHz */ 84 {12000000, {1250, 5, 4, 20, 0} }, /* 12 MHz */
67 {16800000, {3125, 20, 4, 20, 0} }, /* 16.8 MHz */ 85 {16800000, {3125, 20, 4, 20, 0} }, /* 16.8 MHz */
68 {19200000, {1172, 8, 4, 20, 65537} }, /* 19.2 MHz */ 86 {19200000, {1172, 8, 4, 20, 65537} }, /* 19.2 MHz */
@@ -71,7 +89,18 @@ static struct usb_dpll_map dpll_map[] = {
71 {38400000, {3125, 47, 4, 20, 92843} }, /* 38.4 MHz */ 89 {38400000, {3125, 47, 4, 20, 92843} }, /* 38.4 MHz */
72}; 90};
73 91
74static struct usb_dpll_params *omap_usb3_get_dpll_params(unsigned long rate) 92static inline u32 ti_pipe3_readl(void __iomem *addr, unsigned offset)
93{
94 return __raw_readl(addr + offset);
95}
96
97static inline void ti_pipe3_writel(void __iomem *addr, unsigned offset,
98 u32 data)
99{
100 __raw_writel(data, addr + offset);
101}
102
103static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(unsigned long rate)
75{ 104{
76 int i; 105 int i;
77 106
@@ -83,110 +112,123 @@ static struct usb_dpll_params *omap_usb3_get_dpll_params(unsigned long rate)
83 return NULL; 112 return NULL;
84} 113}
85 114
86static int omap_usb3_suspend(struct usb_phy *x, int suspend) 115static int ti_pipe3_power_off(struct phy *x)
116{
117 struct ti_pipe3 *phy = phy_get_drvdata(x);
118 int val;
119 int timeout = PLL_IDLE_TIME;
120
121 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
122 val |= PLL_IDLE;
123 ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
124
125 do {
126 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
127 if (val & PLL_TICOPWDN)
128 break;
129 udelay(5);
130 } while (--timeout);
131
132 if (!timeout) {
133 dev_err(phy->dev, "power off failed\n");
134 return -EBUSY;
135 }
136
137 omap_control_usb_phy_power(phy->control_dev, 0);
138
139 return 0;
140}
141
142static int ti_pipe3_power_on(struct phy *x)
87{ 143{
88 struct omap_usb *phy = phy_to_omapusb(x); 144 struct ti_pipe3 *phy = phy_get_drvdata(x);
89 int val; 145 int val;
90 int timeout = PLL_IDLE_TIME; 146 int timeout = PLL_IDLE_TIME;
91 147
92 if (suspend && !phy->is_suspended) { 148 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
93 val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2); 149 val &= ~PLL_IDLE;
94 val |= PLL_IDLE; 150 ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
95 omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val); 151
96 152 do {
97 do { 153 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
98 val = omap_usb_readl(phy->pll_ctrl_base, PLL_STATUS); 154 if (!(val & PLL_TICOPWDN))
99 if (val & PLL_TICOPWDN) 155 break;
100 break; 156 udelay(5);
101 udelay(1); 157 } while (--timeout);
102 } while (--timeout); 158
103 159 if (!timeout) {
104 omap_control_usb_phy_power(phy->control_dev, 0); 160 dev_err(phy->dev, "power on failed\n");
105 161 return -EBUSY;
106 phy->is_suspended = 1;
107 } else if (!suspend && phy->is_suspended) {
108 phy->is_suspended = 0;
109
110 val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
111 val &= ~PLL_IDLE;
112 omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
113
114 do {
115 val = omap_usb_readl(phy->pll_ctrl_base, PLL_STATUS);
116 if (!(val & PLL_TICOPWDN))
117 break;
118 udelay(1);
119 } while (--timeout);
120 } 162 }
121 163
122 return 0; 164 return 0;
123} 165}
124 166
125static void omap_usb_dpll_relock(struct omap_usb *phy) 167static void ti_pipe3_dpll_relock(struct ti_pipe3 *phy)
126{ 168{
127 u32 val; 169 u32 val;
128 unsigned long timeout; 170 unsigned long timeout;
129 171
130 omap_usb_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO); 172 ti_pipe3_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO);
131 173
132 timeout = jiffies + msecs_to_jiffies(20); 174 timeout = jiffies + msecs_to_jiffies(20);
133 do { 175 do {
134 val = omap_usb_readl(phy->pll_ctrl_base, PLL_STATUS); 176 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
135 if (val & PLL_LOCK) 177 if (val & PLL_LOCK)
136 break; 178 break;
137 } while (!WARN_ON(time_after(jiffies, timeout))); 179 } while (!WARN_ON(time_after(jiffies, timeout)));
138} 180}
139 181
140static int omap_usb_dpll_lock(struct omap_usb *phy) 182static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
141{ 183{
142 u32 val; 184 u32 val;
143 unsigned long rate; 185 unsigned long rate;
144 struct usb_dpll_params *dpll_params; 186 struct pipe3_dpll_params *dpll_params;
145 187
146 rate = clk_get_rate(phy->sys_clk); 188 rate = clk_get_rate(phy->sys_clk);
147 dpll_params = omap_usb3_get_dpll_params(rate); 189 dpll_params = ti_pipe3_get_dpll_params(rate);
148 if (!dpll_params) { 190 if (!dpll_params) {
149 dev_err(phy->dev, 191 dev_err(phy->dev,
150 "No DPLL configuration for %lu Hz SYS CLK\n", rate); 192 "No DPLL configuration for %lu Hz SYS CLK\n", rate);
151 return -EINVAL; 193 return -EINVAL;
152 } 194 }
153 195
154 val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1); 196 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
155 val &= ~PLL_REGN_MASK; 197 val &= ~PLL_REGN_MASK;
156 val |= dpll_params->n << PLL_REGN_SHIFT; 198 val |= dpll_params->n << PLL_REGN_SHIFT;
157 omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val); 199 ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
158 200
159 val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2); 201 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
160 val &= ~PLL_SELFREQDCO_MASK; 202 val &= ~PLL_SELFREQDCO_MASK;
161 val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT; 203 val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT;
162 omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val); 204 ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
163 205
164 val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1); 206 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
165 val &= ~PLL_REGM_MASK; 207 val &= ~PLL_REGM_MASK;
166 val |= dpll_params->m << PLL_REGM_SHIFT; 208 val |= dpll_params->m << PLL_REGM_SHIFT;
167 omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val); 209 ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
168 210
169 val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION4); 211 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION4);
170 val &= ~PLL_REGM_F_MASK; 212 val &= ~PLL_REGM_F_MASK;
171 val |= dpll_params->mf << PLL_REGM_F_SHIFT; 213 val |= dpll_params->mf << PLL_REGM_F_SHIFT;
172 omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION4, val); 214 ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION4, val);
173 215
174 val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION3); 216 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION3);
175 val &= ~PLL_SD_MASK; 217 val &= ~PLL_SD_MASK;
176 val |= dpll_params->sd << PLL_SD_SHIFT; 218 val |= dpll_params->sd << PLL_SD_SHIFT;
177 omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION3, val); 219 ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION3, val);
178 220
179 omap_usb_dpll_relock(phy); 221 ti_pipe3_dpll_relock(phy);
180 222
181 return 0; 223 return 0;
182} 224}
183 225
184static int omap_usb3_init(struct usb_phy *x) 226static int ti_pipe3_init(struct phy *x)
185{ 227{
186 struct omap_usb *phy = phy_to_omapusb(x); 228 struct ti_pipe3 *phy = phy_get_drvdata(x);
187 int ret; 229 int ret;
188 230
189 ret = omap_usb_dpll_lock(phy); 231 ret = ti_pipe3_dpll_lock(phy);
190 if (ret) 232 if (ret)
191 return ret; 233 return ret;
192 234
@@ -195,9 +237,18 @@ static int omap_usb3_init(struct usb_phy *x)
195 return 0; 237 return 0;
196} 238}
197 239
198static int omap_usb3_probe(struct platform_device *pdev) 240static struct phy_ops ops = {
241 .init = ti_pipe3_init,
242 .power_on = ti_pipe3_power_on,
243 .power_off = ti_pipe3_power_off,
244 .owner = THIS_MODULE,
245};
246
247static int ti_pipe3_probe(struct platform_device *pdev)
199{ 248{
200 struct omap_usb *phy; 249 struct ti_pipe3 *phy;
250 struct phy *generic_phy;
251 struct phy_provider *phy_provider;
201 struct resource *res; 252 struct resource *res;
202 struct device_node *node = pdev->dev.of_node; 253 struct device_node *node = pdev->dev.of_node;
203 struct device_node *control_node; 254 struct device_node *control_node;
@@ -208,7 +259,7 @@ static int omap_usb3_probe(struct platform_device *pdev)
208 259
209 phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); 260 phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);
210 if (!phy) { 261 if (!phy) {
211 dev_err(&pdev->dev, "unable to alloc mem for OMAP USB3 PHY\n"); 262 dev_err(&pdev->dev, "unable to alloc mem for TI PIPE3 PHY\n");
212 return -ENOMEM; 263 return -ENOMEM;
213 } 264 }
214 265
@@ -219,13 +270,6 @@ static int omap_usb3_probe(struct platform_device *pdev)
219 270
220 phy->dev = &pdev->dev; 271 phy->dev = &pdev->dev;
221 272
222 phy->phy.dev = phy->dev;
223 phy->phy.label = "omap-usb3";
224 phy->phy.init = omap_usb3_init;
225 phy->phy.set_suspend = omap_usb3_suspend;
226 phy->phy.type = USB_PHY_TYPE_USB3;
227
228 phy->is_suspended = 1;
229 phy->wkupclk = devm_clk_get(phy->dev, "usb_phy_cm_clk32k"); 273 phy->wkupclk = devm_clk_get(phy->dev, "usb_phy_cm_clk32k");
230 if (IS_ERR(phy->wkupclk)) { 274 if (IS_ERR(phy->wkupclk)) {
231 dev_err(&pdev->dev, "unable to get usb_phy_cm_clk32k\n"); 275 dev_err(&pdev->dev, "unable to get usb_phy_cm_clk32k\n");
@@ -251,6 +295,7 @@ static int omap_usb3_probe(struct platform_device *pdev)
251 dev_err(&pdev->dev, "Failed to get control device phandle\n"); 295 dev_err(&pdev->dev, "Failed to get control device phandle\n");
252 return -EINVAL; 296 return -EINVAL;
253 } 297 }
298
254 control_pdev = of_find_device_by_node(control_node); 299 control_pdev = of_find_device_by_node(control_node);
255 if (!control_pdev) { 300 if (!control_pdev) {
256 dev_err(&pdev->dev, "Failed to get control device\n"); 301 dev_err(&pdev->dev, "Failed to get control device\n");
@@ -260,23 +305,31 @@ static int omap_usb3_probe(struct platform_device *pdev)
260 phy->control_dev = &control_pdev->dev; 305 phy->control_dev = &control_pdev->dev;
261 306
262 omap_control_usb_phy_power(phy->control_dev, 0); 307 omap_control_usb_phy_power(phy->control_dev, 0);
263 usb_add_phy_dev(&phy->phy);
264 308
265 platform_set_drvdata(pdev, phy); 309 platform_set_drvdata(pdev, phy);
266
267 pm_runtime_enable(phy->dev); 310 pm_runtime_enable(phy->dev);
311
312 generic_phy = devm_phy_create(phy->dev, &ops, NULL);
313 if (IS_ERR(generic_phy))
314 return PTR_ERR(generic_phy);
315
316 phy_set_drvdata(generic_phy, phy);
317 phy_provider = devm_of_phy_provider_register(phy->dev,
318 of_phy_simple_xlate);
319 if (IS_ERR(phy_provider))
320 return PTR_ERR(phy_provider);
321
268 pm_runtime_get(&pdev->dev); 322 pm_runtime_get(&pdev->dev);
269 323
270 return 0; 324 return 0;
271} 325}
272 326
273static int omap_usb3_remove(struct platform_device *pdev) 327static int ti_pipe3_remove(struct platform_device *pdev)
274{ 328{
275 struct omap_usb *phy = platform_get_drvdata(pdev); 329 struct ti_pipe3 *phy = platform_get_drvdata(pdev);
276 330
277 clk_unprepare(phy->wkupclk); 331 clk_unprepare(phy->wkupclk);
278 clk_unprepare(phy->optclk); 332 clk_unprepare(phy->optclk);
279 usb_remove_phy(&phy->phy);
280 if (!pm_runtime_suspended(&pdev->dev)) 333 if (!pm_runtime_suspended(&pdev->dev))
281 pm_runtime_put(&pdev->dev); 334 pm_runtime_put(&pdev->dev);
282 pm_runtime_disable(&pdev->dev); 335 pm_runtime_disable(&pdev->dev);
@@ -286,10 +339,9 @@ static int omap_usb3_remove(struct platform_device *pdev)
286 339
287#ifdef CONFIG_PM_RUNTIME 340#ifdef CONFIG_PM_RUNTIME
288 341
289static int omap_usb3_runtime_suspend(struct device *dev) 342static int ti_pipe3_runtime_suspend(struct device *dev)
290{ 343{
291 struct platform_device *pdev = to_platform_device(dev); 344 struct ti_pipe3 *phy = dev_get_drvdata(dev);
292 struct omap_usb *phy = platform_get_drvdata(pdev);
293 345
294 clk_disable(phy->wkupclk); 346 clk_disable(phy->wkupclk);
295 clk_disable(phy->optclk); 347 clk_disable(phy->optclk);
@@ -297,11 +349,10 @@ static int omap_usb3_runtime_suspend(struct device *dev)
297 return 0; 349 return 0;
298} 350}
299 351
300static int omap_usb3_runtime_resume(struct device *dev) 352static int ti_pipe3_runtime_resume(struct device *dev)
301{ 353{
302 u32 ret = 0; 354 u32 ret = 0;
303 struct platform_device *pdev = to_platform_device(dev); 355 struct ti_pipe3 *phy = dev_get_drvdata(dev);
304 struct omap_usb *phy = platform_get_drvdata(pdev);
305 356
306 ret = clk_enable(phy->optclk); 357 ret = clk_enable(phy->optclk);
307 if (ret) { 358 if (ret) {
@@ -324,38 +375,39 @@ err1:
324 return ret; 375 return ret;
325} 376}
326 377
327static const struct dev_pm_ops omap_usb3_pm_ops = { 378static const struct dev_pm_ops ti_pipe3_pm_ops = {
328 SET_RUNTIME_PM_OPS(omap_usb3_runtime_suspend, omap_usb3_runtime_resume, 379 SET_RUNTIME_PM_OPS(ti_pipe3_runtime_suspend,
329 NULL) 380 ti_pipe3_runtime_resume, NULL)
330}; 381};
331 382
332#define DEV_PM_OPS (&omap_usb3_pm_ops) 383#define DEV_PM_OPS (&ti_pipe3_pm_ops)
333#else 384#else
334#define DEV_PM_OPS NULL 385#define DEV_PM_OPS NULL
335#endif 386#endif
336 387
337#ifdef CONFIG_OF 388#ifdef CONFIG_OF
338static const struct of_device_id omap_usb3_id_table[] = { 389static const struct of_device_id ti_pipe3_id_table[] = {
390 { .compatible = "ti,phy-usb3" },
339 { .compatible = "ti,omap-usb3" }, 391 { .compatible = "ti,omap-usb3" },
340 {} 392 {}
341}; 393};
342MODULE_DEVICE_TABLE(of, omap_usb3_id_table); 394MODULE_DEVICE_TABLE(of, ti_pipe3_id_table);
343#endif 395#endif
344 396
345static struct platform_driver omap_usb3_driver = { 397static struct platform_driver ti_pipe3_driver = {
346 .probe = omap_usb3_probe, 398 .probe = ti_pipe3_probe,
347 .remove = omap_usb3_remove, 399 .remove = ti_pipe3_remove,
348 .driver = { 400 .driver = {
349 .name = "omap-usb3", 401 .name = "ti-pipe3",
350 .owner = THIS_MODULE, 402 .owner = THIS_MODULE,
351 .pm = DEV_PM_OPS, 403 .pm = DEV_PM_OPS,
352 .of_match_table = of_match_ptr(omap_usb3_id_table), 404 .of_match_table = of_match_ptr(ti_pipe3_id_table),
353 }, 405 },
354}; 406};
355 407
356module_platform_driver(omap_usb3_driver); 408module_platform_driver(ti_pipe3_driver);
357 409
358MODULE_ALIAS("platform: omap_usb3"); 410MODULE_ALIAS("platform: ti_pipe3");
359MODULE_AUTHOR("Texas Instruments Inc."); 411MODULE_AUTHOR("Texas Instruments Inc.");
360MODULE_DESCRIPTION("OMAP USB3 phy driver"); 412MODULE_DESCRIPTION("TI PIPE3 phy driver");
361MODULE_LICENSE("GPL v2"); 413MODULE_LICENSE("GPL v2");
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 7d1451d5bbea..c337ba2d066b 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -85,17 +85,6 @@ config OMAP_CONTROL_USB
85 power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an 85 power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
86 additional register to power on USB3 PHY. 86 additional register to power on USB3 PHY.
87 87
88config OMAP_USB3
89 tristate "OMAP USB3 PHY Driver"
90 depends on ARCH_OMAP2PLUS || COMPILE_TEST
91 select OMAP_CONTROL_USB
92 select USB_PHY
93 help
94 Enable this to support the USB3 PHY that is part of SOC. This
95 driver takes care of all the PHY functionality apart from comparator.
96 This driver interacts with the "OMAP Control USB Driver" to power
97 on/off the PHY.
98
99config AM335X_CONTROL_USB 88config AM335X_CONTROL_USB
100 tristate 89 tristate
101 90
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index be58adae3496..15f1878388f4 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -17,7 +17,6 @@ obj-$(CONFIG_OMAP_CONTROL_USB) += phy-omap-control.o
17obj-$(CONFIG_AM335X_CONTROL_USB) += phy-am335x-control.o 17obj-$(CONFIG_AM335X_CONTROL_USB) += phy-am335x-control.o
18obj-$(CONFIG_AM335X_PHY_USB) += phy-am335x.o 18obj-$(CONFIG_AM335X_PHY_USB) += phy-am335x.o
19obj-$(CONFIG_OMAP_OTG) += phy-omap-otg.o 19obj-$(CONFIG_OMAP_OTG) += phy-omap-otg.o
20obj-$(CONFIG_OMAP_USB3) += phy-omap-usb3.o
21obj-$(CONFIG_SAMSUNG_USBPHY) += phy-samsung-usb.o 20obj-$(CONFIG_SAMSUNG_USBPHY) += phy-samsung-usb.o
22obj-$(CONFIG_SAMSUNG_USB2PHY) += phy-samsung-usb2.o 21obj-$(CONFIG_SAMSUNG_USB2PHY) += phy-samsung-usb2.o
23obj-$(CONFIG_SAMSUNG_USB3PHY) += phy-samsung-usb3.o 22obj-$(CONFIG_SAMSUNG_USB3PHY) += phy-samsung-usb3.o