diff options
| author | Michel Dänzer <michel.daenzer@amd.com> | 2015-02-03 20:19:51 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2015-02-11 12:01:33 -0500 |
| commit | a53fa43873b88bad15a2eb1f01dc5efa689625ce (patch) | |
| tree | 2513dcac20515684498f4530f8c834866125e480 | |
| parent | 082452e125fe27a9f43add2269dfa2341fb71d30 (diff) | |
drm/radeon: Don't try to enable write-combining without PAT
Doing so can cause things to become slow.
Print a warning at compile time and an informative message at runtime in
that case.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88758
Cc: stable@vger.kernel.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_object.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 1d955776f4d0..43e09942823e 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c | |||
| @@ -238,6 +238,18 @@ int radeon_bo_create(struct radeon_device *rdev, | |||
| 238 | * See https://bugs.freedesktop.org/show_bug.cgi?id=84627 | 238 | * See https://bugs.freedesktop.org/show_bug.cgi?id=84627 |
| 239 | */ | 239 | */ |
| 240 | bo->flags &= ~RADEON_GEM_GTT_WC; | 240 | bo->flags &= ~RADEON_GEM_GTT_WC; |
| 241 | #elif defined(CONFIG_X86) && !defined(CONFIG_X86_PAT) | ||
| 242 | /* Don't try to enable write-combining when it can't work, or things | ||
| 243 | * may be slow | ||
| 244 | * See https://bugs.freedesktop.org/show_bug.cgi?id=88758 | ||
| 245 | */ | ||
| 246 | |||
| 247 | #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \ | ||
| 248 | thanks to write-combining | ||
| 249 | |||
| 250 | DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for " | ||
| 251 | "better performance thanks to write-combining\n"); | ||
| 252 | bo->flags &= ~RADEON_GEM_GTT_WC; | ||
| 241 | #endif | 253 | #endif |
| 242 | 254 | ||
| 243 | radeon_ttm_placement_from_domain(bo, domain); | 255 | radeon_ttm_placement_from_domain(bo, domain); |
