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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2007-09-03 04:43:54 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-09-13 10:10:25 -0400
commita53d6fb83efc75bbd7876459e6e1291c4925103d (patch)
treeedf7d645e5b4254f19b6a60e803e1763b64846c9
parentc87ce65868bbf9bbea9c3f112ff8315302daf8f2 (diff)
[ARM] realview: disable second GIC on RevB MPCore platforms
The second GIC asserts a permanent interrupt on Rev.B MPCore platforms. Disable initialisation of this GIC to avoid unbootable systems. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-realview/realview_eb.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 3dba666151db..ecec2f85c4cd 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -165,7 +165,7 @@ static void __init gic_init_irq(void)
165#endif 165#endif
166 gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29); 166 gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
167 gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE)); 167 gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
168#ifdef CONFIG_REALVIEW_MPCORE 168#if defined(CONFIG_REALVIEW_MPCORE) && !defined(CONFIG_REALVIEW_MPCORE_REVB)
169 gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64); 169 gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64);
170 gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE)); 170 gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE));
171 gic_cascade_irq(1, IRQ_EB_IRQ1); 171 gic_cascade_irq(1, IRQ_EB_IRQ1);