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authorOlof Johansson <olof@lixom.net>2014-05-29 12:40:51 -0400
committerOlof Johansson <olof@lixom.net>2014-05-29 12:40:51 -0400
commita52d35c92d5d3b8890068860838541f7ad55cd29 (patch)
treee38e5467644ac1ff46c4678a26c08f6769d7db22
parent708cec66429cf1ad56d0e849acc3367e8469b1af (diff)
parentbe1f7c8d7e2bc8b8c76846aa6f276e8d2ef8975a (diff)
Merge tag 'samsung-cleanup' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup for v3.16" from Kukjin Kim: - use a common macro v7_exit_coherency_flush macro instead of local function - cleanup mach-exynos/Makefile and remove inclusion plat/cpu.h in mach-exynos - migrate exynos macros from plat-samsung to mach-exynos - cleanup s3c24xx debug macro/earlyprintk to remove arch dependency - fixed compilation error for cpufreq due to moving header in this branch : use of_machine_is_compatible() instead of soc_is_exynos...() Note that based on tags/samsung-clk and tags/samsung-fixes. * tag 'samsung-cleanup' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: cpufreq: exynos: Fix the compile error ARM: S3C24XX: move debug-macro.S into the common space ARM: S3C24XX: use generic DEBUG_UART_PHY/_VIRT in debug macro ARM: S3C24XX: trim down debug uart handling ARM: compressed/head.S: remove s3c24xx special case ARM: EXYNOS: Remove unnecessary inclusion of cpu.h ARM: EXYNOS: Migrate Exynos specific macros from plat to mach ARM: EXYNOS: Remove exynos_subsys registration ARM: EXYNOS: Remove duplicate lines in Makefile ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling ARM: dts: Remove g2d_pd node for exynos5420 ARM: dts: Remove mau_pd node for exynos5420 ARM: exynos_defconfig: enable HS-I2C to fix for mmc partition mount ARM: dts: disable MDMA1 node for exynos5420 ARM: EXYNOS: fix the secondary CPU boot of exynos4212 Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm/Kconfig.debug54
-rw-r--r--arch/arm/boot/compressed/head.S5
-rw-r--r--arch/arm/boot/dts/exynos5420-arndale-octa.dts12
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi18
-rw-r--r--arch/arm/configs/exynos_defconfig1
-rw-r--r--arch/arm/include/debug/s3c24xx.S46
-rw-r--r--arch/arm/mach-exynos/Makefile7
-rw-r--r--arch/arm/mach-exynos/common.h72
-rw-r--r--arch/arm/mach-exynos/cpuidle.c1
-rw-r--r--arch/arm/mach-exynos/exynos.c13
-rw-r--r--arch/arm/mach-exynos/firmware.c14
-rw-r--r--arch/arm/mach-exynos/hotplug.c65
-rw-r--r--arch/arm/mach-exynos/platsmp.c2
-rw-r--r--arch/arm/mach-exynos/pm.c1
-rw-r--r--arch/arm/mach-exynos/pmu.c2
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig28
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/debug-macro.S101
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h61
-rw-r--r--drivers/cpufreq/exynos-cpufreq.c19
-rw-r--r--drivers/cpufreq/exynos-cpufreq.h8
-rw-r--r--drivers/cpufreq/exynos4x12-cpufreq.c11
21 files changed, 219 insertions, 322 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index eab8ecbe69c1..4678870f8ee8 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -625,6 +625,7 @@ choice
625 config DEBUG_S3C_UART0 625 config DEBUG_S3C_UART0
626 depends on PLAT_SAMSUNG 626 depends on PLAT_SAMSUNG
627 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 627 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
628 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
628 bool "Use S3C UART 0 for low-level debug" 629 bool "Use S3C UART 0 for low-level debug"
629 help 630 help
630 Say Y here if you want the debug print routines to direct 631 Say Y here if you want the debug print routines to direct
@@ -637,6 +638,7 @@ choice
637 config DEBUG_S3C_UART1 638 config DEBUG_S3C_UART1
638 depends on PLAT_SAMSUNG 639 depends on PLAT_SAMSUNG
639 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 640 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
641 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
640 bool "Use S3C UART 1 for low-level debug" 642 bool "Use S3C UART 1 for low-level debug"
641 help 643 help
642 Say Y here if you want the debug print routines to direct 644 Say Y here if you want the debug print routines to direct
@@ -649,6 +651,7 @@ choice
649 config DEBUG_S3C_UART2 651 config DEBUG_S3C_UART2
650 depends on PLAT_SAMSUNG 652 depends on PLAT_SAMSUNG
651 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 653 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
654 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
652 bool "Use S3C UART 2 for low-level debug" 655 bool "Use S3C UART 2 for low-level debug"
653 help 656 help
654 Say Y here if you want the debug print routines to direct 657 Say Y here if you want the debug print routines to direct
@@ -670,6 +673,33 @@ choice
670 The uncompressor code port configuration is now handled 673 The uncompressor code port configuration is now handled
671 by CONFIG_S3C_LOWLEVEL_UART_PORT. 674 by CONFIG_S3C_LOWLEVEL_UART_PORT.
672 675
676 config DEBUG_S3C2410_UART0
677 depends on ARCH_S3C24XX
678 select DEBUG_S3C2410_UART
679 bool "Use S3C2410/S3C2412 UART 0 for low-level debug"
680 help
681 Say Y here if you want the debug print routines to direct
682 their output to UART 0. The port must have been initialised
683 by the boot-loader before use.
684
685 config DEBUG_S3C2410_UART1
686 depends on ARCH_S3C24XX
687 select DEBUG_S3C2410_UART
688 bool "Use S3C2410/S3C2412 UART 1 for low-level debug"
689 help
690 Say Y here if you want the debug print routines to direct
691 their output to UART 1. The port must have been initialised
692 by the boot-loader before use.
693
694 config DEBUG_S3C2410_UART2
695 depends on ARCH_S3C24XX
696 select DEBUG_S3C2410_UART
697 bool "Use S3C2410/S3C2412 UART 2 for low-level debug"
698 help
699 Say Y here if you want the debug print routines to direct
700 their output to UART 2. The port must have been initialised
701 by the boot-loader before use.
702
673 config DEBUG_SOCFPGA_UART 703 config DEBUG_SOCFPGA_UART
674 depends on ARCH_SOCFPGA 704 depends on ARCH_SOCFPGA
675 bool "Use SOCFPGA UART for low-level debug" 705 bool "Use SOCFPGA UART for low-level debug"
@@ -921,6 +951,13 @@ endchoice
921config DEBUG_EXYNOS_UART 951config DEBUG_EXYNOS_UART
922 bool 952 bool
923 953
954config DEBUG_S3C2410_UART
955 bool
956 select DEBUG_S3C24XX_UART
957
958config DEBUG_S3C24XX_UART
959 bool
960
924config DEBUG_OMAP2PLUS_UART 961config DEBUG_OMAP2PLUS_UART
925 bool 962 bool
926 depends on ARCH_OMAP2PLUS 963 depends on ARCH_OMAP2PLUS
@@ -973,6 +1010,7 @@ config DEBUG_LL_INCLUDE
973 DEBUG_IMX6SL_UART 1010 DEBUG_IMX6SL_UART
974 default "debug/msm.S" if DEBUG_MSM_UART 1011 default "debug/msm.S" if DEBUG_MSM_UART
975 default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART 1012 default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
1013 default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART
976 default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1 1014 default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
977 default "debug/sti.S" if DEBUG_STI_UART 1015 default "debug/sti.S" if DEBUG_STI_UART
978 default "debug/tegra.S" if DEBUG_TEGRA_UART 1016 default "debug/tegra.S" if DEBUG_TEGRA_UART
@@ -1029,6 +1067,12 @@ config DEBUG_UART_PHYS
1029 default 0x40090000 if ARCH_LPC32XX 1067 default 0x40090000 if ARCH_LPC32XX
1030 default 0x40100000 if DEBUG_PXA_UART1 1068 default 0x40100000 if DEBUG_PXA_UART1
1031 default 0x42000000 if ARCH_GEMINI 1069 default 0x42000000 if ARCH_GEMINI
1070 default 0x50000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
1071 DEBUG_S3C2410_UART0)
1072 default 0x50004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
1073 DEBUG_S3C2410_UART1)
1074 default 0x50008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \
1075 DEBUG_S3C2410_UART2)
1032 default 0x7c0003f8 if FOOTBRIDGE 1076 default 0x7c0003f8 if FOOTBRIDGE
1033 default 0x80070000 if DEBUG_IMX23_UART 1077 default 0x80070000 if DEBUG_IMX23_UART
1034 default 0x80074000 if DEBUG_IMX28_UART 1078 default 0x80074000 if DEBUG_IMX28_UART
@@ -1058,7 +1102,7 @@ config DEBUG_UART_PHYS
1058 default 0xfffff700 if ARCH_IOP33X 1102 default 0xfffff700 if ARCH_IOP33X
1059 depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ 1103 depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
1060 DEBUG_LL_UART_EFM32 || \ 1104 DEBUG_LL_UART_EFM32 || \
1061 DEBUG_UART_8250 || DEBUG_UART_PL01X 1105 DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_S3C24XX_UART
1062 1106
1063config DEBUG_UART_VIRT 1107config DEBUG_UART_VIRT
1064 hex "Virtual base address of debug UART" 1108 hex "Virtual base address of debug UART"
@@ -1075,6 +1119,12 @@ config DEBUG_UART_VIRT
1075 default 0xf2100000 if DEBUG_PXA_UART1 1119 default 0xf2100000 if DEBUG_PXA_UART1
1076 default 0xf4090000 if ARCH_LPC32XX 1120 default 0xf4090000 if ARCH_LPC32XX
1077 default 0xf4200000 if ARCH_GEMINI 1121 default 0xf4200000 if ARCH_GEMINI
1122 default 0xf7000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
1123 DEBUG_S3C2410_UART0)
1124 default 0xf7004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
1125 DEBUG_S3C2410_UART1)
1126 default 0xf7008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \
1127 DEBUG_S3C2410_UART2)
1078 default 0xf7fc9000 if DEBUG_BERLIN_UART 1128 default 0xf7fc9000 if DEBUG_BERLIN_UART
1079 default 0xf8009000 if DEBUG_VEXPRESS_UART0_CA9 1129 default 0xf8009000 if DEBUG_VEXPRESS_UART0_CA9
1080 default 0xf8090000 if DEBUG_VEXPRESS_UART0_RS1 1130 default 0xf8090000 if DEBUG_VEXPRESS_UART0_RS1
@@ -1116,7 +1166,7 @@ config DEBUG_UART_VIRT
1116 default 0xff003000 if DEBUG_U300_UART 1166 default 0xff003000 if DEBUG_U300_UART
1117 default DEBUG_UART_PHYS if !MMU 1167 default DEBUG_UART_PHYS if !MMU
1118 depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ 1168 depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
1119 DEBUG_UART_8250 || DEBUG_UART_PL01X 1169 DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_S3C24XX_UART
1120 1170
1121config DEBUG_UART_8250_SHIFT 1171config DEBUG_UART_8250_SHIFT
1122 int "Register offset shift for the 8250 debug UART" 1172 int "Register offset shift for the 8250 debug UART"
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 066b03480b63..3a8b32df6b31 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -60,11 +60,6 @@
60 add \rb, \rb, #0x00010000 @ Ser1 60 add \rb, \rb, #0x00010000 @ Ser1
61#endif 61#endif
62 .endm 62 .endm
63#elif defined(CONFIG_ARCH_S3C24XX)
64 .macro loadsp, rb, tmp
65 mov \rb, #0x50000000
66 add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
67 .endm
68#else 63#else
69 .macro loadsp, rb, tmp 64 .macro loadsp, rb, tmp
70 addruart \rb, \tmp 65 addruart \rb, \tmp
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index 80a3bf4c5986..896a2a6619e0 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -364,16 +364,4 @@
364 gpio-key,wakeup; 364 gpio-key,wakeup;
365 }; 365 };
366 }; 366 };
367
368 amba {
369 mdma1: mdma@11C10000 {
370 /*
371 * MDMA1 can support both secure and non-secure
372 * AXI transactions. When this is enabled in the kernel
373 * for boards that run in secure mode, we are getting
374 * imprecise external aborts causing the kernel to oops.
375 */
376 status = "disabled";
377 };
378 };
379}; 367};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index c3a9a66c5767..418f2506aaf0 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -219,16 +219,6 @@
219 reg = <0x100440C0 0x20>; 219 reg = <0x100440C0 0x20>;
220 }; 220 };
221 221
222 mau_pd: power-domain@100440E0 {
223 compatible = "samsung,exynos4210-pd";
224 reg = <0x100440E0 0x20>;
225 };
226
227 g2d_pd: power-domain@10044100 {
228 compatible = "samsung,exynos4210-pd";
229 reg = <0x10044100 0x20>;
230 };
231
232 msc_pd: power-domain@10044120 { 222 msc_pd: power-domain@10044120 {
233 compatible = "samsung,exynos4210-pd"; 223 compatible = "samsung,exynos4210-pd";
234 reg = <0x10044120 0x20>; 224 reg = <0x10044120 0x20>;
@@ -336,6 +326,13 @@
336 #dma-cells = <1>; 326 #dma-cells = <1>;
337 #dma-channels = <8>; 327 #dma-channels = <8>;
338 #dma-requests = <1>; 328 #dma-requests = <1>;
329 /*
330 * MDMA1 can support both secure and non-secure
331 * AXI transactions. When this is enabled in the kernel
332 * for boards that run in secure mode, we are getting
333 * imprecise external aborts causing the kernel to oops.
334 */
335 status = "disabled";
339 }; 336 };
340 }; 337 };
341 338
@@ -730,6 +727,5 @@
730 interrupts = <0 112 0>; 727 interrupts = <0 112 0>;
731 clocks = <&clock 471>; 728 clocks = <&clock 471>;
732 clock-names = "secss"; 729 clock-names = "secss";
733 samsung,power-domain = <&g2d_pd>;
734 }; 730 };
735}; 731};
diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig
index 4ce7b70ea901..e07a227ec0db 100644
--- a/arch/arm/configs/exynos_defconfig
+++ b/arch/arm/configs/exynos_defconfig
@@ -65,6 +65,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y
65CONFIG_I2C=y 65CONFIG_I2C=y
66CONFIG_I2C_MUX=y 66CONFIG_I2C_MUX=y
67CONFIG_I2C_ARB_GPIO_CHALLENGE=y 67CONFIG_I2C_ARB_GPIO_CHALLENGE=y
68CONFIG_I2C_EXYNOS5=y
68CONFIG_I2C_S3C2410=y 69CONFIG_I2C_S3C2410=y
69CONFIG_DEBUG_GPIO=y 70CONFIG_DEBUG_GPIO=y
70# CONFIG_HWMON is not set 71# CONFIG_HWMON is not set
diff --git a/arch/arm/include/debug/s3c24xx.S b/arch/arm/include/debug/s3c24xx.S
new file mode 100644
index 000000000000..b1f54dc4888c
--- /dev/null
+++ b/arch/arm/include/debug/s3c24xx.S
@@ -0,0 +1,46 @@
1/* arch/arm/mach-s3c2410/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Copyright (C) 2005 Simtec Electronics
7 *
8 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/serial_s3c.h>
16
17#define S3C2410_UART1_OFF (0x4000)
18
19 .macro addruart, rp, rv, tmp
20 ldr \rp, = CONFIG_DEBUG_UART_PHYS
21 ldr \rv, = CONFIG_DEBUG_UART_VIRT
22 .endm
23
24 .macro fifo_full_s3c2410 rd, rx
25 ldr \rd, [\rx, # S3C2410_UFSTAT]
26 tst \rd, #S3C2410_UFSTAT_TXFULL
27 .endm
28
29 .macro fifo_level_s3c2410 rd, rx
30 ldr \rd, [\rx, # S3C2410_UFSTAT]
31 and \rd, \rd, #S3C2410_UFSTAT_TXMASK
32 .endm
33
34/* Select the correct implementation depending on the configuration. The
35 * S3C2440 will get selected by default, as these are the most widely
36 * used variants of these
37*/
38
39#if defined(CONFIG_DEBUG_S3C2410_UART)
40#define fifo_full fifo_full_s3c2410
41#define fifo_level fifo_level_s3c2410
42#endif
43
44/* include the reset of the code which will do the work */
45
46#include <debug/samsung.S>
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index a656dbe3b78c..f6dcc256db56 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -12,20 +12,15 @@ obj- :=
12 12
13# Core 13# Core
14 14
15obj-$(CONFIG_ARCH_EXYNOS) += exynos.o 15obj-$(CONFIG_ARCH_EXYNOS) += exynos.o pmu.o exynos-smc.o firmware.o
16 16
17obj-$(CONFIG_PM_SLEEP) += pm.o sleep.o 17obj-$(CONFIG_PM_SLEEP) += pm.o sleep.o
18obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o 18obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
19obj-$(CONFIG_CPU_IDLE) += cpuidle.o 19obj-$(CONFIG_CPU_IDLE) += cpuidle.o
20 20
21obj-$(CONFIG_ARCH_EXYNOS) += pmu.o
22
23obj-$(CONFIG_SMP) += platsmp.o headsmp.o 21obj-$(CONFIG_SMP) += platsmp.o headsmp.o
24 22
25obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 23obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
26 24
27obj-$(CONFIG_ARCH_EXYNOS) += exynos-smc.o
28obj-$(CONFIG_ARCH_EXYNOS) += firmware.o
29
30plus_sec := $(call as-instr,.arch_extension sec,+sec) 25plus_sec := $(call as-instr,.arch_extension sec,+sec)
31AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec) 26AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec)
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 9ef3f83efaff..c1a2f2207af0 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -15,6 +15,75 @@
15#include <linux/reboot.h> 15#include <linux/reboot.h>
16#include <linux/of.h> 16#include <linux/of.h>
17 17
18#define EXYNOS4210_CPU_ID 0x43210000
19#define EXYNOS4212_CPU_ID 0x43220000
20#define EXYNOS4412_CPU_ID 0xE4412200
21#define EXYNOS4_CPU_MASK 0xFFFE0000
22
23#define EXYNOS5250_SOC_ID 0x43520000
24#define EXYNOS5420_SOC_ID 0xE5420000
25#define EXYNOS5440_SOC_ID 0xE5440000
26#define EXYNOS5_SOC_MASK 0xFFFFF000
27
28extern unsigned long samsung_cpu_id;
29
30#define IS_SAMSUNG_CPU(name, id, mask) \
31static inline int is_samsung_##name(void) \
32{ \
33 return ((samsung_cpu_id & mask) == (id & mask)); \
34}
35
36IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
37IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
38IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
39IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
40IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
41IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
42
43#if defined(CONFIG_CPU_EXYNOS4210)
44# define soc_is_exynos4210() is_samsung_exynos4210()
45#else
46# define soc_is_exynos4210() 0
47#endif
48
49#if defined(CONFIG_SOC_EXYNOS4212)
50# define soc_is_exynos4212() is_samsung_exynos4212()
51#else
52# define soc_is_exynos4212() 0
53#endif
54
55#if defined(CONFIG_SOC_EXYNOS4412)
56# define soc_is_exynos4412() is_samsung_exynos4412()
57#else
58# define soc_is_exynos4412() 0
59#endif
60
61#define EXYNOS4210_REV_0 (0x0)
62#define EXYNOS4210_REV_1_0 (0x10)
63#define EXYNOS4210_REV_1_1 (0x11)
64
65#if defined(CONFIG_SOC_EXYNOS5250)
66# define soc_is_exynos5250() is_samsung_exynos5250()
67#else
68# define soc_is_exynos5250() 0
69#endif
70
71#if defined(CONFIG_SOC_EXYNOS5420)
72# define soc_is_exynos5420() is_samsung_exynos5420()
73#else
74# define soc_is_exynos5420() 0
75#endif
76
77#if defined(CONFIG_SOC_EXYNOS5440)
78# define soc_is_exynos5440() is_samsung_exynos5440()
79#else
80# define soc_is_exynos5440() 0
81#endif
82
83#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \
84 soc_is_exynos4412())
85#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5420())
86
18void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1); 87void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
19 88
20struct map_desc; 89struct map_desc;
@@ -63,4 +132,7 @@ struct exynos_pmu_conf {
63 132
64extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); 133extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
65 134
135extern void s5p_init_cpu(void __iomem *cpuid_addr);
136extern unsigned int samsung_rev(void);
137
66#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ 138#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index c57cae0e8779..3dd385ebf195 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -24,7 +24,6 @@
24#include <asm/unified.h> 24#include <asm/unified.h>
25#include <asm/cpuidle.h> 25#include <asm/cpuidle.h>
26 26
27#include <plat/cpu.h>
28#include <plat/pm.h> 27#include <plat/pm.h>
29 28
30#include <mach/map.h> 29#include <mach/map.h>
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index b32a907d021d..59aab756702e 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -26,8 +26,6 @@
26#include <asm/mach/map.h> 26#include <asm/mach/map.h>
27#include <asm/memory.h> 27#include <asm/memory.h>
28 28
29#include <plat/cpu.h>
30
31#include "common.h" 29#include "common.h"
32#include "mfc.h" 30#include "mfc.h"
33#include "regs-pmu.h" 31#include "regs-pmu.h"
@@ -308,17 +306,6 @@ void __init exynos_init_io(void)
308 exynos_map_io(); 306 exynos_map_io();
309} 307}
310 308
311struct bus_type exynos_subsys = {
312 .name = "exynos-core",
313 .dev_name = "exynos-core",
314};
315
316static int __init exynos_core_init(void)
317{
318 return subsys_system_register(&exynos_subsys, NULL);
319}
320core_initcall(exynos_core_init);
321
322static int __init exynos4_l2x0_cache_init(void) 309static int __init exynos4_l2x0_cache_init(void)
323{ 310{
324 int ret; 311 int ret;
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 932129ef26c6..f6cb510aee85 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -18,6 +18,7 @@
18 18
19#include <mach/map.h> 19#include <mach/map.h>
20 20
21#include "common.h"
21#include "smc.h" 22#include "smc.h"
22 23
23static int exynos_do_idle(void) 24static int exynos_do_idle(void)
@@ -28,13 +29,24 @@ static int exynos_do_idle(void)
28 29
29static int exynos_cpu_boot(int cpu) 30static int exynos_cpu_boot(int cpu)
30{ 31{
32 /*
33 * The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
34 * But, Exynos4212 has only one secondary CPU so second parameter
35 * isn't used for informing secure firmware about CPU id.
36 */
37 if (soc_is_exynos4212())
38 cpu = 0;
39
31 exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); 40 exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
32 return 0; 41 return 0;
33} 42}
34 43
35static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr) 44static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
36{ 45{
37 void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu; 46 void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c;
47
48 if (!soc_is_exynos4212())
49 boot_reg += 4*cpu;
38 50
39 __raw_writel(boot_addr, boot_reg); 51 __raw_writel(boot_addr, boot_reg);
40 return 0; 52 return 0;
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 5eead530c6f8..3cab3f506689 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -19,61 +19,9 @@
19#include <asm/cp15.h> 19#include <asm/cp15.h>
20#include <asm/smp_plat.h> 20#include <asm/smp_plat.h>
21 21
22#include <plat/cpu.h>
23
24#include "common.h" 22#include "common.h"
25#include "regs-pmu.h" 23#include "regs-pmu.h"
26 24
27static inline void cpu_enter_lowpower_a9(void)
28{
29 unsigned int v;
30
31 asm volatile(
32 " mcr p15, 0, %1, c7, c5, 0\n"
33 " mcr p15, 0, %1, c7, c10, 4\n"
34 /*
35 * Turn off coherency
36 */
37 " mrc p15, 0, %0, c1, c0, 1\n"
38 " bic %0, %0, %3\n"
39 " mcr p15, 0, %0, c1, c0, 1\n"
40 " mrc p15, 0, %0, c1, c0, 0\n"
41 " bic %0, %0, %2\n"
42 " mcr p15, 0, %0, c1, c0, 0\n"
43 : "=&r" (v)
44 : "r" (0), "Ir" (CR_C), "Ir" (0x40)
45 : "cc");
46}
47
48static inline void cpu_enter_lowpower_a15(void)
49{
50 unsigned int v;
51
52 asm volatile(
53 " mrc p15, 0, %0, c1, c0, 0\n"
54 " bic %0, %0, %1\n"
55 " mcr p15, 0, %0, c1, c0, 0\n"
56 : "=&r" (v)
57 : "Ir" (CR_C)
58 : "cc");
59
60 flush_cache_louis();
61
62 asm volatile(
63 /*
64 * Turn off coherency
65 */
66 " mrc p15, 0, %0, c1, c0, 1\n"
67 " bic %0, %0, %1\n"
68 " mcr p15, 0, %0, c1, c0, 1\n"
69 : "=&r" (v)
70 : "Ir" (0x40)
71 : "cc");
72
73 isb();
74 dsb();
75}
76
77static inline void cpu_leave_lowpower(void) 25static inline void cpu_leave_lowpower(void)
78{ 26{
79 unsigned int v; 27 unsigned int v;
@@ -132,19 +80,8 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
132void __ref exynos_cpu_die(unsigned int cpu) 80void __ref exynos_cpu_die(unsigned int cpu)
133{ 81{
134 int spurious = 0; 82 int spurious = 0;
135 int primary_part = 0;
136 83
137 /* 84 v7_exit_coherency_flush(louis);
138 * we're ready for shutdown now, so do it.
139 * Exynos4 is A9 based while Exynos5 is A15; check the CPU part
140 * number by reading the Main ID register and then perform the
141 * appropriate sequence for entering low power.
142 */
143 asm("mrc p15, 0, %0, c0, c0, 0" : "=r"(primary_part) : : "cc");
144 if ((primary_part & 0xfff0) == 0xc0f0)
145 cpu_enter_lowpower_a15();
146 else
147 cpu_enter_lowpower_a9();
148 85
149 platform_do_lowpower(cpu, &spurious); 86 platform_do_lowpower(cpu, &spurious);
150 87
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 03e5e9f94705..c28cdb1c82cd 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -26,8 +26,6 @@
26#include <asm/smp_scu.h> 26#include <asm/smp_scu.h>
27#include <asm/firmware.h> 27#include <asm/firmware.h>
28 28
29#include <plat/cpu.h>
30
31#include "common.h" 29#include "common.h"
32#include "regs-pmu.h" 30#include "regs-pmu.h"
33 31
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 15af0ceb0a66..ca672e24b5cd 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -26,7 +26,6 @@
26#include <asm/smp_scu.h> 26#include <asm/smp_scu.h>
27#include <asm/suspend.h> 27#include <asm/suspend.h>
28 28
29#include <plat/cpu.h>
30#include <plat/pm-common.h> 29#include <plat/pm-common.h>
31#include <plat/pll.h> 30#include <plat/pll.h>
32#include <plat/regs-srom.h> 31#include <plat/regs-srom.h>
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 05c7ce15322a..fb0deda3b3a4 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -13,8 +13,6 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/bug.h> 14#include <linux/bug.h>
15 15
16#include <plat/cpu.h>
17
18#include "common.h" 16#include "common.h"
19#include "regs-pmu.h" 17#include "regs-pmu.h"
20 18
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 22d149bcfcc6..45a7026e9419 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -39,7 +39,6 @@ config CPU_S3C2410
39 default y 39 default y
40 select COMMON_CLK 40 select COMMON_CLK
41 select CPU_ARM920T 41 select CPU_ARM920T
42 select CPU_LLSERIAL_S3C2410
43 select S3C2410_COMMON_CLK 42 select S3C2410_COMMON_CLK
44 select S3C2410_DMA if S3C24XX_DMA 43 select S3C2410_DMA if S3C24XX_DMA
45 select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ 44 select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
@@ -53,7 +52,6 @@ config CPU_S3C2412
53 bool "SAMSUNG S3C2412" 52 bool "SAMSUNG S3C2412"
54 select COMMON_CLK 53 select COMMON_CLK
55 select CPU_ARM926T 54 select CPU_ARM926T
56 select CPU_LLSERIAL_S3C2440
57 select S3C2412_COMMON_CLK 55 select S3C2412_COMMON_CLK
58 select S3C2412_DMA if S3C24XX_DMA 56 select S3C2412_DMA if S3C24XX_DMA
59 select S3C2412_PM if PM 57 select S3C2412_PM if PM
@@ -64,7 +62,6 @@ config CPU_S3C2416
64 bool "SAMSUNG S3C2416/S3C2450" 62 bool "SAMSUNG S3C2416/S3C2450"
65 select COMMON_CLK 63 select COMMON_CLK
66 select CPU_ARM926T 64 select CPU_ARM926T
67 select CPU_LLSERIAL_S3C2440
68 select S3C2416_PM if PM 65 select S3C2416_PM if PM
69 select S3C2443_COMMON_CLK 66 select S3C2443_COMMON_CLK
70 select S3C2443_DMA if S3C24XX_DMA 67 select S3C2443_DMA if S3C24XX_DMA
@@ -75,7 +72,6 @@ config CPU_S3C2440
75 bool "SAMSUNG S3C2440" 72 bool "SAMSUNG S3C2440"
76 select COMMON_CLK 73 select COMMON_CLK
77 select CPU_ARM920T 74 select CPU_ARM920T
78 select CPU_LLSERIAL_S3C2440
79 select S3C2410_COMMON_CLK 75 select S3C2410_COMMON_CLK
80 select S3C2410_PM if PM 76 select S3C2410_PM if PM
81 select S3C2440_DMA if S3C24XX_DMA 77 select S3C2440_DMA if S3C24XX_DMA
@@ -86,7 +82,6 @@ config CPU_S3C2442
86 bool "SAMSUNG S3C2442" 82 bool "SAMSUNG S3C2442"
87 select COMMON_CLK 83 select COMMON_CLK
88 select CPU_ARM920T 84 select CPU_ARM920T
89 select CPU_LLSERIAL_S3C2440
90 select S3C2410_COMMON_CLK 85 select S3C2410_COMMON_CLK
91 select S3C2410_DMA if S3C24XX_DMA 86 select S3C2410_DMA if S3C24XX_DMA
92 select S3C2410_PM if PM 87 select S3C2410_PM if PM
@@ -102,7 +97,6 @@ config CPU_S3C2443
102 bool "SAMSUNG S3C2443" 97 bool "SAMSUNG S3C2443"
103 select COMMON_CLK 98 select COMMON_CLK
104 select CPU_ARM920T 99 select CPU_ARM920T
105 select CPU_LLSERIAL_S3C2440
106 select S3C2443_COMMON_CLK 100 select S3C2443_COMMON_CLK
107 select S3C2443_DMA if S3C24XX_DMA 101 select S3C2443_DMA if S3C24XX_DMA
108 help 102 help
@@ -164,28 +158,6 @@ config S3C2410_PM
164 help 158 help
165 Power Management code common to S3C2410 and better 159 Power Management code common to S3C2410 and better
166 160
167# low-level serial option nodes
168
169config CPU_LLSERIAL_S3C2410_ONLY
170 bool
171 default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
172
173config CPU_LLSERIAL_S3C2440_ONLY
174 bool
175 default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
176
177config CPU_LLSERIAL_S3C2410
178 bool
179 help
180 Selected if there is an S3C2410 (or register compatible) serial
181 low-level implementation needed
182
183config CPU_LLSERIAL_S3C2440
184 bool
185 help
186 Selected if there is an S3C2440 (or register compatible) serial
187 low-level implementation needed
188
189config S3C24XX_PLL 161config S3C24XX_PLL
190 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" 162 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
191 depends on ARM_S3C24XX_CPUFREQ 163 depends on ARM_S3C24XX_CPUFREQ
diff --git a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
deleted file mode 100644
index 2f39737544c0..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
+++ /dev/null
@@ -1,101 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Copyright (C) 2005 Simtec Electronics
7 *
8 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <mach/map.h>
16#include <mach/regs-gpio.h>
17#include <linux/serial_s3c.h>
18
19#define S3C2410_UART1_OFF (0x4000)
20#define SHIFT_2440TXF (14-9)
21
22 .macro addruart, rp, rv, tmp
23 ldr \rp, = S3C24XX_PA_UART
24 ldr \rv, = S3C24XX_VA_UART
25#if CONFIG_DEBUG_S3C_UART != 0
26 add \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
27 add \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART)
28#endif
29 .endm
30
31 .macro fifo_full_s3c24xx rd, rx
32 @ check for arm920 vs arm926. currently assume all arm926
33 @ devices have an 64 byte FIFO identical to the s3c2440
34 mrc p15, 0, \rd, c0, c0
35 and \rd, \rd, #0xff0
36 teq \rd, #0x260
37 beq 1004f
38 mrc p15, 0, \rd, c1, c0
39 tst \rd, #1
40 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
41 addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
42 bic \rd, \rd, #0xff000
43 ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
44 and \rd, \rd, #0x00ff0000
45 teq \rd, #0x00440000 @ is it 2440?
461004:
47 ldr \rd, [\rx, # S3C2410_UFSTAT]
48 moveq \rd, \rd, lsr #SHIFT_2440TXF
49 tst \rd, #S3C2410_UFSTAT_TXFULL
50 .endm
51
52 .macro fifo_full_s3c2410 rd, rx
53 ldr \rd, [\rx, # S3C2410_UFSTAT]
54 tst \rd, #S3C2410_UFSTAT_TXFULL
55 .endm
56
57/* fifo level reading */
58
59 .macro fifo_level_s3c24xx rd, rx
60 @ check for arm920 vs arm926. currently assume all arm926
61 @ devices have an 64 byte FIFO identical to the s3c2440
62 mrc p15, 0, \rd, c0, c0
63 and \rd, \rd, #0xff0
64 teq \rd, #0x260
65 beq 10000f
66 mrc p15, 0, \rd, c1, c0
67 tst \rd, #1
68 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
69 addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
70 bic \rd, \rd, #0xff000
71 ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
72 and \rd, \rd, #0x00ff0000
73 teq \rd, #0x00440000 @ is it 2440?
74
7510000:
76 ldr \rd, [\rx, # S3C2410_UFSTAT]
77 andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
78 andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
79 .endm
80
81 .macro fifo_level_s3c2410 rd, rx
82 ldr \rd, [\rx, # S3C2410_UFSTAT]
83 and \rd, \rd, #S3C2410_UFSTAT_TXMASK
84 .endm
85
86/* Select the correct implementation depending on the configuration. The
87 * S3C2440 will get selected by default, as these are the most widely
88 * used variants of these
89*/
90
91#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY)
92#define fifo_full fifo_full_s3c2410
93#define fifo_level fifo_level_s3c2410
94#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY)
95#define fifo_full fifo_full_s3c24xx
96#define fifo_level fifo_level_s3c24xx
97#endif
98
99/* include the reset of the code which will do the work */
100
101#include <debug/samsung.S>
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 5992b8dd9b89..5a237db9f9eb 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -43,16 +43,6 @@ extern unsigned long samsung_cpu_id;
43#define S5PV210_CPU_ID 0x43110000 43#define S5PV210_CPU_ID 0x43110000
44#define S5PV210_CPU_MASK 0xFFFFF000 44#define S5PV210_CPU_MASK 0xFFFFF000
45 45
46#define EXYNOS4210_CPU_ID 0x43210000
47#define EXYNOS4212_CPU_ID 0x43220000
48#define EXYNOS4412_CPU_ID 0xE4412200
49#define EXYNOS4_CPU_MASK 0xFFFE0000
50
51#define EXYNOS5250_SOC_ID 0x43520000
52#define EXYNOS5420_SOC_ID 0xE5420000
53#define EXYNOS5440_SOC_ID 0xE5440000
54#define EXYNOS5_SOC_MASK 0xFFFFF000
55
56#define IS_SAMSUNG_CPU(name, id, mask) \ 46#define IS_SAMSUNG_CPU(name, id, mask) \
57static inline int is_samsung_##name(void) \ 47static inline int is_samsung_##name(void) \
58{ \ 48{ \
@@ -68,12 +58,6 @@ IS_SAMSUNG_CPU(s5p6440, S5P6440_CPU_ID, S5P64XX_CPU_MASK)
68IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK) 58IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK)
69IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK) 59IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK)
70IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK) 60IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
71IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
72IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
73IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
74IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
75IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
76IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
77 61
78#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ 62#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
79 defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \ 63 defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
@@ -126,50 +110,6 @@ IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
126# define soc_is_s5pv210() 0 110# define soc_is_s5pv210() 0
127#endif 111#endif
128 112
129#if defined(CONFIG_CPU_EXYNOS4210)
130# define soc_is_exynos4210() is_samsung_exynos4210()
131#else
132# define soc_is_exynos4210() 0
133#endif
134
135#if defined(CONFIG_SOC_EXYNOS4212)
136# define soc_is_exynos4212() is_samsung_exynos4212()
137#else
138# define soc_is_exynos4212() 0
139#endif
140
141#if defined(CONFIG_SOC_EXYNOS4412)
142# define soc_is_exynos4412() is_samsung_exynos4412()
143#else
144# define soc_is_exynos4412() 0
145#endif
146
147#define EXYNOS4210_REV_0 (0x0)
148#define EXYNOS4210_REV_1_0 (0x10)
149#define EXYNOS4210_REV_1_1 (0x11)
150
151#if defined(CONFIG_SOC_EXYNOS5250)
152# define soc_is_exynos5250() is_samsung_exynos5250()
153#else
154# define soc_is_exynos5250() 0
155#endif
156
157#if defined(CONFIG_SOC_EXYNOS5420)
158# define soc_is_exynos5420() is_samsung_exynos5420()
159#else
160# define soc_is_exynos5420() 0
161#endif
162
163#if defined(CONFIG_SOC_EXYNOS5440)
164# define soc_is_exynos5440() is_samsung_exynos5440()
165#else
166# define soc_is_exynos5440() 0
167#endif
168
169#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \
170 soc_is_exynos4412())
171#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5420())
172
173#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } 113#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
174 114
175#ifndef KHZ 115#ifndef KHZ
@@ -239,7 +179,6 @@ extern struct bus_type s3c2443_subsys;
239extern struct bus_type s3c6410_subsys; 179extern struct bus_type s3c6410_subsys;
240extern struct bus_type s5p64x0_subsys; 180extern struct bus_type s5p64x0_subsys;
241extern struct bus_type s5pv210_subsys; 181extern struct bus_type s5pv210_subsys;
242extern struct bus_type exynos_subsys;
243 182
244extern void (*s5pc1xx_idle)(void); 183extern void (*s5pc1xx_idle)(void);
245 184
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index f99cfe24e7bc..e8a4a7ed38c1 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -17,6 +17,7 @@
17#include <linux/regulator/consumer.h> 17#include <linux/regulator/consumer.h>
18#include <linux/cpufreq.h> 18#include <linux/cpufreq.h>
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/of.h>
20 21
21#include <plat/cpu.h> 22#include <plat/cpu.h>
22 23
@@ -163,14 +164,22 @@ static int exynos_cpufreq_probe(struct platform_device *pdev)
163 if (!exynos_info) 164 if (!exynos_info)
164 return -ENOMEM; 165 return -ENOMEM;
165 166
166 if (soc_is_exynos4210()) 167 if (of_machine_is_compatible("samsung,exynos4210")) {
168 exynos_info->type = EXYNOS_SOC_4210;
167 ret = exynos4210_cpufreq_init(exynos_info); 169 ret = exynos4210_cpufreq_init(exynos_info);
168 else if (soc_is_exynos4212() || soc_is_exynos4412()) 170 } else if (of_machine_is_compatible("samsung,exynos4212")) {
171 exynos_info->type = EXYNOS_SOC_4212;
169 ret = exynos4x12_cpufreq_init(exynos_info); 172 ret = exynos4x12_cpufreq_init(exynos_info);
170 else if (soc_is_exynos5250()) 173 } else if (of_machine_is_compatible("samsung,exynos4412")) {
174 exynos_info->type = EXYNOS_SOC_4412;
175 ret = exynos4x12_cpufreq_init(exynos_info);
176 } else if (of_machine_is_compatible("samsung,exynos5250")) {
177 exynos_info->type = EXYNOS_SOC_5250;
171 ret = exynos5250_cpufreq_init(exynos_info); 178 ret = exynos5250_cpufreq_init(exynos_info);
172 else 179 } else {
173 return 0; 180 pr_err("%s: Unknown SoC type\n", __func__);
181 return -ENODEV;
182 }
174 183
175 if (ret) 184 if (ret)
176 goto err_vdd_arm; 185 goto err_vdd_arm;
diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
index 3ddade8a5125..f189547bb447 100644
--- a/drivers/cpufreq/exynos-cpufreq.h
+++ b/drivers/cpufreq/exynos-cpufreq.h
@@ -17,6 +17,13 @@ enum cpufreq_level_index {
17 L20, 17 L20,
18}; 18};
19 19
20enum exynos_soc_type {
21 EXYNOS_SOC_4210,
22 EXYNOS_SOC_4212,
23 EXYNOS_SOC_4412,
24 EXYNOS_SOC_5250,
25};
26
20#define APLL_FREQ(f, a0, a1, a2, a3, a4, a5, a6, a7, b0, b1, b2, m, p, s) \ 27#define APLL_FREQ(f, a0, a1, a2, a3, a4, a5, a6, a7, b0, b1, b2, m, p, s) \
21 { \ 28 { \
22 .freq = (f) * 1000, \ 29 .freq = (f) * 1000, \
@@ -34,6 +41,7 @@ struct apll_freq {
34}; 41};
35 42
36struct exynos_dvfs_info { 43struct exynos_dvfs_info {
44 enum exynos_soc_type type;
37 unsigned long mpll_freq_khz; 45 unsigned long mpll_freq_khz;
38 unsigned int pll_safe_idx; 46 unsigned int pll_safe_idx;
39 struct clk *cpu_clk; 47 struct clk *cpu_clk;
diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
index 466c76ad335b..63a3907ce578 100644
--- a/drivers/cpufreq/exynos4x12-cpufreq.c
+++ b/drivers/cpufreq/exynos4x12-cpufreq.c
@@ -100,7 +100,6 @@ static struct apll_freq apll_freq_4412[] = {
100static void exynos4x12_set_clkdiv(unsigned int div_index) 100static void exynos4x12_set_clkdiv(unsigned int div_index)
101{ 101{
102 unsigned int tmp; 102 unsigned int tmp;
103 unsigned int stat_cpu1;
104 103
105 /* Change Divider - CPU0 */ 104 /* Change Divider - CPU0 */
106 105
@@ -115,13 +114,11 @@ static void exynos4x12_set_clkdiv(unsigned int div_index)
115 tmp = apll_freq_4x12[div_index].clk_div_cpu1; 114 tmp = apll_freq_4x12[div_index].clk_div_cpu1;
116 115
117 __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1); 116 __raw_writel(tmp, EXYNOS4_CLKDIV_CPU1);
118 if (soc_is_exynos4212())
119 stat_cpu1 = 0x11;
120 else
121 stat_cpu1 = 0x111;
122 117
123 while (__raw_readl(EXYNOS4_CLKDIV_STATCPU1) & stat_cpu1) 118 do {
124 cpu_relax(); 119 cpu_relax();
120 tmp = __raw_readl(EXYNOS4_CLKDIV_STATCPU1);
121 } while (tmp != 0x0);
125} 122}
126 123
127static void exynos4x12_set_apll(unsigned int index) 124static void exynos4x12_set_apll(unsigned int index)
@@ -184,7 +181,7 @@ int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
184 if (IS_ERR(mout_apll)) 181 if (IS_ERR(mout_apll))
185 goto err_mout_apll; 182 goto err_mout_apll;
186 183
187 if (soc_is_exynos4212()) 184 if (info->type == EXYNOS_SOC_4212)
188 apll_freq_4x12 = apll_freq_4212; 185 apll_freq_4x12 = apll_freq_4212;
189 else 186 else
190 apll_freq_4x12 = apll_freq_4412; 187 apll_freq_4x12 = apll_freq_4412;