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authorZhenyu Wang <zhenyu.z.wang@intel.com>2008-11-17 01:39:00 -0500
committerDave Airlie <airlied@linux.ie>2008-12-28 19:05:17 -0500
commita50ccc6c6623ab0e64f2109881e07c176b2d876f (patch)
tree6e29272426cd85c342894e9ad4c5dc51621f3d5d
parent4a6908a3a050aacc9c3a2f36b276b46c0629ad91 (diff)
agp/intel: add support for G41 chipset
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
-rw-r--r--drivers/char/agp/intel-agp.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 9cf6e9bb017e..7d8db5a61104 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -40,6 +40,8 @@
40#define PCI_DEVICE_ID_INTEL_Q45_IG 0x2E12 40#define PCI_DEVICE_ID_INTEL_Q45_IG 0x2E12
41#define PCI_DEVICE_ID_INTEL_G45_HB 0x2E20 41#define PCI_DEVICE_ID_INTEL_G45_HB 0x2E20
42#define PCI_DEVICE_ID_INTEL_G45_IG 0x2E22 42#define PCI_DEVICE_ID_INTEL_G45_IG 0x2E22
43#define PCI_DEVICE_ID_INTEL_G41_HB 0x2E30
44#define PCI_DEVICE_ID_INTEL_G41_IG 0x2E32
43 45
44/* cover 915 and 945 variants */ 46/* cover 915 and 945 variants */
45#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \ 47#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
@@ -63,7 +65,8 @@
63#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \ 65#define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \
64 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \ 66 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \
65 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \ 67 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \
66 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB) 68 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB || \
69 agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G41_HB)
67 70
68extern int agp_memory_reserved; 71extern int agp_memory_reserved;
69 72
@@ -1196,6 +1199,7 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
1196 case PCI_DEVICE_ID_INTEL_IGD_E_HB: 1199 case PCI_DEVICE_ID_INTEL_IGD_E_HB:
1197 case PCI_DEVICE_ID_INTEL_Q45_HB: 1200 case PCI_DEVICE_ID_INTEL_Q45_HB:
1198 case PCI_DEVICE_ID_INTEL_G45_HB: 1201 case PCI_DEVICE_ID_INTEL_G45_HB:
1202 case PCI_DEVICE_ID_INTEL_G41_HB:
1199 *gtt_offset = *gtt_size = MB(2); 1203 *gtt_offset = *gtt_size = MB(2);
1200 break; 1204 break;
1201 default: 1205 default:
@@ -2163,6 +2167,8 @@ static const struct intel_driver_description {
2163 "Q45/Q43", NULL, &intel_i965_driver }, 2167 "Q45/Q43", NULL, &intel_i965_driver },
2164 { PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0, 2168 { PCI_DEVICE_ID_INTEL_G45_HB, PCI_DEVICE_ID_INTEL_G45_IG, 0,
2165 "G45/G43", NULL, &intel_i965_driver }, 2169 "G45/G43", NULL, &intel_i965_driver },
2170 { PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG, 0,
2171 "G41", NULL, &intel_i965_driver },
2166 { 0, 0, 0, NULL, NULL, NULL } 2172 { 0, 0, 0, NULL, NULL, NULL }
2167}; 2173};
2168 2174
@@ -2360,6 +2366,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
2360 ID(PCI_DEVICE_ID_INTEL_IGD_E_HB), 2366 ID(PCI_DEVICE_ID_INTEL_IGD_E_HB),
2361 ID(PCI_DEVICE_ID_INTEL_Q45_HB), 2367 ID(PCI_DEVICE_ID_INTEL_Q45_HB),
2362 ID(PCI_DEVICE_ID_INTEL_G45_HB), 2368 ID(PCI_DEVICE_ID_INTEL_G45_HB),
2369 ID(PCI_DEVICE_ID_INTEL_G41_HB),
2363 { } 2370 { }
2364}; 2371};
2365 2372