diff options
author | Simon Horman <horms+renesas@verge.net.au> | 2013-06-26 04:34:34 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2013-07-17 01:24:40 -0400 |
commit | a4b91be0b607ffecf6cf9dacdefcaa0797340e3c (patch) | |
tree | cf258f5a7b762bbc6b99053ae2dfad13744f10e9 | |
parent | 66a5cab04d339d02b93a4671eadf8e251dbfdc2c (diff) |
ARM: shmobile: r8a7790: add clocks for thermal
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7790.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index 5d71313df52d..28eccd114ca7 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c | |||
@@ -49,6 +49,7 @@ | |||
49 | 49 | ||
50 | #define SMSTPCR2 0xe6150138 | 50 | #define SMSTPCR2 0xe6150138 |
51 | #define SMSTPCR3 0xe615013c | 51 | #define SMSTPCR3 0xe615013c |
52 | #define SMSTPCR5 0xe6150144 | ||
52 | #define SMSTPCR7 0xe615014c | 53 | #define SMSTPCR7 0xe615014c |
53 | 54 | ||
54 | #define MODEMR 0xE6160060 | 55 | #define MODEMR 0xE6160060 |
@@ -182,6 +183,7 @@ static struct clk div6_clks[DIV6_NR] = { | |||
182 | enum { | 183 | enum { |
183 | MSTP721, MSTP720, | 184 | MSTP721, MSTP720, |
184 | MSTP717, MSTP716, | 185 | MSTP717, MSTP716, |
186 | MSTP522, | ||
185 | MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, | 187 | MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, |
186 | MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, | 188 | MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, |
187 | MSTP_NR | 189 | MSTP_NR |
@@ -203,6 +205,7 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
203 | [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ | 205 | [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ |
204 | [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ | 206 | [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ |
205 | [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ | 207 | [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ |
208 | [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */ | ||
206 | [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */ | 209 | [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */ |
207 | [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */ | 210 | [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */ |
208 | }; | 211 | }; |
@@ -254,6 +257,7 @@ static struct clk_lookup lookups[] = { | |||
254 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), | 257 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), |
255 | CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]), | 258 | CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]), |
256 | CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]), | 259 | CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]), |
260 | CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), | ||
257 | CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]), | 261 | CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]), |
258 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]), | 262 | CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]), |
259 | CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), | 263 | CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), |