drm/radeon/kms: evergreen & ni reset SPI block on CP resume

For some reason SPI block is in broken state after module
unloading. This lead to broken rendering after reloading
module. Fix this by reseting SPI block in CP resume function

Signed-off-by: Jerome Glisse <jglisse@redhat.com
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>

2 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index fb5fa0898868..d8d71a399f52 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1357,6 +1357,7 @@ int evergreen_cp_resume(struct radeon_device *rdev)
                                  SOFT_RESET_PA |
                                  SOFT_RESET_SH |
                                  SOFT_RESET_VGT |
+                                 SOFT_RESET_SPI |
                                  SOFT_RESET_SX));
         RREG32(GRBM_SOFT_RESET);
         mdelay(15);
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 44c4750f4518..a2e00fa9c618 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1159,6 +1159,7 @@ int cayman_cp_resume(struct radeon_device *rdev)
                                  SOFT_RESET_PA |
                                  SOFT_RESET_SH |
                                  SOFT_RESET_VGT |
+                                 SOFT_RESET_SPI |
                                  SOFT_RESET_SX));
         RREG32(GRBM_SOFT_RESET);
         mdelay(15);