powerpc/pci: Fix IMMRBAR address

For PEXCSRBAR, bit 3-0 indicate prefetchable and address type.
So when getting base address, these bits should be masked,
otherwise we may get incorrect base address.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>

1 files changed, 8 insertions, 0 deletions

diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index a625dcf26b2b..8cdd34482575 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -868,6 +868,14 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose)
 
                 pci_bus_read_config_dword(hose->bus,
                         PCI_DEVFN(0, 0), PCI_BASE_ADDRESS_0, &base);
+
+                /*
+                 * For PEXCSRBAR, bit 3-0 indicate prefetchable and
+                 * address type. So when getting base address, these
+                 * bits should be masked
+                 */
+                base &= PCI_BASE_ADDRESS_MEM_MASK;
+
                 return base;
         }
 #endif