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authorLennert Buytenhek <buytenh@wantstofly.org>2010-11-29 05:18:26 -0500
committerLennert Buytenhek <buytenh@wantstofly.org>2011-01-13 11:18:56 -0500
commita3f4c927d379cfaa597bc8ff75dc9d28f8d9200e (patch)
tree39521557543e91134b5a7e190bdf7b7ac2787e04
parent406b005045ad18ffa08c439545801e1c8cec4b5e (diff)
ARM: PXA SoCs: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
-rw-r--r--arch/arm/mach-pxa/balloon3.c23
-rw-r--r--arch/arm/mach-pxa/cm-x2xx-pci.c2
-rw-r--r--arch/arm/mach-pxa/generic.h4
-rw-r--r--arch/arm/mach-pxa/irq.c50
-rw-r--r--arch/arm/mach-pxa/lpd270.c17
-rw-r--r--arch/arm/mach-pxa/lubbock.c17
-rw-r--r--arch/arm/mach-pxa/mainstone.c17
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c15
-rw-r--r--arch/arm/mach-pxa/pxa25x.c7
-rw-r--r--arch/arm/mach-pxa/pxa27x.c9
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c36
-rw-r--r--arch/arm/mach-pxa/viper.c22
-rw-r--r--arch/arm/mach-pxa/zeus.c22
-rw-r--r--arch/arm/plat-pxa/gpio.c28
-rw-r--r--arch/arm/plat-pxa/include/plat/gpio.h4
15 files changed, 144 insertions, 129 deletions
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index ccb2d0cebcc3..a134a1413e01 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -477,25 +477,25 @@ static inline void balloon3_leds_init(void) {}
477/****************************************************************************** 477/******************************************************************************
478 * FPGA IRQ 478 * FPGA IRQ
479 ******************************************************************************/ 479 ******************************************************************************/
480static void balloon3_mask_irq(unsigned int irq) 480static void balloon3_mask_irq(struct irq_data *d)
481{ 481{
482 int balloon3_irq = (irq - BALLOON3_IRQ(0)); 482 int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
483 balloon3_irq_enabled &= ~(1 << balloon3_irq); 483 balloon3_irq_enabled &= ~(1 << balloon3_irq);
484 __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); 484 __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
485} 485}
486 486
487static void balloon3_unmask_irq(unsigned int irq) 487static void balloon3_unmask_irq(struct irq_data *d)
488{ 488{
489 int balloon3_irq = (irq - BALLOON3_IRQ(0)); 489 int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
490 balloon3_irq_enabled |= (1 << balloon3_irq); 490 balloon3_irq_enabled |= (1 << balloon3_irq);
491 __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); 491 __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
492} 492}
493 493
494static struct irq_chip balloon3_irq_chip = { 494static struct irq_chip balloon3_irq_chip = {
495 .name = "FPGA", 495 .name = "FPGA",
496 .ack = balloon3_mask_irq, 496 .irq_ack = balloon3_mask_irq,
497 .mask = balloon3_mask_irq, 497 .irq_mask = balloon3_mask_irq,
498 .unmask = balloon3_unmask_irq, 498 .irq_unmask = balloon3_unmask_irq,
499}; 499};
500 500
501static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc) 501static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -504,8 +504,13 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc)
504 balloon3_irq_enabled; 504 balloon3_irq_enabled;
505 do { 505 do {
506 /* clear useless edge notification */ 506 /* clear useless edge notification */
507 if (desc->chip->ack) 507 if (desc->irq_data.chip->irq_ack) {
508 desc->chip->ack(BALLOON3_AUX_NIRQ); 508 struct irq_data *d;
509
510 d = irq_get_irq_data(BALLOON3_AUX_NIRQ);
511 desc->irq_data.chip->irq_ack(d);
512 }
513
509 while (pending) { 514 while (pending) {
510 irq = BALLOON3_IRQ(0) + __ffs(pending); 515 irq = BALLOON3_IRQ(0) + __ffs(pending);
511 generic_handle_irq(irq); 516 generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 0f3130599770..a2380cd76f80 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -59,7 +59,7 @@ void __init cmx2xx_pci_adjust_zones(unsigned long *zone_size,
59static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) 59static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
60{ 60{
61 /* clear our parent irq */ 61 /* clear our parent irq */
62 desc->chip->ack(irq); 62 desc->irq_data.chip->irq_ack(&desc->irq_data);
63 63
64 it8152_irq_demux(irq, desc); 64 it8152_irq_demux(irq, desc);
65} 65}
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 6205dc9a2b9d..a079d8baa45a 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -9,11 +9,13 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12struct irq_data;
12struct sys_timer; 13struct sys_timer;
13 14
14extern struct sys_timer pxa_timer; 15extern struct sys_timer pxa_timer;
15extern void __init pxa_init_irq(int irq_nr, 16extern void __init pxa_init_irq(int irq_nr,
16 int (*set_wake)(unsigned int, unsigned int)); 17 int (*set_wake)(struct irq_data *,
18 unsigned int));
17extern void __init pxa25x_init_irq(void); 19extern void __init pxa25x_init_irq(void);
18#ifdef CONFIG_CPU_PXA26x 20#ifdef CONFIG_CPU_PXA26x
19extern void __init pxa26x_init_irq(void); 21extern void __init pxa26x_init_irq(void);
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 54e91c9e71c8..3f7f5bf05f3a 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -53,37 +53,37 @@ static inline int cpu_has_ipr(void)
53 return !cpu_is_pxa25x(); 53 return !cpu_is_pxa25x();
54} 54}
55 55
56static void pxa_mask_irq(unsigned int irq) 56static void pxa_mask_irq(struct irq_data *d)
57{ 57{
58 void __iomem *base = get_irq_chip_data(irq); 58 void __iomem *base = irq_data_get_irq_chip_data(d);
59 uint32_t icmr = __raw_readl(base + ICMR); 59 uint32_t icmr = __raw_readl(base + ICMR);
60 60
61 icmr &= ~(1 << IRQ_BIT(irq)); 61 icmr &= ~(1 << IRQ_BIT(d->irq));
62 __raw_writel(icmr, base + ICMR); 62 __raw_writel(icmr, base + ICMR);
63} 63}
64 64
65static void pxa_unmask_irq(unsigned int irq) 65static void pxa_unmask_irq(struct irq_data *d)
66{ 66{
67 void __iomem *base = get_irq_chip_data(irq); 67 void __iomem *base = irq_data_get_irq_chip_data(d);
68 uint32_t icmr = __raw_readl(base + ICMR); 68 uint32_t icmr = __raw_readl(base + ICMR);
69 69
70 icmr |= 1 << IRQ_BIT(irq); 70 icmr |= 1 << IRQ_BIT(d->irq);
71 __raw_writel(icmr, base + ICMR); 71 __raw_writel(icmr, base + ICMR);
72} 72}
73 73
74static struct irq_chip pxa_internal_irq_chip = { 74static struct irq_chip pxa_internal_irq_chip = {
75 .name = "SC", 75 .name = "SC",
76 .ack = pxa_mask_irq, 76 .irq_ack = pxa_mask_irq,
77 .mask = pxa_mask_irq, 77 .irq_mask = pxa_mask_irq,
78 .unmask = pxa_unmask_irq, 78 .irq_unmask = pxa_unmask_irq,
79}; 79};
80 80
81/* 81/*
82 * GPIO IRQs for GPIO 0 and 1 82 * GPIO IRQs for GPIO 0 and 1
83 */ 83 */
84static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type) 84static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
85{ 85{
86 int gpio = irq - IRQ_GPIO0; 86 int gpio = d->irq - IRQ_GPIO0;
87 87
88 if (__gpio_is_occupied(gpio)) { 88 if (__gpio_is_occupied(gpio)) {
89 pr_err("%s failed: GPIO is configured\n", __func__); 89 pr_err("%s failed: GPIO is configured\n", __func__);
@@ -103,31 +103,31 @@ static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type)
103 return 0; 103 return 0;
104} 104}
105 105
106static void pxa_ack_low_gpio(unsigned int irq) 106static void pxa_ack_low_gpio(struct irq_data *d)
107{ 107{
108 GEDR0 = (1 << (irq - IRQ_GPIO0)); 108 GEDR0 = (1 << (d->irq - IRQ_GPIO0));
109} 109}
110 110
111static void pxa_mask_low_gpio(unsigned int irq) 111static void pxa_mask_low_gpio(struct irq_data *d)
112{ 112{
113 struct irq_desc *desc = irq_to_desc(irq); 113 struct irq_desc *desc = irq_to_desc(d->irq);
114 114
115 desc->chip->mask(irq); 115 desc->irq_data.chip->irq_mask(d);
116} 116}
117 117
118static void pxa_unmask_low_gpio(unsigned int irq) 118static void pxa_unmask_low_gpio(struct irq_data *d)
119{ 119{
120 struct irq_desc *desc = irq_to_desc(irq); 120 struct irq_desc *desc = irq_to_desc(d->irq);
121 121
122 desc->chip->unmask(irq); 122 desc->irq_data.chip->irq_unmask(d);
123} 123}
124 124
125static struct irq_chip pxa_low_gpio_chip = { 125static struct irq_chip pxa_low_gpio_chip = {
126 .name = "GPIO-l", 126 .name = "GPIO-l",
127 .ack = pxa_ack_low_gpio, 127 .irq_ack = pxa_ack_low_gpio,
128 .mask = pxa_mask_low_gpio, 128 .irq_mask = pxa_mask_low_gpio,
129 .unmask = pxa_unmask_low_gpio, 129 .irq_unmask = pxa_unmask_low_gpio,
130 .set_type = pxa_set_low_gpio_type, 130 .irq_set_type = pxa_set_low_gpio_type,
131}; 131};
132 132
133static void __init pxa_init_low_gpio_irq(set_wake_t fn) 133static void __init pxa_init_low_gpio_irq(set_wake_t fn)
@@ -145,7 +145,7 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn)
145 set_irq_flags(irq, IRQF_VALID); 145 set_irq_flags(irq, IRQF_VALID);
146 } 146 }
147 147
148 pxa_low_gpio_chip.set_wake = fn; 148 pxa_low_gpio_chip.irq_set_wake = fn;
149} 149}
150 150
151static inline void __iomem *irq_base(int i) 151static inline void __iomem *irq_base(int i)
@@ -188,7 +188,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
188 /* only unmasked interrupts kick us out of idle */ 188 /* only unmasked interrupts kick us out of idle */
189 __raw_writel(1, irq_base(0) + ICCR); 189 __raw_writel(1, irq_base(0) + ICCR);
190 190
191 pxa_internal_irq_chip.set_wake = fn; 191 pxa_internal_irq_chip.irq_set_wake = fn;
192 pxa_init_low_gpio_irq(fn); 192 pxa_init_low_gpio_irq(fn);
193} 193}
194 194
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 8ab62a677807..c9a3e775c2de 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -95,9 +95,9 @@ static unsigned long lpd270_pin_config[] __initdata = {
95 95
96static unsigned int lpd270_irq_enabled; 96static unsigned int lpd270_irq_enabled;
97 97
98static void lpd270_mask_irq(unsigned int irq) 98static void lpd270_mask_irq(struct irq_data *d)
99{ 99{
100 int lpd270_irq = irq - LPD270_IRQ(0); 100 int lpd270_irq = d->irq - LPD270_IRQ(0);
101 101
102 __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS); 102 __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
103 103
@@ -105,9 +105,9 @@ static void lpd270_mask_irq(unsigned int irq)
105 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); 105 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
106} 106}
107 107
108static void lpd270_unmask_irq(unsigned int irq) 108static void lpd270_unmask_irq(struct irq_data *d)
109{ 109{
110 int lpd270_irq = irq - LPD270_IRQ(0); 110 int lpd270_irq = d->irq - LPD270_IRQ(0);
111 111
112 lpd270_irq_enabled |= 1 << lpd270_irq; 112 lpd270_irq_enabled |= 1 << lpd270_irq;
113 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); 113 __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
@@ -115,9 +115,9 @@ static void lpd270_unmask_irq(unsigned int irq)
115 115
116static struct irq_chip lpd270_irq_chip = { 116static struct irq_chip lpd270_irq_chip = {
117 .name = "CPLD", 117 .name = "CPLD",
118 .ack = lpd270_mask_irq, 118 .irq_ack = lpd270_mask_irq,
119 .mask = lpd270_mask_irq, 119 .irq_mask = lpd270_mask_irq,
120 .unmask = lpd270_unmask_irq, 120 .irq_unmask = lpd270_unmask_irq,
121}; 121};
122 122
123static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc) 123static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -126,7 +126,8 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
126 126
127 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled; 127 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
128 do { 128 do {
129 desc->chip->ack(irq); /* clear useless edge notification */ 129 /* clear useless edge notification */
130 desc->irq_data.chip->irq_ack(&desc->irq_data);
130 if (likely(pending)) { 131 if (likely(pending)) {
131 irq = LPD270_IRQ(0) + __ffs(pending); 132 irq = LPD270_IRQ(0) + __ffs(pending);
132 generic_handle_irq(irq); 133 generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 3072dbea5c1f..dca20de306bb 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -122,15 +122,15 @@ EXPORT_SYMBOL(lubbock_set_misc_wr);
122 122
123static unsigned long lubbock_irq_enabled; 123static unsigned long lubbock_irq_enabled;
124 124
125static void lubbock_mask_irq(unsigned int irq) 125static void lubbock_mask_irq(struct irq_data *d)
126{ 126{
127 int lubbock_irq = (irq - LUBBOCK_IRQ(0)); 127 int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
128 LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq)); 128 LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq));
129} 129}
130 130
131static void lubbock_unmask_irq(unsigned int irq) 131static void lubbock_unmask_irq(struct irq_data *d)
132{ 132{
133 int lubbock_irq = (irq - LUBBOCK_IRQ(0)); 133 int lubbock_irq = (d->irq - LUBBOCK_IRQ(0));
134 /* the irq can be acknowledged only if deasserted, so it's done here */ 134 /* the irq can be acknowledged only if deasserted, so it's done here */
135 LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq); 135 LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq);
136 LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq)); 136 LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq));
@@ -138,16 +138,17 @@ static void lubbock_unmask_irq(unsigned int irq)
138 138
139static struct irq_chip lubbock_irq_chip = { 139static struct irq_chip lubbock_irq_chip = {
140 .name = "FPGA", 140 .name = "FPGA",
141 .ack = lubbock_mask_irq, 141 .irq_ack = lubbock_mask_irq,
142 .mask = lubbock_mask_irq, 142 .irq_mask = lubbock_mask_irq,
143 .unmask = lubbock_unmask_irq, 143 .irq_unmask = lubbock_unmask_irq,
144}; 144};
145 145
146static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc) 146static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc)
147{ 147{
148 unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; 148 unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled;
149 do { 149 do {
150 desc->chip->ack(irq); /* clear our parent irq */ 150 /* clear our parent irq */
151 desc->irq_data.chip->irq_ack(&desc->irq_data);
151 if (likely(pending)) { 152 if (likely(pending)) {
152 irq = LUBBOCK_IRQ(0) + __ffs(pending); 153 irq = LUBBOCK_IRQ(0) + __ffs(pending);
153 generic_handle_irq(irq); 154 generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index 740c03590e3b..d4b6f2375f2c 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -123,15 +123,15 @@ static unsigned long mainstone_pin_config[] = {
123 123
124static unsigned long mainstone_irq_enabled; 124static unsigned long mainstone_irq_enabled;
125 125
126static void mainstone_mask_irq(unsigned int irq) 126static void mainstone_mask_irq(struct irq_data *d)
127{ 127{
128 int mainstone_irq = (irq - MAINSTONE_IRQ(0)); 128 int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
129 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); 129 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
130} 130}
131 131
132static void mainstone_unmask_irq(unsigned int irq) 132static void mainstone_unmask_irq(struct irq_data *d)
133{ 133{
134 int mainstone_irq = (irq - MAINSTONE_IRQ(0)); 134 int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
135 /* the irq can be acknowledged only if deasserted, so it's done here */ 135 /* the irq can be acknowledged only if deasserted, so it's done here */
136 MST_INTSETCLR &= ~(1 << mainstone_irq); 136 MST_INTSETCLR &= ~(1 << mainstone_irq);
137 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); 137 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
@@ -139,16 +139,17 @@ static void mainstone_unmask_irq(unsigned int irq)
139 139
140static struct irq_chip mainstone_irq_chip = { 140static struct irq_chip mainstone_irq_chip = {
141 .name = "FPGA", 141 .name = "FPGA",
142 .ack = mainstone_mask_irq, 142 .irq_ack = mainstone_mask_irq,
143 .mask = mainstone_mask_irq, 143 .irq_mask = mainstone_mask_irq,
144 .unmask = mainstone_unmask_irq, 144 .irq_unmask = mainstone_unmask_irq,
145}; 145};
146 146
147static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) 147static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
148{ 148{
149 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; 149 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
150 do { 150 do {
151 desc->chip->ack(irq); /* clear useless edge notification */ 151 /* clear useless edge notification */
152 desc->irq_data.chip->irq_ack(&desc->irq_data);
152 if (likely(pending)) { 153 if (likely(pending)) {
153 irq = MAINSTONE_IRQ(0) + __ffs(pending); 154 irq = MAINSTONE_IRQ(0) + __ffs(pending);
154 generic_handle_irq(irq); 155 generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index f33647a8e0b7..90820faa711a 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -241,23 +241,23 @@ static struct platform_device pcm990_backlight_device = {
241 241
242static unsigned long pcm990_irq_enabled; 242static unsigned long pcm990_irq_enabled;
243 243
244static void pcm990_mask_ack_irq(unsigned int irq) 244static void pcm990_mask_ack_irq(struct irq_data *d)
245{ 245{
246 int pcm990_irq = (irq - PCM027_IRQ(0)); 246 int pcm990_irq = (d->irq - PCM027_IRQ(0));
247 PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq)); 247 PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
248} 248}
249 249
250static void pcm990_unmask_irq(unsigned int irq) 250static void pcm990_unmask_irq(struct irq_data *d)
251{ 251{
252 int pcm990_irq = (irq - PCM027_IRQ(0)); 252 int pcm990_irq = (d->irq - PCM027_IRQ(0));
253 /* the irq can be acknowledged only if deasserted, so it's done here */ 253 /* the irq can be acknowledged only if deasserted, so it's done here */
254 PCM990_INTSETCLR |= 1 << pcm990_irq; 254 PCM990_INTSETCLR |= 1 << pcm990_irq;
255 PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq)); 255 PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq));
256} 256}
257 257
258static struct irq_chip pcm990_irq_chip = { 258static struct irq_chip pcm990_irq_chip = {
259 .mask_ack = pcm990_mask_ack_irq, 259 .irq_mask_ack = pcm990_mask_ack_irq,
260 .unmask = pcm990_unmask_irq, 260 .irq_unmask = pcm990_unmask_irq,
261}; 261};
262 262
263static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc) 263static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -265,7 +265,8 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
265 unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; 265 unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
266 266
267 do { 267 do {
268 desc->chip->ack(irq); /* clear our parent IRQ */ 268 /* clear our parent IRQ */
269 desc->irq_data.chip->irq_ack(&desc->irq_data);
269 if (likely(pending)) { 270 if (likely(pending)) {
270 irq = PCM027_IRQ(0) + __ffs(pending); 271 irq = PCM027_IRQ(0) + __ffs(pending);
271 generic_handle_irq(irq); 272 generic_handle_irq(irq);
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 3f5241c84894..fbc5b775f895 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -22,6 +22,7 @@
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/suspend.h> 23#include <linux/suspend.h>
24#include <linux/sysdev.h> 24#include <linux/sysdev.h>
25#include <linux/irq.h>
25 26
26#include <asm/mach/map.h> 27#include <asm/mach/map.h>
27#include <mach/hardware.h> 28#include <mach/hardware.h>
@@ -282,15 +283,15 @@ static inline void pxa25x_init_pm(void) {}
282/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm 283/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
283 */ 284 */
284 285
285static int pxa25x_set_wake(unsigned int irq, unsigned int on) 286static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
286{ 287{
287 int gpio = IRQ_TO_GPIO(irq); 288 int gpio = IRQ_TO_GPIO(d->irq);
288 uint32_t mask = 0; 289 uint32_t mask = 0;
289 290
290 if (gpio >= 0 && gpio < 85) 291 if (gpio >= 0 && gpio < 85)
291 return gpio_set_wake(gpio, on); 292 return gpio_set_wake(gpio, on);
292 293
293 if (irq == IRQ_RTCAlrm) { 294 if (d->irq == IRQ_RTCAlrm) {
294 mask = PWER_RTC; 295 mask = PWER_RTC;
295 goto set_pwer; 296 goto set_pwer;
296 } 297 }
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index b2130b7a7b52..987301ff4c33 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -18,6 +18,7 @@
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/sysdev.h> 19#include <linux/sysdev.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/irq.h>
21 22
22#include <asm/mach/map.h> 23#include <asm/mach/map.h>
23#include <mach/hardware.h> 24#include <mach/hardware.h>
@@ -343,18 +344,18 @@ static inline void pxa27x_init_pm(void) {}
343/* PXA27x: Various gpios can issue wakeup events. This logic only 344/* PXA27x: Various gpios can issue wakeup events. This logic only
344 * handles the simple cases, not the WEMUX2 and WEMUX3 options 345 * handles the simple cases, not the WEMUX2 and WEMUX3 options
345 */ 346 */
346static int pxa27x_set_wake(unsigned int irq, unsigned int on) 347static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
347{ 348{
348 int gpio = IRQ_TO_GPIO(irq); 349 int gpio = IRQ_TO_GPIO(d->irq);
349 uint32_t mask; 350 uint32_t mask;
350 351
351 if (gpio >= 0 && gpio < 128) 352 if (gpio >= 0 && gpio < 128)
352 return gpio_set_wake(gpio, on); 353 return gpio_set_wake(gpio, on);
353 354
354 if (irq == IRQ_KEYPAD) 355 if (d->irq == IRQ_KEYPAD)
355 return keypad_set_wake(on); 356 return keypad_set_wake(on);
356 357
357 switch (irq) { 358 switch (d->irq) {
358 case IRQ_RTCAlrm: 359 case IRQ_RTCAlrm:
359 mask = PWER_RTC; 360 mask = PWER_RTC;
360 break; 361 break;
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index e14818f5d950..a7a19e1cd640 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -229,11 +229,11 @@ static void __init pxa3xx_init_pm(void)
229 pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns; 229 pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns;
230} 230}
231 231
232static int pxa3xx_set_wake(unsigned int irq, unsigned int on) 232static int pxa3xx_set_wake(struct irq_data *d, unsigned int on)
233{ 233{
234 unsigned long flags, mask = 0; 234 unsigned long flags, mask = 0;
235 235
236 switch (irq) { 236 switch (d->irq) {
237 case IRQ_SSP3: 237 case IRQ_SSP3:
238 mask = ADXER_MFP_WSSP3; 238 mask = ADXER_MFP_WSSP3;
239 break; 239 break;
@@ -322,40 +322,40 @@ static inline void pxa3xx_init_pm(void) {}
322#define pxa3xx_set_wake NULL 322#define pxa3xx_set_wake NULL
323#endif 323#endif
324 324
325static void pxa_ack_ext_wakeup(unsigned int irq) 325static void pxa_ack_ext_wakeup(struct irq_data *d)
326{ 326{
327 PECR |= PECR_IS(irq - IRQ_WAKEUP0); 327 PECR |= PECR_IS(d->irq - IRQ_WAKEUP0);
328} 328}
329 329
330static void pxa_mask_ext_wakeup(unsigned int irq) 330static void pxa_mask_ext_wakeup(struct irq_data *d)
331{ 331{
332 ICMR2 &= ~(1 << ((irq - PXA_IRQ(0)) & 0x1f)); 332 ICMR2 &= ~(1 << ((d->irq - PXA_IRQ(0)) & 0x1f));
333 PECR &= ~PECR_IE(irq - IRQ_WAKEUP0); 333 PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0);
334} 334}
335 335
336static void pxa_unmask_ext_wakeup(unsigned int irq) 336static void pxa_unmask_ext_wakeup(struct irq_data *d)
337{ 337{
338 ICMR2 |= 1 << ((irq - PXA_IRQ(0)) & 0x1f); 338 ICMR2 |= 1 << ((d->irq - PXA_IRQ(0)) & 0x1f);
339 PECR |= PECR_IE(irq - IRQ_WAKEUP0); 339 PECR |= PECR_IE(d->irq - IRQ_WAKEUP0);
340} 340}
341 341
342static int pxa_set_ext_wakeup_type(unsigned int irq, unsigned int flow_type) 342static int pxa_set_ext_wakeup_type(struct irq_data *d, unsigned int flow_type)
343{ 343{
344 if (flow_type & IRQ_TYPE_EDGE_RISING) 344 if (flow_type & IRQ_TYPE_EDGE_RISING)
345 PWER |= 1 << (irq - IRQ_WAKEUP0); 345 PWER |= 1 << (d->irq - IRQ_WAKEUP0);
346 346
347 if (flow_type & IRQ_TYPE_EDGE_FALLING) 347 if (flow_type & IRQ_TYPE_EDGE_FALLING)
348 PWER |= 1 << (irq - IRQ_WAKEUP0 + 2); 348 PWER |= 1 << (d->irq - IRQ_WAKEUP0 + 2);
349 349
350 return 0; 350 return 0;
351} 351}
352 352
353static struct irq_chip pxa_ext_wakeup_chip = { 353static struct irq_chip pxa_ext_wakeup_chip = {
354 .name = "WAKEUP", 354 .name = "WAKEUP",
355 .ack = pxa_ack_ext_wakeup, 355 .irq_ack = pxa_ack_ext_wakeup,
356 .mask = pxa_mask_ext_wakeup, 356 .irq_mask = pxa_mask_ext_wakeup,
357 .unmask = pxa_unmask_ext_wakeup, 357 .irq_unmask = pxa_unmask_ext_wakeup,
358 .set_type = pxa_set_ext_wakeup_type, 358 .irq_set_type = pxa_set_ext_wakeup_type,
359}; 359};
360 360
361static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) 361static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
@@ -368,7 +368,7 @@ static void __init pxa_init_ext_wakeup_irq(set_wake_t fn)
368 set_irq_flags(irq, IRQF_VALID); 368 set_irq_flags(irq, IRQF_VALID);
369 } 369 }
370 370
371 pxa_ext_wakeup_chip.set_wake = fn; 371 pxa_ext_wakeup_chip.irq_set_wake = fn;
372} 372}
373 373
374void __init pxa3xx_init_irq(void) 374void __init pxa3xx_init_irq(void)
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index de69b203afa7..49eeeab23689 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -249,9 +249,9 @@ static inline int viper_bit_to_irq(int bit)
249 return viper_isa_irqs[bit] + PXA_ISA_IRQ(0); 249 return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
250} 250}
251 251
252static void viper_ack_irq(unsigned int irq) 252static void viper_ack_irq(struct irq_data *d)
253{ 253{
254 int viper_irq = viper_irq_to_bitmask(irq); 254 int viper_irq = viper_irq_to_bitmask(d->irq);
255 255
256 if (viper_irq & 0xff) 256 if (viper_irq & 0xff)
257 VIPER_LO_IRQ_STATUS = viper_irq; 257 VIPER_LO_IRQ_STATUS = viper_irq;
@@ -259,14 +259,14 @@ static void viper_ack_irq(unsigned int irq)
259 VIPER_HI_IRQ_STATUS = (viper_irq >> 8); 259 VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
260} 260}
261 261
262static void viper_mask_irq(unsigned int irq) 262static void viper_mask_irq(struct irq_data *d)
263{ 263{
264 viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq)); 264 viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
265} 265}
266 266
267static void viper_unmask_irq(unsigned int irq) 267static void viper_unmask_irq(struct irq_data *d)
268{ 268{
269 viper_irq_enabled_mask |= viper_irq_to_bitmask(irq); 269 viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
270} 270}
271 271
272static inline unsigned long viper_irq_pending(void) 272static inline unsigned long viper_irq_pending(void)
@@ -283,7 +283,7 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
283 do { 283 do {
284 /* we're in a chained irq handler, 284 /* we're in a chained irq handler,
285 * so ack the interrupt by hand */ 285 * so ack the interrupt by hand */
286 desc->chip->ack(irq); 286 desc->irq_data.chip->irq_ack(&desc->irq_data);
287 287
288 if (likely(pending)) { 288 if (likely(pending)) {
289 irq = viper_bit_to_irq(__ffs(pending)); 289 irq = viper_bit_to_irq(__ffs(pending));
@@ -294,10 +294,10 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
294} 294}
295 295
296static struct irq_chip viper_irq_chip = { 296static struct irq_chip viper_irq_chip = {
297 .name = "ISA", 297 .name = "ISA",
298 .ack = viper_ack_irq, 298 .irq_ack = viper_ack_irq,
299 .mask = viper_mask_irq, 299 .irq_mask = viper_mask_irq,
300 .unmask = viper_unmask_irq 300 .irq_unmask = viper_unmask_irq
301}; 301};
302 302
303static void __init viper_init_irq(void) 303static void __init viper_init_irq(void)
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index bf034c7670dd..a894770d203b 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -83,19 +83,19 @@ static inline int zeus_bit_to_irq(int bit)
83 return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0); 83 return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0);
84} 84}
85 85
86static void zeus_ack_irq(unsigned int irq) 86static void zeus_ack_irq(struct irq_data *d)
87{ 87{
88 __raw_writew(zeus_irq_to_bitmask(irq), ZEUS_CPLD_ISA_IRQ); 88 __raw_writew(zeus_irq_to_bitmask(d->irq), ZEUS_CPLD_ISA_IRQ);
89} 89}
90 90
91static void zeus_mask_irq(unsigned int irq) 91static void zeus_mask_irq(struct irq_data *d)
92{ 92{
93 zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(irq)); 93 zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(d->irq));
94} 94}
95 95
96static void zeus_unmask_irq(unsigned int irq) 96static void zeus_unmask_irq(struct irq_data *d)
97{ 97{
98 zeus_irq_enabled_mask |= zeus_irq_to_bitmask(irq); 98 zeus_irq_enabled_mask |= zeus_irq_to_bitmask(d->irq);
99} 99}
100 100
101static inline unsigned long zeus_irq_pending(void) 101static inline unsigned long zeus_irq_pending(void)
@@ -111,7 +111,7 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
111 do { 111 do {
112 /* we're in a chained irq handler, 112 /* we're in a chained irq handler,
113 * so ack the interrupt by hand */ 113 * so ack the interrupt by hand */
114 desc->chip->ack(gpio_to_irq(ZEUS_ISA_GPIO)); 114 desc->irq_data.chip->irq_ack(&desc->irq_data);
115 115
116 if (likely(pending)) { 116 if (likely(pending)) {
117 irq = zeus_bit_to_irq(__ffs(pending)); 117 irq = zeus_bit_to_irq(__ffs(pending));
@@ -122,10 +122,10 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
122} 122}
123 123
124static struct irq_chip zeus_irq_chip = { 124static struct irq_chip zeus_irq_chip = {
125 .name = "ISA", 125 .name = "ISA",
126 .ack = zeus_ack_irq, 126 .irq_ack = zeus_ack_irq,
127 .mask = zeus_mask_irq, 127 .irq_mask = zeus_mask_irq,
128 .unmask = zeus_unmask_irq, 128 .irq_unmask = zeus_unmask_irq,
129}; 129};
130 130
131static void __init zeus_init_irq(void) 131static void __init zeus_init_irq(void)
diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c
index 98548c6903a0..e7de6ae2a1e8 100644
--- a/arch/arm/plat-pxa/gpio.c
+++ b/arch/arm/plat-pxa/gpio.c
@@ -155,10 +155,10 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c)
155 __raw_writel(gfer, c->regbase + GFER_OFFSET); 155 __raw_writel(gfer, c->regbase + GFER_OFFSET);
156} 156}
157 157
158static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) 158static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
159{ 159{
160 struct pxa_gpio_chip *c; 160 struct pxa_gpio_chip *c;
161 int gpio = irq_to_gpio(irq); 161 int gpio = irq_to_gpio(d->irq);
162 unsigned long gpdr, mask = GPIO_bit(gpio); 162 unsigned long gpdr, mask = GPIO_bit(gpio);
163 163
164 c = gpio_to_chip(gpio); 164 c = gpio_to_chip(gpio);
@@ -195,7 +195,7 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
195 195
196 update_edge_detect(c); 196 update_edge_detect(c);
197 197
198 pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, irq, gpio, 198 pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, d->irq, gpio,
199 ((type & IRQ_TYPE_EDGE_RISING) ? " rising" : ""), 199 ((type & IRQ_TYPE_EDGE_RISING) ? " rising" : ""),
200 ((type & IRQ_TYPE_EDGE_FALLING) ? " falling" : "")); 200 ((type & IRQ_TYPE_EDGE_FALLING) ? " falling" : ""));
201 return 0; 201 return 0;
@@ -227,17 +227,17 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
227 } while (loop); 227 } while (loop);
228} 228}
229 229
230static void pxa_ack_muxed_gpio(unsigned int irq) 230static void pxa_ack_muxed_gpio(struct irq_data *d)
231{ 231{
232 int gpio = irq_to_gpio(irq); 232 int gpio = irq_to_gpio(d->irq);
233 struct pxa_gpio_chip *c = gpio_to_chip(gpio); 233 struct pxa_gpio_chip *c = gpio_to_chip(gpio);
234 234
235 __raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET); 235 __raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
236} 236}
237 237
238static void pxa_mask_muxed_gpio(unsigned int irq) 238static void pxa_mask_muxed_gpio(struct irq_data *d)
239{ 239{
240 int gpio = irq_to_gpio(irq); 240 int gpio = irq_to_gpio(d->irq);
241 struct pxa_gpio_chip *c = gpio_to_chip(gpio); 241 struct pxa_gpio_chip *c = gpio_to_chip(gpio);
242 uint32_t grer, gfer; 242 uint32_t grer, gfer;
243 243
@@ -249,9 +249,9 @@ static void pxa_mask_muxed_gpio(unsigned int irq)
249 __raw_writel(gfer, c->regbase + GFER_OFFSET); 249 __raw_writel(gfer, c->regbase + GFER_OFFSET);
250} 250}
251 251
252static void pxa_unmask_muxed_gpio(unsigned int irq) 252static void pxa_unmask_muxed_gpio(struct irq_data *d)
253{ 253{
254 int gpio = irq_to_gpio(irq); 254 int gpio = irq_to_gpio(d->irq);
255 struct pxa_gpio_chip *c = gpio_to_chip(gpio); 255 struct pxa_gpio_chip *c = gpio_to_chip(gpio);
256 256
257 c->irq_mask |= GPIO_bit(gpio); 257 c->irq_mask |= GPIO_bit(gpio);
@@ -260,10 +260,10 @@ static void pxa_unmask_muxed_gpio(unsigned int irq)
260 260
261static struct irq_chip pxa_muxed_gpio_chip = { 261static struct irq_chip pxa_muxed_gpio_chip = {
262 .name = "GPIO", 262 .name = "GPIO",
263 .ack = pxa_ack_muxed_gpio, 263 .irq_ack = pxa_ack_muxed_gpio,
264 .mask = pxa_mask_muxed_gpio, 264 .irq_mask = pxa_mask_muxed_gpio,
265 .unmask = pxa_unmask_muxed_gpio, 265 .irq_unmask = pxa_unmask_muxed_gpio,
266 .set_type = pxa_gpio_irq_type, 266 .irq_set_type = pxa_gpio_irq_type,
267}; 267};
268 268
269void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn) 269void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
@@ -291,7 +291,7 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn)
291 291
292 /* Install handler for GPIO>=2 edge detect interrupts */ 292 /* Install handler for GPIO>=2 edge detect interrupts */
293 set_irq_chained_handler(mux_irq, pxa_gpio_demux_handler); 293 set_irq_chained_handler(mux_irq, pxa_gpio_demux_handler);
294 pxa_muxed_gpio_chip.set_wake = fn; 294 pxa_muxed_gpio_chip.irq_set_wake = fn;
295} 295}
296 296
297#ifdef CONFIG_PM 297#ifdef CONFIG_PM
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
index 44248cb926a5..1ddd2b97a729 100644
--- a/arch/arm/plat-pxa/include/plat/gpio.h
+++ b/arch/arm/plat-pxa/include/plat/gpio.h
@@ -1,6 +1,8 @@
1#ifndef __PLAT_GPIO_H 1#ifndef __PLAT_GPIO_H
2#define __PLAT_GPIO_H 2#define __PLAT_GPIO_H
3 3
4struct irq_data;
5
4/* 6/*
5 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with 7 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
6 * one set of registers. The register offsets are organized below: 8 * one set of registers. The register offsets are organized below:
@@ -56,7 +58,7 @@ static inline void gpio_set_value(unsigned gpio, int value)
56 */ 58 */
57extern int pxa_last_gpio; 59extern int pxa_last_gpio;
58 60
59typedef int (*set_wake_t)(unsigned int irq, unsigned int on); 61typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
60 62
61extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn); 63extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
62#endif /* __PLAT_GPIO_H */ 64#endif /* __PLAT_GPIO_H */