diff options
| author | Omar Ramirez Luna <omar.ramirez@ti.com> | 2012-04-20 21:22:41 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-04-24 14:57:36 -0400 |
| commit | a2cd62ec9a3a2805014bdc14e0644b5faa352d3c (patch) | |
| tree | b4583526aae2f5e6ad809b08f0a07918157a9ce6 | |
| parent | 66f75a5d028beaf67c931435fdc3e7823125730c (diff) | |
staging: tidspbridge: remove usage of OMAP2_L4_IO_ADDRESS
Instead now use ioremap. This is needed for 3.4 since this change
emerged in mainline during one of the previous rc cycles.
These solves the following compilation breaks:
drivers/staging/tidspbridge/core/tiomap3430.c:
In function ‘bridge_brd_start’:
drivers/staging/tidspbridge/core/tiomap3430.c:425:4:
error: implicit declaration of function ‘OMAP2_L4_IO_ADDRESS’
drivers/staging/tidspbridge/core/wdt.c: In function ‘dsp_wdt_init’:
drivers/staging/tidspbridge/core/wdt.c:56:2:
error: implicit declaration of function ‘OMAP2_L4_IO_ADDRESS’
For control registers a new function needs to be defined so we
can get rid of a layer violation, but that approach must be queued
for the next merge window.
As seen in:
http://www.arm.linux.org.uk/developer/build/
platform: omap4430-sdp build: uImage
config: randconfig version: 3.4.0-rc3
start time: Apr 20 2012 01:07
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/staging/tidspbridge/core/tiomap3430.c | 20 | ||||
| -rw-r--r-- | drivers/staging/tidspbridge/core/wdt.c | 8 |
2 files changed, 19 insertions, 9 deletions
diff --git a/drivers/staging/tidspbridge/core/tiomap3430.c b/drivers/staging/tidspbridge/core/tiomap3430.c index 7862513cc295..9cf29fcea11e 100644 --- a/drivers/staging/tidspbridge/core/tiomap3430.c +++ b/drivers/staging/tidspbridge/core/tiomap3430.c | |||
| @@ -79,10 +79,6 @@ | |||
| 79 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) | 79 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) |
| 80 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) | 80 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) |
| 81 | 81 | ||
| 82 | #define OMAP343X_CTRL_REGADDR(reg) \ | ||
| 83 | OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) | ||
| 84 | |||
| 85 | |||
| 86 | /* Forward Declarations: */ | 82 | /* Forward Declarations: */ |
| 87 | static int bridge_brd_monitor(struct bridge_dev_context *dev_ctxt); | 83 | static int bridge_brd_monitor(struct bridge_dev_context *dev_ctxt); |
| 88 | static int bridge_brd_read(struct bridge_dev_context *dev_ctxt, | 84 | static int bridge_brd_read(struct bridge_dev_context *dev_ctxt, |
| @@ -418,19 +414,27 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt, | |||
| 418 | 414 | ||
| 419 | /* Assert RST1 i.e only the RST only for DSP megacell */ | 415 | /* Assert RST1 i.e only the RST only for DSP megacell */ |
| 420 | if (!status) { | 416 | if (!status) { |
| 417 | /* | ||
| 418 | * XXX: ioremapping MUST be removed once ctrl | ||
| 419 | * function is made available. | ||
| 420 | */ | ||
| 421 | void __iomem *ctrl = ioremap(OMAP343X_CTRL_BASE, SZ_4K); | ||
| 422 | if (!ctrl) | ||
| 423 | return -ENOMEM; | ||
| 424 | |||
| 421 | (*pdata->dsp_prm_rmw_bits)(OMAP3430_RST1_IVA2_MASK, | 425 | (*pdata->dsp_prm_rmw_bits)(OMAP3430_RST1_IVA2_MASK, |
| 422 | OMAP3430_RST1_IVA2_MASK, OMAP3430_IVA2_MOD, | 426 | OMAP3430_RST1_IVA2_MASK, OMAP3430_IVA2_MOD, |
| 423 | OMAP2_RM_RSTCTRL); | 427 | OMAP2_RM_RSTCTRL); |
| 424 | /* Mask address with 1K for compatibility */ | 428 | /* Mask address with 1K for compatibility */ |
| 425 | __raw_writel(dsp_addr & OMAP3_IVA2_BOOTADDR_MASK, | 429 | __raw_writel(dsp_addr & OMAP3_IVA2_BOOTADDR_MASK, |
| 426 | OMAP343X_CTRL_REGADDR( | 430 | ctrl + OMAP343X_CONTROL_IVA2_BOOTADDR); |
| 427 | OMAP343X_CONTROL_IVA2_BOOTADDR)); | ||
| 428 | /* | 431 | /* |
| 429 | * Set bootmode to self loop if dsp_debug flag is true | 432 | * Set bootmode to self loop if dsp_debug flag is true |
| 430 | */ | 433 | */ |
| 431 | __raw_writel((dsp_debug) ? OMAP3_IVA2_BOOTMOD_IDLE : 0, | 434 | __raw_writel((dsp_debug) ? OMAP3_IVA2_BOOTMOD_IDLE : 0, |
| 432 | OMAP343X_CTRL_REGADDR( | 435 | ctrl + OMAP343X_CONTROL_IVA2_BOOTMOD); |
| 433 | OMAP343X_CONTROL_IVA2_BOOTMOD)); | 436 | |
| 437 | iounmap(ctrl); | ||
| 434 | } | 438 | } |
| 435 | } | 439 | } |
| 436 | if (!status) { | 440 | if (!status) { |
diff --git a/drivers/staging/tidspbridge/core/wdt.c b/drivers/staging/tidspbridge/core/wdt.c index 70055c8111ed..870f934f4f3b 100644 --- a/drivers/staging/tidspbridge/core/wdt.c +++ b/drivers/staging/tidspbridge/core/wdt.c | |||
| @@ -53,7 +53,10 @@ int dsp_wdt_init(void) | |||
| 53 | int ret = 0; | 53 | int ret = 0; |
| 54 | 54 | ||
| 55 | dsp_wdt.sm_wdt = NULL; | 55 | dsp_wdt.sm_wdt = NULL; |
| 56 | dsp_wdt.reg_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_WDT3_BASE); | 56 | dsp_wdt.reg_base = ioremap(OMAP34XX_WDT3_BASE, SZ_4K); |
| 57 | if (!dsp_wdt.reg_base) | ||
| 58 | return -ENOMEM; | ||
| 59 | |||
| 57 | tasklet_init(&dsp_wdt.wdt3_tasklet, dsp_wdt_dpc, 0); | 60 | tasklet_init(&dsp_wdt.wdt3_tasklet, dsp_wdt_dpc, 0); |
| 58 | 61 | ||
| 59 | dsp_wdt.fclk = clk_get(NULL, "wdt3_fck"); | 62 | dsp_wdt.fclk = clk_get(NULL, "wdt3_fck"); |
| @@ -99,6 +102,9 @@ void dsp_wdt_exit(void) | |||
| 99 | dsp_wdt.fclk = NULL; | 102 | dsp_wdt.fclk = NULL; |
| 100 | dsp_wdt.iclk = NULL; | 103 | dsp_wdt.iclk = NULL; |
| 101 | dsp_wdt.sm_wdt = NULL; | 104 | dsp_wdt.sm_wdt = NULL; |
| 105 | |||
| 106 | if (dsp_wdt.reg_base) | ||
| 107 | iounmap(dsp_wdt.reg_base); | ||
| 102 | dsp_wdt.reg_base = NULL; | 108 | dsp_wdt.reg_base = NULL; |
| 103 | } | 109 | } |
| 104 | 110 | ||
