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authorSathya Perla <sathya.perla@emulex.com>2014-05-09 03:59:14 -0400
committerDavid S. Miller <davem@davemloft.net>2014-05-09 13:13:38 -0400
commita2cc4e0b93bd209b5284807864af48800cb40023 (patch)
treeeaaf437d795eba4fd8e719af2d2dfaa8802a0ba0
parent748b539ab761a50bde3aa4b7d6d0999b5d86206d (diff)
be2net: fix function call indentation in be_cmds.c
When a funtion definition or a function call spans more than one line, ensure that the first argument on the subsequent lines is aligned to the first column after the opening paranthesis of the function call. Signed-off-by: Sathya Perla <sathya.perla@emulex.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/emulex/benet/be_cmds.c340
1 files changed, 179 insertions, 161 deletions
diff --git a/drivers/net/ethernet/emulex/benet/be_cmds.c b/drivers/net/ethernet/emulex/benet/be_cmds.c
index 07e78e89a348..411ff9b97e7c 100644
--- a/drivers/net/ethernet/emulex/benet/be_cmds.c
+++ b/drivers/net/ethernet/emulex/benet/be_cmds.c
@@ -52,8 +52,7 @@ static struct be_cmd_priv_map cmd_priv_map[] = {
52 } 52 }
53}; 53};
54 54
55static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, 55static bool be_cmd_allowed(struct be_adapter *adapter, u8 opcode, u8 subsystem)
56 u8 subsystem)
57{ 56{
58 int i; 57 int i;
59 int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map); 58 int num_entries = sizeof(cmd_priv_map)/sizeof(struct be_cmd_priv_map);
@@ -197,7 +196,7 @@ done:
197 196
198/* Link state evt is a string of bytes; no need for endian swapping */ 197/* Link state evt is a string of bytes; no need for endian swapping */
199static void be_async_link_state_process(struct be_adapter *adapter, 198static void be_async_link_state_process(struct be_adapter *adapter,
200 struct be_async_event_link_state *evt) 199 struct be_async_event_link_state *evt)
201{ 200{
202 /* When link status changes, link speed must be re-queried from FW */ 201 /* When link status changes, link speed must be re-queried from FW */
203 adapter->phy.link_speed = -1; 202 adapter->phy.link_speed = -1;
@@ -221,7 +220,9 @@ static void be_async_link_state_process(struct be_adapter *adapter,
221 220
222/* Grp5 CoS Priority evt */ 221/* Grp5 CoS Priority evt */
223static void be_async_grp5_cos_priority_process(struct be_adapter *adapter, 222static void be_async_grp5_cos_priority_process(struct be_adapter *adapter,
224 struct be_async_event_grp5_cos_priority *evt) 223 struct
224 be_async_event_grp5_cos_priority
225 *evt)
225{ 226{
226 if (evt->valid) { 227 if (evt->valid) {
227 adapter->vlan_prio_bmap = evt->available_priority_bmap; 228 adapter->vlan_prio_bmap = evt->available_priority_bmap;
@@ -233,7 +234,9 @@ static void be_async_grp5_cos_priority_process(struct be_adapter *adapter,
233 234
234/* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */ 235/* Grp5 QOS Speed evt: qos_link_speed is in units of 10 Mbps */
235static void be_async_grp5_qos_speed_process(struct be_adapter *adapter, 236static void be_async_grp5_qos_speed_process(struct be_adapter *adapter,
236 struct be_async_event_grp5_qos_link_speed *evt) 237 struct
238 be_async_event_grp5_qos_link_speed
239 *evt)
237{ 240{
238 if (adapter->phy.link_speed >= 0 && 241 if (adapter->phy.link_speed >= 0 &&
239 evt->physical_port == adapter->port_num) 242 evt->physical_port == adapter->port_num)
@@ -242,7 +245,9 @@ static void be_async_grp5_qos_speed_process(struct be_adapter *adapter,
242 245
243/*Grp5 PVID evt*/ 246/*Grp5 PVID evt*/
244static void be_async_grp5_pvid_state_process(struct be_adapter *adapter, 247static void be_async_grp5_pvid_state_process(struct be_adapter *adapter,
245 struct be_async_event_grp5_pvid_state *evt) 248 struct
249 be_async_event_grp5_pvid_state
250 *evt)
246{ 251{
247 if (evt->enabled) { 252 if (evt->enabled) {
248 adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK; 253 adapter->pvid = le16_to_cpu(evt->tag) & VLAN_VID_MASK;
@@ -253,7 +258,7 @@ static void be_async_grp5_pvid_state_process(struct be_adapter *adapter,
253} 258}
254 259
255static void be_async_grp5_evt_process(struct be_adapter *adapter, 260static void be_async_grp5_evt_process(struct be_adapter *adapter,
256 u32 trailer, struct be_mcc_compl *evt) 261 u32 trailer, struct be_mcc_compl *evt)
257{ 262{
258 u8 event_type = 0; 263 u8 event_type = 0;
259 264
@@ -281,7 +286,7 @@ static void be_async_grp5_evt_process(struct be_adapter *adapter,
281} 286}
282 287
283static void be_async_dbg_evt_process(struct be_adapter *adapter, 288static void be_async_dbg_evt_process(struct be_adapter *adapter,
284 u32 trailer, struct be_mcc_compl *cmp) 289 u32 trailer, struct be_mcc_compl *cmp)
285{ 290{
286 u8 event_type = 0; 291 u8 event_type = 0;
287 struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp; 292 struct be_async_event_qnq *evt = (struct be_async_event_qnq *) cmp;
@@ -370,10 +375,10 @@ int be_process_mcc(struct be_adapter *adapter)
370 (struct be_async_event_link_state *) compl); 375 (struct be_async_event_link_state *) compl);
371 else if (is_grp5_evt(compl->flags)) 376 else if (is_grp5_evt(compl->flags))
372 be_async_grp5_evt_process(adapter, 377 be_async_grp5_evt_process(adapter,
373 compl->flags, compl); 378 compl->flags, compl);
374 else if (is_dbg_evt(compl->flags)) 379 else if (is_dbg_evt(compl->flags))
375 be_async_dbg_evt_process(adapter, 380 be_async_dbg_evt_process(adapter,
376 compl->flags, compl); 381 compl->flags, compl);
377 } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 382 } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) {
378 status = be_mcc_compl_process(adapter, compl); 383 status = be_mcc_compl_process(adapter, compl);
379 atomic_dec(&mcc_obj->q.used); 384 atomic_dec(&mcc_obj->q.used);
@@ -560,10 +565,8 @@ static bool lancer_provisioning_error(struct be_adapter *adapter)
560 u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0; 565 u32 sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0;
561 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET); 566 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
562 if (sliport_status & SLIPORT_STATUS_ERR_MASK) { 567 if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
563 sliport_err1 = ioread32(adapter->db + 568 sliport_err1 = ioread32(adapter->db + SLIPORT_ERROR1_OFFSET);
564 SLIPORT_ERROR1_OFFSET); 569 sliport_err2 = ioread32(adapter->db + SLIPORT_ERROR2_OFFSET);
565 sliport_err2 = ioread32(adapter->db +
566 SLIPORT_ERROR2_OFFSET);
567 570
568 if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 && 571 if (sliport_err1 == SLIPORT_ERROR_NO_RESOURCE1 &&
569 sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2) 572 sliport_err2 == SLIPORT_ERROR_NO_RESOURCE2)
@@ -630,8 +633,7 @@ int be_fw_wait_ready(struct be_adapter *adapter)
630 if (stage == POST_STAGE_ARMFW_RDY) 633 if (stage == POST_STAGE_ARMFW_RDY)
631 return 0; 634 return 0;
632 635
633 dev_info(dev, "Waiting for POST, %ds elapsed\n", 636 dev_info(dev, "Waiting for POST, %ds elapsed\n", timeout);
634 timeout);
635 if (msleep_interruptible(2000)) { 637 if (msleep_interruptible(2000)) {
636 dev_err(dev, "Waiting for POST aborted\n"); 638 dev_err(dev, "Waiting for POST aborted\n");
637 return -EINTR; 639 return -EINTR;
@@ -649,8 +651,7 @@ static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
649 return &wrb->payload.sgl[0]; 651 return &wrb->payload.sgl[0];
650} 652}
651 653
652static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, 654static inline void fill_wrb_tags(struct be_mcc_wrb *wrb, unsigned long addr)
653 unsigned long addr)
654{ 655{
655 wrb->tag0 = addr & 0xFFFFFFFF; 656 wrb->tag0 = addr & 0xFFFFFFFF;
656 wrb->tag1 = upper_32_bits(addr); 657 wrb->tag1 = upper_32_bits(addr);
@@ -659,8 +660,9 @@ static inline void fill_wrb_tags(struct be_mcc_wrb *wrb,
659/* Don't touch the hdr after it's prepared */ 660/* Don't touch the hdr after it's prepared */
660/* mem will be NULL for embedded commands */ 661/* mem will be NULL for embedded commands */
661static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 662static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
662 u8 subsystem, u8 opcode, int cmd_len, 663 u8 subsystem, u8 opcode, int cmd_len,
663 struct be_mcc_wrb *wrb, struct be_dma_mem *mem) 664 struct be_mcc_wrb *wrb,
665 struct be_dma_mem *mem)
664{ 666{
665 struct be_sge *sge; 667 struct be_sge *sge;
666 668
@@ -683,7 +685,7 @@ static void be_wrb_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
683} 685}
684 686
685static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 687static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages,
686 struct be_dma_mem *mem) 688 struct be_dma_mem *mem)
687{ 689{
688 int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages); 690 int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages);
689 u64 dma = (u64)mem->dma; 691 u64 dma = (u64)mem->dma;
@@ -868,7 +870,8 @@ int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo)
868 req = embedded_payload(wrb); 870 req = embedded_payload(wrb);
869 871
870 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 872 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
871 OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb, NULL); 873 OPCODE_COMMON_EQ_CREATE, sizeof(*req), wrb,
874 NULL);
872 875
873 /* Support for EQ_CREATEv2 available only SH-R onwards */ 876 /* Support for EQ_CREATEv2 available only SH-R onwards */
874 if (!(BEx_chip(adapter) || lancer_chip(adapter))) 877 if (!(BEx_chip(adapter) || lancer_chip(adapter)))
@@ -917,7 +920,8 @@ int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
917 req = embedded_payload(wrb); 920 req = embedded_payload(wrb);
918 921
919 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 922 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
920 OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb, NULL); 923 OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req), wrb,
924 NULL);
921 req->type = MAC_ADDRESS_TYPE_NETWORK; 925 req->type = MAC_ADDRESS_TYPE_NETWORK;
922 if (permanent) { 926 if (permanent) {
923 req->permanent = 1; 927 req->permanent = 1;
@@ -940,7 +944,7 @@ err:
940 944
941/* Uses synchronous MCCQ */ 945/* Uses synchronous MCCQ */
942int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 946int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
943 u32 if_id, u32 *pmac_id, u32 domain) 947 u32 if_id, u32 *pmac_id, u32 domain)
944{ 948{
945 struct be_mcc_wrb *wrb; 949 struct be_mcc_wrb *wrb;
946 struct be_cmd_req_pmac_add *req; 950 struct be_cmd_req_pmac_add *req;
@@ -956,7 +960,8 @@ int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
956 req = embedded_payload(wrb); 960 req = embedded_payload(wrb);
957 961
958 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 962 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
959 OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb, NULL); 963 OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req), wrb,
964 NULL);
960 965
961 req->hdr.domain = domain; 966 req->hdr.domain = domain;
962 req->if_id = cpu_to_le32(if_id); 967 req->if_id = cpu_to_le32(if_id);
@@ -1012,7 +1017,7 @@ err:
1012 1017
1013/* Uses Mbox */ 1018/* Uses Mbox */
1014int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq, 1019int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq,
1015 struct be_queue_info *eq, bool no_delay, int coalesce_wm) 1020 struct be_queue_info *eq, bool no_delay, int coalesce_wm)
1016{ 1021{
1017 struct be_mcc_wrb *wrb; 1022 struct be_mcc_wrb *wrb;
1018 struct be_cmd_req_cq_create *req; 1023 struct be_cmd_req_cq_create *req;
@@ -1028,17 +1033,18 @@ int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq,
1028 ctxt = &req->context; 1033 ctxt = &req->context;
1029 1034
1030 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1035 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1031 OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb, NULL); 1036 OPCODE_COMMON_CQ_CREATE, sizeof(*req), wrb,
1037 NULL);
1032 1038
1033 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1039 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
1034 1040
1035 if (BEx_chip(adapter)) { 1041 if (BEx_chip(adapter)) {
1036 AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt, 1042 AMAP_SET_BITS(struct amap_cq_context_be, coalescwm, ctxt,
1037 coalesce_wm); 1043 coalesce_wm);
1038 AMAP_SET_BITS(struct amap_cq_context_be, nodelay, 1044 AMAP_SET_BITS(struct amap_cq_context_be, nodelay,
1039 ctxt, no_delay); 1045 ctxt, no_delay);
1040 AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt, 1046 AMAP_SET_BITS(struct amap_cq_context_be, count, ctxt,
1041 __ilog2_u32(cq->len/256)); 1047 __ilog2_u32(cq->len / 256));
1042 AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1); 1048 AMAP_SET_BITS(struct amap_cq_context_be, valid, ctxt, 1);
1043 AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1); 1049 AMAP_SET_BITS(struct amap_cq_context_be, eventable, ctxt, 1);
1044 AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id); 1050 AMAP_SET_BITS(struct amap_cq_context_be, eqid, ctxt, eq->id);
@@ -1053,14 +1059,12 @@ int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq,
1053 AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm, 1059 AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm,
1054 ctxt, coalesce_wm); 1060 ctxt, coalesce_wm);
1055 AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt, 1061 AMAP_SET_BITS(struct amap_cq_context_v2, nodelay, ctxt,
1056 no_delay); 1062 no_delay);
1057 AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt, 1063 AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt,
1058 __ilog2_u32(cq->len/256)); 1064 __ilog2_u32(cq->len / 256));
1059 AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1); 1065 AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1);
1060 AMAP_SET_BITS(struct amap_cq_context_v2, eventable, 1066 AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1);
1061 ctxt, 1); 1067 AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id);
1062 AMAP_SET_BITS(struct amap_cq_context_v2, eqid,
1063 ctxt, eq->id);
1064 } 1068 }
1065 1069
1066 be_dws_cpu_to_le(ctxt, sizeof(req->context)); 1070 be_dws_cpu_to_le(ctxt, sizeof(req->context));
@@ -1088,8 +1092,8 @@ static u32 be_encoded_q_len(int q_len)
1088} 1092}
1089 1093
1090static int be_cmd_mccq_ext_create(struct be_adapter *adapter, 1094static int be_cmd_mccq_ext_create(struct be_adapter *adapter,
1091 struct be_queue_info *mccq, 1095 struct be_queue_info *mccq,
1092 struct be_queue_info *cq) 1096 struct be_queue_info *cq)
1093{ 1097{
1094 struct be_mcc_wrb *wrb; 1098 struct be_mcc_wrb *wrb;
1095 struct be_cmd_req_mcc_ext_create *req; 1099 struct be_cmd_req_mcc_ext_create *req;
@@ -1105,13 +1109,14 @@ static int be_cmd_mccq_ext_create(struct be_adapter *adapter,
1105 ctxt = &req->context; 1109 ctxt = &req->context;
1106 1110
1107 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1111 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1108 OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb, NULL); 1112 OPCODE_COMMON_MCC_CREATE_EXT, sizeof(*req), wrb,
1113 NULL);
1109 1114
1110 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1115 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
1111 if (BEx_chip(adapter)) { 1116 if (BEx_chip(adapter)) {
1112 AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 1117 AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1);
1113 AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 1118 AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt,
1114 be_encoded_q_len(mccq->len)); 1119 be_encoded_q_len(mccq->len));
1115 AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1120 AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id);
1116 } else { 1121 } else {
1117 req->hdr.version = 1; 1122 req->hdr.version = 1;
@@ -1145,8 +1150,8 @@ static int be_cmd_mccq_ext_create(struct be_adapter *adapter,
1145} 1150}
1146 1151
1147static int be_cmd_mccq_org_create(struct be_adapter *adapter, 1152static int be_cmd_mccq_org_create(struct be_adapter *adapter,
1148 struct be_queue_info *mccq, 1153 struct be_queue_info *mccq,
1149 struct be_queue_info *cq) 1154 struct be_queue_info *cq)
1150{ 1155{
1151 struct be_mcc_wrb *wrb; 1156 struct be_mcc_wrb *wrb;
1152 struct be_cmd_req_mcc_create *req; 1157 struct be_cmd_req_mcc_create *req;
@@ -1162,13 +1167,14 @@ static int be_cmd_mccq_org_create(struct be_adapter *adapter,
1162 ctxt = &req->context; 1167 ctxt = &req->context;
1163 1168
1164 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1169 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1165 OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb, NULL); 1170 OPCODE_COMMON_MCC_CREATE, sizeof(*req), wrb,
1171 NULL);
1166 1172
1167 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size)); 1173 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
1168 1174
1169 AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1); 1175 AMAP_SET_BITS(struct amap_mcc_context_be, valid, ctxt, 1);
1170 AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt, 1176 AMAP_SET_BITS(struct amap_mcc_context_be, ring_size, ctxt,
1171 be_encoded_q_len(mccq->len)); 1177 be_encoded_q_len(mccq->len));
1172 AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id); 1178 AMAP_SET_BITS(struct amap_mcc_context_be, cq_id, ctxt, cq->id);
1173 1179
1174 be_dws_cpu_to_le(ctxt, sizeof(req->context)); 1180 be_dws_cpu_to_le(ctxt, sizeof(req->context));
@@ -1187,8 +1193,7 @@ static int be_cmd_mccq_org_create(struct be_adapter *adapter,
1187} 1193}
1188 1194
1189int be_cmd_mccq_create(struct be_adapter *adapter, 1195int be_cmd_mccq_create(struct be_adapter *adapter,
1190 struct be_queue_info *mccq, 1196 struct be_queue_info *mccq, struct be_queue_info *cq)
1191 struct be_queue_info *cq)
1192{ 1197{
1193 int status; 1198 int status;
1194 1199
@@ -1213,7 +1218,7 @@ int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo)
1213 1218
1214 req = embedded_payload(&wrb); 1219 req = embedded_payload(&wrb);
1215 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1220 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1216 OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL); 1221 OPCODE_ETH_TX_CREATE, sizeof(*req), &wrb, NULL);
1217 1222
1218 if (lancer_chip(adapter)) { 1223 if (lancer_chip(adapter)) {
1219 req->hdr.version = 1; 1224 req->hdr.version = 1;
@@ -1250,8 +1255,8 @@ int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo)
1250 1255
1251/* Uses MCC */ 1256/* Uses MCC */
1252int be_cmd_rxq_create(struct be_adapter *adapter, 1257int be_cmd_rxq_create(struct be_adapter *adapter,
1253 struct be_queue_info *rxq, u16 cq_id, u16 frag_size, 1258 struct be_queue_info *rxq, u16 cq_id, u16 frag_size,
1254 u32 if_id, u32 rss, u8 *rss_id) 1259 u32 if_id, u32 rss, u8 *rss_id)
1255{ 1260{
1256 struct be_mcc_wrb *wrb; 1261 struct be_mcc_wrb *wrb;
1257 struct be_cmd_req_eth_rx_create *req; 1262 struct be_cmd_req_eth_rx_create *req;
@@ -1268,7 +1273,7 @@ int be_cmd_rxq_create(struct be_adapter *adapter,
1268 req = embedded_payload(wrb); 1273 req = embedded_payload(wrb);
1269 1274
1270 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1275 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1271 OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL); 1276 OPCODE_ETH_RX_CREATE, sizeof(*req), wrb, NULL);
1272 1277
1273 req->cq_id = cpu_to_le16(cq_id); 1278 req->cq_id = cpu_to_le16(cq_id);
1274 req->frag_size = fls(frag_size) - 1; 1279 req->frag_size = fls(frag_size) - 1;
@@ -1295,7 +1300,7 @@ err:
1295 * Uses Mbox 1300 * Uses Mbox
1296 */ 1301 */
1297int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, 1302int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
1298 int queue_type) 1303 int queue_type)
1299{ 1304{
1300 struct be_mcc_wrb *wrb; 1305 struct be_mcc_wrb *wrb;
1301 struct be_cmd_req_q_destroy *req; 1306 struct be_cmd_req_q_destroy *req;
@@ -1334,7 +1339,7 @@ int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
1334 } 1339 }
1335 1340
1336 be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb, 1341 be_wrb_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req), wrb,
1337 NULL); 1342 NULL);
1338 req->id = cpu_to_le16(q->id); 1343 req->id = cpu_to_le16(q->id);
1339 1344
1340 status = be_mbox_notify_wait(adapter); 1345 status = be_mbox_notify_wait(adapter);
@@ -1361,7 +1366,7 @@ int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q)
1361 req = embedded_payload(wrb); 1366 req = embedded_payload(wrb);
1362 1367
1363 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1368 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1364 OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL); 1369 OPCODE_ETH_RX_DESTROY, sizeof(*req), wrb, NULL);
1365 req->id = cpu_to_le16(q->id); 1370 req->id = cpu_to_le16(q->id);
1366 1371
1367 status = be_mcc_notify_wait(adapter); 1372 status = be_mcc_notify_wait(adapter);
@@ -1384,7 +1389,8 @@ int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
1384 1389
1385 req = embedded_payload(&wrb); 1390 req = embedded_payload(&wrb);
1386 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1391 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1387 OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req), &wrb, NULL); 1392 OPCODE_COMMON_NTWK_INTERFACE_CREATE,
1393 sizeof(*req), &wrb, NULL);
1388 req->hdr.domain = domain; 1394 req->hdr.domain = domain;
1389 req->capability_flags = cpu_to_le32(cap_flags); 1395 req->capability_flags = cpu_to_le32(cap_flags);
1390 req->enable_flags = cpu_to_le32(en_flags); 1396 req->enable_flags = cpu_to_le32(en_flags);
@@ -1422,7 +1428,8 @@ int be_cmd_if_destroy(struct be_adapter *adapter, int interface_id, u32 domain)
1422 req = embedded_payload(wrb); 1428 req = embedded_payload(wrb);
1423 1429
1424 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1430 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1425 OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req), wrb, NULL); 1431 OPCODE_COMMON_NTWK_INTERFACE_DESTROY,
1432 sizeof(*req), wrb, NULL);
1426 req->hdr.domain = domain; 1433 req->hdr.domain = domain;
1427 req->interface_id = cpu_to_le32(interface_id); 1434 req->interface_id = cpu_to_le32(interface_id);
1428 1435
@@ -1452,7 +1459,8 @@ int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd)
1452 hdr = nonemb_cmd->va; 1459 hdr = nonemb_cmd->va;
1453 1460
1454 be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH, 1461 be_wrb_cmd_hdr_prepare(hdr, CMD_SUBSYSTEM_ETH,
1455 OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb, nonemb_cmd); 1462 OPCODE_ETH_GET_STATISTICS, nonemb_cmd->size, wrb,
1463 nonemb_cmd);
1456 1464
1457 /* version 1 of the cmd is not supported only by BE2 */ 1465 /* version 1 of the cmd is not supported only by BE2 */
1458 if (BE2_chip(adapter)) 1466 if (BE2_chip(adapter))
@@ -1472,7 +1480,7 @@ err:
1472 1480
1473/* Lancer Stats */ 1481/* Lancer Stats */
1474int lancer_cmd_get_pport_stats(struct be_adapter *adapter, 1482int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
1475 struct be_dma_mem *nonemb_cmd) 1483 struct be_dma_mem *nonemb_cmd)
1476{ 1484{
1477 1485
1478 struct be_mcc_wrb *wrb; 1486 struct be_mcc_wrb *wrb;
@@ -1493,8 +1501,8 @@ int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
1493 req = nonemb_cmd->va; 1501 req = nonemb_cmd->va;
1494 1502
1495 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 1503 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
1496 OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size, wrb, 1504 OPCODE_ETH_GET_PPORT_STATS, nonemb_cmd->size,
1497 nonemb_cmd); 1505 wrb, nonemb_cmd);
1498 1506
1499 req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num); 1507 req->cmd_params.params.pport_num = cpu_to_le16(adapter->hba_port_num);
1500 req->cmd_params.params.reset_stats = 0; 1508 req->cmd_params.params.reset_stats = 0;
@@ -1553,7 +1561,8 @@ int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
1553 req = embedded_payload(wrb); 1561 req = embedded_payload(wrb);
1554 1562
1555 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1563 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1556 OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req), wrb, NULL); 1564 OPCODE_COMMON_NTWK_LINK_STATUS_QUERY,
1565 sizeof(*req), wrb, NULL);
1557 1566
1558 /* version 1 of the cmd is not supported only by BE2 */ 1567 /* version 1 of the cmd is not supported only by BE2 */
1559 if (!BE2_chip(adapter)) 1568 if (!BE2_chip(adapter))
@@ -1598,8 +1607,8 @@ int be_cmd_get_die_temperature(struct be_adapter *adapter)
1598 req = embedded_payload(wrb); 1607 req = embedded_payload(wrb);
1599 1608
1600 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1609 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1601 OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES, sizeof(*req), 1610 OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES,
1602 wrb, NULL); 1611 sizeof(*req), wrb, NULL);
1603 1612
1604 be_mcc_notify(adapter); 1613 be_mcc_notify(adapter);
1605 1614
@@ -1625,7 +1634,8 @@ int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size)
1625 req = embedded_payload(wrb); 1634 req = embedded_payload(wrb);
1626 1635
1627 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1636 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1628 OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb, NULL); 1637 OPCODE_COMMON_MANAGE_FAT, sizeof(*req), wrb,
1638 NULL);
1629 req->fat_operation = cpu_to_le32(QUERY_FAT); 1639 req->fat_operation = cpu_to_le32(QUERY_FAT);
1630 status = be_mcc_notify_wait(adapter); 1640 status = be_mcc_notify_wait(adapter);
1631 if (!status) { 1641 if (!status) {
@@ -1655,8 +1665,8 @@ void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf)
1655 1665
1656 get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024; 1666 get_fat_cmd.size = sizeof(struct be_cmd_req_get_fat) + 60*1024;
1657 get_fat_cmd.va = pci_alloc_consistent(adapter->pdev, 1667 get_fat_cmd.va = pci_alloc_consistent(adapter->pdev,
1658 get_fat_cmd.size, 1668 get_fat_cmd.size,
1659 &get_fat_cmd.dma); 1669 &get_fat_cmd.dma);
1660 if (!get_fat_cmd.va) { 1670 if (!get_fat_cmd.va) {
1661 status = -ENOMEM; 1671 status = -ENOMEM;
1662 dev_err(&adapter->pdev->dev, 1672 dev_err(&adapter->pdev->dev,
@@ -1679,8 +1689,8 @@ void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf)
1679 1689
1680 payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size; 1690 payload_len = sizeof(struct be_cmd_req_get_fat) + buf_size;
1681 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1691 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1682 OPCODE_COMMON_MANAGE_FAT, payload_len, wrb, 1692 OPCODE_COMMON_MANAGE_FAT, payload_len,
1683 &get_fat_cmd); 1693 wrb, &get_fat_cmd);
1684 1694
1685 req->fat_operation = cpu_to_le32(RETRIEVE_FAT); 1695 req->fat_operation = cpu_to_le32(RETRIEVE_FAT);
1686 req->read_log_offset = cpu_to_le32(log_offset); 1696 req->read_log_offset = cpu_to_le32(log_offset);
@@ -1691,8 +1701,8 @@ void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf)
1691 if (!status) { 1701 if (!status) {
1692 struct be_cmd_resp_get_fat *resp = get_fat_cmd.va; 1702 struct be_cmd_resp_get_fat *resp = get_fat_cmd.va;
1693 memcpy(buf + offset, 1703 memcpy(buf + offset,
1694 resp->data_buffer, 1704 resp->data_buffer,
1695 le32_to_cpu(resp->read_log_length)); 1705 le32_to_cpu(resp->read_log_length));
1696 } else { 1706 } else {
1697 dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n"); 1707 dev_err(&adapter->pdev->dev, "FAT Table Retrieve error\n");
1698 goto err; 1708 goto err;
@@ -1702,14 +1712,13 @@ void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf)
1702 } 1712 }
1703err: 1713err:
1704 pci_free_consistent(adapter->pdev, get_fat_cmd.size, 1714 pci_free_consistent(adapter->pdev, get_fat_cmd.size,
1705 get_fat_cmd.va, 1715 get_fat_cmd.va, get_fat_cmd.dma);
1706 get_fat_cmd.dma);
1707 spin_unlock_bh(&adapter->mcc_lock); 1716 spin_unlock_bh(&adapter->mcc_lock);
1708} 1717}
1709 1718
1710/* Uses synchronous mcc */ 1719/* Uses synchronous mcc */
1711int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver, 1720int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver,
1712 char *fw_on_flash) 1721 char *fw_on_flash)
1713{ 1722{
1714 struct be_mcc_wrb *wrb; 1723 struct be_mcc_wrb *wrb;
1715 struct be_cmd_req_get_fw_version *req; 1724 struct be_cmd_req_get_fw_version *req;
@@ -1726,7 +1735,8 @@ int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver,
1726 req = embedded_payload(wrb); 1735 req = embedded_payload(wrb);
1727 1736
1728 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1737 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1729 OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb, NULL); 1738 OPCODE_COMMON_GET_FW_VERSION, sizeof(*req), wrb,
1739 NULL);
1730 status = be_mcc_notify_wait(adapter); 1740 status = be_mcc_notify_wait(adapter);
1731 if (!status) { 1741 if (!status) {
1732 struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); 1742 struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb);
@@ -1759,7 +1769,8 @@ int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *set_eqd,
1759 req = embedded_payload(wrb); 1769 req = embedded_payload(wrb);
1760 1770
1761 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1771 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1762 OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb, NULL); 1772 OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req), wrb,
1773 NULL);
1763 1774
1764 req->num_eq = cpu_to_le32(num); 1775 req->num_eq = cpu_to_le32(num);
1765 for (i = 0; i < num; i++) { 1776 for (i = 0; i < num; i++) {
@@ -1793,7 +1804,8 @@ int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
1793 req = embedded_payload(wrb); 1804 req = embedded_payload(wrb);
1794 1805
1795 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1806 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1796 OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req), wrb, NULL); 1807 OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req),
1808 wrb, NULL);
1797 1809
1798 req->interface_id = if_id; 1810 req->interface_id = if_id;
1799 req->promiscuous = promiscuous; 1811 req->promiscuous = promiscuous;
@@ -1801,7 +1813,7 @@ int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
1801 req->num_vlan = num; 1813 req->num_vlan = num;
1802 if (!promiscuous) { 1814 if (!promiscuous) {
1803 memcpy(req->normal_vlan, vtag_array, 1815 memcpy(req->normal_vlan, vtag_array,
1804 req->num_vlan * sizeof(vtag_array[0])); 1816 req->num_vlan * sizeof(vtag_array[0]));
1805 } 1817 }
1806 1818
1807 status = be_mcc_notify_wait(adapter); 1819 status = be_mcc_notify_wait(adapter);
@@ -1827,18 +1839,19 @@ int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value)
1827 } 1839 }
1828 memset(req, 0, sizeof(*req)); 1840 memset(req, 0, sizeof(*req));
1829 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1841 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1830 OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req), 1842 OPCODE_COMMON_NTWK_RX_FILTER, sizeof(*req),
1831 wrb, mem); 1843 wrb, mem);
1832 1844
1833 req->if_id = cpu_to_le32(adapter->if_handle); 1845 req->if_id = cpu_to_le32(adapter->if_handle);
1834 if (flags & IFF_PROMISC) { 1846 if (flags & IFF_PROMISC) {
1835 req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1847 req->if_flags_mask = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS |
1836 BE_IF_FLAGS_VLAN_PROMISCUOUS | 1848 BE_IF_FLAGS_VLAN_PROMISCUOUS |
1837 BE_IF_FLAGS_MCAST_PROMISCUOUS); 1849 BE_IF_FLAGS_MCAST_PROMISCUOUS);
1838 if (value == ON) 1850 if (value == ON)
1839 req->if_flags = cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS | 1851 req->if_flags =
1840 BE_IF_FLAGS_VLAN_PROMISCUOUS | 1852 cpu_to_le32(BE_IF_FLAGS_PROMISCUOUS |
1841 BE_IF_FLAGS_MCAST_PROMISCUOUS); 1853 BE_IF_FLAGS_VLAN_PROMISCUOUS |
1854 BE_IF_FLAGS_MCAST_PROMISCUOUS);
1842 } else if (flags & IFF_ALLMULTI) { 1855 } else if (flags & IFF_ALLMULTI) {
1843 req->if_flags_mask = req->if_flags = 1856 req->if_flags_mask = req->if_flags =
1844 cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS); 1857 cpu_to_le32(BE_IF_FLAGS_MCAST_PROMISCUOUS);
@@ -1867,7 +1880,7 @@ int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value)
1867 } 1880 }
1868 1881
1869 if ((req->if_flags_mask & cpu_to_le32(be_if_cap_flags(adapter))) != 1882 if ((req->if_flags_mask & cpu_to_le32(be_if_cap_flags(adapter))) !=
1870 req->if_flags_mask) { 1883 req->if_flags_mask) {
1871 dev_warn(&adapter->pdev->dev, 1884 dev_warn(&adapter->pdev->dev,
1872 "Cannot set rx filter flags 0x%x\n", 1885 "Cannot set rx filter flags 0x%x\n",
1873 req->if_flags_mask); 1886 req->if_flags_mask);
@@ -1905,7 +1918,8 @@ int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc)
1905 req = embedded_payload(wrb); 1918 req = embedded_payload(wrb);
1906 1919
1907 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1920 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1908 OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 1921 OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req),
1922 wrb, NULL);
1909 1923
1910 req->tx_flow_control = cpu_to_le16((u16)tx_fc); 1924 req->tx_flow_control = cpu_to_le16((u16)tx_fc);
1911 req->rx_flow_control = cpu_to_le16((u16)rx_fc); 1925 req->rx_flow_control = cpu_to_le16((u16)rx_fc);
@@ -1938,7 +1952,8 @@ int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc)
1938 req = embedded_payload(wrb); 1952 req = embedded_payload(wrb);
1939 1953
1940 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1954 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1941 OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req), wrb, NULL); 1955 OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req),
1956 wrb, NULL);
1942 1957
1943 status = be_mcc_notify_wait(adapter); 1958 status = be_mcc_notify_wait(adapter);
1944 if (!status) { 1959 if (!status) {
@@ -1968,7 +1983,8 @@ int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num,
1968 req = embedded_payload(wrb); 1983 req = embedded_payload(wrb);
1969 1984
1970 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 1985 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1971 OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req), wrb, NULL); 1986 OPCODE_COMMON_QUERY_FIRMWARE_CONFIG,
1987 sizeof(*req), wrb, NULL);
1972 1988
1973 status = be_mbox_notify_wait(adapter); 1989 status = be_mbox_notify_wait(adapter);
1974 if (!status) { 1990 if (!status) {
@@ -2011,7 +2027,8 @@ int be_cmd_reset_function(struct be_adapter *adapter)
2011 req = embedded_payload(wrb); 2027 req = embedded_payload(wrb);
2012 2028
2013 be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, 2029 be_wrb_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON,
2014 OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb, NULL); 2030 OPCODE_COMMON_FUNCTION_RESET, sizeof(*req), wrb,
2031 NULL);
2015 2032
2016 status = be_mbox_notify_wait(adapter); 2033 status = be_mbox_notify_wait(adapter);
2017 2034
@@ -2020,7 +2037,7 @@ int be_cmd_reset_function(struct be_adapter *adapter)
2020} 2037}
2021 2038
2022int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable, 2039int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
2023 u32 rss_hash_opts, u16 table_size, u8 *rss_hkey) 2040 u32 rss_hash_opts, u16 table_size, u8 *rss_hkey)
2024{ 2041{
2025 struct be_mcc_wrb *wrb; 2042 struct be_mcc_wrb *wrb;
2026 struct be_cmd_req_rss_config *req; 2043 struct be_cmd_req_rss_config *req;
@@ -2036,7 +2053,7 @@ int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
2036 req = embedded_payload(wrb); 2053 req = embedded_payload(wrb);
2037 2054
2038 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2055 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
2039 OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL); 2056 OPCODE_ETH_RSS_CONFIG, sizeof(*req), wrb, NULL);
2040 2057
2041 req->if_id = cpu_to_le32(adapter->if_handle); 2058 req->if_id = cpu_to_le32(adapter->if_handle);
2042 req->enable_rss = cpu_to_le16(rss_hash_opts); 2059 req->enable_rss = cpu_to_le16(rss_hash_opts);
@@ -2057,7 +2074,7 @@ int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
2057 2074
2058/* Uses sync mcc */ 2075/* Uses sync mcc */
2059int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, 2076int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num,
2060 u8 bcn, u8 sts, u8 state) 2077 u8 bcn, u8 sts, u8 state)
2061{ 2078{
2062 struct be_mcc_wrb *wrb; 2079 struct be_mcc_wrb *wrb;
2063 struct be_cmd_req_enable_disable_beacon *req; 2080 struct be_cmd_req_enable_disable_beacon *req;
@@ -2073,7 +2090,8 @@ int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num,
2073 req = embedded_payload(wrb); 2090 req = embedded_payload(wrb);
2074 2091
2075 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2092 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2076 OPCODE_COMMON_ENABLE_DISABLE_BEACON, sizeof(*req), wrb, NULL); 2093 OPCODE_COMMON_ENABLE_DISABLE_BEACON,
2094 sizeof(*req), wrb, NULL);
2077 2095
2078 req->port_num = port_num; 2096 req->port_num = port_num;
2079 req->beacon_state = state; 2097 req->beacon_state = state;
@@ -2104,7 +2122,8 @@ int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state)
2104 req = embedded_payload(wrb); 2122 req = embedded_payload(wrb);
2105 2123
2106 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2124 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2107 OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req), wrb, NULL); 2125 OPCODE_COMMON_GET_BEACON_STATE, sizeof(*req),
2126 wrb, NULL);
2108 2127
2109 req->port_num = port_num; 2128 req->port_num = port_num;
2110 2129
@@ -2143,20 +2162,20 @@ int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2143 req = embedded_payload(wrb); 2162 req = embedded_payload(wrb);
2144 2163
2145 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2164 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2146 OPCODE_COMMON_WRITE_OBJECT, 2165 OPCODE_COMMON_WRITE_OBJECT,
2147 sizeof(struct lancer_cmd_req_write_object), wrb, 2166 sizeof(struct lancer_cmd_req_write_object), wrb,
2148 NULL); 2167 NULL);
2149 2168
2150 ctxt = &req->context; 2169 ctxt = &req->context;
2151 AMAP_SET_BITS(struct amap_lancer_write_obj_context, 2170 AMAP_SET_BITS(struct amap_lancer_write_obj_context,
2152 write_length, ctxt, data_size); 2171 write_length, ctxt, data_size);
2153 2172
2154 if (data_size == 0) 2173 if (data_size == 0)
2155 AMAP_SET_BITS(struct amap_lancer_write_obj_context, 2174 AMAP_SET_BITS(struct amap_lancer_write_obj_context,
2156 eof, ctxt, 1); 2175 eof, ctxt, 1);
2157 else 2176 else
2158 AMAP_SET_BITS(struct amap_lancer_write_obj_context, 2177 AMAP_SET_BITS(struct amap_lancer_write_obj_context,
2159 eof, ctxt, 0); 2178 eof, ctxt, 0);
2160 2179
2161 be_dws_cpu_to_le(ctxt, sizeof(req->context)); 2180 be_dws_cpu_to_le(ctxt, sizeof(req->context));
2162 req->write_offset = cpu_to_le32(data_offset); 2181 req->write_offset = cpu_to_le32(data_offset);
@@ -2164,8 +2183,8 @@ int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2164 req->descriptor_count = cpu_to_le32(1); 2183 req->descriptor_count = cpu_to_le32(1);
2165 req->buf_len = cpu_to_le32(data_size); 2184 req->buf_len = cpu_to_le32(data_size);
2166 req->addr_low = cpu_to_le32((cmd->dma + 2185 req->addr_low = cpu_to_le32((cmd->dma +
2167 sizeof(struct lancer_cmd_req_write_object)) 2186 sizeof(struct lancer_cmd_req_write_object))
2168 & 0xFFFFFFFF); 2187 & 0xFFFFFFFF);
2169 req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + 2188 req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma +
2170 sizeof(struct lancer_cmd_req_write_object))); 2189 sizeof(struct lancer_cmd_req_write_object)));
2171 2190
@@ -2194,8 +2213,8 @@ err_unlock:
2194} 2213}
2195 2214
2196int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd, 2215int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2197 u32 data_size, u32 data_offset, const char *obj_name, 2216 u32 data_size, u32 data_offset, const char *obj_name,
2198 u32 *data_read, u32 *eof, u8 *addn_status) 2217 u32 *data_read, u32 *eof, u8 *addn_status)
2199{ 2218{
2200 struct be_mcc_wrb *wrb; 2219 struct be_mcc_wrb *wrb;
2201 struct lancer_cmd_req_read_object *req; 2220 struct lancer_cmd_req_read_object *req;
@@ -2213,9 +2232,9 @@ int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2213 req = embedded_payload(wrb); 2232 req = embedded_payload(wrb);
2214 2233
2215 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2234 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2216 OPCODE_COMMON_READ_OBJECT, 2235 OPCODE_COMMON_READ_OBJECT,
2217 sizeof(struct lancer_cmd_req_read_object), wrb, 2236 sizeof(struct lancer_cmd_req_read_object), wrb,
2218 NULL); 2237 NULL);
2219 2238
2220 req->desired_read_len = cpu_to_le32(data_size); 2239 req->desired_read_len = cpu_to_le32(data_size);
2221 req->read_offset = cpu_to_le32(data_offset); 2240 req->read_offset = cpu_to_le32(data_offset);
@@ -2241,7 +2260,7 @@ err_unlock:
2241} 2260}
2242 2261
2243int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, 2262int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
2244 u32 flash_type, u32 flash_opcode, u32 buf_size) 2263 u32 flash_type, u32 flash_opcode, u32 buf_size)
2245{ 2264{
2246 struct be_mcc_wrb *wrb; 2265 struct be_mcc_wrb *wrb;
2247 struct be_cmd_write_flashrom *req; 2266 struct be_cmd_write_flashrom *req;
@@ -2258,7 +2277,8 @@ int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
2258 req = cmd->va; 2277 req = cmd->va;
2259 2278
2260 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2279 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2261 OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb, cmd); 2280 OPCODE_COMMON_WRITE_FLASHROM, cmd->size, wrb,
2281 cmd);
2262 2282
2263 req->params.op_type = cpu_to_le32(flash_type); 2283 req->params.op_type = cpu_to_le32(flash_type);
2264 req->params.op_code = cpu_to_le32(flash_opcode); 2284 req->params.op_code = cpu_to_le32(flash_opcode);
@@ -2315,7 +2335,7 @@ err:
2315} 2335}
2316 2336
2317int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac, 2337int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
2318 struct be_dma_mem *nonemb_cmd) 2338 struct be_dma_mem *nonemb_cmd)
2319{ 2339{
2320 struct be_mcc_wrb *wrb; 2340 struct be_mcc_wrb *wrb;
2321 struct be_cmd_req_acpi_wol_magic_config *req; 2341 struct be_cmd_req_acpi_wol_magic_config *req;
@@ -2331,8 +2351,8 @@ int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
2331 req = nonemb_cmd->va; 2351 req = nonemb_cmd->va;
2332 2352
2333 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, 2353 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
2334 OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req), wrb, 2354 OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG, sizeof(*req),
2335 nonemb_cmd); 2355 wrb, nonemb_cmd);
2336 memcpy(req->magic_mac, mac, ETH_ALEN); 2356 memcpy(req->magic_mac, mac, ETH_ALEN);
2337 2357
2338 status = be_mcc_notify_wait(adapter); 2358 status = be_mcc_notify_wait(adapter);
@@ -2360,8 +2380,8 @@ int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
2360 req = embedded_payload(wrb); 2380 req = embedded_payload(wrb);
2361 2381
2362 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2382 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2363 OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req), wrb, 2383 OPCODE_LOWLEVEL_SET_LOOPBACK_MODE, sizeof(*req),
2364 NULL); 2384 wrb, NULL);
2365 2385
2366 req->src_port = port_num; 2386 req->src_port = port_num;
2367 req->dest_port = port_num; 2387 req->dest_port = port_num;
@@ -2375,7 +2395,8 @@ err:
2375} 2395}
2376 2396
2377int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 2397int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
2378 u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern) 2398 u32 loopback_type, u32 pkt_size, u32 num_pkts,
2399 u64 pattern)
2379{ 2400{
2380 struct be_mcc_wrb *wrb; 2401 struct be_mcc_wrb *wrb;
2381 struct be_cmd_req_loopback_test *req; 2402 struct be_cmd_req_loopback_test *req;
@@ -2393,7 +2414,8 @@ int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
2393 req = embedded_payload(wrb); 2414 req = embedded_payload(wrb);
2394 2415
2395 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2416 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2396 OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb, NULL); 2417 OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req), wrb,
2418 NULL);
2397 2419
2398 req->hdr.timeout = cpu_to_le32(15); 2420 req->hdr.timeout = cpu_to_le32(15);
2399 req->pattern = cpu_to_le64(pattern); 2421 req->pattern = cpu_to_le64(pattern);
@@ -2418,7 +2440,7 @@ err:
2418} 2440}
2419 2441
2420int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 2442int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
2421 u32 byte_cnt, struct be_dma_mem *cmd) 2443 u32 byte_cnt, struct be_dma_mem *cmd)
2422{ 2444{
2423 struct be_mcc_wrb *wrb; 2445 struct be_mcc_wrb *wrb;
2424 struct be_cmd_req_ddrdma_test *req; 2446 struct be_cmd_req_ddrdma_test *req;
@@ -2434,7 +2456,8 @@ int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
2434 } 2456 }
2435 req = cmd->va; 2457 req = cmd->va;
2436 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 2458 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
2437 OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb, cmd); 2459 OPCODE_LOWLEVEL_HOST_DDR_DMA, cmd->size, wrb,
2460 cmd);
2438 2461
2439 req->pattern = cpu_to_le64(pattern); 2462 req->pattern = cpu_to_le64(pattern);
2440 req->byte_count = cpu_to_le32(byte_cnt); 2463 req->byte_count = cpu_to_le32(byte_cnt);
@@ -2462,7 +2485,7 @@ err:
2462} 2485}
2463 2486
2464int be_cmd_get_seeprom_data(struct be_adapter *adapter, 2487int be_cmd_get_seeprom_data(struct be_adapter *adapter,
2465 struct be_dma_mem *nonemb_cmd) 2488 struct be_dma_mem *nonemb_cmd)
2466{ 2489{
2467 struct be_mcc_wrb *wrb; 2490 struct be_mcc_wrb *wrb;
2468 struct be_cmd_req_seeprom_read *req; 2491 struct be_cmd_req_seeprom_read *req;
@@ -2478,8 +2501,8 @@ int be_cmd_get_seeprom_data(struct be_adapter *adapter,
2478 req = nonemb_cmd->va; 2501 req = nonemb_cmd->va;
2479 2502
2480 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2503 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2481 OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb, 2504 OPCODE_COMMON_SEEPROM_READ, sizeof(*req), wrb,
2482 nonemb_cmd); 2505 nonemb_cmd);
2483 2506
2484 status = be_mcc_notify_wait(adapter); 2507 status = be_mcc_notify_wait(adapter);
2485 2508
@@ -2507,8 +2530,7 @@ int be_cmd_get_phy_info(struct be_adapter *adapter)
2507 goto err; 2530 goto err;
2508 } 2531 }
2509 cmd.size = sizeof(struct be_cmd_req_get_phy_info); 2532 cmd.size = sizeof(struct be_cmd_req_get_phy_info);
2510 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 2533 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
2511 &cmd.dma);
2512 if (!cmd.va) { 2534 if (!cmd.va) {
2513 dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 2535 dev_err(&adapter->pdev->dev, "Memory alloc failure\n");
2514 status = -ENOMEM; 2536 status = -ENOMEM;
@@ -2518,8 +2540,8 @@ int be_cmd_get_phy_info(struct be_adapter *adapter)
2518 req = cmd.va; 2540 req = cmd.va;
2519 2541
2520 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2542 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2521 OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req), 2543 OPCODE_COMMON_GET_PHY_DETAILS, sizeof(*req),
2522 wrb, &cmd); 2544 wrb, &cmd);
2523 2545
2524 status = be_mcc_notify_wait(adapter); 2546 status = be_mcc_notify_wait(adapter);
2525 if (!status) { 2547 if (!status) {
@@ -2541,8 +2563,7 @@ int be_cmd_get_phy_info(struct be_adapter *adapter)
2541 BE_SUPPORTED_SPEED_1GBPS; 2563 BE_SUPPORTED_SPEED_1GBPS;
2542 } 2564 }
2543 } 2565 }
2544 pci_free_consistent(adapter->pdev, cmd.size, 2566 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
2545 cmd.va, cmd.dma);
2546err: 2567err:
2547 spin_unlock_bh(&adapter->mcc_lock); 2568 spin_unlock_bh(&adapter->mcc_lock);
2548 return status; 2569 return status;
@@ -2565,7 +2586,7 @@ int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain)
2565 req = embedded_payload(wrb); 2586 req = embedded_payload(wrb);
2566 2587
2567 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2588 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2568 OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL); 2589 OPCODE_COMMON_SET_QOS, sizeof(*req), wrb, NULL);
2569 2590
2570 req->hdr.domain = domain; 2591 req->hdr.domain = domain;
2571 req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC); 2592 req->valid_bits = cpu_to_le32(BE_QOS_BITS_NIC);
@@ -2594,10 +2615,9 @@ int be_cmd_get_cntl_attributes(struct be_adapter *adapter)
2594 memset(&attribs_cmd, 0, sizeof(struct be_dma_mem)); 2615 memset(&attribs_cmd, 0, sizeof(struct be_dma_mem));
2595 attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs); 2616 attribs_cmd.size = sizeof(struct be_cmd_resp_cntl_attribs);
2596 attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size, 2617 attribs_cmd.va = pci_alloc_consistent(adapter->pdev, attribs_cmd.size,
2597 &attribs_cmd.dma); 2618 &attribs_cmd.dma);
2598 if (!attribs_cmd.va) { 2619 if (!attribs_cmd.va) {
2599 dev_err(&adapter->pdev->dev, 2620 dev_err(&adapter->pdev->dev, "Memory allocation failure\n");
2600 "Memory allocation failure\n");
2601 status = -ENOMEM; 2621 status = -ENOMEM;
2602 goto err; 2622 goto err;
2603 } 2623 }
@@ -2610,8 +2630,8 @@ int be_cmd_get_cntl_attributes(struct be_adapter *adapter)
2610 req = attribs_cmd.va; 2630 req = attribs_cmd.va;
2611 2631
2612 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2632 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2613 OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len, wrb, 2633 OPCODE_COMMON_GET_CNTL_ATTRIBUTES, payload_len,
2614 &attribs_cmd); 2634 wrb, &attribs_cmd);
2615 2635
2616 status = be_mbox_notify_wait(adapter); 2636 status = be_mbox_notify_wait(adapter);
2617 if (!status) { 2637 if (!status) {
@@ -2646,7 +2666,8 @@ int be_cmd_req_native_mode(struct be_adapter *adapter)
2646 req = embedded_payload(wrb); 2666 req = embedded_payload(wrb);
2647 2667
2648 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2668 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2649 OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP, sizeof(*req), wrb, NULL); 2669 OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP,
2670 sizeof(*req), wrb, NULL);
2650 2671
2651 req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS | 2672 req->valid_cap_flags = cpu_to_le32(CAPABILITY_SW_TIMESTAMPS |
2652 CAPABILITY_BE3_NATIVE_ERX_API); 2673 CAPABILITY_BE3_NATIVE_ERX_API);
@@ -2759,12 +2780,12 @@ int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
2759 memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem)); 2780 memset(&get_mac_list_cmd, 0, sizeof(struct be_dma_mem));
2760 get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list); 2781 get_mac_list_cmd.size = sizeof(struct be_cmd_resp_get_mac_list);
2761 get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev, 2782 get_mac_list_cmd.va = pci_alloc_consistent(adapter->pdev,
2762 get_mac_list_cmd.size, 2783 get_mac_list_cmd.size,
2763 &get_mac_list_cmd.dma); 2784 &get_mac_list_cmd.dma);
2764 2785
2765 if (!get_mac_list_cmd.va) { 2786 if (!get_mac_list_cmd.va) {
2766 dev_err(&adapter->pdev->dev, 2787 dev_err(&adapter->pdev->dev,
2767 "Memory allocation failure during GET_MAC_LIST\n"); 2788 "Memory allocation failure during GET_MAC_LIST\n");
2768 return -ENOMEM; 2789 return -ENOMEM;
2769 } 2790 }
2770 2791
@@ -2828,18 +2849,18 @@ int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
2828 /* If no active mac_id found, return first mac addr */ 2849 /* If no active mac_id found, return first mac addr */
2829 *pmac_id_valid = false; 2850 *pmac_id_valid = false;
2830 memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr, 2851 memcpy(mac, resp->macaddr_list[0].mac_addr_id.macaddr,
2831 ETH_ALEN); 2852 ETH_ALEN);
2832 } 2853 }
2833 2854
2834out: 2855out:
2835 spin_unlock_bh(&adapter->mcc_lock); 2856 spin_unlock_bh(&adapter->mcc_lock);
2836 pci_free_consistent(adapter->pdev, get_mac_list_cmd.size, 2857 pci_free_consistent(adapter->pdev, get_mac_list_cmd.size,
2837 get_mac_list_cmd.va, get_mac_list_cmd.dma); 2858 get_mac_list_cmd.va, get_mac_list_cmd.dma);
2838 return status; 2859 return status;
2839} 2860}
2840 2861
2841int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id, u8 *mac, 2862int be_cmd_get_active_mac(struct be_adapter *adapter, u32 curr_pmac_id,
2842 u32 if_handle, bool active, u32 domain) 2863 u8 *mac, u32 if_handle, bool active, u32 domain)
2843{ 2864{
2844 2865
2845 if (!active) 2866 if (!active)
@@ -2889,7 +2910,7 @@ int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,
2889 memset(&cmd, 0, sizeof(struct be_dma_mem)); 2910 memset(&cmd, 0, sizeof(struct be_dma_mem));
2890 cmd.size = sizeof(struct be_cmd_req_set_mac_list); 2911 cmd.size = sizeof(struct be_cmd_req_set_mac_list);
2891 cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, 2912 cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size,
2892 &cmd.dma, GFP_KERNEL); 2913 &cmd.dma, GFP_KERNEL);
2893 if (!cmd.va) 2914 if (!cmd.va)
2894 return -ENOMEM; 2915 return -ENOMEM;
2895 2916
@@ -2903,8 +2924,8 @@ int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,
2903 2924
2904 req = cmd.va; 2925 req = cmd.va;
2905 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2926 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2906 OPCODE_COMMON_SET_MAC_LIST, sizeof(*req), 2927 OPCODE_COMMON_SET_MAC_LIST, sizeof(*req),
2907 wrb, &cmd); 2928 wrb, &cmd);
2908 2929
2909 req->hdr.domain = domain; 2930 req->hdr.domain = domain;
2910 req->mac_count = mac_count; 2931 req->mac_count = mac_count;
@@ -2914,8 +2935,7 @@ int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,
2914 status = be_mcc_notify_wait(adapter); 2935 status = be_mcc_notify_wait(adapter);
2915 2936
2916err: 2937err:
2917 dma_free_coherent(&adapter->pdev->dev, cmd.size, 2938 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma);
2918 cmd.va, cmd.dma);
2919 spin_unlock_bh(&adapter->mcc_lock); 2939 spin_unlock_bh(&adapter->mcc_lock);
2920 return status; 2940 return status;
2921} 2941}
@@ -2960,7 +2980,8 @@ int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid,
2960 ctxt = &req->context; 2980 ctxt = &req->context;
2961 2981
2962 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 2982 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
2963 OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb, NULL); 2983 OPCODE_COMMON_SET_HSW_CONFIG, sizeof(*req), wrb,
2984 NULL);
2964 2985
2965 req->hdr.domain = domain; 2986 req->hdr.domain = domain;
2966 AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id); 2987 AMAP_SET_BITS(struct amap_set_hsw_context, interface_id, ctxt, intf_id);
@@ -3006,7 +3027,8 @@ int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid,
3006 ctxt = &req->context; 3027 ctxt = &req->context;
3007 3028
3008 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 3029 be_wrb_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
3009 OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb, NULL); 3030 OPCODE_COMMON_GET_HSW_CONFIG, sizeof(*req), wrb,
3031 NULL);
3010 3032
3011 req->hdr.domain = domain; 3033 req->hdr.domain = domain;
3012 AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id, 3034 AMAP_SET_BITS(struct amap_get_hsw_req_context, interface_id,
@@ -3024,10 +3046,9 @@ int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid,
3024 if (!status) { 3046 if (!status) {
3025 struct be_cmd_resp_get_hsw_config *resp = 3047 struct be_cmd_resp_get_hsw_config *resp =
3026 embedded_payload(wrb); 3048 embedded_payload(wrb);
3027 be_dws_le_to_cpu(&resp->context, 3049 be_dws_le_to_cpu(&resp->context, sizeof(resp->context));
3028 sizeof(resp->context));
3029 vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context, 3050 vid = AMAP_GET_BITS(struct amap_get_hsw_resp_context,
3030 pvid, &resp->context); 3051 pvid, &resp->context);
3031 if (pvid) 3052 if (pvid)
3032 *pvid = le16_to_cpu(vid); 3053 *pvid = le16_to_cpu(vid);
3033 if (mode) 3054 if (mode)
@@ -3059,11 +3080,9 @@ int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter)
3059 3080
3060 memset(&cmd, 0, sizeof(struct be_dma_mem)); 3081 memset(&cmd, 0, sizeof(struct be_dma_mem));
3061 cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1); 3082 cmd.size = sizeof(struct be_cmd_resp_acpi_wol_magic_config_v1);
3062 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 3083 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
3063 &cmd.dma);
3064 if (!cmd.va) { 3084 if (!cmd.va) {
3065 dev_err(&adapter->pdev->dev, 3085 dev_err(&adapter->pdev->dev, "Memory allocation failure\n");
3066 "Memory allocation failure\n");
3067 status = -ENOMEM; 3086 status = -ENOMEM;
3068 goto err; 3087 goto err;
3069 } 3088 }
@@ -3346,8 +3365,7 @@ int be_cmd_get_func_config(struct be_adapter *adapter, struct be_resources *res)
3346 3365
3347 memset(&cmd, 0, sizeof(struct be_dma_mem)); 3366 memset(&cmd, 0, sizeof(struct be_dma_mem));
3348 cmd.size = sizeof(struct be_cmd_resp_get_func_config); 3367 cmd.size = sizeof(struct be_cmd_resp_get_func_config);
3349 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, 3368 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
3350 &cmd.dma);
3351 if (!cmd.va) { 3369 if (!cmd.va) {
3352 dev_err(&adapter->pdev->dev, "Memory alloc failure\n"); 3370 dev_err(&adapter->pdev->dev, "Memory alloc failure\n");
3353 status = -ENOMEM; 3371 status = -ENOMEM;
@@ -3393,7 +3411,7 @@ err:
3393 3411
3394/* Uses mbox */ 3412/* Uses mbox */
3395static int be_cmd_get_profile_config_mbox(struct be_adapter *adapter, 3413static int be_cmd_get_profile_config_mbox(struct be_adapter *adapter,
3396 u8 domain, struct be_dma_mem *cmd) 3414 u8 domain, struct be_dma_mem *cmd)
3397{ 3415{
3398 struct be_mcc_wrb *wrb; 3416 struct be_mcc_wrb *wrb;
3399 struct be_cmd_req_get_profile_config *req; 3417 struct be_cmd_req_get_profile_config *req;
@@ -3421,7 +3439,7 @@ static int be_cmd_get_profile_config_mbox(struct be_adapter *adapter,
3421 3439
3422/* Uses sync mcc */ 3440/* Uses sync mcc */
3423static int be_cmd_get_profile_config_mccq(struct be_adapter *adapter, 3441static int be_cmd_get_profile_config_mccq(struct be_adapter *adapter,
3424 u8 domain, struct be_dma_mem *cmd) 3442 u8 domain, struct be_dma_mem *cmd)
3425{ 3443{
3426 struct be_mcc_wrb *wrb; 3444 struct be_mcc_wrb *wrb;
3427 struct be_cmd_req_get_profile_config *req; 3445 struct be_cmd_req_get_profile_config *req;
@@ -3481,8 +3499,8 @@ int be_cmd_get_profile_config(struct be_adapter *adapter,
3481 resp = cmd.va; 3499 resp = cmd.va;
3482 desc_count = le32_to_cpu(resp->desc_count); 3500 desc_count = le32_to_cpu(resp->desc_count);
3483 3501
3484 pcie = be_get_pcie_desc(adapter->pdev->devfn, resp->func_param, 3502 pcie = be_get_pcie_desc(adapter->pdev->devfn, resp->func_param,
3485 desc_count); 3503 desc_count);
3486 if (pcie) 3504 if (pcie)
3487 res->max_vfs = le16_to_cpu(pcie->num_vfs); 3505 res->max_vfs = le16_to_cpu(pcie->num_vfs);
3488 3506
@@ -3856,7 +3874,7 @@ err:
3856} 3874}
3857 3875
3858int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload, 3876int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload,
3859 int wrb_payload_size, u16 *cmd_status, u16 *ext_status) 3877 int wrb_payload_size, u16 *cmd_status, u16 *ext_status)
3860{ 3878{
3861 struct be_adapter *adapter = netdev_priv(netdev_handle); 3879 struct be_adapter *adapter = netdev_priv(netdev_handle);
3862 struct be_mcc_wrb *wrb; 3880 struct be_mcc_wrb *wrb;