diff options
author | Tony Lindgren <tony@atomide.com> | 2013-06-09 23:39:44 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2013-06-09 23:39:44 -0400 |
commit | a27b6da42a99f4d87b8ca2d086920c978d7e8f11 (patch) | |
tree | cfc67de67c0a65956030ea5ff3b976ba39b85498 | |
parent | 317ddd256b9c24b0d78fa8018f80f1e495481a10 (diff) | |
parent | 563ce4d51a555b45f5d43ff9cf127da8dac9f64d (diff) |
Merge tag 'omap-devel-b-for-3.11' of http://git.kernel.org/cgit/linux/kernel/git/pjw/omap-pending into omap-for-v3.11/soc
A few OMAP clock & hwmod changes for v3.11.
Basic test logs are here:
http://www.pwsan.com/omap/testlogs/prcm_devel_v3.11/20130609020805/
-rw-r--r-- | arch/arm/mach-omap2/cclock33xx_data.c | 30 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cclock3xxx_data.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-omap2/control.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 3 |
4 files changed, 40 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c index af3544ce4f02..0346de56436c 100644 --- a/arch/arm/mach-omap2/cclock33xx_data.c +++ b/arch/arm/mach-omap2/cclock33xx_data.c | |||
@@ -862,6 +862,33 @@ static struct clk_hw_omap wdt1_fck_hw = { | |||
862 | 862 | ||
863 | DEFINE_STRUCT_CLK(wdt1_fck, wdt_ck_parents, gpio_fck_ops); | 863 | DEFINE_STRUCT_CLK(wdt1_fck, wdt_ck_parents, gpio_fck_ops); |
864 | 864 | ||
865 | static const char *pwmss_clk_parents[] = { | ||
866 | "dpll_per_m2_ck", | ||
867 | }; | ||
868 | |||
869 | static const struct clk_ops ehrpwm_tbclk_ops = { | ||
870 | .enable = &omap2_dflt_clk_enable, | ||
871 | .disable = &omap2_dflt_clk_disable, | ||
872 | }; | ||
873 | |||
874 | DEFINE_CLK_OMAP_MUX_GATE(ehrpwm0_tbclk, "l4ls_clkdm", | ||
875 | NULL, NULL, 0, | ||
876 | AM33XX_CTRL_REGADDR(AM33XX_PWMSS_TBCLK_CLKCTRL), | ||
877 | AM33XX_PWMSS0_TBCLKEN_SHIFT, | ||
878 | NULL, pwmss_clk_parents, ehrpwm_tbclk_ops); | ||
879 | |||
880 | DEFINE_CLK_OMAP_MUX_GATE(ehrpwm1_tbclk, "l4ls_clkdm", | ||
881 | NULL, NULL, 0, | ||
882 | AM33XX_CTRL_REGADDR(AM33XX_PWMSS_TBCLK_CLKCTRL), | ||
883 | AM33XX_PWMSS1_TBCLKEN_SHIFT, | ||
884 | NULL, pwmss_clk_parents, ehrpwm_tbclk_ops); | ||
885 | |||
886 | DEFINE_CLK_OMAP_MUX_GATE(ehrpwm2_tbclk, "l4ls_clkdm", | ||
887 | NULL, NULL, 0, | ||
888 | AM33XX_CTRL_REGADDR(AM33XX_PWMSS_TBCLK_CLKCTRL), | ||
889 | AM33XX_PWMSS2_TBCLKEN_SHIFT, | ||
890 | NULL, pwmss_clk_parents, ehrpwm_tbclk_ops); | ||
891 | |||
865 | /* | 892 | /* |
866 | * clkdev | 893 | * clkdev |
867 | */ | 894 | */ |
@@ -942,6 +969,9 @@ static struct omap_clk am33xx_clks[] = { | |||
942 | CLK(NULL, "clkout2_div_ck", &clkout2_div_ck), | 969 | CLK(NULL, "clkout2_div_ck", &clkout2_div_ck), |
943 | CLK(NULL, "timer_32k_ck", &clkdiv32k_ick), | 970 | CLK(NULL, "timer_32k_ck", &clkdiv32k_ick), |
944 | CLK(NULL, "timer_sys_ck", &sys_clkin_ck), | 971 | CLK(NULL, "timer_sys_ck", &sys_clkin_ck), |
972 | CLK("48300200.ehrpwm", "tbclk", &ehrpwm0_tbclk), | ||
973 | CLK("48302200.ehrpwm", "tbclk", &ehrpwm1_tbclk), | ||
974 | CLK("48304200.ehrpwm", "tbclk", &ehrpwm2_tbclk), | ||
945 | }; | 975 | }; |
946 | 976 | ||
947 | 977 | ||
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c index 45cd26430d1f..334b76745900 100644 --- a/arch/arm/mach-omap2/cclock3xxx_data.c +++ b/arch/arm/mach-omap2/cclock3xxx_data.c | |||
@@ -3329,11 +3329,7 @@ static struct omap_clk omap36xx_am35xx_omap3430es2plus_clks[] = { | |||
3329 | CLK(NULL, "cpefuse_fck", &cpefuse_fck), | 3329 | CLK(NULL, "cpefuse_fck", &cpefuse_fck), |
3330 | CLK(NULL, "ts_fck", &ts_fck), | 3330 | CLK(NULL, "ts_fck", &ts_fck), |
3331 | CLK(NULL, "usbtll_fck", &usbtll_fck), | 3331 | CLK(NULL, "usbtll_fck", &usbtll_fck), |
3332 | CLK("usbhs_omap", "usbtll_fck", &usbtll_fck), | ||
3333 | CLK("usbhs_tll", "usbtll_fck", &usbtll_fck), | ||
3334 | CLK(NULL, "usbtll_ick", &usbtll_ick), | 3332 | CLK(NULL, "usbtll_ick", &usbtll_ick), |
3335 | CLK("usbhs_omap", "usbtll_ick", &usbtll_ick), | ||
3336 | CLK("usbhs_tll", "usbtll_ick", &usbtll_ick), | ||
3337 | CLK("omap_hsmmc.2", "ick", &mmchs3_ick), | 3333 | CLK("omap_hsmmc.2", "ick", &mmchs3_ick), |
3338 | CLK(NULL, "mmchs3_ick", &mmchs3_ick), | 3334 | CLK(NULL, "mmchs3_ick", &mmchs3_ick), |
3339 | CLK(NULL, "mmchs3_fck", &mmchs3_fck), | 3335 | CLK(NULL, "mmchs3_fck", &mmchs3_fck), |
@@ -3343,7 +3339,6 @@ static struct omap_clk omap36xx_am35xx_omap3430es2plus_clks[] = { | |||
3343 | CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck), | 3339 | CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck), |
3344 | CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck), | 3340 | CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck), |
3345 | CLK(NULL, "usbhost_ick", &usbhost_ick), | 3341 | CLK(NULL, "usbhost_ick", &usbhost_ick), |
3346 | CLK("usbhs_omap", "usbhost_ick", &usbhost_ick), | ||
3347 | }; | 3342 | }; |
3348 | 3343 | ||
3349 | /* | 3344 | /* |
@@ -3463,12 +3458,6 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3463 | CLK(NULL, "utmi_p2_gfclk", &dummy_ck), | 3458 | CLK(NULL, "utmi_p2_gfclk", &dummy_ck), |
3464 | CLK(NULL, "xclk60mhsp1_ck", &dummy_ck), | 3459 | CLK(NULL, "xclk60mhsp1_ck", &dummy_ck), |
3465 | CLK(NULL, "xclk60mhsp2_ck", &dummy_ck), | 3460 | CLK(NULL, "xclk60mhsp2_ck", &dummy_ck), |
3466 | CLK(NULL, "usb_host_hs_utmi_p1_clk", &dummy_ck), | ||
3467 | CLK(NULL, "usb_host_hs_utmi_p2_clk", &dummy_ck), | ||
3468 | CLK("usbhs_omap", "usb_tll_hs_usb_ch0_clk", &dummy_ck), | ||
3469 | CLK("usbhs_omap", "usb_tll_hs_usb_ch1_clk", &dummy_ck), | ||
3470 | CLK("usbhs_tll", "usb_tll_hs_usb_ch0_clk", &dummy_ck), | ||
3471 | CLK("usbhs_tll", "usb_tll_hs_usb_ch1_clk", &dummy_ck), | ||
3472 | CLK(NULL, "init_60m_fclk", &dummy_ck), | 3461 | CLK(NULL, "init_60m_fclk", &dummy_ck), |
3473 | CLK(NULL, "gpt1_fck", &gpt1_fck), | 3462 | CLK(NULL, "gpt1_fck", &gpt1_fck), |
3474 | CLK(NULL, "aes2_ick", &aes2_ick), | 3463 | CLK(NULL, "aes2_ick", &aes2_ick), |
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h index e6c328128a0a..35d17a6ec06b 100644 --- a/arch/arm/mach-omap2/control.h +++ b/arch/arm/mach-omap2/control.h | |||
@@ -358,6 +358,14 @@ | |||
358 | #define AM33XX_CONTROL_STATUS_SYSBOOT1_WIDTH 0x2 | 358 | #define AM33XX_CONTROL_STATUS_SYSBOOT1_WIDTH 0x2 |
359 | #define AM33XX_CONTROL_STATUS_SYSBOOT1_MASK (0x3 << 22) | 359 | #define AM33XX_CONTROL_STATUS_SYSBOOT1_MASK (0x3 << 22) |
360 | 360 | ||
361 | /* AM33XX PWMSS Control register */ | ||
362 | #define AM33XX_PWMSS_TBCLK_CLKCTRL 0x664 | ||
363 | |||
364 | /* AM33XX PWMSS Control bitfields */ | ||
365 | #define AM33XX_PWMSS0_TBCLKEN_SHIFT 0 | ||
366 | #define AM33XX_PWMSS1_TBCLKEN_SHIFT 1 | ||
367 | #define AM33XX_PWMSS2_TBCLKEN_SHIFT 2 | ||
368 | |||
361 | /* CONTROL OMAP STATUS register to identify OMAP3 features */ | 369 | /* CONTROL OMAP STATUS register to identify OMAP3 features */ |
362 | #define OMAP3_CONTROL_OMAP_STATUS 0x044c | 370 | #define OMAP3_CONTROL_OMAP_STATUS 0x044c |
363 | 371 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index 075f7cc51026..1e2a6fb835c2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c | |||
@@ -329,7 +329,7 @@ static struct omap_hwmod_class am33xx_gfx_hwmod_class = { | |||
329 | }; | 329 | }; |
330 | 330 | ||
331 | static struct omap_hwmod_rst_info am33xx_gfx_resets[] = { | 331 | static struct omap_hwmod_rst_info am33xx_gfx_resets[] = { |
332 | { .name = "gfx", .rst_shift = 0 }, | 332 | { .name = "gfx", .rst_shift = 0, .st_shift = 0}, |
333 | }; | 333 | }; |
334 | 334 | ||
335 | static struct omap_hwmod_irq_info am33xx_gfx_irqs[] = { | 335 | static struct omap_hwmod_irq_info am33xx_gfx_irqs[] = { |
@@ -347,6 +347,7 @@ static struct omap_hwmod am33xx_gfx_hwmod = { | |||
347 | .omap4 = { | 347 | .omap4 = { |
348 | .clkctrl_offs = AM33XX_CM_GFX_GFX_CLKCTRL_OFFSET, | 348 | .clkctrl_offs = AM33XX_CM_GFX_GFX_CLKCTRL_OFFSET, |
349 | .rstctrl_offs = AM33XX_RM_GFX_RSTCTRL_OFFSET, | 349 | .rstctrl_offs = AM33XX_RM_GFX_RSTCTRL_OFFSET, |
350 | .rstst_offs = AM33XX_RM_GFX_RSTST_OFFSET, | ||
350 | .modulemode = MODULEMODE_SWCTRL, | 351 | .modulemode = MODULEMODE_SWCTRL, |
351 | }, | 352 | }, |
352 | }, | 353 | }, |