aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDavid S. Miller <davem@davemloft.net>2013-01-18 14:12:11 -0500
committerDavid S. Miller <davem@davemloft.net>2013-01-18 14:12:11 -0500
commita16af2ffa2f640f094a3ad3543996a37b588a3cc (patch)
treedc9a5126db710cbfa0cada18f20acec42495b7b7
parent887c95cc1da53f66a5890fdeab13414613010097 (diff)
parentba59814b39b7ec674f604b0f9b35f1773f2fbf1a (diff)
Merge branch 'intel'
Jeff Kirsher says: ==================== This series contains updates to e1000e and igb. Most notably is the added timestamp support in e1000e and additional software timestamp support in igb. As well as, the added thermal data support and SR-IOV configuration support in igb. v2- dropped the following patches from the previous 14 patch series because changes were requested from the community: e1000e: add support for IEEE-1588 PTP igb: Report L4 Rx hash via skb->l4_rxhash ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat
-rw-r--r--drivers/net/ethernet/intel/Kconfig13
-rw-r--r--drivers/net/ethernet/intel/e1000e/82571.c2
-rw-r--r--drivers/net/ethernet/intel/e1000e/defines.h44
-rw-r--r--drivers/net/ethernet/intel/e1000e/e1000.h47
-rw-r--r--drivers/net/ethernet/intel/e1000e/ethtool.c159
-rw-r--r--drivers/net/ethernet/intel/e1000e/hw.h11
-rw-r--r--drivers/net/ethernet/intel/e1000e/ich8lan.c26
-rw-r--r--drivers/net/ethernet/intel/e1000e/netdev.c382
-rw-r--r--drivers/net/ethernet/intel/igb/Makefile2
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_82575.c140
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_82575.h17
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_defines.h13
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_hw.h20
-rw-r--r--drivers/net/ethernet/intel/igb/e1000_regs.h16
-rw-r--r--drivers/net/ethernet/intel/igb/igb.h46
-rw-r--r--drivers/net/ethernet/intel/igb/igb_ethtool.c11
-rw-r--r--drivers/net/ethernet/intel/igb/igb_hwmon.c242
-rw-r--r--drivers/net/ethernet/intel/igb/igb_main.c632
-rw-r--r--drivers/net/ethernet/intel/igb/igb_ptp.c65
19 files changed, 1747 insertions, 141 deletions
diff --git a/drivers/net/ethernet/intel/Kconfig b/drivers/net/ethernet/intel/Kconfig
index bde4f3db328f..21353f0fef63 100644
--- a/drivers/net/ethernet/intel/Kconfig
+++ b/drivers/net/ethernet/intel/Kconfig
@@ -94,6 +94,8 @@ config IGB
94 tristate "Intel(R) 82575/82576 PCI-Express Gigabit Ethernet support" 94 tristate "Intel(R) 82575/82576 PCI-Express Gigabit Ethernet support"
95 depends on PCI 95 depends on PCI
96 select PTP_1588_CLOCK 96 select PTP_1588_CLOCK
97 select I2C
98 select I2C_ALGOBIT
97 ---help--- 99 ---help---
98 This driver supports Intel(R) 82575/82576 gigabit ethernet family of 100 This driver supports Intel(R) 82575/82576 gigabit ethernet family of
99 adapters. For more information on how to identify your adapter, go 101 adapters. For more information on how to identify your adapter, go
@@ -112,6 +114,17 @@ config IGB
112 To compile this driver as a module, choose M here. The module 114 To compile this driver as a module, choose M here. The module
113 will be called igb. 115 will be called igb.
114 116
117config IGB_HWMON
118 bool "Intel(R) PCI-Express Gigabit adapters HWMON support"
119 default y
120 depends on IGB && HWMON && !(IGB=y && HWMON=m)
121 ---help---
122 Say Y if you want to expose thermal sensor data on Intel devices.
123
124 Some of our devices contain thermal sensors, both external and internal.
125 This data is available via the hwmon sysfs interface and exposes
126 the onboard sensors.
127
115config IGB_DCA 128config IGB_DCA
116 bool "Direct Cache Access (DCA) Support" 129 bool "Direct Cache Access (DCA) Support"
117 default y 130 default y
diff --git a/drivers/net/ethernet/intel/e1000e/82571.c b/drivers/net/ethernet/intel/e1000e/82571.c
index c77d010d5c59..587890d2d55e 100644
--- a/drivers/net/ethernet/intel/e1000e/82571.c
+++ b/drivers/net/ethernet/intel/e1000e/82571.c
@@ -2044,6 +2044,7 @@ const struct e1000_info e1000_82574_info = {
2044 | FLAG_HAS_MSIX 2044 | FLAG_HAS_MSIX
2045 | FLAG_HAS_JUMBO_FRAMES 2045 | FLAG_HAS_JUMBO_FRAMES
2046 | FLAG_HAS_WOL 2046 | FLAG_HAS_WOL
2047 | FLAG_HAS_HW_TIMESTAMP
2047 | FLAG_APME_IN_CTRL3 2048 | FLAG_APME_IN_CTRL3
2048 | FLAG_HAS_SMART_POWER_DOWN 2049 | FLAG_HAS_SMART_POWER_DOWN
2049 | FLAG_HAS_AMT 2050 | FLAG_HAS_AMT
@@ -2065,6 +2066,7 @@ const struct e1000_info e1000_82583_info = {
2065 .mac = e1000_82583, 2066 .mac = e1000_82583,
2066 .flags = FLAG_HAS_HW_VLAN_FILTER 2067 .flags = FLAG_HAS_HW_VLAN_FILTER
2067 | FLAG_HAS_WOL 2068 | FLAG_HAS_WOL
2069 | FLAG_HAS_HW_TIMESTAMP
2068 | FLAG_APME_IN_CTRL3 2070 | FLAG_APME_IN_CTRL3
2069 | FLAG_HAS_SMART_POWER_DOWN 2071 | FLAG_HAS_SMART_POWER_DOWN
2070 | FLAG_HAS_AMT 2072 | FLAG_HAS_AMT
diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h
index 7326ea2fef8f..36f9fad19a76 100644
--- a/drivers/net/ethernet/intel/e1000e/defines.h
+++ b/drivers/net/ethernet/intel/e1000e/defines.h
@@ -107,6 +107,7 @@
107#define E1000_RXD_ERR_RXE 0x80 /* Rx Data Error */ 107#define E1000_RXD_ERR_RXE 0x80 /* Rx Data Error */
108#define E1000_RXD_SPC_VLAN_MASK 0x0FFF /* VLAN ID is in lower 12 bits */ 108#define E1000_RXD_SPC_VLAN_MASK 0x0FFF /* VLAN ID is in lower 12 bits */
109 109
110#define E1000_RXDEXT_STATERR_TST 0x00000100 /* Time Stamp taken */
110#define E1000_RXDEXT_STATERR_CE 0x01000000 111#define E1000_RXDEXT_STATERR_CE 0x01000000
111#define E1000_RXDEXT_STATERR_SE 0x02000000 112#define E1000_RXDEXT_STATERR_SE 0x02000000
112#define E1000_RXDEXT_STATERR_SEQ 0x04000000 113#define E1000_RXDEXT_STATERR_SEQ 0x04000000
@@ -318,6 +319,7 @@
318#define E1000_TXD_CMD_IP 0x02000000 /* IP packet */ 319#define E1000_TXD_CMD_IP 0x02000000 /* IP packet */
319#define E1000_TXD_CMD_TSE 0x04000000 /* TCP Seg enable */ 320#define E1000_TXD_CMD_TSE 0x04000000 /* TCP Seg enable */
320#define E1000_TXD_STAT_TC 0x00000004 /* Tx Underrun */ 321#define E1000_TXD_STAT_TC 0x00000004 /* Tx Underrun */
322#define E1000_TXD_EXTCMD_TSTAMP 0x00000010 /* IEEE1588 Timestamp packet */
321 323
322/* Transmit Control */ 324/* Transmit Control */
323#define E1000_TCTL_EN 0x00000002 /* enable Tx */ 325#define E1000_TCTL_EN 0x00000002 /* enable Tx */
@@ -383,6 +385,9 @@
383 385
384#define E1000_KABGTXD_BGSQLBIAS 0x00050000 386#define E1000_KABGTXD_BGSQLBIAS 0x00050000
385 387
388/* Low Power IDLE Control */
389#define E1000_LPIC_LPIET_SHIFT 24 /* Low Power Idle Entry Time */
390
386/* PBA constants */ 391/* PBA constants */
387#define E1000_PBA_8K 0x0008 /* 8KB */ 392#define E1000_PBA_8K 0x0008 /* 8KB */
388#define E1000_PBA_16K 0x0010 /* 16KB */ 393#define E1000_PBA_16K 0x0010 /* 16KB */
@@ -533,6 +538,18 @@
533#define E1000_RXCW_C 0x20000000 /* Receive config */ 538#define E1000_RXCW_C 0x20000000 /* Receive config */
534#define E1000_RXCW_SYNCH 0x40000000 /* Receive config synch */ 539#define E1000_RXCW_SYNCH 0x40000000 /* Receive config synch */
535 540
541#define E1000_TSYNCTXCTL_VALID 0x00000001 /* Tx timestamp valid */
542#define E1000_TSYNCRXCTL_TYPE_ALL 0x08
543#define E1000_TSYNCTXCTL_ENABLED 0x00000010 /* enable Tx timestamping */
544
545#define E1000_TSYNCRXCTL_VALID 0x00000001 /* Rx timestamp valid */
546#define E1000_TSYNCRXCTL_TYPE_MASK 0x0000000E /* Rx type mask */
547#define E1000_TSYNCRXCTL_ENABLED 0x00000010 /* enable Rx timestamping */
548#define E1000_TSYNCRXCTL_SYSCFI 0x00000020 /* Sys clock frequency */
549
550#define E1000_TIMINCA_INCPERIOD_SHIFT 24
551#define E1000_TIMINCA_INCVALUE_MASK 0x00FFFFFF
552
536/* PCI Express Control */ 553/* PCI Express Control */
537#define E1000_GCR_RXD_NO_SNOOP 0x00000001 554#define E1000_GCR_RXD_NO_SNOOP 0x00000001
538#define E1000_GCR_RXDSCW_NO_SNOOP 0x00000002 555#define E1000_GCR_RXDSCW_NO_SNOOP 0x00000002
@@ -799,6 +816,33 @@
799/* BME1000 PHY Specific Control Register */ 816/* BME1000 PHY Specific Control Register */
800#define BME1000_PSCR_ENABLE_DOWNSHIFT 0x0800 /* 1 = enable downshift */ 817#define BME1000_PSCR_ENABLE_DOWNSHIFT 0x0800 /* 1 = enable downshift */
801 818
819/* PHY Low Power Idle Control */
820#define I82579_LPI_CTRL PHY_REG(772, 20)
821#define I82579_LPI_CTRL_100_ENABLE 0x2000
822#define I82579_LPI_CTRL_1000_ENABLE 0x4000
823#define I82579_LPI_CTRL_ENABLE_MASK 0x6000
824#define I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT 0x80
825
826/* Extended Management Interface (EMI) Registers */
827#define I82579_EMI_ADDR 0x10
828#define I82579_EMI_DATA 0x11
829#define I82579_LPI_UPDATE_TIMER 0x4805 /* in 40ns units + 40 ns base value */
830#define I82579_MSE_THRESHOLD 0x084F /* 82579 Mean Square Error Threshold */
831#define I82577_MSE_THRESHOLD 0x0887 /* 82577 Mean Square Error Threshold */
832#define I82579_MSE_LINK_DOWN 0x2411 /* MSE count before dropping link */
833#define I82579_EEE_PCS_STATUS 0x182D /* IEEE MMD Register 3.1 >> 8 */
834#define I82579_EEE_CAPABILITY 0x0410 /* IEEE MMD Register 3.20 */
835#define I82579_EEE_ADVERTISEMENT 0x040E /* IEEE MMD Register 7.60 */
836#define I82579_EEE_LP_ABILITY 0x040F /* IEEE MMD Register 7.61 */
837#define I82579_EEE_100_SUPPORTED (1 << 1) /* 100BaseTx EEE supported */
838#define I82579_EEE_1000_SUPPORTED (1 << 2) /* 1000BaseTx EEE supported */
839#define I217_EEE_PCS_STATUS 0x9401 /* IEEE MMD Register 3.1 */
840#define I217_EEE_CAPABILITY 0x8000 /* IEEE MMD Register 3.20 */
841#define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */
842#define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */
843
844#define E1000_EEE_RX_LPI_RCVD 0x0400 /* Tx LP idle received */
845#define E1000_EEE_TX_LPI_RCVD 0x0800 /* Rx LP idle received */
802 846
803#define PHY_PAGE_SHIFT 5 847#define PHY_PAGE_SHIFT 5
804#define PHY_REG(page, reg) (((page) << PHY_PAGE_SHIFT) | \ 848#define PHY_REG(page, reg) (((page) << PHY_PAGE_SHIFT) | \
diff --git a/drivers/net/ethernet/intel/e1000e/e1000.h b/drivers/net/ethernet/intel/e1000e/e1000.h
index 3f8bbc31795c..dea9e5552966 100644
--- a/drivers/net/ethernet/intel/e1000e/e1000.h
+++ b/drivers/net/ethernet/intel/e1000e/e1000.h
@@ -41,6 +41,8 @@
41#include <linux/pci-aspm.h> 41#include <linux/pci-aspm.h>
42#include <linux/crc32.h> 42#include <linux/crc32.h>
43#include <linux/if_vlan.h> 43#include <linux/if_vlan.h>
44#include <linux/clocksource.h>
45#include <linux/net_tstamp.h>
44 46
45#include "hw.h" 47#include "hw.h"
46 48
@@ -353,6 +355,7 @@ struct e1000_adapter {
353 u64 gorc_old; 355 u64 gorc_old;
354 u32 alloc_rx_buff_failed; 356 u32 alloc_rx_buff_failed;
355 u32 rx_dma_failed; 357 u32 rx_dma_failed;
358 u32 rx_hwtstamp_cleared;
356 359
357 unsigned int rx_ps_pages; 360 unsigned int rx_ps_pages;
358 u16 rx_ps_bsize0; 361 u16 rx_ps_bsize0;
@@ -402,6 +405,14 @@ struct e1000_adapter {
402 405
403 u16 tx_ring_count; 406 u16 tx_ring_count;
404 u16 rx_ring_count; 407 u16 rx_ring_count;
408
409 struct hwtstamp_config hwtstamp_config;
410 struct delayed_work systim_overflow_work;
411 struct sk_buff *tx_hwtstamp_skb;
412 struct work_struct tx_hwtstamp_work;
413 spinlock_t systim_lock; /* protects SYSTIML/H regsters */
414 struct cyclecounter cc;
415 struct timecounter tc;
405}; 416};
406 417
407struct e1000_info { 418struct e1000_info {
@@ -416,6 +427,38 @@ struct e1000_info {
416 const struct e1000_nvm_operations *nvm_ops; 427 const struct e1000_nvm_operations *nvm_ops;
417}; 428};
418 429
430/* The system time is maintained by a 64-bit counter comprised of the 32-bit
431 * SYSTIMH and SYSTIML registers. How the counter increments (and therefore
432 * its resolution) is based on the contents of the TIMINCA register - it
433 * increments every incperiod (bits 31:24) clock ticks by incvalue (bits 23:0).
434 * For the best accuracy, the incperiod should be as small as possible. The
435 * incvalue is scaled by a factor as large as possible (while still fitting
436 * in bits 23:0) so that relatively small clock corrections can be made.
437 *
438 * As a result, a shift of INCVALUE_SHIFT_n is used to fit a value of
439 * INCVALUE_n into the TIMINCA register allowing 32+8+(24-INCVALUE_SHIFT_n)
440 * bits to count nanoseconds leaving the rest for fractional nonseconds.
441 */
442#define INCVALUE_96MHz 125
443#define INCVALUE_SHIFT_96MHz 17
444#define INCPERIOD_SHIFT_96MHz 2
445#define INCPERIOD_96MHz (12 >> INCPERIOD_SHIFT_96MHz)
446
447#define INCVALUE_25MHz 40
448#define INCVALUE_SHIFT_25MHz 18
449#define INCPERIOD_25MHz 1
450
451/* Another drawback of scaling the incvalue by a large factor is the
452 * 64-bit SYSTIM register overflows more quickly. This is dealt with
453 * by simply reading the clock before it overflows.
454 *
455 * Clock ns bits Overflows after
456 * ~~~~~~ ~~~~~~~ ~~~~~~~~~~~~~~~
457 * 96MHz 47-bit 2^(47-INCPERIOD_SHIFT_96MHz) / 10^9 / 3600 = 9.77 hrs
458 * 25MHz 46-bit 2^46 / 10^9 / 3600 = 19.55 hours
459 */
460#define E1000_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 60 * 4)
461
419/* hardware capability, feature, and workaround flags */ 462/* hardware capability, feature, and workaround flags */
420#define FLAG_HAS_AMT (1 << 0) 463#define FLAG_HAS_AMT (1 << 0)
421#define FLAG_HAS_FLASH (1 << 1) 464#define FLAG_HAS_FLASH (1 << 1)
@@ -431,7 +474,7 @@ struct e1000_info {
431#define FLAG_HAS_SMART_POWER_DOWN (1 << 11) 474#define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
432#define FLAG_IS_QUAD_PORT_A (1 << 12) 475#define FLAG_IS_QUAD_PORT_A (1 << 12)
433#define FLAG_IS_QUAD_PORT (1 << 13) 476#define FLAG_IS_QUAD_PORT (1 << 13)
434/* reserved bit14 */ 477#define FLAG_HAS_HW_TIMESTAMP (1 << 14)
435#define FLAG_APME_IN_WUC (1 << 15) 478#define FLAG_APME_IN_WUC (1 << 15)
436#define FLAG_APME_IN_CTRL3 (1 << 16) 479#define FLAG_APME_IN_CTRL3 (1 << 16)
437#define FLAG_APME_CHECK_PORT_B (1 << 17) 480#define FLAG_APME_CHECK_PORT_B (1 << 17)
@@ -463,6 +506,7 @@ struct e1000_info {
463#define FLAG2_NO_DISABLE_RX (1 << 10) 506#define FLAG2_NO_DISABLE_RX (1 << 10)
464#define FLAG2_PCIM2PCI_ARBITER_WA (1 << 11) 507#define FLAG2_PCIM2PCI_ARBITER_WA (1 << 11)
465#define FLAG2_DFLT_CRC_STRIPPING (1 << 12) 508#define FLAG2_DFLT_CRC_STRIPPING (1 << 12)
509#define FLAG2_CHECK_RX_HWTSTAMP (1 << 13)
466 510
467#define E1000_RX_DESC_PS(R, i) \ 511#define E1000_RX_DESC_PS(R, i) \
468 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i])) 512 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
@@ -659,6 +703,7 @@ extern s32 e1000_check_polarity_ife(struct e1000_hw *hw);
659extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw); 703extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
660extern s32 e1000_check_polarity_igp(struct e1000_hw *hw); 704extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
661extern bool e1000_check_phy_82574(struct e1000_hw *hw); 705extern bool e1000_check_phy_82574(struct e1000_hw *hw);
706extern s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data);
662 707
663static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw) 708static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
664{ 709{
diff --git a/drivers/net/ethernet/intel/e1000e/ethtool.c b/drivers/net/ethernet/intel/e1000e/ethtool.c
index 2225603a8a28..f268cbcb751d 100644
--- a/drivers/net/ethernet/intel/e1000e/ethtool.c
+++ b/drivers/net/ethernet/intel/e1000e/ethtool.c
@@ -35,6 +35,7 @@
35#include <linux/slab.h> 35#include <linux/slab.h>
36#include <linux/delay.h> 36#include <linux/delay.h>
37#include <linux/vmalloc.h> 37#include <linux/vmalloc.h>
38#include <linux/mdio.h>
38 39
39#include "e1000.h" 40#include "e1000.h"
40 41
@@ -107,6 +108,7 @@ static const struct e1000_stats e1000_gstrings_stats[] = {
107 E1000_STAT("dropped_smbus", stats.mgpdc), 108 E1000_STAT("dropped_smbus", stats.mgpdc),
108 E1000_STAT("rx_dma_failed", rx_dma_failed), 109 E1000_STAT("rx_dma_failed", rx_dma_failed),
109 E1000_STAT("tx_dma_failed", tx_dma_failed), 110 E1000_STAT("tx_dma_failed", tx_dma_failed),
111 E1000_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
110}; 112};
111 113
112#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats) 114#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
@@ -2050,6 +2052,159 @@ static int e1000_get_rxnfc(struct net_device *netdev,
2050 } 2052 }
2051} 2053}
2052 2054
2055static int e1000e_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
2056{
2057 struct e1000_adapter *adapter = netdev_priv(netdev);
2058 struct e1000_hw *hw = &adapter->hw;
2059 u16 cap_addr, adv_addr, lpa_addr, pcs_stat_addr, phy_data, lpi_ctrl;
2060 u32 status, ret_val;
2061
2062 if (!(adapter->flags & FLAG_IS_ICH) ||
2063 !(adapter->flags2 & FLAG2_HAS_EEE))
2064 return -EOPNOTSUPP;
2065
2066 switch (hw->phy.type) {
2067 case e1000_phy_82579:
2068 cap_addr = I82579_EEE_CAPABILITY;
2069 adv_addr = I82579_EEE_ADVERTISEMENT;
2070 lpa_addr = I82579_EEE_LP_ABILITY;
2071 pcs_stat_addr = I82579_EEE_PCS_STATUS;
2072 break;
2073 case e1000_phy_i217:
2074 cap_addr = I217_EEE_CAPABILITY;
2075 adv_addr = I217_EEE_ADVERTISEMENT;
2076 lpa_addr = I217_EEE_LP_ABILITY;
2077 pcs_stat_addr = I217_EEE_PCS_STATUS;
2078 break;
2079 default:
2080 return -EOPNOTSUPP;
2081 }
2082
2083 ret_val = hw->phy.ops.acquire(hw);
2084 if (ret_val)
2085 return -EBUSY;
2086
2087 /* EEE Capability */
2088 ret_val = e1000_read_emi_reg_locked(hw, cap_addr, &phy_data);
2089 if (ret_val)
2090 goto release;
2091 edata->supported = mmd_eee_cap_to_ethtool_sup_t(phy_data);
2092
2093 /* EEE Advertised */
2094 ret_val = e1000_read_emi_reg_locked(hw, adv_addr, &phy_data);
2095 if (ret_val)
2096 goto release;
2097 edata->advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2098
2099 /* EEE Link Partner Advertised */
2100 ret_val = e1000_read_emi_reg_locked(hw, lpa_addr, &phy_data);
2101 if (ret_val)
2102 goto release;
2103 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
2104
2105 /* EEE PCS Status */
2106 ret_val = e1000_read_emi_reg_locked(hw, pcs_stat_addr, &phy_data);
2107 if (hw->phy.type == e1000_phy_82579)
2108 phy_data <<= 8;
2109
2110release:
2111 hw->phy.ops.release(hw);
2112 if (ret_val)
2113 return -ENODATA;
2114
2115 e1e_rphy(hw, I82579_LPI_CTRL, &lpi_ctrl);
2116 status = er32(STATUS);
2117
2118 /* Result of the EEE auto negotiation - there is no register that
2119 * has the status of the EEE negotiation so do a best-guess based
2120 * on whether both Tx and Rx LPI indications have been received or
2121 * base it on the link speed, the EEE advertised speeds on both ends
2122 * and the speeds on which EEE is enabled locally.
2123 */
2124 if (((phy_data & E1000_EEE_TX_LPI_RCVD) &&
2125 (phy_data & E1000_EEE_RX_LPI_RCVD)) ||
2126 ((status & E1000_STATUS_SPEED_100) &&
2127 (edata->advertised & ADVERTISED_100baseT_Full) &&
2128 (edata->lp_advertised & ADVERTISED_100baseT_Full) &&
2129 (lpi_ctrl & I82579_LPI_CTRL_100_ENABLE)) ||
2130 ((status & E1000_STATUS_SPEED_1000) &&
2131 (edata->advertised & ADVERTISED_1000baseT_Full) &&
2132 (edata->lp_advertised & ADVERTISED_1000baseT_Full) &&
2133 (lpi_ctrl & I82579_LPI_CTRL_1000_ENABLE)))
2134 edata->eee_active = true;
2135
2136 edata->eee_enabled = !hw->dev_spec.ich8lan.eee_disable;
2137 edata->tx_lpi_enabled = true;
2138 edata->tx_lpi_timer = er32(LPIC) >> E1000_LPIC_LPIET_SHIFT;
2139
2140 return 0;
2141}
2142
2143static int e1000e_set_eee(struct net_device *netdev, struct ethtool_eee *edata)
2144{
2145 struct e1000_adapter *adapter = netdev_priv(netdev);
2146 struct e1000_hw *hw = &adapter->hw;
2147 struct ethtool_eee eee_curr;
2148 s32 ret_val;
2149
2150 if (!(adapter->flags & FLAG_IS_ICH) ||
2151 !(adapter->flags2 & FLAG2_HAS_EEE))
2152 return -EOPNOTSUPP;
2153
2154 ret_val = e1000e_get_eee(netdev, &eee_curr);
2155 if (ret_val)
2156 return ret_val;
2157
2158 if (eee_curr.advertised != edata->advertised) {
2159 e_err("Setting EEE advertisement is not supported\n");
2160 return -EINVAL;
2161 }
2162
2163 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
2164 e_err("Setting EEE tx-lpi is not supported\n");
2165 return -EINVAL;
2166 }
2167
2168 if (eee_curr.tx_lpi_timer != edata->tx_lpi_timer) {
2169 e_err("Setting EEE Tx LPI timer is not supported\n");
2170 return -EINVAL;
2171 }
2172
2173 if (hw->dev_spec.ich8lan.eee_disable != !edata->eee_enabled) {
2174 hw->dev_spec.ich8lan.eee_disable = !edata->eee_enabled;
2175
2176 /* reset the link */
2177 if (netif_running(netdev))
2178 e1000e_reinit_locked(adapter);
2179 else
2180 e1000e_reset(adapter);
2181 }
2182
2183 return 0;
2184}
2185
2186static int e1000e_get_ts_info(struct net_device *netdev,
2187 struct ethtool_ts_info *info)
2188{
2189 struct e1000_adapter *adapter = netdev_priv(netdev);
2190
2191 ethtool_op_get_ts_info(netdev, info);
2192
2193 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
2194 return 0;
2195
2196 info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE |
2197 SOF_TIMESTAMPING_RX_HARDWARE |
2198 SOF_TIMESTAMPING_RAW_HARDWARE);
2199
2200 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
2201
2202 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
2203 (1 << HWTSTAMP_FILTER_ALL));
2204
2205 return 0;
2206}
2207
2053static const struct ethtool_ops e1000_ethtool_ops = { 2208static const struct ethtool_ops e1000_ethtool_ops = {
2054 .get_settings = e1000_get_settings, 2209 .get_settings = e1000_get_settings,
2055 .set_settings = e1000_set_settings, 2210 .set_settings = e1000_set_settings,
@@ -2077,7 +2232,9 @@ static const struct ethtool_ops e1000_ethtool_ops = {
2077 .get_coalesce = e1000_get_coalesce, 2232 .get_coalesce = e1000_get_coalesce,
2078 .set_coalesce = e1000_set_coalesce, 2233 .set_coalesce = e1000_set_coalesce,
2079 .get_rxnfc = e1000_get_rxnfc, 2234 .get_rxnfc = e1000_get_rxnfc,
2080 .get_ts_info = ethtool_op_get_ts_info, 2235 .get_ts_info = e1000e_get_ts_info,
2236 .get_eee = e1000e_get_eee,
2237 .set_eee = e1000e_set_eee,
2081}; 2238};
2082 2239
2083void e1000e_set_ethtool_ops(struct net_device *netdev) 2240void e1000e_set_ethtool_ops(struct net_device *netdev)
diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h
index 06239fe47db1..8e7e80345a60 100644
--- a/drivers/net/ethernet/intel/e1000e/hw.h
+++ b/drivers/net/ethernet/intel/e1000e/hw.h
@@ -60,8 +60,10 @@ enum e1e_registers {
60 E1000_EIAC_82574 = 0x000DC, /* Ext. Interrupt Auto Clear - RW */ 60 E1000_EIAC_82574 = 0x000DC, /* Ext. Interrupt Auto Clear - RW */
61 E1000_IAM = 0x000E0, /* Interrupt Acknowledge Auto Mask */ 61 E1000_IAM = 0x000E0, /* Interrupt Acknowledge Auto Mask */
62 E1000_IVAR = 0x000E4, /* Interrupt Vector Allocation - RW */ 62 E1000_IVAR = 0x000E4, /* Interrupt Vector Allocation - RW */
63 E1000_FEXTNVM7 = 0x000E4, /* Future Extended NVM 7 - RW */
63 E1000_EITR_82574_BASE = 0x000E8, /* Interrupt Throttling - RW */ 64 E1000_EITR_82574_BASE = 0x000E8, /* Interrupt Throttling - RW */
64#define E1000_EITR_82574(_n) (E1000_EITR_82574_BASE + (_n << 2)) 65#define E1000_EITR_82574(_n) (E1000_EITR_82574_BASE + (_n << 2))
66 E1000_LPIC = 0x000FC, /* Low Power Idle Control - RW */
65 E1000_RCTL = 0x00100, /* Rx Control - RW */ 67 E1000_RCTL = 0x00100, /* Rx Control - RW */
66 E1000_FCTTV = 0x00170, /* Flow Control Transmit Timer Value - RW */ 68 E1000_FCTTV = 0x00170, /* Flow Control Transmit Timer Value - RW */
67 E1000_TXCW = 0x00178, /* Tx Configuration Word - RW */ 69 E1000_TXCW = 0x00178, /* Tx Configuration Word - RW */
@@ -240,6 +242,15 @@ enum e1e_registers {
240#define E1000_PCH_RAICC(_n) (E1000_PCH_RAICC_BASE + ((_n) * 4)) 242#define E1000_PCH_RAICC(_n) (E1000_PCH_RAICC_BASE + ((_n) * 4))
241#define E1000_CRC_OFFSET E1000_PCH_RAICC_BASE 243#define E1000_CRC_OFFSET E1000_PCH_RAICC_BASE
242 E1000_HICR = 0x08F00, /* Host Interface Control */ 244 E1000_HICR = 0x08F00, /* Host Interface Control */
245 E1000_SYSTIML = 0x0B600, /* System time register Low - RO */
246 E1000_SYSTIMH = 0x0B604, /* System time register High - RO */
247 E1000_TIMINCA = 0x0B608, /* Increment attributes register - RW */
248 E1000_TSYNCTXCTL = 0x0B614, /* Tx Time Sync Control register - RW */
249 E1000_TXSTMPL = 0x0B618, /* Tx timestamp value Low - RO */
250 E1000_TXSTMPH = 0x0B61C, /* Tx timestamp value High - RO */
251 E1000_TSYNCRXCTL = 0x0B620, /* Rx Time Sync Control register - RW */
252 E1000_RXSTMPL = 0x0B624, /* Rx timestamp Low - RO */
253 E1000_RXSTMPH = 0x0B628, /* Rx timestamp High - RO */
243}; 254};
244 255
245#define E1000_MAX_PHY_ADDR 4 256#define E1000_MAX_PHY_ADDR 4
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index 051dfda75fc0..50935ef48171 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -148,28 +148,6 @@
148#define HV_PM_CTRL PHY_REG(770, 17) 148#define HV_PM_CTRL PHY_REG(770, 17)
149#define HV_PM_CTRL_PLL_STOP_IN_K1_GIGA 0x100 149#define HV_PM_CTRL_PLL_STOP_IN_K1_GIGA 0x100
150 150
151/* PHY Low Power Idle Control */
152#define I82579_LPI_CTRL PHY_REG(772, 20)
153#define I82579_LPI_CTRL_100_ENABLE 0x2000
154#define I82579_LPI_CTRL_1000_ENABLE 0x4000
155#define I82579_LPI_CTRL_ENABLE_MASK 0x6000
156#define I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT 0x80
157
158/* Extended Management Interface (EMI) Registers */
159#define I82579_EMI_ADDR 0x10
160#define I82579_EMI_DATA 0x11
161#define I82579_LPI_UPDATE_TIMER 0x4805 /* in 40ns units + 40 ns base value */
162#define I82579_MSE_THRESHOLD 0x084F /* 82579 Mean Square Error Threshold */
163#define I82577_MSE_THRESHOLD 0x0887 /* 82577 Mean Square Error Threshold */
164#define I82579_MSE_LINK_DOWN 0x2411 /* MSE count before dropping link */
165#define I82579_EEE_PCS_STATUS 0x182D /* IEEE MMD Register 3.1 >> 8 */
166#define I82579_EEE_LP_ABILITY 0x040F /* IEEE MMD Register 7.61 */
167#define I82579_EEE_100_SUPPORTED (1 << 1) /* 100BaseTx EEE supported */
168#define I82579_EEE_1000_SUPPORTED (1 << 2) /* 1000BaseTx EEE supported */
169#define I217_EEE_PCS_STATUS 0x9401 /* IEEE MMD Register 3.1 */
170#define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */
171#define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */
172
173/* Intel Rapid Start Technology Support */ 151/* Intel Rapid Start Technology Support */
174#define I217_PROXY_CTRL BM_PHY_REG(BM_WUC_PAGE, 70) 152#define I217_PROXY_CTRL BM_PHY_REG(BM_WUC_PAGE, 70)
175#define I217_PROXY_CTRL_AUTO_DISABLE 0x0080 153#define I217_PROXY_CTRL_AUTO_DISABLE 0x0080
@@ -829,7 +807,7 @@ static s32 __e1000_access_emi_reg_locked(struct e1000_hw *hw, u16 address,
829 * 807 *
830 * Assumes the SW/FW/HW Semaphore is already acquired. 808 * Assumes the SW/FW/HW Semaphore is already acquired.
831 **/ 809 **/
832static s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data) 810s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data)
833{ 811{
834 return __e1000_access_emi_reg_locked(hw, addr, data, true); 812 return __e1000_access_emi_reg_locked(hw, addr, data, true);
835} 813}
@@ -4623,6 +4601,7 @@ const struct e1000_info e1000_pch2_info = {
4623 .mac = e1000_pch2lan, 4601 .mac = e1000_pch2lan,
4624 .flags = FLAG_IS_ICH 4602 .flags = FLAG_IS_ICH
4625 | FLAG_HAS_WOL 4603 | FLAG_HAS_WOL
4604 | FLAG_HAS_HW_TIMESTAMP
4626 | FLAG_HAS_CTRLEXT_ON_LOAD 4605 | FLAG_HAS_CTRLEXT_ON_LOAD
4627 | FLAG_HAS_AMT 4606 | FLAG_HAS_AMT
4628 | FLAG_HAS_FLASH 4607 | FLAG_HAS_FLASH
@@ -4642,6 +4621,7 @@ const struct e1000_info e1000_pch_lpt_info = {
4642 .mac = e1000_pch_lpt, 4621 .mac = e1000_pch_lpt,
4643 .flags = FLAG_IS_ICH 4622 .flags = FLAG_IS_ICH
4644 | FLAG_HAS_WOL 4623 | FLAG_HAS_WOL
4624 | FLAG_HAS_HW_TIMESTAMP
4645 | FLAG_HAS_CTRLEXT_ON_LOAD 4625 | FLAG_HAS_CTRLEXT_ON_LOAD
4646 | FLAG_HAS_AMT 4626 | FLAG_HAS_AMT
4647 | FLAG_HAS_FLASH 4627 | FLAG_HAS_FLASH
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index 05538e66c809..c15b7e438a44 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -488,20 +488,87 @@ static int e1000_desc_unused(struct e1000_ring *ring)
488} 488}
489 489
490/** 490/**
491 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
492 * @adapter: board private structure
493 * @hwtstamps: time stamp structure to update
494 * @systim: unsigned 64bit system time value.
495 *
496 * Convert the system time value stored in the RX/TXSTMP registers into a
497 * hwtstamp which can be used by the upper level time stamping functions.
498 *
499 * The 'systim_lock' spinlock is used to protect the consistency of the
500 * system time value. This is needed because reading the 64 bit time
501 * value involves reading two 32 bit registers. The first read latches the
502 * value.
503 **/
504static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
505 struct skb_shared_hwtstamps *hwtstamps,
506 u64 systim)
507{
508 u64 ns;
509 unsigned long flags;
510
511 spin_lock_irqsave(&adapter->systim_lock, flags);
512 ns = timecounter_cyc2time(&adapter->tc, systim);
513 spin_unlock_irqrestore(&adapter->systim_lock, flags);
514
515 memset(hwtstamps, 0, sizeof(*hwtstamps));
516 hwtstamps->hwtstamp = ns_to_ktime(ns);
517}
518
519/**
520 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
521 * @adapter: board private structure
522 * @status: descriptor extended error and status field
523 * @skb: particular skb to include time stamp
524 *
525 * If the time stamp is valid, convert it into the timecounter ns value
526 * and store that result into the shhwtstamps structure which is passed
527 * up the network stack.
528 **/
529static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
530 struct sk_buff *skb)
531{
532 struct e1000_hw *hw = &adapter->hw;
533 u64 rxstmp;
534
535 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
536 !(status & E1000_RXDEXT_STATERR_TST) ||
537 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
538 return;
539
540 /* The Rx time stamp registers contain the time stamp. No other
541 * received packet will be time stamped until the Rx time stamp
542 * registers are read. Because only one packet can be time stamped
543 * at a time, the register values must belong to this packet and
544 * therefore none of the other additional attributes need to be
545 * compared.
546 */
547 rxstmp = (u64)er32(RXSTMPL);
548 rxstmp |= (u64)er32(RXSTMPH) << 32;
549 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
550
551 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
552}
553
554/**
491 * e1000_receive_skb - helper function to handle Rx indications 555 * e1000_receive_skb - helper function to handle Rx indications
492 * @adapter: board private structure 556 * @adapter: board private structure
493 * @status: descriptor status field as written by hardware 557 * @staterr: descriptor extended error and status field as written by hardware
494 * @vlan: descriptor vlan field as written by hardware (no le/be conversion) 558 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
495 * @skb: pointer to sk_buff to be indicated to stack 559 * @skb: pointer to sk_buff to be indicated to stack
496 **/ 560 **/
497static void e1000_receive_skb(struct e1000_adapter *adapter, 561static void e1000_receive_skb(struct e1000_adapter *adapter,
498 struct net_device *netdev, struct sk_buff *skb, 562 struct net_device *netdev, struct sk_buff *skb,
499 u8 status, __le16 vlan) 563 u32 staterr, __le16 vlan)
500{ 564{
501 u16 tag = le16_to_cpu(vlan); 565 u16 tag = le16_to_cpu(vlan);
566
567 e1000e_rx_hwtstamp(adapter, staterr, skb);
568
502 skb->protocol = eth_type_trans(skb, netdev); 569 skb->protocol = eth_type_trans(skb, netdev);
503 570
504 if (status & E1000_RXD_STAT_VP) 571 if (staterr & E1000_RXD_STAT_VP)
505 __vlan_hwaccel_put_tag(skb, tag); 572 __vlan_hwaccel_put_tag(skb, tag);
506 573
507 napi_gro_receive(&adapter->napi, skb); 574 napi_gro_receive(&adapter->napi, skb);
@@ -1092,6 +1159,41 @@ static void e1000_print_hw_hang(struct work_struct *work)
1092} 1159}
1093 1160
1094/** 1161/**
1162 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1163 * @work: pointer to work struct
1164 *
1165 * This work function polls the TSYNCTXCTL valid bit to determine when a
1166 * timestamp has been taken for the current stored skb. The timestamp must
1167 * be for this skb because only one such packet is allowed in the queue.
1168 */
1169static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1170{
1171 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1172 tx_hwtstamp_work);
1173 struct e1000_hw *hw = &adapter->hw;
1174
1175 if (!adapter->tx_hwtstamp_skb)
1176 return;
1177
1178 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1179 struct skb_shared_hwtstamps shhwtstamps;
1180 u64 txstmp;
1181
1182 txstmp = er32(TXSTMPL);
1183 txstmp |= (u64)er32(TXSTMPH) << 32;
1184
1185 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1186
1187 skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps);
1188 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1189 adapter->tx_hwtstamp_skb = NULL;
1190 } else {
1191 /* reschedule to check later */
1192 schedule_work(&adapter->tx_hwtstamp_work);
1193 }
1194}
1195
1196/**
1095 * e1000_clean_tx_irq - Reclaim resources after transmit completes 1197 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1096 * @tx_ring: Tx descriptor ring 1198 * @tx_ring: Tx descriptor ring
1097 * 1199 *
@@ -1345,8 +1447,8 @@ copydone:
1345 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)) 1447 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1346 adapter->rx_hdr_split++; 1448 adapter->rx_hdr_split++;
1347 1449
1348 e1000_receive_skb(adapter, netdev, skb, 1450 e1000_receive_skb(adapter, netdev, skb, staterr,
1349 staterr, rx_desc->wb.middle.vlan); 1451 rx_desc->wb.middle.vlan);
1350 1452
1351next_desc: 1453next_desc:
1352 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 1454 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
@@ -3304,6 +3406,159 @@ static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3304} 3406}
3305 3407
3306/** 3408/**
3409 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3410 * @adapter: board private structure
3411 * @timinca: pointer to returned time increment attributes
3412 *
3413 * Get attributes for incrementing the System Time Register SYSTIML/H at
3414 * the default base frequency, and set the cyclecounter shift value.
3415 **/
3416static s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3417{
3418 struct e1000_hw *hw = &adapter->hw;
3419 u32 incvalue, incperiod, shift;
3420
3421 /* Make sure clock is enabled on I217 before checking the frequency */
3422 if ((hw->mac.type == e1000_pch_lpt) &&
3423 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3424 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3425 u32 fextnvm7 = er32(FEXTNVM7);
3426
3427 if (!(fextnvm7 & (1 << 0))) {
3428 ew32(FEXTNVM7, fextnvm7 | (1 << 0));
3429 e1e_flush();
3430 }
3431 }
3432
3433 switch (hw->mac.type) {
3434 case e1000_pch2lan:
3435 case e1000_pch_lpt:
3436 /* On I217, the clock frequency is 25MHz or 96MHz as
3437 * indicated by the System Clock Frequency Indication
3438 */
3439 if ((hw->mac.type != e1000_pch_lpt) ||
3440 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
3441 /* Stable 96MHz frequency */
3442 incperiod = INCPERIOD_96MHz;
3443 incvalue = INCVALUE_96MHz;
3444 shift = INCVALUE_SHIFT_96MHz;
3445 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3446 break;
3447 }
3448 /* fall-through */
3449 case e1000_82574:
3450 case e1000_82583:
3451 /* Stable 25MHz frequency */
3452 incperiod = INCPERIOD_25MHz;
3453 incvalue = INCVALUE_25MHz;
3454 shift = INCVALUE_SHIFT_25MHz;
3455 adapter->cc.shift = shift;
3456 break;
3457 default:
3458 return -EINVAL;
3459 }
3460
3461 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3462 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3463
3464 return 0;
3465}
3466
3467/**
3468 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3469 * @adapter: board private structure
3470 *
3471 * Outgoing time stamping can be enabled and disabled. Play nice and
3472 * disable it when requested, although it shouldn't cause any overhead
3473 * when no packet needs it. At most one packet in the queue may be
3474 * marked for time stamping, otherwise it would be impossible to tell
3475 * for sure to which packet the hardware time stamp belongs.
3476 *
3477 * Incoming time stamping has to be configured via the hardware filters.
3478 * Not all combinations are supported, in particular event type has to be
3479 * specified. Matching the kind of event packet is not supported, with the
3480 * exception of "all V2 events regardless of level 2 or 4".
3481 **/
3482static int e1000e_config_hwtstamp(struct e1000_adapter *adapter)
3483{
3484 struct e1000_hw *hw = &adapter->hw;
3485 struct hwtstamp_config *config = &adapter->hwtstamp_config;
3486 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3487 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3488 u32 regval;
3489 s32 ret_val;
3490
3491 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3492 return -EINVAL;
3493
3494 /* flags reserved for future extensions - must be zero */
3495 if (config->flags)
3496 return -EINVAL;
3497
3498 switch (config->tx_type) {
3499 case HWTSTAMP_TX_OFF:
3500 tsync_tx_ctl = 0;
3501 break;
3502 case HWTSTAMP_TX_ON:
3503 break;
3504 default:
3505 return -ERANGE;
3506 }
3507
3508 switch (config->rx_filter) {
3509 case HWTSTAMP_FILTER_NONE:
3510 tsync_rx_ctl = 0;
3511 break;
3512 case HWTSTAMP_FILTER_ALL:
3513 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3514 config->rx_filter = HWTSTAMP_FILTER_ALL;
3515 break;
3516 default:
3517 return -ERANGE;
3518 }
3519
3520 /* enable/disable Tx h/w time stamping */
3521 regval = er32(TSYNCTXCTL);
3522 regval &= ~E1000_TSYNCTXCTL_ENABLED;
3523 regval |= tsync_tx_ctl;
3524 ew32(TSYNCTXCTL, regval);
3525 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3526 (regval & E1000_TSYNCTXCTL_ENABLED)) {
3527 e_err("Timesync Tx Control register not set as expected\n");
3528 return -EAGAIN;
3529 }
3530
3531 /* enable/disable Rx h/w time stamping */
3532 regval = er32(TSYNCRXCTL);
3533 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3534 regval |= tsync_rx_ctl;
3535 ew32(TSYNCRXCTL, regval);
3536 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3537 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3538 (regval & (E1000_TSYNCRXCTL_ENABLED |
3539 E1000_TSYNCRXCTL_TYPE_MASK))) {
3540 e_err("Timesync Rx Control register not set as expected\n");
3541 return -EAGAIN;
3542 }
3543
3544 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3545 regval = er32(RXSTMPH);
3546 regval = er32(TXSTMPH);
3547
3548 /* Get and set the System Time Register SYSTIM base frequency */
3549 ret_val = e1000e_get_base_timinca(adapter, &regval);
3550 if (ret_val)
3551 return ret_val;
3552 ew32(TIMINCA, regval);
3553
3554 /* reset the ns time counter */
3555 timecounter_init(&adapter->tc, &adapter->cc,
3556 ktime_to_ns(ktime_get_real()));
3557
3558 return 0;
3559}
3560
3561/**
3307 * e1000_configure - configure the hardware for Rx and Tx 3562 * e1000_configure - configure the hardware for Rx and Tx
3308 * @adapter: private board structure 3563 * @adapter: private board structure
3309 **/ 3564 **/
@@ -3529,6 +3784,9 @@ void e1000e_reset(struct e1000_adapter *adapter)
3529 3784
3530 e1000e_reset_adaptive(hw); 3785 e1000e_reset_adaptive(hw);
3531 3786
3787 /* initialize systim and reset the ns time counter */
3788 e1000e_config_hwtstamp(adapter);
3789
3532 if (!netif_running(adapter->netdev) && 3790 if (!netif_running(adapter->netdev) &&
3533 !test_bit(__E1000_TESTING, &adapter->state)) { 3791 !test_bit(__E1000_TESTING, &adapter->state)) {
3534 e1000_power_down_phy(adapter); 3792 e1000_power_down_phy(adapter);
@@ -3665,6 +3923,24 @@ void e1000e_reinit_locked(struct e1000_adapter *adapter)
3665} 3923}
3666 3924
3667/** 3925/**
3926 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
3927 * @cc: cyclecounter structure
3928 **/
3929static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
3930{
3931 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
3932 cc);
3933 struct e1000_hw *hw = &adapter->hw;
3934 cycle_t systim;
3935
3936 /* latch SYSTIMH on read of SYSTIML */
3937 systim = (cycle_t)er32(SYSTIML);
3938 systim |= (cycle_t)er32(SYSTIMH) << 32;
3939
3940 return systim;
3941}
3942
3943/**
3668 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 3944 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3669 * @adapter: board private structure to initialize 3945 * @adapter: board private structure to initialize
3670 * 3946 *
@@ -3690,6 +3966,17 @@ static int e1000_sw_init(struct e1000_adapter *adapter)
3690 if (e1000_alloc_queues(adapter)) 3966 if (e1000_alloc_queues(adapter))
3691 return -ENOMEM; 3967 return -ENOMEM;
3692 3968
3969 /* Setup hardware time stamping cyclecounter */
3970 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
3971 adapter->cc.read = e1000e_cyclecounter_read;
3972 adapter->cc.mask = CLOCKSOURCE_MASK(64);
3973 adapter->cc.mult = 1;
3974 /* cc.shift set in e1000e_get_base_tininca() */
3975
3976 spin_lock_init(&adapter->systim_lock);
3977 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
3978 }
3979
3693 /* Explicitly disable IRQ since the NIC can be in any state. */ 3980 /* Explicitly disable IRQ since the NIC can be in any state. */
3694 e1000_irq_disable(adapter); 3981 e1000_irq_disable(adapter);
3695 3982
@@ -4597,6 +4884,17 @@ link_up:
4597 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) 4884 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4598 e1000e_check_82574_phy_workaround(adapter); 4885 e1000e_check_82574_phy_workaround(adapter);
4599 4886
4887 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
4888 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
4889 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
4890 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
4891 er32(RXSTMPH);
4892 adapter->rx_hwtstamp_cleared++;
4893 } else {
4894 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
4895 }
4896 }
4897
4600 /* Reset the timer */ 4898 /* Reset the timer */
4601 if (!test_bit(__E1000_DOWN, &adapter->state)) 4899 if (!test_bit(__E1000_DOWN, &adapter->state))
4602 mod_timer(&adapter->watchdog_timer, 4900 mod_timer(&adapter->watchdog_timer,
@@ -4608,6 +4906,7 @@ link_up:
4608#define E1000_TX_FLAGS_TSO 0x00000004 4906#define E1000_TX_FLAGS_TSO 0x00000004
4609#define E1000_TX_FLAGS_IPV4 0x00000008 4907#define E1000_TX_FLAGS_IPV4 0x00000008
4610#define E1000_TX_FLAGS_NO_FCS 0x00000010 4908#define E1000_TX_FLAGS_NO_FCS 0x00000010
4909#define E1000_TX_FLAGS_HWTSTAMP 0x00000020
4611#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 4910#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4612#define E1000_TX_FLAGS_VLAN_SHIFT 16 4911#define E1000_TX_FLAGS_VLAN_SHIFT 16
4613 4912
@@ -4866,6 +5165,11 @@ static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
4866 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS)) 5165 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
4867 txd_lower &= ~(E1000_TXD_CMD_IFCS); 5166 txd_lower &= ~(E1000_TXD_CMD_IFCS);
4868 5167
5168 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5169 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5170 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5171 }
5172
4869 i = tx_ring->next_to_use; 5173 i = tx_ring->next_to_use;
4870 5174
4871 do { 5175 do {
@@ -5089,7 +5393,15 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5089 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit, 5393 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5090 nr_frags); 5394 nr_frags);
5091 if (count) { 5395 if (count) {
5092 skb_tx_timestamp(skb); 5396 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5397 !adapter->tx_hwtstamp_skb)) {
5398 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5399 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5400 adapter->tx_hwtstamp_skb = skb_get(skb);
5401 schedule_work(&adapter->tx_hwtstamp_work);
5402 } else {
5403 skb_tx_timestamp(skb);
5404 }
5093 5405
5094 netdev_sent_queue(netdev, skb->len); 5406 netdev_sent_queue(netdev, skb->len);
5095 e1000_tx_queue(tx_ring, tx_flags, count); 5407 e1000_tx_queue(tx_ring, tx_flags, count);
@@ -5317,6 +5629,43 @@ static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5317 return 0; 5629 return 0;
5318} 5630}
5319 5631
5632/**
5633 * e1000e_hwtstamp_ioctl - control hardware time stamping
5634 * @netdev: network interface device structure
5635 * @ifreq: interface request
5636 *
5637 * Outgoing time stamping can be enabled and disabled. Play nice and
5638 * disable it when requested, although it shouldn't cause any overhead
5639 * when no packet needs it. At most one packet in the queue may be
5640 * marked for time stamping, otherwise it would be impossible to tell
5641 * for sure to which packet the hardware time stamp belongs.
5642 *
5643 * Incoming time stamping has to be configured via the hardware filters.
5644 * Not all combinations are supported, in particular event type has to be
5645 * specified. Matching the kind of event packet is not supported, with the
5646 * exception of "all V2 events regardless of level 2 or 4".
5647 **/
5648static int e1000e_hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)
5649{
5650 struct e1000_adapter *adapter = netdev_priv(netdev);
5651 struct hwtstamp_config config;
5652 int ret_val;
5653
5654 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
5655 return -EFAULT;
5656
5657 adapter->hwtstamp_config = config;
5658
5659 ret_val = e1000e_config_hwtstamp(adapter);
5660 if (ret_val)
5661 return ret_val;
5662
5663 config = adapter->hwtstamp_config;
5664
5665 return copy_to_user(ifr->ifr_data, &config,
5666 sizeof(config)) ? -EFAULT : 0;
5667}
5668
5320static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 5669static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5321{ 5670{
5322 switch (cmd) { 5671 switch (cmd) {
@@ -5324,6 +5673,8 @@ static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5324 case SIOCGMIIREG: 5673 case SIOCGMIIREG:
5325 case SIOCSMIIREG: 5674 case SIOCSMIIREG:
5326 return e1000_mii_ioctl(netdev, ifr, cmd); 5675 return e1000_mii_ioctl(netdev, ifr, cmd);
5676 case SIOCSHWTSTAMP:
5677 return e1000e_hwtstamp_ioctl(netdev, ifr);
5327 default: 5678 default:
5328 return -EOPNOTSUPP; 5679 return -EOPNOTSUPP;
5329 } 5680 }
@@ -5548,14 +5899,21 @@ static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5548#else 5899#else
5549static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5900static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5550{ 5901{
5902 u16 aspm_ctl = 0;
5903
5904 if (state & PCIE_LINK_STATE_L0S)
5905 aspm_ctl |= PCI_EXP_LNKCTL_ASPM_L0S;
5906 if (state & PCIE_LINK_STATE_L1)
5907 aspm_ctl |= PCI_EXP_LNKCTL_ASPM_L1;
5908
5551 /* Both device and parent should have the same ASPM setting. 5909 /* Both device and parent should have the same ASPM setting.
5552 * Disable ASPM in downstream component first and then upstream. 5910 * Disable ASPM in downstream component first and then upstream.
5553 */ 5911 */
5554 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, state); 5912 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_ctl);
5555 5913
5556 if (pdev->bus->self) 5914 if (pdev->bus->self)
5557 pcie_capability_clear_word(pdev->bus->self, PCI_EXP_LNKCTL, 5915 pcie_capability_clear_word(pdev->bus->self, PCI_EXP_LNKCTL,
5558 state); 5916 aspm_ctl);
5559} 5917}
5560#endif 5918#endif
5561static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state) 5919static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
@@ -6373,6 +6731,14 @@ static void e1000_remove(struct pci_dev *pdev)
6373 cancel_work_sync(&adapter->update_phy_task); 6731 cancel_work_sync(&adapter->update_phy_task);
6374 cancel_work_sync(&adapter->print_hang_task); 6732 cancel_work_sync(&adapter->print_hang_task);
6375 6733
6734 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
6735 cancel_work_sync(&adapter->tx_hwtstamp_work);
6736 if (adapter->tx_hwtstamp_skb) {
6737 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
6738 adapter->tx_hwtstamp_skb = NULL;
6739 }
6740 }
6741
6376 if (!(netdev->flags & IFF_UP)) 6742 if (!(netdev->flags & IFF_UP))
6377 e1000_power_down_phy(adapter); 6743 e1000_power_down_phy(adapter);
6378 6744
diff --git a/drivers/net/ethernet/intel/igb/Makefile b/drivers/net/ethernet/intel/igb/Makefile
index 624476cfa727..f9d37c809885 100644
--- a/drivers/net/ethernet/intel/igb/Makefile
+++ b/drivers/net/ethernet/intel/igb/Makefile
@@ -34,4 +34,4 @@ obj-$(CONFIG_IGB) += igb.o
34 34
35igb-objs := igb_main.o igb_ethtool.o e1000_82575.o \ 35igb-objs := igb_main.o igb_ethtool.o e1000_82575.o \
36 e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o \ 36 e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o \
37 e1000_i210.o igb_ptp.o 37 e1000_i210.o igb_ptp.o igb_hwmon.o
diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c
index fdaaf2709d0a..b6ec782156bb 100644
--- a/drivers/net/ethernet/intel/igb/e1000_82575.c
+++ b/drivers/net/ethernet/intel/igb/e1000_82575.c
@@ -33,6 +33,7 @@
33 33
34#include <linux/types.h> 34#include <linux/types.h>
35#include <linux/if_ether.h> 35#include <linux/if_ether.h>
36#include <linux/i2c.h>
36 37
37#include "e1000_mac.h" 38#include "e1000_mac.h"
38#include "e1000_82575.h" 39#include "e1000_82575.h"
@@ -2302,18 +2303,157 @@ out:
2302 return ret_val; 2303 return ret_val;
2303} 2304}
2304 2305
2306static const u8 e1000_emc_temp_data[4] = {
2307 E1000_EMC_INTERNAL_DATA,
2308 E1000_EMC_DIODE1_DATA,
2309 E1000_EMC_DIODE2_DATA,
2310 E1000_EMC_DIODE3_DATA
2311};
2312static const u8 e1000_emc_therm_limit[4] = {
2313 E1000_EMC_INTERNAL_THERM_LIMIT,
2314 E1000_EMC_DIODE1_THERM_LIMIT,
2315 E1000_EMC_DIODE2_THERM_LIMIT,
2316 E1000_EMC_DIODE3_THERM_LIMIT
2317};
2318
2319/* igb_get_thermal_sensor_data_generic - Gathers thermal sensor data
2320 * @hw: pointer to hardware structure
2321 *
2322 * Updates the temperatures in mac.thermal_sensor_data
2323 */
2324s32 igb_get_thermal_sensor_data_generic(struct e1000_hw *hw)
2325{
2326 s32 status = E1000_SUCCESS;
2327 u16 ets_offset;
2328 u16 ets_cfg;
2329 u16 ets_sensor;
2330 u8 num_sensors;
2331 u8 sensor_index;
2332 u8 sensor_location;
2333 u8 i;
2334 struct e1000_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;
2335
2336 if ((hw->mac.type != e1000_i350) || (hw->bus.func != 0))
2337 return E1000_NOT_IMPLEMENTED;
2338
2339 data->sensor[0].temp = (rd32(E1000_THMJT) & 0xFF);
2340
2341 /* Return the internal sensor only if ETS is unsupported */
2342 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_offset);
2343 if ((ets_offset == 0x0000) || (ets_offset == 0xFFFF))
2344 return status;
2345
2346 hw->nvm.ops.read(hw, ets_offset, 1, &ets_cfg);
2347 if (((ets_cfg & NVM_ETS_TYPE_MASK) >> NVM_ETS_TYPE_SHIFT)
2348 != NVM_ETS_TYPE_EMC)
2349 return E1000_NOT_IMPLEMENTED;
2350
2351 num_sensors = (ets_cfg & NVM_ETS_NUM_SENSORS_MASK);
2352 if (num_sensors > E1000_MAX_SENSORS)
2353 num_sensors = E1000_MAX_SENSORS;
2354
2355 for (i = 1; i < num_sensors; i++) {
2356 hw->nvm.ops.read(hw, (ets_offset + i), 1, &ets_sensor);
2357 sensor_index = ((ets_sensor & NVM_ETS_DATA_INDEX_MASK) >>
2358 NVM_ETS_DATA_INDEX_SHIFT);
2359 sensor_location = ((ets_sensor & NVM_ETS_DATA_LOC_MASK) >>
2360 NVM_ETS_DATA_LOC_SHIFT);
2361
2362 if (sensor_location != 0)
2363 hw->phy.ops.read_i2c_byte(hw,
2364 e1000_emc_temp_data[sensor_index],
2365 E1000_I2C_THERMAL_SENSOR_ADDR,
2366 &data->sensor[i].temp);
2367 }
2368 return status;
2369}
2370
2371/* igb_init_thermal_sensor_thresh_generic - Sets thermal sensor thresholds
2372 * @hw: pointer to hardware structure
2373 *
2374 * Sets the thermal sensor thresholds according to the NVM map
2375 * and save off the threshold and location values into mac.thermal_sensor_data
2376 */
2377s32 igb_init_thermal_sensor_thresh_generic(struct e1000_hw *hw)
2378{
2379 s32 status = E1000_SUCCESS;
2380 u16 ets_offset;
2381 u16 ets_cfg;
2382 u16 ets_sensor;
2383 u8 low_thresh_delta;
2384 u8 num_sensors;
2385 u8 sensor_index;
2386 u8 sensor_location;
2387 u8 therm_limit;
2388 u8 i;
2389 struct e1000_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;
2390
2391 if ((hw->mac.type != e1000_i350) || (hw->bus.func != 0))
2392 return E1000_NOT_IMPLEMENTED;
2393
2394 memset(data, 0, sizeof(struct e1000_thermal_sensor_data));
2395
2396 data->sensor[0].location = 0x1;
2397 data->sensor[0].caution_thresh =
2398 (rd32(E1000_THHIGHTC) & 0xFF);
2399 data->sensor[0].max_op_thresh =
2400 (rd32(E1000_THLOWTC) & 0xFF);
2401
2402 /* Return the internal sensor only if ETS is unsupported */
2403 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_offset);
2404 if ((ets_offset == 0x0000) || (ets_offset == 0xFFFF))
2405 return status;
2406
2407 hw->nvm.ops.read(hw, ets_offset, 1, &ets_cfg);
2408 if (((ets_cfg & NVM_ETS_TYPE_MASK) >> NVM_ETS_TYPE_SHIFT)
2409 != NVM_ETS_TYPE_EMC)
2410 return E1000_NOT_IMPLEMENTED;
2411
2412 low_thresh_delta = ((ets_cfg & NVM_ETS_LTHRES_DELTA_MASK) >>
2413 NVM_ETS_LTHRES_DELTA_SHIFT);
2414 num_sensors = (ets_cfg & NVM_ETS_NUM_SENSORS_MASK);
2415
2416 for (i = 1; i <= num_sensors; i++) {
2417 hw->nvm.ops.read(hw, (ets_offset + i), 1, &ets_sensor);
2418 sensor_index = ((ets_sensor & NVM_ETS_DATA_INDEX_MASK) >>
2419 NVM_ETS_DATA_INDEX_SHIFT);
2420 sensor_location = ((ets_sensor & NVM_ETS_DATA_LOC_MASK) >>
2421 NVM_ETS_DATA_LOC_SHIFT);
2422 therm_limit = ets_sensor & NVM_ETS_DATA_HTHRESH_MASK;
2423
2424 hw->phy.ops.write_i2c_byte(hw,
2425 e1000_emc_therm_limit[sensor_index],
2426 E1000_I2C_THERMAL_SENSOR_ADDR,
2427 therm_limit);
2428
2429 if ((i < E1000_MAX_SENSORS) && (sensor_location != 0)) {
2430 data->sensor[i].location = sensor_location;
2431 data->sensor[i].caution_thresh = therm_limit;
2432 data->sensor[i].max_op_thresh = therm_limit -
2433 low_thresh_delta;
2434 }
2435 }
2436 return status;
2437}
2438
2305static struct e1000_mac_operations e1000_mac_ops_82575 = { 2439static struct e1000_mac_operations e1000_mac_ops_82575 = {
2306 .init_hw = igb_init_hw_82575, 2440 .init_hw = igb_init_hw_82575,
2307 .check_for_link = igb_check_for_link_82575, 2441 .check_for_link = igb_check_for_link_82575,
2308 .rar_set = igb_rar_set, 2442 .rar_set = igb_rar_set,
2309 .read_mac_addr = igb_read_mac_addr_82575, 2443 .read_mac_addr = igb_read_mac_addr_82575,
2310 .get_speed_and_duplex = igb_get_speed_and_duplex_copper, 2444 .get_speed_and_duplex = igb_get_speed_and_duplex_copper,
2445#ifdef CONFIG_IGB_HWMON
2446 .get_thermal_sensor_data = igb_get_thermal_sensor_data_generic,
2447 .init_thermal_sensor_thresh = igb_init_thermal_sensor_thresh_generic,
2448#endif
2311}; 2449};
2312 2450
2313static struct e1000_phy_operations e1000_phy_ops_82575 = { 2451static struct e1000_phy_operations e1000_phy_ops_82575 = {
2314 .acquire = igb_acquire_phy_82575, 2452 .acquire = igb_acquire_phy_82575,
2315 .get_cfg_done = igb_get_cfg_done_82575, 2453 .get_cfg_done = igb_get_cfg_done_82575,
2316 .release = igb_release_phy_82575, 2454 .release = igb_release_phy_82575,
2455 .write_i2c_byte = igb_write_i2c_byte,
2456 .read_i2c_byte = igb_read_i2c_byte,
2317}; 2457};
2318 2458
2319static struct e1000_nvm_operations e1000_nvm_ops_82575 = { 2459static struct e1000_nvm_operations e1000_nvm_ops_82575 = {
diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.h b/drivers/net/ethernet/intel/igb/e1000_82575.h
index 44b76b3b6816..444f6f521da7 100644
--- a/drivers/net/ethernet/intel/igb/e1000_82575.h
+++ b/drivers/net/ethernet/intel/igb/e1000_82575.h
@@ -32,6 +32,10 @@ extern void igb_shutdown_serdes_link_82575(struct e1000_hw *hw);
32extern void igb_power_up_serdes_link_82575(struct e1000_hw *hw); 32extern void igb_power_up_serdes_link_82575(struct e1000_hw *hw);
33extern void igb_power_down_phy_copper_82575(struct e1000_hw *hw); 33extern void igb_power_down_phy_copper_82575(struct e1000_hw *hw);
34extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw); 34extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw);
35extern s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
36 u8 dev_addr, u8 *data);
37extern s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
38 u8 dev_addr, u8 data);
35 39
36#define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \ 40#define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \
37 (ID_LED_DEF1_DEF2 << 8) | \ 41 (ID_LED_DEF1_DEF2 << 8) | \
@@ -260,5 +264,16 @@ void igb_vmdq_set_loopback_pf(struct e1000_hw *, bool);
260void igb_vmdq_set_replication_pf(struct e1000_hw *, bool); 264void igb_vmdq_set_replication_pf(struct e1000_hw *, bool);
261u16 igb_rxpbs_adjust_82580(u32 data); 265u16 igb_rxpbs_adjust_82580(u32 data);
262s32 igb_set_eee_i350(struct e1000_hw *); 266s32 igb_set_eee_i350(struct e1000_hw *);
263 267s32 igb_init_thermal_sensor_thresh_generic(struct e1000_hw *);
268s32 igb_get_thermal_sensor_data_generic(struct e1000_hw *hw);
269
270#define E1000_I2C_THERMAL_SENSOR_ADDR 0xF8
271#define E1000_EMC_INTERNAL_DATA 0x00
272#define E1000_EMC_INTERNAL_THERM_LIMIT 0x20
273#define E1000_EMC_DIODE1_DATA 0x01
274#define E1000_EMC_DIODE1_THERM_LIMIT 0x19
275#define E1000_EMC_DIODE2_DATA 0x23
276#define E1000_EMC_DIODE2_THERM_LIMIT 0x1A
277#define E1000_EMC_DIODE3_DATA 0x2A
278#define E1000_EMC_DIODE3_THERM_LIMIT 0x30
264#endif 279#endif
diff --git a/drivers/net/ethernet/intel/igb/e1000_defines.h b/drivers/net/ethernet/intel/igb/e1000_defines.h
index 45dce06eff26..9b7ef93efd79 100644
--- a/drivers/net/ethernet/intel/igb/e1000_defines.h
+++ b/drivers/net/ethernet/intel/igb/e1000_defines.h
@@ -470,6 +470,7 @@
470#define E1000_ERR_NO_SPACE 17 470#define E1000_ERR_NO_SPACE 17
471#define E1000_ERR_NVM_PBA_SECTION 18 471#define E1000_ERR_NVM_PBA_SECTION 18
472#define E1000_ERR_INVM_VALUE_NOT_FOUND 19 472#define E1000_ERR_INVM_VALUE_NOT_FOUND 19
473#define E1000_ERR_I2C 20
473 474
474/* Loop limit on how long we wait for auto-negotiation to complete */ 475/* Loop limit on how long we wait for auto-negotiation to complete */
475#define COPPER_LINK_UP_LIMIT 10 476#define COPPER_LINK_UP_LIMIT 10
@@ -674,6 +675,18 @@
674#define NVM_COMB_VER_SHFT 8 675#define NVM_COMB_VER_SHFT 8
675#define NVM_VER_INVALID 0xFFFF 676#define NVM_VER_INVALID 0xFFFF
676#define NVM_ETRACK_SHIFT 16 677#define NVM_ETRACK_SHIFT 16
678#define NVM_ETS_CFG 0x003E
679#define NVM_ETS_LTHRES_DELTA_MASK 0x07C0
680#define NVM_ETS_LTHRES_DELTA_SHIFT 6
681#define NVM_ETS_TYPE_MASK 0x0038
682#define NVM_ETS_TYPE_SHIFT 3
683#define NVM_ETS_TYPE_EMC 0x000
684#define NVM_ETS_NUM_SENSORS_MASK 0x0007
685#define NVM_ETS_DATA_LOC_MASK 0x3C00
686#define NVM_ETS_DATA_LOC_SHIFT 10
687#define NVM_ETS_DATA_INDEX_MASK 0x0300
688#define NVM_ETS_DATA_INDEX_SHIFT 8
689#define NVM_ETS_DATA_HTHRESH_MASK 0x00FF
677 690
678#define E1000_NVM_CFG_DONE_PORT_0 0x040000 /* MNG config cycle done */ 691#define E1000_NVM_CFG_DONE_PORT_0 0x040000 /* MNG config cycle done */
679#define E1000_NVM_CFG_DONE_PORT_1 0x080000 /* ...for second port */ 692#define E1000_NVM_CFG_DONE_PORT_1 0x080000 /* ...for second port */
diff --git a/drivers/net/ethernet/intel/igb/e1000_hw.h b/drivers/net/ethernet/intel/igb/e1000_hw.h
index c2a51dcda550..2c9b6f40e21c 100644
--- a/drivers/net/ethernet/intel/igb/e1000_hw.h
+++ b/drivers/net/ethernet/intel/igb/e1000_hw.h
@@ -325,6 +325,10 @@ struct e1000_mac_operations {
325 s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *); 325 s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
326 s32 (*acquire_swfw_sync)(struct e1000_hw *, u16); 326 s32 (*acquire_swfw_sync)(struct e1000_hw *, u16);
327 void (*release_swfw_sync)(struct e1000_hw *, u16); 327 void (*release_swfw_sync)(struct e1000_hw *, u16);
328#ifdef CONFIG_IGB_HWMON
329 s32 (*get_thermal_sensor_data)(struct e1000_hw *);
330 s32 (*init_thermal_sensor_thresh)(struct e1000_hw *);
331#endif
328 332
329}; 333};
330 334
@@ -342,6 +346,8 @@ struct e1000_phy_operations {
342 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool); 346 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
343 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool); 347 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
344 s32 (*write_reg)(struct e1000_hw *, u32, u16); 348 s32 (*write_reg)(struct e1000_hw *, u32, u16);
349 s32 (*read_i2c_byte)(struct e1000_hw *, u8, u8, u8 *);
350 s32 (*write_i2c_byte)(struct e1000_hw *, u8, u8, u8);
345}; 351};
346 352
347struct e1000_nvm_operations { 353struct e1000_nvm_operations {
@@ -354,6 +360,19 @@ struct e1000_nvm_operations {
354 s32 (*valid_led_default)(struct e1000_hw *, u16 *); 360 s32 (*valid_led_default)(struct e1000_hw *, u16 *);
355}; 361};
356 362
363#define E1000_MAX_SENSORS 3
364
365struct e1000_thermal_diode_data {
366 u8 location;
367 u8 temp;
368 u8 caution_thresh;
369 u8 max_op_thresh;
370};
371
372struct e1000_thermal_sensor_data {
373 struct e1000_thermal_diode_data sensor[E1000_MAX_SENSORS];
374};
375
357struct e1000_info { 376struct e1000_info {
358 s32 (*get_invariants)(struct e1000_hw *); 377 s32 (*get_invariants)(struct e1000_hw *);
359 struct e1000_mac_operations *mac_ops; 378 struct e1000_mac_operations *mac_ops;
@@ -399,6 +418,7 @@ struct e1000_mac_info {
399 bool report_tx_early; 418 bool report_tx_early;
400 bool serdes_has_link; 419 bool serdes_has_link;
401 bool tx_pkt_filtering; 420 bool tx_pkt_filtering;
421 struct e1000_thermal_sensor_data thermal_sensor_data;
402}; 422};
403 423
404struct e1000_phy_info { 424struct e1000_phy_info {
diff --git a/drivers/net/ethernet/intel/igb/e1000_regs.h b/drivers/net/ethernet/intel/igb/e1000_regs.h
index e5db48594e8a..889de261844d 100644
--- a/drivers/net/ethernet/intel/igb/e1000_regs.h
+++ b/drivers/net/ethernet/intel/igb/e1000_regs.h
@@ -75,6 +75,14 @@
75#define E1000_FCRTL 0x02160 /* Flow Control Receive Threshold Low - RW */ 75#define E1000_FCRTL 0x02160 /* Flow Control Receive Threshold Low - RW */
76#define E1000_FCRTH 0x02168 /* Flow Control Receive Threshold High - RW */ 76#define E1000_FCRTH 0x02168 /* Flow Control Receive Threshold High - RW */
77#define E1000_FCRTV 0x02460 /* Flow Control Refresh Timer Value - RW */ 77#define E1000_FCRTV 0x02460 /* Flow Control Refresh Timer Value - RW */
78#define E1000_I2CPARAMS 0x0102C /* SFPI2C Parameters Register - RW */
79#define E1000_I2CBB_EN 0x00000100 /* I2C - Bit Bang Enable */
80#define E1000_I2C_CLK_OUT 0x00000200 /* I2C- Clock */
81#define E1000_I2C_DATA_OUT 0x00000400 /* I2C- Data Out */
82#define E1000_I2C_DATA_OE_N 0x00000800 /* I2C- Data Output Enable */
83#define E1000_I2C_DATA_IN 0x00001000 /* I2C- Data In */
84#define E1000_I2C_CLK_OE_N 0x00002000 /* I2C- Clock Output Enable */
85#define E1000_I2C_CLK_IN 0x00004000 /* I2C- Clock In */
78 86
79/* IEEE 1588 TIMESYNCH */ 87/* IEEE 1588 TIMESYNCH */
80#define E1000_TSYNCRXCTL 0x0B620 /* Rx Time Sync Control register - RW */ 88#define E1000_TSYNCRXCTL 0x0B620 /* Rx Time Sync Control register - RW */
@@ -124,6 +132,14 @@
124 132
125/* Split and Replication RX Control - RW */ 133/* Split and Replication RX Control - RW */
126#define E1000_RXPBS 0x02404 /* Rx Packet Buffer Size - RW */ 134#define E1000_RXPBS 0x02404 /* Rx Packet Buffer Size - RW */
135
136/* Thermal sensor configuration and status registers */
137#define E1000_THMJT 0x08100 /* Junction Temperature */
138#define E1000_THLOWTC 0x08104 /* Low Threshold Control */
139#define E1000_THMIDTC 0x08108 /* Mid Threshold Control */
140#define E1000_THHIGHTC 0x0810C /* High Threshold Control */
141#define E1000_THSTAT 0x08110 /* Thermal Sensor Status */
142
127/* 143/*
128 * Convenience macros 144 * Convenience macros
129 * 145 *
diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h
index 17f1686ee411..ad317ab3a34c 100644
--- a/drivers/net/ethernet/intel/igb/igb.h
+++ b/drivers/net/ethernet/intel/igb/igb.h
@@ -39,6 +39,8 @@
39#include <linux/ptp_clock_kernel.h> 39#include <linux/ptp_clock_kernel.h>
40#include <linux/bitops.h> 40#include <linux/bitops.h>
41#include <linux/if_vlan.h> 41#include <linux/if_vlan.h>
42#include <linux/i2c.h>
43#include <linux/i2c-algo-bit.h>
42 44
43struct igb_adapter; 45struct igb_adapter;
44 46
@@ -219,6 +221,7 @@ struct igb_ring {
219 struct igb_tx_buffer *tx_buffer_info; 221 struct igb_tx_buffer *tx_buffer_info;
220 struct igb_rx_buffer *rx_buffer_info; 222 struct igb_rx_buffer *rx_buffer_info;
221 }; 223 };
224 unsigned long last_rx_timestamp;
222 void *desc; /* descriptor ring memory */ 225 void *desc; /* descriptor ring memory */
223 unsigned long flags; /* ring specific flags */ 226 unsigned long flags; /* ring specific flags */
224 void __iomem *tail; /* pointer to ring tail register */ 227 void __iomem *tail; /* pointer to ring tail register */
@@ -301,6 +304,32 @@ static inline int igb_desc_unused(struct igb_ring *ring)
301 return ring->count + ring->next_to_clean - ring->next_to_use - 1; 304 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
302} 305}
303 306
307struct igb_i2c_client_list {
308 struct i2c_client *client;
309 struct igb_i2c_client_list *next;
310};
311
312#ifdef CONFIG_IGB_HWMON
313
314#define IGB_HWMON_TYPE_LOC 0
315#define IGB_HWMON_TYPE_TEMP 1
316#define IGB_HWMON_TYPE_CAUTION 2
317#define IGB_HWMON_TYPE_MAX 3
318
319struct hwmon_attr {
320 struct device_attribute dev_attr;
321 struct e1000_hw *hw;
322 struct e1000_thermal_diode_data *sensor;
323 char name[12];
324 };
325
326struct hwmon_buff {
327 struct device *device;
328 struct hwmon_attr *hwmon_list;
329 unsigned int n_hwmon;
330 };
331#endif
332
304/* board specific private data structure */ 333/* board specific private data structure */
305struct igb_adapter { 334struct igb_adapter {
306 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 335 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
@@ -386,11 +415,22 @@ struct igb_adapter {
386 struct delayed_work ptp_overflow_work; 415 struct delayed_work ptp_overflow_work;
387 struct work_struct ptp_tx_work; 416 struct work_struct ptp_tx_work;
388 struct sk_buff *ptp_tx_skb; 417 struct sk_buff *ptp_tx_skb;
418 unsigned long ptp_tx_start;
419 unsigned long last_rx_ptp_check;
389 spinlock_t tmreg_lock; 420 spinlock_t tmreg_lock;
390 struct cyclecounter cc; 421 struct cyclecounter cc;
391 struct timecounter tc; 422 struct timecounter tc;
423 u32 tx_hwtstamp_timeouts;
424 u32 rx_hwtstamp_cleared;
392 425
393 char fw_version[32]; 426 char fw_version[32];
427#ifdef CONFIG_IGB_HWMON
428 struct hwmon_buff igb_hwmon_buff;
429 bool ets;
430#endif
431 struct i2c_algo_bit_data i2c_algo;
432 struct i2c_adapter i2c_adap;
433 struct igb_i2c_client_list *i2c_clients;
394}; 434};
395 435
396#define IGB_FLAG_HAS_MSI (1 << 0) 436#define IGB_FLAG_HAS_MSI (1 << 0)
@@ -449,6 +489,7 @@ extern void igb_ptp_init(struct igb_adapter *adapter);
449extern void igb_ptp_stop(struct igb_adapter *adapter); 489extern void igb_ptp_stop(struct igb_adapter *adapter);
450extern void igb_ptp_reset(struct igb_adapter *adapter); 490extern void igb_ptp_reset(struct igb_adapter *adapter);
451extern void igb_ptp_tx_work(struct work_struct *work); 491extern void igb_ptp_tx_work(struct work_struct *work);
492extern void igb_ptp_rx_hang(struct igb_adapter *adapter);
452extern void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter); 493extern void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter);
453extern void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector, 494extern void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,
454 struct sk_buff *skb); 495 struct sk_buff *skb);
@@ -466,7 +507,10 @@ static inline void igb_ptp_rx_hwtstamp(struct igb_q_vector *q_vector,
466 507
467extern int igb_ptp_hwtstamp_ioctl(struct net_device *netdev, 508extern int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,
468 struct ifreq *ifr, int cmd); 509 struct ifreq *ifr, int cmd);
469 510#ifdef CONFIG_IGB_HWMON
511extern void igb_sysfs_exit(struct igb_adapter *adapter);
512extern int igb_sysfs_init(struct igb_adapter *adapter);
513#endif
470static inline s32 igb_reset_phy(struct e1000_hw *hw) 514static inline s32 igb_reset_phy(struct e1000_hw *hw)
471{ 515{
472 if (hw->phy.ops.reset) 516 if (hw->phy.ops.reset)
diff --git a/drivers/net/ethernet/intel/igb/igb_ethtool.c b/drivers/net/ethernet/intel/igb/igb_ethtool.c
index bfe9208c4b18..3ff37946f899 100644
--- a/drivers/net/ethernet/intel/igb/igb_ethtool.c
+++ b/drivers/net/ethernet/intel/igb/igb_ethtool.c
@@ -92,6 +92,8 @@ static const struct igb_stats igb_gstrings_stats[] = {
92 IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc), 92 IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
93 IGB_STAT("os2bmc_tx_by_host", stats.o2bspc), 93 IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
94 IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc), 94 IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
95 IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
96 IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
95}; 97};
96 98
97#define IGB_NETDEV_STAT(_net_stat) { \ 99#define IGB_NETDEV_STAT(_net_stat) { \
@@ -2272,12 +2274,21 @@ static int igb_get_ts_info(struct net_device *dev,
2272 struct igb_adapter *adapter = netdev_priv(dev); 2274 struct igb_adapter *adapter = netdev_priv(dev);
2273 2275
2274 switch (adapter->hw.mac.type) { 2276 switch (adapter->hw.mac.type) {
2277 case e1000_82575:
2278 info->so_timestamping =
2279 SOF_TIMESTAMPING_TX_SOFTWARE |
2280 SOF_TIMESTAMPING_RX_SOFTWARE |
2281 SOF_TIMESTAMPING_SOFTWARE;
2282 return 0;
2275 case e1000_82576: 2283 case e1000_82576:
2276 case e1000_82580: 2284 case e1000_82580:
2277 case e1000_i350: 2285 case e1000_i350:
2278 case e1000_i210: 2286 case e1000_i210:
2279 case e1000_i211: 2287 case e1000_i211:
2280 info->so_timestamping = 2288 info->so_timestamping =
2289 SOF_TIMESTAMPING_TX_SOFTWARE |
2290 SOF_TIMESTAMPING_RX_SOFTWARE |
2291 SOF_TIMESTAMPING_SOFTWARE |
2281 SOF_TIMESTAMPING_TX_HARDWARE | 2292 SOF_TIMESTAMPING_TX_HARDWARE |
2282 SOF_TIMESTAMPING_RX_HARDWARE | 2293 SOF_TIMESTAMPING_RX_HARDWARE |
2283 SOF_TIMESTAMPING_RAW_HARDWARE; 2294 SOF_TIMESTAMPING_RAW_HARDWARE;
diff --git a/drivers/net/ethernet/intel/igb/igb_hwmon.c b/drivers/net/ethernet/intel/igb/igb_hwmon.c
new file mode 100644
index 000000000000..106bd7c29bc9
--- /dev/null
+++ b/drivers/net/ethernet/intel/igb/igb_hwmon.c
@@ -0,0 +1,242 @@
1/*******************************************************************************
2
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2012 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#include "igb.h"
29#include "e1000_82575.h"
30#include "e1000_hw.h"
31
32#include <linux/module.h>
33#include <linux/types.h>
34#include <linux/sysfs.h>
35#include <linux/kobject.h>
36#include <linux/device.h>
37#include <linux/netdevice.h>
38#include <linux/hwmon.h>
39#include <linux/pci.h>
40
41#ifdef CONFIG_IGB_HWMON
42/* hwmon callback functions */
43static ssize_t igb_hwmon_show_location(struct device *dev,
44 struct device_attribute *attr,
45 char *buf)
46{
47 struct hwmon_attr *igb_attr = container_of(attr, struct hwmon_attr,
48 dev_attr);
49 return sprintf(buf, "loc%u\n",
50 igb_attr->sensor->location);
51}
52
53static ssize_t igb_hwmon_show_temp(struct device *dev,
54 struct device_attribute *attr,
55 char *buf)
56{
57 struct hwmon_attr *igb_attr = container_of(attr, struct hwmon_attr,
58 dev_attr);
59 unsigned int value;
60
61 /* reset the temp field */
62 igb_attr->hw->mac.ops.get_thermal_sensor_data(igb_attr->hw);
63
64 value = igb_attr->sensor->temp;
65
66 /* display millidegree */
67 value *= 1000;
68
69 return sprintf(buf, "%u\n", value);
70}
71
72static ssize_t igb_hwmon_show_cautionthresh(struct device *dev,
73 struct device_attribute *attr,
74 char *buf)
75{
76 struct hwmon_attr *igb_attr = container_of(attr, struct hwmon_attr,
77 dev_attr);
78 unsigned int value = igb_attr->sensor->caution_thresh;
79
80 /* display millidegree */
81 value *= 1000;
82
83 return sprintf(buf, "%u\n", value);
84}
85
86static ssize_t igb_hwmon_show_maxopthresh(struct device *dev,
87 struct device_attribute *attr,
88 char *buf)
89{
90 struct hwmon_attr *igb_attr = container_of(attr, struct hwmon_attr,
91 dev_attr);
92 unsigned int value = igb_attr->sensor->max_op_thresh;
93
94 /* display millidegree */
95 value *= 1000;
96
97 return sprintf(buf, "%u\n", value);
98}
99
100/* igb_add_hwmon_attr - Create hwmon attr table for a hwmon sysfs file.
101 * @ adapter: pointer to the adapter structure
102 * @ offset: offset in the eeprom sensor data table
103 * @ type: type of sensor data to display
104 *
105 * For each file we want in hwmon's sysfs interface we need a device_attribute
106 * This is included in our hwmon_attr struct that contains the references to
107 * the data structures we need to get the data to display.
108 */
109static int igb_add_hwmon_attr(struct igb_adapter *adapter,
110 unsigned int offset, int type) {
111 int rc;
112 unsigned int n_attr;
113 struct hwmon_attr *igb_attr;
114
115 n_attr = adapter->igb_hwmon_buff.n_hwmon;
116 igb_attr = &adapter->igb_hwmon_buff.hwmon_list[n_attr];
117
118 switch (type) {
119 case IGB_HWMON_TYPE_LOC:
120 igb_attr->dev_attr.show = igb_hwmon_show_location;
121 snprintf(igb_attr->name, sizeof(igb_attr->name),
122 "temp%u_label", offset);
123 break;
124 case IGB_HWMON_TYPE_TEMP:
125 igb_attr->dev_attr.show = igb_hwmon_show_temp;
126 snprintf(igb_attr->name, sizeof(igb_attr->name),
127 "temp%u_input", offset);
128 break;
129 case IGB_HWMON_TYPE_CAUTION:
130 igb_attr->dev_attr.show = igb_hwmon_show_cautionthresh;
131 snprintf(igb_attr->name, sizeof(igb_attr->name),
132 "temp%u_max", offset);
133 break;
134 case IGB_HWMON_TYPE_MAX:
135 igb_attr->dev_attr.show = igb_hwmon_show_maxopthresh;
136 snprintf(igb_attr->name, sizeof(igb_attr->name),
137 "temp%u_crit", offset);
138 break;
139 default:
140 rc = -EPERM;
141 return rc;
142 }
143
144 /* These always the same regardless of type */
145 igb_attr->sensor =
146 &adapter->hw.mac.thermal_sensor_data.sensor[offset];
147 igb_attr->hw = &adapter->hw;
148 igb_attr->dev_attr.store = NULL;
149 igb_attr->dev_attr.attr.mode = S_IRUGO;
150 igb_attr->dev_attr.attr.name = igb_attr->name;
151 sysfs_attr_init(&igb_attr->dev_attr.attr);
152 rc = device_create_file(&adapter->pdev->dev,
153 &igb_attr->dev_attr);
154 if (rc == 0)
155 ++adapter->igb_hwmon_buff.n_hwmon;
156
157 return rc;
158}
159
160static void igb_sysfs_del_adapter(struct igb_adapter *adapter)
161{
162 int i;
163
164 if (adapter == NULL)
165 return;
166
167 for (i = 0; i < adapter->igb_hwmon_buff.n_hwmon; i++) {
168 device_remove_file(&adapter->pdev->dev,
169 &adapter->igb_hwmon_buff.hwmon_list[i].dev_attr);
170 }
171
172 kfree(adapter->igb_hwmon_buff.hwmon_list);
173
174 if (adapter->igb_hwmon_buff.device)
175 hwmon_device_unregister(adapter->igb_hwmon_buff.device);
176}
177
178/* called from igb_main.c */
179void igb_sysfs_exit(struct igb_adapter *adapter)
180{
181 igb_sysfs_del_adapter(adapter);
182}
183
184/* called from igb_main.c */
185int igb_sysfs_init(struct igb_adapter *adapter)
186{
187 struct hwmon_buff *igb_hwmon = &adapter->igb_hwmon_buff;
188 unsigned int i;
189 int n_attrs;
190 int rc = 0;
191
192 /* If this method isn't defined we don't support thermals */
193 if (adapter->hw.mac.ops.init_thermal_sensor_thresh == NULL)
194 goto exit;
195
196 /* Don't create thermal hwmon interface if no sensors present */
197 rc = (adapter->hw.mac.ops.init_thermal_sensor_thresh(&adapter->hw));
198 if (rc)
199 goto exit;
200
201 /* Allocation space for max attributes
202 * max num sensors * values (loc, temp, max, caution)
203 */
204 n_attrs = E1000_MAX_SENSORS * 4;
205 igb_hwmon->hwmon_list = kcalloc(n_attrs, sizeof(struct hwmon_attr),
206 GFP_KERNEL);
207 if (!igb_hwmon->hwmon_list) {
208 rc = -ENOMEM;
209 goto err;
210 }
211
212 igb_hwmon->device = hwmon_device_register(&adapter->pdev->dev);
213 if (IS_ERR(igb_hwmon->device)) {
214 rc = PTR_ERR(igb_hwmon->device);
215 goto err;
216 }
217
218 for (i = 0; i < E1000_MAX_SENSORS; i++) {
219
220 /* Only create hwmon sysfs entries for sensors that have
221 * meaningful data.
222 */
223 if (adapter->hw.mac.thermal_sensor_data.sensor[i].location == 0)
224 continue;
225
226 /* Bail if any hwmon attr struct fails to initialize */
227 rc = igb_add_hwmon_attr(adapter, i, IGB_HWMON_TYPE_CAUTION);
228 rc |= igb_add_hwmon_attr(adapter, i, IGB_HWMON_TYPE_LOC);
229 rc |= igb_add_hwmon_attr(adapter, i, IGB_HWMON_TYPE_TEMP);
230 rc |= igb_add_hwmon_attr(adapter, i, IGB_HWMON_TYPE_MAX);
231 if (rc)
232 goto err;
233 }
234
235 goto exit;
236
237err:
238 igb_sysfs_del_adapter(adapter);
239exit:
240 return rc;
241}
242#endif
diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index a0a31b55a073..c9e438ba1ec2 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -57,6 +57,7 @@
57#ifdef CONFIG_IGB_DCA 57#ifdef CONFIG_IGB_DCA
58#include <linux/dca.h> 58#include <linux/dca.h>
59#endif 59#endif
60#include <linux/i2c.h>
60#include "igb.h" 61#include "igb.h"
61 62
62#define MAJ 4 63#define MAJ 4
@@ -193,6 +194,7 @@ static const struct dev_pm_ops igb_pm_ops = {
193}; 194};
194#endif 195#endif
195static void igb_shutdown(struct pci_dev *); 196static void igb_shutdown(struct pci_dev *);
197static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
196#ifdef CONFIG_IGB_DCA 198#ifdef CONFIG_IGB_DCA
197static int igb_notify_dca(struct notifier_block *, unsigned long, void *); 199static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
198static struct notifier_block dca_notifier = { 200static struct notifier_block dca_notifier = {
@@ -234,6 +236,7 @@ static struct pci_driver igb_driver = {
234 .driver.pm = &igb_pm_ops, 236 .driver.pm = &igb_pm_ops,
235#endif 237#endif
236 .shutdown = igb_shutdown, 238 .shutdown = igb_shutdown,
239 .sriov_configure = igb_pci_sriov_configure,
237 .err_handler = &igb_err_handler 240 .err_handler = &igb_err_handler
238}; 241};
239 242
@@ -565,6 +568,91 @@ exit:
565 return; 568 return;
566} 569}
567 570
571/* igb_get_i2c_data - Reads the I2C SDA data bit
572 * @hw: pointer to hardware structure
573 * @i2cctl: Current value of I2CCTL register
574 *
575 * Returns the I2C data bit value
576 */
577static int igb_get_i2c_data(void *data)
578{
579 struct igb_adapter *adapter = (struct igb_adapter *)data;
580 struct e1000_hw *hw = &adapter->hw;
581 s32 i2cctl = rd32(E1000_I2CPARAMS);
582
583 return ((i2cctl & E1000_I2C_DATA_IN) != 0);
584}
585
586/* igb_set_i2c_data - Sets the I2C data bit
587 * @data: pointer to hardware structure
588 * @state: I2C data value (0 or 1) to set
589 *
590 * Sets the I2C data bit
591 */
592static void igb_set_i2c_data(void *data, int state)
593{
594 struct igb_adapter *adapter = (struct igb_adapter *)data;
595 struct e1000_hw *hw = &adapter->hw;
596 s32 i2cctl = rd32(E1000_I2CPARAMS);
597
598 if (state)
599 i2cctl |= E1000_I2C_DATA_OUT;
600 else
601 i2cctl &= ~E1000_I2C_DATA_OUT;
602
603 i2cctl &= ~E1000_I2C_DATA_OE_N;
604 i2cctl |= E1000_I2C_CLK_OE_N;
605 wr32(E1000_I2CPARAMS, i2cctl);
606 wrfl();
607
608}
609
610/* igb_set_i2c_clk - Sets the I2C SCL clock
611 * @data: pointer to hardware structure
612 * @state: state to set clock
613 *
614 * Sets the I2C clock line to state
615 */
616static void igb_set_i2c_clk(void *data, int state)
617{
618 struct igb_adapter *adapter = (struct igb_adapter *)data;
619 struct e1000_hw *hw = &adapter->hw;
620 s32 i2cctl = rd32(E1000_I2CPARAMS);
621
622 if (state) {
623 i2cctl |= E1000_I2C_CLK_OUT;
624 i2cctl &= ~E1000_I2C_CLK_OE_N;
625 } else {
626 i2cctl &= ~E1000_I2C_CLK_OUT;
627 i2cctl &= ~E1000_I2C_CLK_OE_N;
628 }
629 wr32(E1000_I2CPARAMS, i2cctl);
630 wrfl();
631}
632
633/* igb_get_i2c_clk - Gets the I2C SCL clock state
634 * @data: pointer to hardware structure
635 *
636 * Gets the I2C clock state
637 */
638static int igb_get_i2c_clk(void *data)
639{
640 struct igb_adapter *adapter = (struct igb_adapter *)data;
641 struct e1000_hw *hw = &adapter->hw;
642 s32 i2cctl = rd32(E1000_I2CPARAMS);
643
644 return ((i2cctl & E1000_I2C_CLK_IN) != 0);
645}
646
647static const struct i2c_algo_bit_data igb_i2c_algo = {
648 .setsda = igb_set_i2c_data,
649 .setscl = igb_set_i2c_clk,
650 .getsda = igb_get_i2c_data,
651 .getscl = igb_get_i2c_clk,
652 .udelay = 5,
653 .timeout = 20,
654};
655
568/** 656/**
569 * igb_get_hw_dev - return device 657 * igb_get_hw_dev - return device
570 * used by hardware layer to print debugging information 658 * used by hardware layer to print debugging information
@@ -1708,6 +1796,18 @@ void igb_reset(struct igb_adapter *adapter)
1708 igb_force_mac_fc(hw); 1796 igb_force_mac_fc(hw);
1709 1797
1710 igb_init_dmac(adapter, pba); 1798 igb_init_dmac(adapter, pba);
1799#ifdef CONFIG_IGB_HWMON
1800 /* Re-initialize the thermal sensor on i350 devices. */
1801 if (!test_bit(__IGB_DOWN, &adapter->state)) {
1802 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1803 /* If present, re-initialize the external thermal sensor
1804 * interface.
1805 */
1806 if (adapter->ets)
1807 mac->ops.init_thermal_sensor_thresh(hw);
1808 }
1809 }
1810#endif
1711 if (!netif_running(adapter->netdev)) 1811 if (!netif_running(adapter->netdev))
1712 igb_power_down_link(adapter); 1812 igb_power_down_link(adapter);
1713 1813
@@ -1822,6 +1922,37 @@ void igb_set_fw_version(struct igb_adapter *adapter)
1822 return; 1922 return;
1823} 1923}
1824 1924
1925static const struct i2c_board_info i350_sensor_info = {
1926 I2C_BOARD_INFO("i350bb", 0Xf8),
1927};
1928
1929/* igb_init_i2c - Init I2C interface
1930 * @adapter: pointer to adapter structure
1931 *
1932 */
1933static s32 igb_init_i2c(struct igb_adapter *adapter)
1934{
1935 s32 status = E1000_SUCCESS;
1936
1937 /* I2C interface supported on i350 devices */
1938 if (adapter->hw.mac.type != e1000_i350)
1939 return E1000_SUCCESS;
1940
1941 /* Initialize the i2c bus which is controlled by the registers.
1942 * This bus will use the i2c_algo_bit structue that implements
1943 * the protocol through toggling of the 4 bits in the register.
1944 */
1945 adapter->i2c_adap.owner = THIS_MODULE;
1946 adapter->i2c_algo = igb_i2c_algo;
1947 adapter->i2c_algo.data = adapter;
1948 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1949 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1950 strlcpy(adapter->i2c_adap.name, "igb BB",
1951 sizeof(adapter->i2c_adap.name));
1952 status = i2c_bit_add_bus(&adapter->i2c_adap);
1953 return status;
1954}
1955
1825/** 1956/**
1826 * igb_probe - Device Initialization Routine 1957 * igb_probe - Device Initialization Routine
1827 * @pdev: PCI device information struct 1958 * @pdev: PCI device information struct
@@ -2114,6 +2245,13 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2114 /* reset the hardware with the new settings */ 2245 /* reset the hardware with the new settings */
2115 igb_reset(adapter); 2246 igb_reset(adapter);
2116 2247
2248 /* Init the I2C interface */
2249 err = igb_init_i2c(adapter);
2250 if (err) {
2251 dev_err(&pdev->dev, "failed to init i2c interface\n");
2252 goto err_eeprom;
2253 }
2254
2117 /* let the f/w know that the h/w is now under the control of the 2255 /* let the f/w know that the h/w is now under the control of the
2118 * driver. */ 2256 * driver. */
2119 igb_get_hw_control(adapter); 2257 igb_get_hw_control(adapter);
@@ -2134,7 +2272,27 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2134 } 2272 }
2135 2273
2136#endif 2274#endif
2275#ifdef CONFIG_IGB_HWMON
2276 /* Initialize the thermal sensor on i350 devices. */
2277 if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2278 u16 ets_word;
2137 2279
2280 /*
2281 * Read the NVM to determine if this i350 device supports an
2282 * external thermal sensor.
2283 */
2284 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2285 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2286 adapter->ets = true;
2287 else
2288 adapter->ets = false;
2289 if (igb_sysfs_init(adapter))
2290 dev_err(&pdev->dev,
2291 "failed to allocate sysfs resources\n");
2292 } else {
2293 adapter->ets = false;
2294 }
2295#endif
2138 /* do hw tstamp init after resetting */ 2296 /* do hw tstamp init after resetting */
2139 igb_ptp_init(adapter); 2297 igb_ptp_init(adapter);
2140 2298
@@ -2175,6 +2333,7 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2175 2333
2176err_register: 2334err_register:
2177 igb_release_hw_control(adapter); 2335 igb_release_hw_control(adapter);
2336 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2178err_eeprom: 2337err_eeprom:
2179 if (!igb_check_reset_block(hw)) 2338 if (!igb_check_reset_block(hw))
2180 igb_reset_phy(hw); 2339 igb_reset_phy(hw);
@@ -2195,6 +2354,111 @@ err_dma:
2195 return err; 2354 return err;
2196} 2355}
2197 2356
2357#ifdef CONFIG_PCI_IOV
2358static int igb_disable_sriov(struct pci_dev *pdev)
2359{
2360 struct net_device *netdev = pci_get_drvdata(pdev);
2361 struct igb_adapter *adapter = netdev_priv(netdev);
2362 struct e1000_hw *hw = &adapter->hw;
2363
2364 /* reclaim resources allocated to VFs */
2365 if (adapter->vf_data) {
2366 /* disable iov and allow time for transactions to clear */
2367 if (igb_vfs_are_assigned(adapter)) {
2368 dev_warn(&pdev->dev,
2369 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2370 return -EPERM;
2371 } else {
2372 pci_disable_sriov(pdev);
2373 msleep(500);
2374 }
2375
2376 kfree(adapter->vf_data);
2377 adapter->vf_data = NULL;
2378 adapter->vfs_allocated_count = 0;
2379 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2380 wrfl();
2381 msleep(100);
2382 dev_info(&pdev->dev, "IOV Disabled\n");
2383
2384 /* Re-enable DMA Coalescing flag since IOV is turned off */
2385 adapter->flags |= IGB_FLAG_DMAC;
2386 }
2387
2388 return 0;
2389}
2390
2391static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2392{
2393 struct net_device *netdev = pci_get_drvdata(pdev);
2394 struct igb_adapter *adapter = netdev_priv(netdev);
2395 int old_vfs = pci_num_vf(pdev);
2396 int err = 0;
2397 int i;
2398
2399 if (!num_vfs)
2400 goto out;
2401 else if (old_vfs && old_vfs == num_vfs)
2402 goto out;
2403 else if (old_vfs && old_vfs != num_vfs)
2404 err = igb_disable_sriov(pdev);
2405
2406 if (err)
2407 goto out;
2408
2409 if (num_vfs > 7) {
2410 err = -EPERM;
2411 goto out;
2412 }
2413
2414 adapter->vfs_allocated_count = num_vfs;
2415
2416 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2417 sizeof(struct vf_data_storage), GFP_KERNEL);
2418
2419 /* if allocation failed then we do not support SR-IOV */
2420 if (!adapter->vf_data) {
2421 adapter->vfs_allocated_count = 0;
2422 dev_err(&pdev->dev,
2423 "Unable to allocate memory for VF Data Storage\n");
2424 err = -ENOMEM;
2425 goto out;
2426 }
2427
2428 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2429 if (err)
2430 goto err_out;
2431
2432 dev_info(&pdev->dev, "%d VFs allocated\n",
2433 adapter->vfs_allocated_count);
2434 for (i = 0; i < adapter->vfs_allocated_count; i++)
2435 igb_vf_configure(adapter, i);
2436
2437 /* DMA Coalescing is not supported in IOV mode. */
2438 adapter->flags &= ~IGB_FLAG_DMAC;
2439 goto out;
2440
2441err_out:
2442 kfree(adapter->vf_data);
2443 adapter->vf_data = NULL;
2444 adapter->vfs_allocated_count = 0;
2445out:
2446 return err;
2447}
2448
2449#endif
2450/*
2451 * igb_remove_i2c - Cleanup I2C interface
2452 * @adapter: pointer to adapter structure
2453 *
2454 */
2455static void igb_remove_i2c(struct igb_adapter *adapter)
2456{
2457
2458 /* free the adapter bus structure */
2459 i2c_del_adapter(&adapter->i2c_adap);
2460}
2461
2198/** 2462/**
2199 * igb_remove - Device Removal Routine 2463 * igb_remove - Device Removal Routine
2200 * @pdev: PCI device information struct 2464 * @pdev: PCI device information struct
@@ -2211,8 +2475,11 @@ static void igb_remove(struct pci_dev *pdev)
2211 struct e1000_hw *hw = &adapter->hw; 2475 struct e1000_hw *hw = &adapter->hw;
2212 2476
2213 pm_runtime_get_noresume(&pdev->dev); 2477 pm_runtime_get_noresume(&pdev->dev);
2478#ifdef CONFIG_IGB_HWMON
2479 igb_sysfs_exit(adapter);
2480#endif
2481 igb_remove_i2c(adapter);
2214 igb_ptp_stop(adapter); 2482 igb_ptp_stop(adapter);
2215
2216 /* 2483 /*
2217 * The watchdog timer may be rescheduled, so explicitly 2484 * The watchdog timer may be rescheduled, so explicitly
2218 * disable watchdog from being rescheduled. 2485 * disable watchdog from being rescheduled.
@@ -2242,23 +2509,7 @@ static void igb_remove(struct pci_dev *pdev)
2242 igb_clear_interrupt_scheme(adapter); 2509 igb_clear_interrupt_scheme(adapter);
2243 2510
2244#ifdef CONFIG_PCI_IOV 2511#ifdef CONFIG_PCI_IOV
2245 /* reclaim resources allocated to VFs */ 2512 igb_disable_sriov(pdev);
2246 if (adapter->vf_data) {
2247 /* disable iov and allow time for transactions to clear */
2248 if (igb_vfs_are_assigned(adapter)) {
2249 dev_info(&pdev->dev, "Unloading driver while VFs are assigned - VFs will not be deallocated\n");
2250 } else {
2251 pci_disable_sriov(pdev);
2252 msleep(500);
2253 }
2254
2255 kfree(adapter->vf_data);
2256 adapter->vf_data = NULL;
2257 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2258 wrfl();
2259 msleep(100);
2260 dev_info(&pdev->dev, "IOV Disabled\n");
2261 }
2262#endif 2513#endif
2263 2514
2264 iounmap(hw->hw_addr); 2515 iounmap(hw->hw_addr);
@@ -2289,103 +2540,22 @@ static void igb_probe_vfs(struct igb_adapter *adapter)
2289#ifdef CONFIG_PCI_IOV 2540#ifdef CONFIG_PCI_IOV
2290 struct pci_dev *pdev = adapter->pdev; 2541 struct pci_dev *pdev = adapter->pdev;
2291 struct e1000_hw *hw = &adapter->hw; 2542 struct e1000_hw *hw = &adapter->hw;
2292 int old_vfs = pci_num_vf(adapter->pdev);
2293 int i;
2294 2543
2295 /* Virtualization features not supported on i210 family. */ 2544 /* Virtualization features not supported on i210 family. */
2296 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) 2545 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2297 return; 2546 return;
2298 2547
2299 if (old_vfs) { 2548 igb_enable_sriov(pdev, max_vfs);
2300 dev_info(&pdev->dev, "%d pre-allocated VFs found - override " 2549 pci_sriov_set_totalvfs(pdev, 7);
2301 "max_vfs setting of %d\n", old_vfs, max_vfs);
2302 adapter->vfs_allocated_count = old_vfs;
2303 }
2304
2305 if (!adapter->vfs_allocated_count)
2306 return;
2307
2308 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2309 sizeof(struct vf_data_storage), GFP_KERNEL);
2310 2550
2311 /* if allocation failed then we do not support SR-IOV */
2312 if (!adapter->vf_data) {
2313 adapter->vfs_allocated_count = 0;
2314 dev_err(&pdev->dev, "Unable to allocate memory for VF "
2315 "Data Storage\n");
2316 goto out;
2317 }
2318
2319 if (!old_vfs) {
2320 if (pci_enable_sriov(pdev, adapter->vfs_allocated_count))
2321 goto err_out;
2322 }
2323 dev_info(&pdev->dev, "%d VFs allocated\n",
2324 adapter->vfs_allocated_count);
2325 for (i = 0; i < adapter->vfs_allocated_count; i++)
2326 igb_vf_configure(adapter, i);
2327
2328 /* DMA Coalescing is not supported in IOV mode. */
2329 adapter->flags &= ~IGB_FLAG_DMAC;
2330 goto out;
2331err_out:
2332 kfree(adapter->vf_data);
2333 adapter->vf_data = NULL;
2334 adapter->vfs_allocated_count = 0;
2335out:
2336 return;
2337#endif /* CONFIG_PCI_IOV */ 2551#endif /* CONFIG_PCI_IOV */
2338} 2552}
2339 2553
2340/** 2554static void igb_init_queue_configuration(struct igb_adapter *adapter)
2341 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2342 * @adapter: board private structure to initialize
2343 *
2344 * igb_sw_init initializes the Adapter private data structure.
2345 * Fields are initialized based on PCI device information and
2346 * OS network device settings (MTU size).
2347 **/
2348static int igb_sw_init(struct igb_adapter *adapter)
2349{ 2555{
2350 struct e1000_hw *hw = &adapter->hw; 2556 struct e1000_hw *hw = &adapter->hw;
2351 struct net_device *netdev = adapter->netdev;
2352 struct pci_dev *pdev = adapter->pdev;
2353 u32 max_rss_queues; 2557 u32 max_rss_queues;
2354 2558
2355 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2356
2357 /* set default ring sizes */
2358 adapter->tx_ring_count = IGB_DEFAULT_TXD;
2359 adapter->rx_ring_count = IGB_DEFAULT_RXD;
2360
2361 /* set default ITR values */
2362 adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2363 adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2364
2365 /* set default work limits */
2366 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2367
2368 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2369 VLAN_HLEN;
2370 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2371
2372 spin_lock_init(&adapter->stats64_lock);
2373#ifdef CONFIG_PCI_IOV
2374 switch (hw->mac.type) {
2375 case e1000_82576:
2376 case e1000_i350:
2377 if (max_vfs > 7) {
2378 dev_warn(&pdev->dev,
2379 "Maximum of 7 VFs per PF, using max\n");
2380 adapter->vfs_allocated_count = 7;
2381 } else
2382 adapter->vfs_allocated_count = max_vfs;
2383 break;
2384 default:
2385 break;
2386 }
2387#endif /* CONFIG_PCI_IOV */
2388
2389 /* Determine the maximum number of RSS queues supported. */ 2559 /* Determine the maximum number of RSS queues supported. */
2390 switch (hw->mac.type) { 2560 switch (hw->mac.type) {
2391 case e1000_i211: 2561 case e1000_i211:
@@ -2444,6 +2614,60 @@ static int igb_sw_init(struct igb_adapter *adapter)
2444 adapter->flags |= IGB_FLAG_QUEUE_PAIRS; 2614 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2445 break; 2615 break;
2446 } 2616 }
2617}
2618
2619/**
2620 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2621 * @adapter: board private structure to initialize
2622 *
2623 * igb_sw_init initializes the Adapter private data structure.
2624 * Fields are initialized based on PCI device information and
2625 * OS network device settings (MTU size).
2626 **/
2627static int igb_sw_init(struct igb_adapter *adapter)
2628{
2629 struct e1000_hw *hw = &adapter->hw;
2630 struct net_device *netdev = adapter->netdev;
2631 struct pci_dev *pdev = adapter->pdev;
2632
2633 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2634
2635 /* set default ring sizes */
2636 adapter->tx_ring_count = IGB_DEFAULT_TXD;
2637 adapter->rx_ring_count = IGB_DEFAULT_RXD;
2638
2639 /* set default ITR values */
2640 adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2641 adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2642
2643 /* set default work limits */
2644 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2645
2646 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2647 VLAN_HLEN;
2648 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2649
2650 spin_lock_init(&adapter->stats64_lock);
2651#ifdef CONFIG_PCI_IOV
2652 switch (hw->mac.type) {
2653 case e1000_82576:
2654 case e1000_i350:
2655 if (max_vfs > 7) {
2656 dev_warn(&pdev->dev,
2657 "Maximum of 7 VFs per PF, using max\n");
2658 adapter->vfs_allocated_count = 7;
2659 } else
2660 adapter->vfs_allocated_count = max_vfs;
2661 if (adapter->vfs_allocated_count)
2662 dev_warn(&pdev->dev,
2663 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2664 break;
2665 default:
2666 break;
2667 }
2668#endif /* CONFIG_PCI_IOV */
2669
2670 igb_init_queue_configuration(adapter);
2447 2671
2448 /* Setup and initialize a copy of the hw vlan table array */ 2672 /* Setup and initialize a copy of the hw vlan table array */
2449 adapter->shadow_vfta = kzalloc(sizeof(u32) * 2673 adapter->shadow_vfta = kzalloc(sizeof(u32) *
@@ -3767,6 +3991,7 @@ static void igb_watchdog_task(struct work_struct *work)
3767 } 3991 }
3768 3992
3769 igb_spoof_check(adapter); 3993 igb_spoof_check(adapter);
3994 igb_ptp_rx_hang(adapter);
3770 3995
3771 /* Reset the timer */ 3996 /* Reset the timer */
3772 if (!test_bit(__IGB_DOWN, &adapter->state)) 3997 if (!test_bit(__IGB_DOWN, &adapter->state))
@@ -4386,12 +4611,15 @@ netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4386 first->bytecount = skb->len; 4611 first->bytecount = skb->len;
4387 first->gso_segs = 1; 4612 first->gso_segs = 1;
4388 4613
4614 skb_tx_timestamp(skb);
4615
4389 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 4616 if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
4390 !(adapter->ptp_tx_skb))) { 4617 !(adapter->ptp_tx_skb))) {
4391 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 4618 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4392 tx_flags |= IGB_TX_FLAGS_TSTAMP; 4619 tx_flags |= IGB_TX_FLAGS_TSTAMP;
4393 4620
4394 adapter->ptp_tx_skb = skb_get(skb); 4621 adapter->ptp_tx_skb = skb_get(skb);
4622 adapter->ptp_tx_start = jiffies;
4395 if (adapter->hw.mac.type == e1000_82576) 4623 if (adapter->hw.mac.type == e1000_82576)
4396 schedule_work(&adapter->ptp_tx_work); 4624 schedule_work(&adapter->ptp_tx_work);
4397 } 4625 }
@@ -6902,6 +7130,72 @@ static void igb_shutdown(struct pci_dev *pdev)
6902 } 7130 }
6903} 7131}
6904 7132
7133#ifdef CONFIG_PCI_IOV
7134static int igb_sriov_reinit(struct pci_dev *dev)
7135{
7136 struct net_device *netdev = pci_get_drvdata(dev);
7137 struct igb_adapter *adapter = netdev_priv(netdev);
7138 struct pci_dev *pdev = adapter->pdev;
7139
7140 rtnl_lock();
7141
7142 if (netif_running(netdev))
7143 igb_close(netdev);
7144
7145 igb_clear_interrupt_scheme(adapter);
7146
7147 igb_init_queue_configuration(adapter);
7148
7149 if (igb_init_interrupt_scheme(adapter, true)) {
7150 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7151 return -ENOMEM;
7152 }
7153
7154 if (netif_running(netdev))
7155 igb_open(netdev);
7156
7157 rtnl_unlock();
7158
7159 return 0;
7160}
7161
7162static int igb_pci_disable_sriov(struct pci_dev *dev)
7163{
7164 int err = igb_disable_sriov(dev);
7165
7166 if (!err)
7167 err = igb_sriov_reinit(dev);
7168
7169 return err;
7170}
7171
7172static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7173{
7174 int err = igb_enable_sriov(dev, num_vfs);
7175
7176 if (err)
7177 goto out;
7178
7179 err = igb_sriov_reinit(dev);
7180 if (!err)
7181 return num_vfs;
7182
7183out:
7184 return err;
7185}
7186
7187#endif
7188static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7189{
7190#ifdef CONFIG_PCI_IOV
7191 if (num_vfs == 0)
7192 return igb_pci_disable_sriov(dev);
7193 else
7194 return igb_pci_enable_sriov(dev, num_vfs);
7195#endif
7196 return 0;
7197}
7198
6905#ifdef CONFIG_NET_POLL_CONTROLLER 7199#ifdef CONFIG_NET_POLL_CONTROLLER
6906/* 7200/*
6907 * Polling 'interrupt' - used by things like netconsole to send skbs 7201 * Polling 'interrupt' - used by things like netconsole to send skbs
@@ -7307,4 +7601,138 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7307 } 7601 }
7308} 7602}
7309 7603
7604static DEFINE_SPINLOCK(i2c_clients_lock);
7605
7606/* igb_get_i2c_client - returns matching client
7607 * in adapters's client list.
7608 * @adapter: adapter struct
7609 * @dev_addr: device address of i2c needed.
7610 */
7611struct i2c_client *
7612igb_get_i2c_client(struct igb_adapter *adapter, u8 dev_addr)
7613{
7614 ulong flags;
7615 struct igb_i2c_client_list *client_list;
7616 struct i2c_client *client = NULL;
7617 struct i2c_board_info client_info = {
7618 I2C_BOARD_INFO("igb", 0x00),
7619 };
7620
7621 spin_lock_irqsave(&i2c_clients_lock, flags);
7622 client_list = adapter->i2c_clients;
7623
7624 /* See if we already have an i2c_client */
7625 while (client_list) {
7626 if (client_list->client->addr == (dev_addr >> 1)) {
7627 client = client_list->client;
7628 goto exit;
7629 } else {
7630 client_list = client_list->next;
7631 }
7632 }
7633
7634 /* no client_list found, create a new one as long as
7635 * irqs are not disabled
7636 */
7637 if (unlikely(irqs_disabled()))
7638 goto exit;
7639
7640 client_list = kzalloc(sizeof(*client_list), GFP_KERNEL);
7641 if (client_list == NULL)
7642 goto exit;
7643
7644 /* dev_addr passed to us is left-shifted by 1 bit
7645 * i2c_new_device call expects it to be flush to the right.
7646 */
7647 client_info.addr = dev_addr >> 1;
7648 client_info.platform_data = adapter;
7649 client_list->client = i2c_new_device(&adapter->i2c_adap, &client_info);
7650 if (client_list->client == NULL) {
7651 dev_info(&adapter->pdev->dev,
7652 "Failed to create new i2c device..\n");
7653 goto err_no_client;
7654 }
7655
7656 /* insert new client at head of list */
7657 client_list->next = adapter->i2c_clients;
7658 adapter->i2c_clients = client_list;
7659
7660 client = client_list->client;
7661 goto exit;
7662
7663err_no_client:
7664 kfree(client_list);
7665exit:
7666 spin_unlock_irqrestore(&i2c_clients_lock, flags);
7667 return client;
7668}
7669
7670/* igb_read_i2c_byte - Reads 8 bit word over I2C
7671 * @hw: pointer to hardware structure
7672 * @byte_offset: byte offset to read
7673 * @dev_addr: device address
7674 * @data: value read
7675 *
7676 * Performs byte read operation over I2C interface at
7677 * a specified device address.
7678 */
7679s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7680 u8 dev_addr, u8 *data)
7681{
7682 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7683 struct i2c_client *this_client = igb_get_i2c_client(adapter, dev_addr);
7684 s32 status;
7685 u16 swfw_mask = 0;
7686
7687 if (!this_client)
7688 return E1000_ERR_I2C;
7689
7690 swfw_mask = E1000_SWFW_PHY0_SM;
7691
7692 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
7693 != E1000_SUCCESS)
7694 return E1000_ERR_SWFW_SYNC;
7695
7696 status = i2c_smbus_read_byte_data(this_client, byte_offset);
7697 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7698
7699 if (status < 0)
7700 return E1000_ERR_I2C;
7701 else {
7702 *data = status;
7703 return E1000_SUCCESS;
7704 }
7705}
7706
7707/* igb_write_i2c_byte - Writes 8 bit word over I2C
7708 * @hw: pointer to hardware structure
7709 * @byte_offset: byte offset to write
7710 * @dev_addr: device address
7711 * @data: value to write
7712 *
7713 * Performs byte write operation over I2C interface at
7714 * a specified device address.
7715 */
7716s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7717 u8 dev_addr, u8 data)
7718{
7719 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7720 struct i2c_client *this_client = igb_get_i2c_client(adapter, dev_addr);
7721 s32 status;
7722 u16 swfw_mask = E1000_SWFW_PHY0_SM;
7723
7724 if (!this_client)
7725 return E1000_ERR_I2C;
7726
7727 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
7728 return E1000_ERR_SWFW_SYNC;
7729 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
7730 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7731
7732 if (status)
7733 return E1000_ERR_I2C;
7734 else
7735 return E1000_SUCCESS;
7736
7737}
7310/* igb_main.c */ 7738/* igb_main.c */
diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c
index ab3429729bde..0987822359f0 100644
--- a/drivers/net/ethernet/intel/igb/igb_ptp.c
+++ b/drivers/net/ethernet/intel/igb/igb_ptp.c
@@ -20,6 +20,7 @@
20#include <linux/module.h> 20#include <linux/module.h>
21#include <linux/device.h> 21#include <linux/device.h>
22#include <linux/pci.h> 22#include <linux/pci.h>
23#include <linux/ptp_classify.h>
23 24
24#include "igb.h" 25#include "igb.h"
25 26
@@ -70,6 +71,7 @@
70 */ 71 */
71 72
72#define IGB_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 9) 73#define IGB_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 9)
74#define IGB_PTP_TX_TIMEOUT (HZ * 15)
73#define INCPERIOD_82576 (1 << E1000_TIMINCA_16NS_SHIFT) 75#define INCPERIOD_82576 (1 << E1000_TIMINCA_16NS_SHIFT)
74#define INCVALUE_82576_MASK ((1 << E1000_TIMINCA_16NS_SHIFT) - 1) 76#define INCVALUE_82576_MASK ((1 << E1000_TIMINCA_16NS_SHIFT) - 1)
75#define INCVALUE_82576 (16 << IGB_82576_TSYNC_SHIFT) 77#define INCVALUE_82576 (16 << IGB_82576_TSYNC_SHIFT)
@@ -396,6 +398,15 @@ void igb_ptp_tx_work(struct work_struct *work)
396 if (!adapter->ptp_tx_skb) 398 if (!adapter->ptp_tx_skb)
397 return; 399 return;
398 400
401 if (time_is_before_jiffies(adapter->ptp_tx_start +
402 IGB_PTP_TX_TIMEOUT)) {
403 dev_kfree_skb_any(adapter->ptp_tx_skb);
404 adapter->ptp_tx_skb = NULL;
405 adapter->tx_hwtstamp_timeouts++;
406 dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang");
407 return;
408 }
409
399 tsynctxctl = rd32(E1000_TSYNCTXCTL); 410 tsynctxctl = rd32(E1000_TSYNCTXCTL);
400 if (tsynctxctl & E1000_TSYNCTXCTL_VALID) 411 if (tsynctxctl & E1000_TSYNCTXCTL_VALID)
401 igb_ptp_tx_hwtstamp(adapter); 412 igb_ptp_tx_hwtstamp(adapter);
@@ -419,6 +430,51 @@ static void igb_ptp_overflow_check(struct work_struct *work)
419} 430}
420 431
421/** 432/**
433 * igb_ptp_rx_hang - detect error case when Rx timestamp registers latched
434 * @adapter: private network adapter structure
435 *
436 * This watchdog task is scheduled to detect error case where hardware has
437 * dropped an Rx packet that was timestamped when the ring is full. The
438 * particular error is rare but leaves the device in a state unable to timestamp
439 * any future packets.
440 */
441void igb_ptp_rx_hang(struct igb_adapter *adapter)
442{
443 struct e1000_hw *hw = &adapter->hw;
444 struct igb_ring *rx_ring;
445 u32 tsyncrxctl = rd32(E1000_TSYNCRXCTL);
446 unsigned long rx_event;
447 int n;
448
449 if (hw->mac.type != e1000_82576)
450 return;
451
452 /* If we don't have a valid timestamp in the registers, just update the
453 * timeout counter and exit
454 */
455 if (!(tsyncrxctl & E1000_TSYNCRXCTL_VALID)) {
456 adapter->last_rx_ptp_check = jiffies;
457 return;
458 }
459
460 /* Determine the most recent watchdog or rx_timestamp event */
461 rx_event = adapter->last_rx_ptp_check;
462 for (n = 0; n < adapter->num_rx_queues; n++) {
463 rx_ring = adapter->rx_ring[n];
464 if (time_after(rx_ring->last_rx_timestamp, rx_event))
465 rx_event = rx_ring->last_rx_timestamp;
466 }
467
468 /* Only need to read the high RXSTMP register to clear the lock */
469 if (time_is_before_jiffies(rx_event + 5 * HZ)) {
470 rd32(E1000_RXSTMPH);
471 adapter->last_rx_ptp_check = jiffies;
472 adapter->rx_hwtstamp_cleared++;
473 dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang");
474 }
475}
476
477/**
422 * igb_ptp_tx_hwtstamp - utility function which checks for TX time stamp 478 * igb_ptp_tx_hwtstamp - utility function which checks for TX time stamp
423 * @adapter: Board private structure. 479 * @adapter: Board private structure.
424 * 480 *
@@ -643,7 +699,6 @@ int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,
643 else 699 else
644 wr32(E1000_ETQF(3), 0); 700 wr32(E1000_ETQF(3), 0);
645 701
646#define PTP_PORT 319
647 /* L4 Queue Filter[3]: filter by destination port and protocol */ 702 /* L4 Queue Filter[3]: filter by destination port and protocol */
648 if (is_l4) { 703 if (is_l4) {
649 u32 ftqf = (IPPROTO_UDP /* UDP */ 704 u32 ftqf = (IPPROTO_UDP /* UDP */
@@ -652,12 +707,12 @@ int igb_ptp_hwtstamp_ioctl(struct net_device *netdev,
652 | E1000_FTQF_MASK); /* mask all inputs */ 707 | E1000_FTQF_MASK); /* mask all inputs */
653 ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */ 708 ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
654 709
655 wr32(E1000_IMIR(3), htons(PTP_PORT)); 710 wr32(E1000_IMIR(3), htons(PTP_EV_PORT));
656 wr32(E1000_IMIREXT(3), 711 wr32(E1000_IMIREXT(3),
657 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP)); 712 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
658 if (hw->mac.type == e1000_82576) { 713 if (hw->mac.type == e1000_82576) {
659 /* enable source port check */ 714 /* enable source port check */
660 wr32(E1000_SPQF(3), htons(PTP_PORT)); 715 wr32(E1000_SPQF(3), htons(PTP_EV_PORT));
661 ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP; 716 ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
662 } 717 }
663 wr32(E1000_FTQF(3), ftqf); 718 wr32(E1000_FTQF(3), ftqf);
@@ -801,6 +856,10 @@ void igb_ptp_stop(struct igb_adapter *adapter)
801 } 856 }
802 857
803 cancel_work_sync(&adapter->ptp_tx_work); 858 cancel_work_sync(&adapter->ptp_tx_work);
859 if (adapter->ptp_tx_skb) {
860 dev_kfree_skb_any(adapter->ptp_tx_skb);
861 adapter->ptp_tx_skb = NULL;
862 }
804 863
805 if (adapter->ptp_clock) { 864 if (adapter->ptp_clock) {
806 ptp_clock_unregister(adapter->ptp_clock); 865 ptp_clock_unregister(adapter->ptp_clock);
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-13 23:13:21 -0400