aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorBahadir Balban <bahadir.balban@arm.com>2008-04-18 17:43:15 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2008-04-18 17:43:15 -0400
commita0316b244e75d80df3790b69b0a2cb0bbf4c1562 (patch)
treeedf1ebed72fe3a4d27231d8e99b45ce3aae156c9
parent387847ee0fb258a50032db81e216be4ec1350586 (diff)
RealView: Base support for the PB1176 platform
This patch adds the base files for the PB1176 platform support. Signed-off-by: Bahadir Balban <bahadir.balban@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c290
-rw-r--r--include/asm-arm/arch-realview/board-pb1176.h152
-rw-r--r--include/asm-arm/arch-realview/irqs.h1
3 files changed, 443 insertions, 0 deletions
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
new file mode 100644
index 000000000000..4e6731098e5b
--- /dev/null
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -0,0 +1,290 @@
1/*
2 * linux/arch/arm/mach-realview/realview_pb1176.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/sysdev.h>
25#include <linux/amba/bus.h>
26
27#include <asm/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30#include <asm/leds.h>
31#include <asm/mach-types.h>
32#include <asm/hardware/gic.h>
33#include <asm/hardware/icst307.h>
34#include <asm/hardware/cache-l2x0.h>
35
36#include <asm/mach/arch.h>
37#include <asm/mach/flash.h>
38#include <asm/mach/map.h>
39#include <asm/mach/mmc.h>
40#include <asm/mach/time.h>
41
42#include <asm/arch/board-pb1176.h>
43#include <asm/arch/irqs.h>
44
45#include "core.h"
46#include "clock.h"
47
48static struct map_desc realview_pb1176_io_desc[] __initdata = {
49 {
50 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
51 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
52 .length = SZ_4K,
53 .type = MT_DEVICE,
54 }, {
55 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
56 .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
57 .length = SZ_4K,
58 .type = MT_DEVICE,
59 }, {
60 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
61 .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
62 .length = SZ_4K,
63 .type = MT_DEVICE,
64 }, {
65 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
66 .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
67 .length = SZ_4K,
68 .type = MT_DEVICE,
69 }, {
70 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
71 .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
72 .length = SZ_4K,
73 .type = MT_DEVICE,
74 }, {
75 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
76 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
77 .length = SZ_4K,
78 .type = MT_DEVICE,
79 }, {
80 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
81 .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
82 .length = SZ_4K,
83 .type = MT_DEVICE,
84 }, {
85 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
86 .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
87 .length = SZ_4K,
88 .type = MT_DEVICE,
89 }, {
90 .virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
91 .pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
92 .length = SZ_8K,
93 .type = MT_DEVICE,
94 },
95#ifdef CONFIG_DEBUG_LL
96 {
97 .virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
98 .pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
99 .length = SZ_4K,
100 .type = MT_DEVICE,
101 },
102#endif
103};
104
105static void __init realview_pb1176_map_io(void)
106{
107 iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
108}
109
110/*
111 * RealView PB1176 AMBA devices
112 */
113#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ }
114#define GPIO2_DMA { 0, 0 }
115#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ }
116#define GPIO3_DMA { 0, 0 }
117#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ }
118#define AACI_DMA { 0x80, 0x81 }
119#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
120#define MMCI0_DMA { 0x84, 0 }
121#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ }
122#define KMI0_DMA { 0, 0 }
123#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ }
124#define KMI1_DMA { 0, 0 }
125#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ }
126#define PB1176_SMC_DMA { 0, 0 }
127#define MPMC_IRQ { NO_IRQ, NO_IRQ }
128#define MPMC_DMA { 0, 0 }
129#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ }
130#define PB1176_CLCD_DMA { 0, 0 }
131#define DMAC_IRQ { IRQ_PB1176_DMAC, NO_IRQ }
132#define DMAC_DMA { 0, 0 }
133#define SCTL_IRQ { NO_IRQ, NO_IRQ }
134#define SCTL_DMA { 0, 0 }
135#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ }
136#define PB1176_WATCHDOG_DMA { 0, 0 }
137#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ }
138#define PB1176_GPIO0_DMA { 0, 0 }
139#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ }
140#define GPIO1_DMA { 0, 0 }
141#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ }
142#define PB1176_RTC_DMA { 0, 0 }
143#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ }
144#define SCI_DMA { 7, 6 }
145#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ }
146#define PB1176_UART0_DMA { 15, 14 }
147#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ }
148#define PB1176_UART1_DMA { 13, 12 }
149#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ }
150#define PB1176_UART2_DMA { 11, 10 }
151#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ }
152#define PB1176_UART3_DMA { 0x86, 0x87 }
153#define PB1176_SSP_IRQ { IRQ_PB1176_SSP, NO_IRQ }
154#define PB1176_SSP_DMA { 9, 8 }
155
156/* FPGA Primecells */
157AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
158AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
159AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
160AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
161AMBA_DEVICE(uart3, "fpga:09", PB1176_UART3, NULL);
162
163/* DevChip Primecells */
164AMBA_DEVICE(smc, "dev:00", PB1176_SMC, NULL);
165AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
166AMBA_DEVICE(wdog, "dev:e1", PB1176_WATCHDOG, NULL);
167AMBA_DEVICE(gpio0, "dev:e4", PB1176_GPIO0, NULL);
168AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
169AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
170AMBA_DEVICE(rtc, "dev:e8", PB1176_RTC, NULL);
171AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
172AMBA_DEVICE(uart0, "dev:f1", PB1176_UART0, NULL);
173AMBA_DEVICE(uart1, "dev:f2", PB1176_UART1, NULL);
174AMBA_DEVICE(uart2, "dev:f3", PB1176_UART2, NULL);
175AMBA_DEVICE(ssp0, "dev:f4", PB1176_SSP, NULL);
176
177/* Primecells on the NEC ISSP chip */
178AMBA_DEVICE(clcd, "issp:20", PB1176_CLCD, &clcd_plat_data);
179//AMBA_DEVICE(dmac, "issp:30", PB1176_DMAC, NULL);
180
181static struct amba_device *amba_devs[] __initdata = {
182// &dmac_device,
183 &uart0_device,
184 &uart1_device,
185 &uart2_device,
186 &uart3_device,
187 &smc_device,
188 &clcd_device,
189 &sctl_device,
190 &wdog_device,
191 &gpio0_device,
192 &gpio1_device,
193 &gpio2_device,
194 &rtc_device,
195 &sci0_device,
196 &ssp0_device,
197 &aaci_device,
198 &mmc0_device,
199 &kmi0_device,
200 &kmi1_device,
201};
202
203/*
204 * RealView PB1176 platform devices
205 */
206static struct resource realview_pb1176_flash_resource = {
207 .start = REALVIEW_PB1176_FLASH_BASE,
208 .end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
209 .flags = IORESOURCE_MEM,
210};
211
212static struct resource realview_pb1176_smsc911x_resources[] = {
213 [0] = {
214 .start = REALVIEW_PB1176_ETH_BASE,
215 .end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
216 .flags = IORESOURCE_MEM,
217 },
218 [1] = {
219 .start = IRQ_PB1176_ETH,
220 .end = IRQ_PB1176_ETH,
221 .flags = IORESOURCE_IRQ,
222 },
223};
224
225static struct platform_device realview_pb1176_smsc911x_device = {
226 .name = "smc911x",
227 .id = 0,
228 .num_resources = ARRAY_SIZE(realview_pb1176_smsc911x_resources),
229 .resource = realview_pb1176_smsc911x_resources,
230};
231
232static void __init gic_init_irq(void)
233{
234 /* ARM1176 DevChip GIC, primary */
235 gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
236 gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START);
237 gic_cpu_init(0, gic_cpu_base_addr);
238
239 /* board GIC, secondary */
240 gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START);
241 gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
242 gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
243}
244
245static void __init realview_pb1176_timer_init(void)
246{
247 timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
248 timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
249 timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
250 timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
251
252 realview_timer_init(IRQ_DC1176_TIMER0);
253}
254
255static struct sys_timer realview_pb1176_timer = {
256 .init = realview_pb1176_timer_init,
257};
258
259static void __init realview_pb1176_init(void)
260{
261 int i;
262
263 /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
264 l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
265
266 clk_register(&realview_clcd_clk);
267
268 realview_flash_register(&realview_pb1176_flash_resource, 1);
269 platform_device_register(&realview_pb1176_smsc911x_device);
270
271 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
272 struct amba_device *d = amba_devs[i];
273 amba_device_register(d, &iomem_resource);
274 }
275
276#ifdef CONFIG_LEDS
277 leds_event = realview_leds_event;
278#endif
279}
280
281MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
282 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
283 .phys_io = REALVIEW_PB1176_UART0_BASE,
284 .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
285 .boot_params = 0x00000100,
286 .map_io = realview_pb1176_map_io,
287 .init_irq = gic_init_irq,
288 .timer = &realview_pb1176_timer,
289 .init_machine = realview_pb1176_init,
290MACHINE_END
diff --git a/include/asm-arm/arch-realview/board-pb1176.h b/include/asm-arm/arch-realview/board-pb1176.h
new file mode 100644
index 000000000000..48ce9c833705
--- /dev/null
+++ b/include/asm-arm/arch-realview/board-pb1176.h
@@ -0,0 +1,152 @@
1/*
2 * include/asm-arm/arch-realview/board-pb1176.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __ASM_ARCH_BOARD_PB1176_H
22#define __ASM_ARCH_BOARD_PB1176_H
23
24#include <asm/arch/platform.h>
25
26/*
27 * Peripheral addresses
28 */
29#define REALVIEW_PB1176_SCTL_BASE 0x10100000 /* System controller */
30#define REALVIEW_PB1176_SMC_BASE 0x10111000 /* SMC */
31#define REALVIEW_PB1176_DMC_BASE 0x10109000 /* DMC configuration */
32#define REALVIEW_PB1176_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
33#define REALVIEW_PB1176_FLASH_BASE 0x30000000
34#define REALVIEW_PB1176_FLASH_SIZE SZ_64M
35
36#define REALVIEW_PB1176_TIMER0_1_BASE 0x10104000 /* Timer 0 and 1 */
37#define REALVIEW_PB1176_TIMER2_3_BASE 0x10105000 /* Timer 2 and 3 */
38#define REALVIEW_PB1176_TIMER4_5_BASE 0x10106000 /* Timer 4 and 5 */
39#define REALVIEW_PB1176_WATCHDOG_BASE 0x10107000 /* watchdog interface */
40#define REALVIEW_PB1176_RTC_BASE 0x10108000 /* Real Time Clock */
41#define REALVIEW_PB1176_GPIO0_BASE 0x1010A000 /* GPIO port 0 */
42#define REALVIEW_PB1176_SSP_BASE 0x1010B000 /* Synchronous Serial Port */
43#define REALVIEW_PB1176_UART0_BASE 0x1010C000 /* UART 0 */
44#define REALVIEW_PB1176_UART1_BASE 0x1010D000 /* UART 1 */
45#define REALVIEW_PB1176_UART2_BASE 0x1010E000 /* UART 2 */
46#define REALVIEW_PB1176_UART3_BASE 0x1010F000 /* UART 3 */
47#define REALVIEW_PB1176_CLCD_BASE 0x10112000 /* CLCD */
48#define REALVIEW_PB1176_ETH_BASE 0x3A000000 /* Ethernet */
49#define REALVIEW_PB1176_USB_BASE 0x3B000000 /* USB */
50
51/*
52 * PCI regions
53 */
54#define REALVIEW_PB1176_PCI_BASE 0x60000000 /* PCI self config */
55#define REALVIEW_PB1176_PCI_CFG_BASE 0x61000000 /* PCI config */
56#define REALVIEW_PB1176_PCI_IO_BASE0 0x62000000 /* PCI IO region */
57#define REALVIEW_PB1176_PCI_MEM_BASE0 0x63000000 /* Memory region 1 */
58#define REALVIEW_PB1176_PCI_MEM_BASE1 0x64000000 /* Memory region 2 */
59#define REALVIEW_PB1176_PCI_MEM_BASE2 0x68000000 /* Memory region 3 */
60
61#define REALVIEW_PB1176_PCI_BASE_SIZE 0x01000000 /* 16MB */
62#define REALVIEW_PB1176_PCI_CFG_BASE_SIZE 0x01000000 /* 16MB */
63#define REALVIEW_PB1176_PCI_IO_BASE0_SIZE 0x01000000 /* 16MB */
64#define REALVIEW_PB1176_PCI_MEM_BASE0_SIZE 0x01000000 /* 16MB */
65#define REALVIEW_PB1176_PCI_MEM_BASE1_SIZE 0x04000000 /* 64MB */
66#define REALVIEW_PB1176_PCI_MEM_BASE2_SIZE 0x08000000 /* 128MB */
67
68#define REALVIEW_DC1176_GIC_CPU_BASE 0x10120000 /* GIC CPU interface, on devchip */
69#define REALVIEW_DC1176_GIC_DIST_BASE 0x10121000 /* GIC distributor, on devchip */
70#define REALVIEW_PB1176_GIC_CPU_BASE 0x10040000 /* GIC CPU interface, on FPGA */
71#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */
72#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */
73
74/*
75 * Irqs
76 */
77#define IRQ_DC1176_GIC_START 32
78#define IRQ_PB1176_GIC_START 64
79
80/*
81 * ARM1176 DevChip interrupt sources (primary GIC)
82 */
83#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
84#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
85#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
86#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
87#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
88#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
89#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
90#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
91#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
92#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
93#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
94#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
95#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
96#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
97#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
98#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
99
100#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
101#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
102
103/*
104 * RealView PB1176 interrupt sources (secondary GIC)
105 */
106#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
107#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
108#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
109#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
110#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
111#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
112#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
113#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
114#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
115#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
116#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
117
118#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
119
120#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
121
122#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
123#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
124#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
125#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
126
127#define IRQ_PB1176_GPIO0 -1
128#define IRQ_PB1176_SSP -1
129#define IRQ_PB1176_SCTL -1
130
131#define NR_GIC_PB1176 2
132
133/*
134 * Only define NR_IRQS if less than NR_IRQS_PB1176
135 */
136#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
137
138#if defined(CONFIG_MACH_REALVIEW_PB1176)
139
140#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
141#undef NR_IRQS
142#define NR_IRQS NR_IRQS_PB1176
143#endif
144
145#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
146#undef MAX_GIC_NR
147#define MAX_GIC_NR NR_GIC_PB1176
148#endif
149
150#endif /* CONFIG_MACH_REALVIEW_PB1176 */
151
152#endif /* __ASM_ARCH_BOARD_PB1176_H */
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h
index 15e775104392..ccbac59235c6 100644
--- a/include/asm-arm/arch-realview/irqs.h
+++ b/include/asm-arm/arch-realview/irqs.h
@@ -24,6 +24,7 @@
24 24
25#include <asm/arch/board-eb.h> 25#include <asm/arch/board-eb.h>
26#include <asm/arch/board-pb11mp.h> 26#include <asm/arch/board-pb11mp.h>
27#include <asm/arch/board-pb1176.h>
27 28
28#define IRQ_LOCALTIMER 29 29#define IRQ_LOCALTIMER 29
29#define IRQ_LOCALWDOG 30 30#define IRQ_LOCALWDOG 30
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 22:12:31 -0500