diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2012-04-28 17:35:21 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2012-05-01 05:57:52 -0400 |
commit | a010fb1a9a65fc2bbac3636c9ce3958d9d4bb68d (patch) | |
tree | cf6e082edf1f4b5d347306dd66cceca2bc4592ef | |
parent | a92553abe585429c65d2db0c4567f336f4fdf22b (diff) |
drm/radeon/kms: get rid of hdmi_config_offset
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Tested-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen_reg.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600_hdmi.c | 14 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600_reg.h | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 1 |
4 files changed, 6 insertions, 17 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h index 96c10b3991aa..8beac1065025 100644 --- a/drivers/gpu/drm/radeon/evergreen_reg.h +++ b/drivers/gpu/drm/radeon/evergreen_reg.h | |||
@@ -232,6 +232,4 @@ | |||
232 | /* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */ | 232 | /* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */ |
233 | #define EVERGREEN_HDMI_BASE 0x7030 | 233 | #define EVERGREEN_HDMI_BASE 0x7030 |
234 | 234 | ||
235 | #define EVERGREEN_HDMI_CONFIG_OFFSET 0xf0 | ||
236 | |||
237 | #endif | 235 | #endif |
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index 37ac1b06753e..06e273e36b12 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c | |||
@@ -485,14 +485,9 @@ static void r600_hdmi_assign_block(struct drm_encoder *encoder) | |||
485 | } | 485 | } |
486 | radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BASE + | 486 | radeon_encoder->hdmi_offset = EVERGREEN_HDMI_BASE + |
487 | eg_offsets[dig->dig_encoder]; | 487 | eg_offsets[dig->dig_encoder]; |
488 | radeon_encoder->hdmi_config_offset = radeon_encoder->hdmi_offset | ||
489 | + EVERGREEN_HDMI_CONFIG_OFFSET; | ||
490 | } else if (ASIC_IS_DCE3(rdev)) { | 488 | } else if (ASIC_IS_DCE3(rdev)) { |
491 | radeon_encoder->hdmi_offset = dig->dig_encoder ? | 489 | radeon_encoder->hdmi_offset = dig->dig_encoder ? |
492 | R600_HDMI_BLOCK3 : R600_HDMI_BLOCK1; | 490 | R600_HDMI_BLOCK3 : R600_HDMI_BLOCK1; |
493 | if (ASIC_IS_DCE32(rdev)) | ||
494 | radeon_encoder->hdmi_config_offset = dig->dig_encoder ? | ||
495 | R600_HDMI_CONFIG2 : R600_HDMI_CONFIG1; | ||
496 | } else if (rdev->family >= CHIP_R600 || rdev->family == CHIP_RS600 || | 491 | } else if (rdev->family >= CHIP_R600 || rdev->family == CHIP_RS600 || |
497 | rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) { | 492 | rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) { |
498 | radeon_encoder->hdmi_offset = r600_hdmi_find_free_block(dev); | 493 | radeon_encoder->hdmi_offset = r600_hdmi_find_free_block(dev); |
@@ -525,9 +520,9 @@ void r600_hdmi_enable(struct drm_encoder *encoder) | |||
525 | if (ASIC_IS_DCE5(rdev)) { | 520 | if (ASIC_IS_DCE5(rdev)) { |
526 | /* TODO */ | 521 | /* TODO */ |
527 | } else if (ASIC_IS_DCE4(rdev)) { | 522 | } else if (ASIC_IS_DCE4(rdev)) { |
528 | WREG32_P(radeon_encoder->hdmi_config_offset + 0xc, 0x1, ~0x1); | 523 | WREG32_P(radeon_encoder->hdmi_offset + EVERGREEN_AUDIO_PACKET_CNTL, 0x1, ~0x1); |
529 | } else if (ASIC_IS_DCE32(rdev)) { | 524 | } else if (ASIC_IS_DCE32(rdev)) { |
530 | WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0x1, ~0x1); | 525 | WREG32_P(radeon_encoder->hdmi_offset + R600_HDMI_AUDIO_PACKET_CNTL, 0x1, ~0x1); |
531 | } else if (ASIC_IS_DCE3(rdev)) { | 526 | } else if (ASIC_IS_DCE3(rdev)) { |
532 | /* TODO */ | 527 | /* TODO */ |
533 | } else if (rdev->family >= CHIP_R600) { | 528 | } else if (rdev->family >= CHIP_R600) { |
@@ -588,9 +583,9 @@ void r600_hdmi_disable(struct drm_encoder *encoder) | |||
588 | if (ASIC_IS_DCE5(rdev)) { | 583 | if (ASIC_IS_DCE5(rdev)) { |
589 | /* TODO */ | 584 | /* TODO */ |
590 | } else if (ASIC_IS_DCE4(rdev)) { | 585 | } else if (ASIC_IS_DCE4(rdev)) { |
591 | WREG32_P(radeon_encoder->hdmi_config_offset + 0xc, 0, ~0x1); | 586 | WREG32_P(radeon_encoder->hdmi_offset + EVERGREEN_AUDIO_PACKET_CNTL, 0, ~0x1); |
592 | } else if (ASIC_IS_DCE32(rdev)) { | 587 | } else if (ASIC_IS_DCE32(rdev)) { |
593 | WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0, ~0x1); | 588 | WREG32_P(radeon_encoder->hdmi_offset + R600_HDMI_AUDIO_PACKET_CNTL, 0, ~0x1); |
594 | } else if (rdev->family >= CHIP_R600 && !ASIC_IS_DCE3(rdev)) { | 589 | } else if (rdev->family >= CHIP_R600 && !ASIC_IS_DCE3(rdev)) { |
595 | switch (radeon_encoder->encoder_id) { | 590 | switch (radeon_encoder->encoder_id) { |
596 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: | 591 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: |
@@ -610,5 +605,4 @@ void r600_hdmi_disable(struct drm_encoder *encoder) | |||
610 | } | 605 | } |
611 | 606 | ||
612 | radeon_encoder->hdmi_offset = 0; | 607 | radeon_encoder->hdmi_offset = 0; |
613 | radeon_encoder->hdmi_config_offset = 0; | ||
614 | } | 608 | } |
diff --git a/drivers/gpu/drm/radeon/r600_reg.h b/drivers/gpu/drm/radeon/r600_reg.h index f869897c7456..24c94123d7ce 100644 --- a/drivers/gpu/drm/radeon/r600_reg.h +++ b/drivers/gpu/drm/radeon/r600_reg.h | |||
@@ -192,9 +192,7 @@ | |||
192 | #define R600_HDMI_AUDIO_DEBUG_1 0xe4 | 192 | #define R600_HDMI_AUDIO_DEBUG_1 0xe4 |
193 | #define R600_HDMI_AUDIO_DEBUG_2 0xe8 | 193 | #define R600_HDMI_AUDIO_DEBUG_2 0xe8 |
194 | #define R600_HDMI_AUDIO_DEBUG_3 0xec | 194 | #define R600_HDMI_AUDIO_DEBUG_3 0xec |
195 | 195 | #define R600_HDMI_AUDIO_PACKET_CNTL 0x204 | |
196 | /* HDMI additional config base register addresses */ | 196 | #define EVERGREEN_AUDIO_PACKET_CNTL 0xfc |
197 | #define R600_HDMI_CONFIG1 0x7600 | ||
198 | #define R600_HDMI_CONFIG2 0x7a00 | ||
199 | 197 | ||
200 | #endif | 198 | #endif |
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index b2cca6a2395c..228b3818e48d 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -385,7 +385,6 @@ struct radeon_encoder { | |||
385 | void *enc_priv; | 385 | void *enc_priv; |
386 | int audio_polling_active; | 386 | int audio_polling_active; |
387 | int hdmi_offset; | 387 | int hdmi_offset; |
388 | int hdmi_config_offset; | ||
389 | int hdmi_audio_workaround; | 388 | int hdmi_audio_workaround; |
390 | int hdmi_buffer_status; | 389 | int hdmi_buffer_status; |
391 | bool is_ext_encoder; | 390 | bool is_ext_encoder; |