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authorNicolas Pitre <nicolas.pitre@linaro.org>2012-07-03 23:58:12 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-07-09 12:39:39 -0400
commit9fa16b7755967b1b4dc704de71a3d639d13e21fc (patch)
treee3686faa439a42294e48f067ed26848a39f23530
parentd0f34a11ddab9b456e4caf9fc48d8d7e832e0e50 (diff)
ARM: 7439/1: head.S: simplify initial page table mapping
Let's map the initial RAM up to the end of the kernel .bss instead of the strict kernel image area. This simplifies the code as the kernel image only needs to be handled specially in the XIP case. That covers the legacy ATAG location as well. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/kernel/head.S59
1 files changed, 23 insertions, 36 deletions
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 835898e7d704..3db960e20cb8 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -55,14 +55,6 @@
55 add \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE 55 add \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE
56 .endm 56 .endm
57 57
58#ifdef CONFIG_XIP_KERNEL
59#define KERNEL_START XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)
60#define KERNEL_END _edata_loc
61#else
62#define KERNEL_START KERNEL_RAM_VADDR
63#define KERNEL_END _end
64#endif
65
66/* 58/*
67 * Kernel startup entry point. 59 * Kernel startup entry point.
68 * --------------------------- 60 * ---------------------------
@@ -218,51 +210,46 @@ __create_page_tables:
218 blo 1b 210 blo 1b
219 211
220 /* 212 /*
221 * Now setup the pagetables for our kernel direct 213 * Map our RAM from the start to the end of the kernel .bss section.
222 * mapped region.
223 */ 214 */
224 mov r3, pc 215 add r0, r4, #PAGE_OFFSET >> (SECTION_SHIFT - PMD_ORDER)
225 mov r3, r3, lsr #SECTION_SHIFT 216 ldr r6, =(_end - 1)
226 orr r3, r7, r3, lsl #SECTION_SHIFT 217 orr r3, r8, r7
227 add r0, r4, #(KERNEL_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER)
228 str r3, [r0, #((KERNEL_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]!
229 ldr r6, =(KERNEL_END - 1)
230 add r0, r0, #1 << PMD_ORDER
231 add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) 218 add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)
2321: cmp r0, r6 2191: str r3, [r0], #1 << PMD_ORDER
233 add r3, r3, #1 << SECTION_SHIFT 220 add r3, r3, #1 << SECTION_SHIFT
234 strls r3, [r0], #1 << PMD_ORDER 221 cmp r0, r6
235 bls 1b 222 bls 1b
236 223
237#ifdef CONFIG_XIP_KERNEL 224#ifdef CONFIG_XIP_KERNEL
238 /* 225 /*
239 * Map some ram to cover our .data and .bss areas. 226 * Map the kernel image separately as it is not located in RAM.
240 */ 227 */
241 add r3, r8, #TEXT_OFFSET 228#define XIP_START XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR)
242 orr r3, r3, r7 229 mov r3, pc
243 add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER) 230 mov r3, r3, lsr #SECTION_SHIFT
244 str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> (SECTION_SHIFT - PMD_ORDER)]! 231 orr r3, r7, r3, lsl #SECTION_SHIFT
245 ldr r6, =(_end - 1) 232 add r0, r4, #(XIP_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER)
246 add r0, r0, #4 233 str r3, [r0, #((XIP_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]!
234 ldr r6, =(_edata_loc - 1)
235 add r0, r0, #1 << PMD_ORDER
247 add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER) 236 add r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)
2481: cmp r0, r6 2371: cmp r0, r6
249 add r3, r3, #1 << 20 238 add r3, r3, #1 << SECTION_SHIFT
250 strls r3, [r0], #4 239 strls r3, [r0], #1 << PMD_ORDER
251 bls 1b 240 bls 1b
252#endif 241#endif
253 242
254 /* 243 /*
255 * Then map boot params address in r2 or the first 1MB (2MB with LPAE) 244 * Then map boot params address in r2 if specified.
256 * of ram if boot params address is not specified.
257 */ 245 */
258 mov r0, r2, lsr #SECTION_SHIFT 246 mov r0, r2, lsr #SECTION_SHIFT
259 movs r0, r0, lsl #SECTION_SHIFT 247 movs r0, r0, lsl #SECTION_SHIFT
260 moveq r0, r8 248 subne r3, r0, r8
261 sub r3, r0, r8 249 addne r3, r3, #PAGE_OFFSET
262 add r3, r3, #PAGE_OFFSET 250 addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
263 add r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER) 251 orrne r6, r7, r0
264 orr r6, r7, r0 252 strne r6, [r3]
265 str r6, [r3]
266 253
267#ifdef CONFIG_DEBUG_LL 254#ifdef CONFIG_DEBUG_LL
268#if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING) 255#if !defined(CONFIG_DEBUG_ICEDCC) && !defined(CONFIG_DEBUG_SEMIHOSTING)