diff options
author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-07-02 06:04:43 -0400 |
---|---|---|
committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-08-25 10:01:25 -0400 |
commit | 9e8be232b934418932e40da276f6871dce83fa7c (patch) | |
tree | 1ce0e2d608927317845f1eab84938fb2484c5b3f | |
parent | e657ce689a85ff1c887b8020282e5b2ab1411ded (diff) |
ARM: at91: setup: Switch to pr_fmt
Most of the printed messages are using the "AT91:" prefix in the setup.c file,
but not all of them. Moreover, those who add it hardcode it directly in the
message, while the pr_fmt macro makes it easier for us to support such a case.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
-rw-r--r-- | arch/arm/mach-at91/setup.c | 42 |
1 files changed, 22 insertions, 20 deletions
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index 1174b5fe74d8..c565572157db 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c | |||
@@ -5,6 +5,8 @@ | |||
5 | * Under GPLv2 | 5 | * Under GPLv2 |
6 | */ | 6 | */ |
7 | 7 | ||
8 | #define pr_fmt(fmt) "AT91: " fmt | ||
9 | |||
8 | #include <linux/module.h> | 10 | #include <linux/module.h> |
9 | #include <linux/io.h> | 11 | #include <linux/io.h> |
10 | #include <linux/mm.h> | 12 | #include <linux/mm.h> |
@@ -37,7 +39,7 @@ void __init at91rm9200_set_type(int type) | |||
37 | else | 39 | else |
38 | at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; | 40 | at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; |
39 | 41 | ||
40 | pr_info("AT91: filled in soc subtype: %s\n", | 42 | pr_info("filled in soc subtype: %s\n", |
41 | at91_get_soc_subtype(&at91_soc_initdata)); | 43 | at91_get_soc_subtype(&at91_soc_initdata)); |
42 | } | 44 | } |
43 | 45 | ||
@@ -67,7 +69,7 @@ void __init at91_ioremap_ramc(int id, u32 addr, u32 size) | |||
67 | } | 69 | } |
68 | at91_ramc_base[id] = ioremap(addr, size); | 70 | at91_ramc_base[id] = ioremap(addr, size); |
69 | if (!at91_ramc_base[id]) | 71 | if (!at91_ramc_base[id]) |
70 | panic("Impossible to ioremap ramc.%d 0x%x\n", id, addr); | 72 | panic(pr_fmt("Impossible to ioremap ramc.%d 0x%x\n"), id, addr); |
71 | } | 73 | } |
72 | 74 | ||
73 | static struct map_desc sram_desc[2] __initdata; | 75 | static struct map_desc sram_desc[2] __initdata; |
@@ -84,7 +86,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length) | |||
84 | desc->length = length; | 86 | desc->length = length; |
85 | desc->type = MT_MEMORY_RWX_NONCACHED; | 87 | desc->type = MT_MEMORY_RWX_NONCACHED; |
86 | 88 | ||
87 | pr_info("AT91: sram at 0x%lx of 0x%x mapped at 0x%lx\n", | 89 | pr_info("sram at 0x%lx of 0x%x mapped at 0x%lx\n", |
88 | base, length, desc->virtual); | 90 | base, length, desc->virtual); |
89 | 91 | ||
90 | iotable_init(desc, 1); | 92 | iotable_init(desc, 1); |
@@ -303,16 +305,16 @@ void __init at91_map_io(void) | |||
303 | soc_detect(AT91_BASE_DBGU1); | 305 | soc_detect(AT91_BASE_DBGU1); |
304 | 306 | ||
305 | if (!at91_soc_is_detected()) | 307 | if (!at91_soc_is_detected()) |
306 | panic("AT91: Impossible to detect the SOC type"); | 308 | panic(pr_fmt("Impossible to detect the SOC type")); |
307 | 309 | ||
308 | pr_info("AT91: Detected soc type: %s\n", | 310 | pr_info("Detected soc type: %s\n", |
309 | at91_get_soc_type(&at91_soc_initdata)); | 311 | at91_get_soc_type(&at91_soc_initdata)); |
310 | if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE) | 312 | if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE) |
311 | pr_info("AT91: Detected soc subtype: %s\n", | 313 | pr_info("Detected soc subtype: %s\n", |
312 | at91_get_soc_subtype(&at91_soc_initdata)); | 314 | at91_get_soc_subtype(&at91_soc_initdata)); |
313 | 315 | ||
314 | if (!at91_soc_is_enabled()) | 316 | if (!at91_soc_is_enabled()) |
315 | panic("AT91: Soc not enabled"); | 317 | panic(pr_fmt("Soc not enabled")); |
316 | 318 | ||
317 | if (at91_boot_soc.map_io) | 319 | if (at91_boot_soc.map_io) |
318 | at91_boot_soc.map_io(); | 320 | at91_boot_soc.map_io(); |
@@ -329,7 +331,7 @@ void __init at91_ioremap_shdwc(u32 base_addr) | |||
329 | { | 331 | { |
330 | at91_shdwc_base = ioremap(base_addr, 16); | 332 | at91_shdwc_base = ioremap(base_addr, 16); |
331 | if (!at91_shdwc_base) | 333 | if (!at91_shdwc_base) |
332 | panic("Impossible to ioremap at91_shdwc_base\n"); | 334 | panic(pr_fmt("Impossible to ioremap at91_shdwc_base\n")); |
333 | pm_power_off = at91sam9_poweroff; | 335 | pm_power_off = at91sam9_poweroff; |
334 | } | 336 | } |
335 | 337 | ||
@@ -339,7 +341,7 @@ void __init at91_ioremap_rstc(u32 base_addr) | |||
339 | { | 341 | { |
340 | at91_rstc_base = ioremap(base_addr, 16); | 342 | at91_rstc_base = ioremap(base_addr, 16); |
341 | if (!at91_rstc_base) | 343 | if (!at91_rstc_base) |
342 | panic("Impossible to ioremap at91_rstc_base\n"); | 344 | panic(pr_fmt("Impossible to ioremap at91_rstc_base\n")); |
343 | } | 345 | } |
344 | 346 | ||
345 | void __iomem *at91_matrix_base; | 347 | void __iomem *at91_matrix_base; |
@@ -349,7 +351,7 @@ void __init at91_ioremap_matrix(u32 base_addr) | |||
349 | { | 351 | { |
350 | at91_matrix_base = ioremap(base_addr, 512); | 352 | at91_matrix_base = ioremap(base_addr, 512); |
351 | if (!at91_matrix_base) | 353 | if (!at91_matrix_base) |
352 | panic("Impossible to ioremap at91_matrix_base\n"); | 354 | panic(pr_fmt("Impossible to ioremap at91_matrix_base\n")); |
353 | } | 355 | } |
354 | 356 | ||
355 | #if defined(CONFIG_OF) && !defined(CONFIG_ARCH_AT91X40) | 357 | #if defined(CONFIG_OF) && !defined(CONFIG_ARCH_AT91X40) |
@@ -366,15 +368,15 @@ static void at91_dt_rstc(void) | |||
366 | 368 | ||
367 | np = of_find_matching_node(NULL, rstc_ids); | 369 | np = of_find_matching_node(NULL, rstc_ids); |
368 | if (!np) | 370 | if (!np) |
369 | panic("unable to find compatible rstc node in dtb\n"); | 371 | panic(pr_fmt("unable to find compatible rstc node in dtb\n")); |
370 | 372 | ||
371 | at91_rstc_base = of_iomap(np, 0); | 373 | at91_rstc_base = of_iomap(np, 0); |
372 | if (!at91_rstc_base) | 374 | if (!at91_rstc_base) |
373 | panic("unable to map rstc cpu registers\n"); | 375 | panic(pr_fmt("unable to map rstc cpu registers\n")); |
374 | 376 | ||
375 | of_id = of_match_node(rstc_ids, np); | 377 | of_id = of_match_node(rstc_ids, np); |
376 | if (!of_id) | 378 | if (!of_id) |
377 | panic("AT91: rtsc no restart function available\n"); | 379 | panic(pr_fmt("rtsc no restart function available\n")); |
378 | 380 | ||
379 | arm_pm_restart = of_id->data; | 381 | arm_pm_restart = of_id->data; |
380 | 382 | ||
@@ -396,17 +398,17 @@ static void at91_dt_ramc(void) | |||
396 | 398 | ||
397 | np = of_find_matching_node(NULL, ramc_ids); | 399 | np = of_find_matching_node(NULL, ramc_ids); |
398 | if (!np) | 400 | if (!np) |
399 | panic("unable to find compatible ram controller node in dtb\n"); | 401 | panic(pr_fmt("unable to find compatible ram controller node in dtb\n")); |
400 | 402 | ||
401 | at91_ramc_base[0] = of_iomap(np, 0); | 403 | at91_ramc_base[0] = of_iomap(np, 0); |
402 | if (!at91_ramc_base[0]) | 404 | if (!at91_ramc_base[0]) |
403 | panic("unable to map ramc[0] cpu registers\n"); | 405 | panic(pr_fmt("unable to map ramc[0] cpu registers\n")); |
404 | /* the controller may have 2 banks */ | 406 | /* the controller may have 2 banks */ |
405 | at91_ramc_base[1] = of_iomap(np, 1); | 407 | at91_ramc_base[1] = of_iomap(np, 1); |
406 | 408 | ||
407 | of_id = of_match_node(ramc_ids, np); | 409 | of_id = of_match_node(ramc_ids, np); |
408 | if (!of_id) | 410 | if (!of_id) |
409 | pr_warn("AT91: ramc no standby function available\n"); | 411 | pr_warn("ramc no standby function available\n"); |
410 | else | 412 | else |
411 | at91_pm_set_standby(of_id->data); | 413 | at91_pm_set_standby(of_id->data); |
412 | 414 | ||
@@ -452,23 +454,23 @@ static void at91_dt_shdwc(void) | |||
452 | 454 | ||
453 | np = of_find_matching_node(NULL, shdwc_ids); | 455 | np = of_find_matching_node(NULL, shdwc_ids); |
454 | if (!np) { | 456 | if (!np) { |
455 | pr_debug("AT91: unable to find compatible shutdown (shdwc) controller node in dtb\n"); | 457 | pr_debug("unable to find compatible shutdown (shdwc) controller node in dtb\n"); |
456 | return; | 458 | return; |
457 | } | 459 | } |
458 | 460 | ||
459 | at91_shdwc_base = of_iomap(np, 0); | 461 | at91_shdwc_base = of_iomap(np, 0); |
460 | if (!at91_shdwc_base) | 462 | if (!at91_shdwc_base) |
461 | panic("AT91: unable to map shdwc cpu registers\n"); | 463 | panic(pr_fmt("unable to map shdwc cpu registers\n")); |
462 | 464 | ||
463 | wakeup_mode = at91_dtget_shdwc_wakeup_mode(np); | 465 | wakeup_mode = at91_dtget_shdwc_wakeup_mode(np); |
464 | if (wakeup_mode < 0) { | 466 | if (wakeup_mode < 0) { |
465 | pr_warn("AT91: shdwc unknown wakeup mode\n"); | 467 | pr_warn("shdwc unknown wakeup mode\n"); |
466 | goto end; | 468 | goto end; |
467 | } | 469 | } |
468 | 470 | ||
469 | if (!of_property_read_u32(np, "atmel,wakeup-counter", ®)) { | 471 | if (!of_property_read_u32(np, "atmel,wakeup-counter", ®)) { |
470 | if (reg > AT91_SHDW_CPTWK0_MAX) { | 472 | if (reg > AT91_SHDW_CPTWK0_MAX) { |
471 | pr_warn("AT91: shdwc wakeup counter 0x%x > 0x%x reduce it to 0x%x\n", | 473 | pr_warn("shdwc wakeup counter 0x%x > 0x%x reduce it to 0x%x\n", |
472 | reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX); | 474 | reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX); |
473 | reg = AT91_SHDW_CPTWK0_MAX; | 475 | reg = AT91_SHDW_CPTWK0_MAX; |
474 | } | 476 | } |