drm/i915: get/put runtime PM when we get/put a power domain

Any power domain will require the HW to be in PCI D0 state, so just do
the simple thing.

Dear maintainer: since intel_display_power_put() and
intel_display_power_get() are almost identical, git-am has failed
apply the patch on my local machine once: it added both chunks to
put(), instead of one chunk to get() and another to put(). When you
apply this patch to your tree, please check if it is correct.

v2: - Add the warning above.
v3: - Rebase.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

1 files changed, 4 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ed3e9935737d..5f23e6fada97 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5577,6 +5577,8 @@ void intel_display_power_get(struct drm_i915_private *dev_priv,
         struct i915_power_well *power_well;
         int i;
 
+        intel_runtime_pm_get(dev_priv);
+
         power_domains = &dev_priv->power_domains;
 
         mutex_lock(&power_domains->lock);
@@ -5621,6 +5623,8 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
         }
 
         mutex_unlock(&power_domains->lock);
+
+        intel_runtime_pm_put(dev_priv);
 }
 
 static struct i915_power_domains *hsw_pwr;