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authorLinus Torvalds <torvalds@linux-foundation.org>2009-06-22 17:56:13 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-22 17:56:13 -0400
commit9e268beb92ee3a853b3946e84b10358207e2085f (patch)
treedec36344c8b16d53e56763aa174dd7ea806b653f
parent2e8b5a09ebf1f98f02c1988a48415e89d4c25168 (diff)
parent9ccdac3662dbf3c75e8f8851a214bdf7d365a4bd (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (49 commits) [ARM] idle: clean up pm_idle calling, obey hlt_counter [ARM] S3C: Fix gpio-config off-by-one bug [ARM] S3C64XX: add to_irq() support for EINT() GPIO [ARM] S3C64XX: clock.c: fix typo in usb-host clock ctrlbit [ARM] S3C64XX: fix HCLK gate defines [ARM] Update mach-types [ARM] wire up rt_tgsigqueueinfo and perf_counter_open OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisons OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL OMAP3: Add support for DPLL3 divisor values higher than 2 OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers OMAP3 SRAM: add more comments on the SRAM code OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change OMAP3 clock: add a short delay when lowering CORE clk rate OMAP3 clock: initialize SDRC timings at kernel start OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize [ARM] Add old Feroceon support to compressed/head.S [ARM] 5559/1: Limit the stack unwinding caused by a kthread exit [ARM] 5558/1: Add extra checks to ARM unwinder to avoid tracing corrupt stacks [ARM] 5557/1: Discard some ARM.ex*.*exit.text sections when !HOTPLUG or !HOTPLUG_CPU ...
Diffstat
-rw-r--r--Documentation/kernel-parameters.txt21
-rw-r--r--MAINTAINERS22
-rw-r--r--arch/arm/Kconfig6
-rw-r--r--arch/arm/boot/compressed/head.S9
-rw-r--r--arch/arm/common/gic.c2
-rw-r--r--arch/arm/common/vic.c8
-rw-r--r--arch/arm/configs/mini2440_defconfig2097
-rw-r--r--arch/arm/include/asm/unistd.h2
-rw-r--r--arch/arm/kernel/calls.S2
-rw-r--r--arch/arm/kernel/irq.c6
-rw-r--r--arch/arm/kernel/process.c77
-rw-r--r--arch/arm/kernel/unwind.c19
-rw-r--r--arch/arm/kernel/vmlinux.lds.S8
-rw-r--r--arch/arm/mach-omap2/clock.c2
-rw-r--r--arch/arm/mach-omap2/clock34xx.c42
-rw-r--r--arch/arm/mach-omap2/io.c36
-rw-r--r--arch/arm/mach-omap2/powerdomain.c2
-rw-r--r--arch/arm/mach-omap2/sram34xx.S129
-rw-r--r--arch/arm/mach-orion5x/addr-map.c2
-rw-r--r--arch/arm/mach-orion5x/common.c10
-rw-r--r--arch/arm/mach-orion5x/common.h1
-rw-r--r--arch/arm/mach-pxa/Kconfig10
-rw-r--r--arch/arm/mach-pxa/Makefile1
-rw-r--r--arch/arm/mach-pxa/corgi.c6
-rw-r--r--arch/arm/mach-pxa/em-x270.c63
-rw-r--r--arch/arm/mach-pxa/hx4700.c41
-rw-r--r--arch/arm/mach-pxa/include/mach/palmz72.h5
-rw-r--r--arch/arm/mach-pxa/include/mach/treo680.h49
-rw-r--r--arch/arm/mach-pxa/mioa701.c42
-rw-r--r--arch/arm/mach-pxa/palmz72.c65
-rw-r--r--arch/arm/mach-pxa/poodle.c6
-rw-r--r--arch/arm/mach-pxa/treo680.c612
-rw-r--r--arch/arm/mach-realview/realview_pbx.c1
-rw-r--r--arch/arm/mach-s3c2410/usb-simtec.c1
-rw-r--r--arch/arm/mach-s3c2440/Kconfig10
-rw-r--r--arch/arm/mach-s3c2440/Makefile1
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c703
-rw-r--r--arch/arm/mach-s3c2442/Kconfig12
-rw-r--r--arch/arm/mach-s3c2442/Makefile2
-rw-r--r--arch/arm/mach-s3c2442/include/mach/gta02.h84
-rw-r--r--arch/arm/mach-s3c2442/mach-gta02.c646
-rw-r--r--arch/arm/mm/alignment.c139
-rw-r--r--arch/arm/mm/mmu.c7
-rw-r--r--arch/arm/plat-omap/include/mach/sram.h6
-rw-r--r--arch/arm/plat-omap/sram.c8
-rw-r--r--arch/arm/plat-s3c/Makefile1
-rw-r--r--arch/arm/plat-s3c/dev-audio.c68
-rw-r--r--arch/arm/plat-s3c/gpio-config.c2
-rw-r--r--arch/arm/plat-s3c/include/plat/devs.h5
-rw-r--r--arch/arm/plat-s3c64xx/Makefile1
-rw-r--r--arch/arm/plat-s3c64xx/clock.c2
-rw-r--r--arch/arm/plat-s3c64xx/cpufreq.c262
-rw-r--r--arch/arm/plat-s3c64xx/gpiolib.c6
-rw-r--r--arch/arm/plat-s3c64xx/include/plat/regs-clock.h10
-rw-r--r--arch/arm/tools/mach-types39
-rw-r--r--sound/soc/pxa/corgi.c36
-rw-r--r--sound/soc/pxa/poodle.c36
57 files changed, 5269 insertions, 222 deletions
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 7da0899d1fb9..5092a2be83c5 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1369,6 +1369,27 @@ and is between 256 and 4096 characters. It is defined in the file
1369 min_addr=nn[KMG] [KNL,BOOT,ia64] All physical memory below this 1369 min_addr=nn[KMG] [KNL,BOOT,ia64] All physical memory below this
1370 physical address is ignored. 1370 physical address is ignored.
1371 1371
1372 mini2440= [ARM,HW,KNL]
1373 Format:[0..2][b][c][t]
1374 Default: "0tb"
1375 MINI2440 configuration specification:
1376 0 - The attached screen is the 3.5" TFT
1377 1 - The attached screen is the 7" TFT
1378 2 - The VGA Shield is attached (1024x768)
1379 Leaving out the screen size parameter will not load
1380 the TFT driver, and the framebuffer will be left
1381 unconfigured.
1382 b - Enable backlight. The TFT backlight pin will be
1383 linked to the kernel VESA blanking code and a GPIO
1384 LED. This parameter is not necessary when using the
1385 VGA shield.
1386 c - Enable the s3c camera interface.
1387 t - Reserved for enabling touchscreen support. The
1388 touchscreen support is not enabled in the mainstream
1389 kernel as of 2.6.30, a preliminary port can be found
1390 in the "bleeding edge" mini2440 support kernel at
1391 http://repo.or.cz/w/linux-2.6/mini2440.git
1392
1372 mminit_loglevel= 1393 mminit_loglevel=
1373 [KNL] When CONFIG_DEBUG_MEMORY_INIT is set, this 1394 [KNL] When CONFIG_DEBUG_MEMORY_INIT is set, this
1374 parameter allows control of the logging verbosity for 1395 parameter allows control of the logging verbosity for
diff --git a/MAINTAINERS b/MAINTAINERS
index b114632050bf..cf5a46ef6b3f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -653,6 +653,8 @@ M: laforge@openezx.org
653L: openezx-devel@lists.openezx.org (subscribers-only) 653L: openezx-devel@lists.openezx.org (subscribers-only)
654W: http://www.openezx.org/ 654W: http://www.openezx.org/
655S: Maintained 655S: Maintained
656T: topgit git://git.openezx.org/openezx.git
657F: arch/arm/mach-pxa/ezx.c
656 658
657ARM/FARADAY FA526 PORT 659ARM/FARADAY FA526 PORT
658P: Paulius Zaleckas 660P: Paulius Zaleckas
@@ -774,11 +776,25 @@ P: Philipp Zabel
774M: philipp.zabel@gmail.com 776M: philipp.zabel@gmail.com
775S: Maintained 777S: Maintained
776 778
779ARM/MIOA701 MACHINE SUPPORT
780P: Robert Jarzmik
781M: robert.jarzmik@free.fr
782L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
783F: arch/arm/mach-pxa/mioa701.c
784S: Maintained
785
777ARM/NEC MOBILEPRO 900/c MACHINE SUPPORT 786ARM/NEC MOBILEPRO 900/c MACHINE SUPPORT
778P: Michael Petchkovsky 787P: Michael Petchkovsky
779M: mkpetch@internode.on.net 788M: mkpetch@internode.on.net
780S: Maintained 789S: Maintained
781 790
791ARM/OPENMOKO NEO FREERUNNER (GTA02) MACHINE SUPPORT
792P: Nelson Castillo
793M: arhuaco@freaks-unidos.net
794L: openmoko-kernel@lists.openmoko.org (subscribers-only)
795W: http://wiki.openmoko.org/wiki/Neo_FreeRunner
796S: Supported
797
782ARM/TOSA MACHINE SUPPORT 798ARM/TOSA MACHINE SUPPORT
783P: Dmitry Eremin-Solenikov 799P: Dmitry Eremin-Solenikov
784M: dbaryshkov@gmail.com 800M: dbaryshkov@gmail.com
@@ -792,6 +808,12 @@ M: marek.vasut@gmail.com
792W: http://hackndev.com 808W: http://hackndev.com
793S: Maintained 809S: Maintained
794 810
811ARM/PALM TREO 680 SUPPORT
812P: Tomas Cech
813M: sleep_walker@suse.cz
814W: http://hackndev.com
815S: Maintained
816
795ARM/PALMZ72 SUPPORT 817ARM/PALMZ72 SUPPORT
796P: Sergey Lapin 818P: Sergey Lapin
797M: slapin@ossfans.org 819M: slapin@ossfans.org
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 29475101a7b3..aef63c8e3d2d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1241,7 +1241,7 @@ endmenu
1241 1241
1242menu "CPU Power Management" 1242menu "CPU Power Management"
1243 1243
1244if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_PXA) 1244if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_PXA || ARCH_S3C64XX)
1245 1245
1246source "drivers/cpufreq/Kconfig" 1246source "drivers/cpufreq/Kconfig"
1247 1247
@@ -1272,6 +1272,10 @@ config CPU_FREQ_PXA
1272 default y 1272 default y
1273 select CPU_FREQ_DEFAULT_GOV_USERSPACE 1273 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1274 1274
1275config CPU_FREQ_S3C64XX
1276 bool "CPUfreq support for Samsung S3C64XX CPUs"
1277 depends on CPU_FREQ && CPU_S3C6410
1278
1275endif 1279endif
1276 1280
1277source "drivers/cpuidle/Kconfig" 1281source "drivers/cpuidle/Kconfig"
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 01d49be3b2ca..4515728c5345 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -674,6 +674,15 @@ proc_types:
674 b __armv4_mmu_cache_off 674 b __armv4_mmu_cache_off
675 b __armv5tej_mmu_cache_flush 675 b __armv5tej_mmu_cache_flush
676 676
677#ifdef CONFIG_CPU_FEROCEON_OLD_ID
678 /* this conflicts with the standard ARMv5TE entry */
679 .long 0x41009260 @ Old Feroceon
680 .long 0xff00fff0
681 b __armv4_mmu_cache_on
682 b __armv4_mmu_cache_off
683 b __armv5tej_mmu_cache_flush
684#endif
685
677 .word 0x66015261 @ FA526 686 .word 0x66015261 @ FA526
678 .word 0xff01fff1 687 .word 0xff01fff1
679 b __fa526_cache_on 688 b __fa526_cache_on
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 664c7b8b1ba8..337741f734ac 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -117,7 +117,7 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
117 u32 val; 117 u32 val;
118 118
119 spin_lock(&irq_controller_lock); 119 spin_lock(&irq_controller_lock);
120 irq_desc[irq].cpu = cpu; 120 irq_desc[irq].node = cpu;
121 val = readl(reg) & ~(0xff << shift); 121 val = readl(reg) & ~(0xff << shift);
122 val |= 1 << (cpu + shift); 122 val |= 1 << (cpu + shift);
123 writel(val, reg); 123 writel(val, reg);
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 887c6eb3a18a..6ed89836e908 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -229,14 +229,18 @@ static int vic_set_wake(unsigned int irq, unsigned int on)
229{ 229{
230 struct vic_device *v = vic_from_irq(irq); 230 struct vic_device *v = vic_from_irq(irq);
231 unsigned int off = irq & 31; 231 unsigned int off = irq & 31;
232 u32 bit = 1 << off;
232 233
233 if (!v) 234 if (!v)
234 return -EINVAL; 235 return -EINVAL;
235 236
237 if (!(bit & v->resume_sources))
238 return -EINVAL;
239
236 if (on) 240 if (on)
237 v->resume_irqs |= 1 << off; 241 v->resume_irqs |= bit;
238 else 242 else
239 v->resume_irqs &= ~(1 << off); 243 v->resume_irqs &= ~bit;
240 244
241 return 0; 245 return 0;
242} 246}
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
new file mode 100644
index 000000000000..e49ed40f3be7
--- /dev/null
+++ b/arch/arm/configs/mini2440_defconfig
@@ -0,0 +1,2097 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.30-rc6
4# Wed May 20 12:29:51 2009
5#
6CONFIG_ARM=y
7CONFIG_HAVE_PWM=y
8CONFIG_SYS_SUPPORTS_APM_EMULATION=y
9CONFIG_GENERIC_GPIO=y
10# CONFIG_GENERIC_TIME is not set
11# CONFIG_GENERIC_CLOCKEVENTS is not set
12CONFIG_MMU=y
13CONFIG_NO_IOPORT=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_STACKTRACE_SUPPORT=y
16CONFIG_HAVE_LATENCYTOP_SUPPORT=y
17CONFIG_LOCKDEP_SUPPORT=y
18CONFIG_TRACE_IRQFLAGS_SUPPORT=y
19CONFIG_HARDIRQS_SW_RESEND=y
20CONFIG_GENERIC_IRQ_PROBE=y
21CONFIG_RWSEM_GENERIC_SPINLOCK=y
22# CONFIG_ARCH_HAS_ILOG2_U32 is not set
23# CONFIG_ARCH_HAS_ILOG2_U64 is not set
24CONFIG_GENERIC_HWEIGHT=y
25CONFIG_GENERIC_CALIBRATE_DELAY=y
26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29
30#
31# General setup
32#
33CONFIG_EXPERIMENTAL=y
34CONFIG_BROKEN_ON_SMP=y
35CONFIG_INIT_ENV_ARG_LIMIT=32
36CONFIG_LOCALVERSION=""
37# CONFIG_LOCALVERSION_AUTO is not set
38CONFIG_SWAP=y
39CONFIG_SYSVIPC=y
40CONFIG_SYSVIPC_SYSCTL=y
41CONFIG_POSIX_MQUEUE=y
42CONFIG_POSIX_MQUEUE_SYSCTL=y
43# CONFIG_BSD_PROCESS_ACCT is not set
44# CONFIG_TASKSTATS is not set
45# CONFIG_AUDIT is not set
46
47#
48# RCU Subsystem
49#
50CONFIG_CLASSIC_RCU=y
51# CONFIG_TREE_RCU is not set
52# CONFIG_PREEMPT_RCU is not set
53# CONFIG_TREE_RCU_TRACE is not set
54# CONFIG_PREEMPT_RCU_TRACE is not set
55# CONFIG_IKCONFIG is not set
56CONFIG_LOG_BUF_SHIFT=17
57# CONFIG_GROUP_SCHED is not set
58# CONFIG_CGROUPS is not set
59# CONFIG_SYSFS_DEPRECATED_V2 is not set
60CONFIG_RELAY=y
61CONFIG_NAMESPACES=y
62CONFIG_UTS_NS=y
63CONFIG_IPC_NS=y
64# CONFIG_USER_NS is not set
65# CONFIG_PID_NS is not set
66# CONFIG_NET_NS is not set
67CONFIG_BLK_DEV_INITRD=y
68CONFIG_INITRAMFS_SOURCE=""
69CONFIG_RD_GZIP=y
70CONFIG_RD_BZIP2=y
71CONFIG_RD_LZMA=y
72CONFIG_CC_OPTIMIZE_FOR_SIZE=y
73CONFIG_SYSCTL=y
74CONFIG_ANON_INODES=y
75# CONFIG_EMBEDDED is not set
76CONFIG_UID16=y
77CONFIG_SYSCTL_SYSCALL=y
78CONFIG_KALLSYMS=y
79# CONFIG_KALLSYMS_ALL is not set
80# CONFIG_KALLSYMS_EXTRA_PASS is not set
81CONFIG_STRIP_ASM_SYMS=y
82CONFIG_HOTPLUG=y
83CONFIG_PRINTK=y
84CONFIG_BUG=y
85CONFIG_ELF_CORE=y
86CONFIG_BASE_FULL=y
87CONFIG_FUTEX=y
88CONFIG_EPOLL=y
89CONFIG_SIGNALFD=y
90CONFIG_TIMERFD=y
91CONFIG_EVENTFD=y
92CONFIG_SHMEM=y
93CONFIG_AIO=y
94CONFIG_VM_EVENT_COUNTERS=y
95CONFIG_SLUB_DEBUG=y
96# CONFIG_COMPAT_BRK is not set
97# CONFIG_SLAB is not set
98CONFIG_SLUB=y
99# CONFIG_SLOB is not set
100# CONFIG_PROFILING is not set
101# CONFIG_MARKERS is not set
102CONFIG_HAVE_OPROFILE=y
103# CONFIG_KPROBES is not set
104CONFIG_HAVE_KPROBES=y
105CONFIG_HAVE_KRETPROBES=y
106CONFIG_HAVE_CLK=y
107# CONFIG_SLOW_WORK is not set
108CONFIG_HAVE_GENERIC_DMA_COHERENT=y
109CONFIG_SLABINFO=y
110CONFIG_RT_MUTEXES=y
111CONFIG_BASE_SMALL=0
112CONFIG_MODULES=y
113CONFIG_MODULE_FORCE_LOAD=y
114CONFIG_MODULE_UNLOAD=y
115CONFIG_MODULE_FORCE_UNLOAD=y
116# CONFIG_MODVERSIONS is not set
117# CONFIG_MODULE_SRCVERSION_ALL is not set
118CONFIG_BLOCK=y
119CONFIG_LBD=y
120# CONFIG_BLK_DEV_BSG is not set
121CONFIG_BLK_DEV_INTEGRITY=y
122
123#
124# IO Schedulers
125#
126CONFIG_IOSCHED_NOOP=y
127CONFIG_IOSCHED_AS=y
128CONFIG_IOSCHED_DEADLINE=y
129CONFIG_IOSCHED_CFQ=y
130CONFIG_DEFAULT_AS=y
131# CONFIG_DEFAULT_DEADLINE is not set
132# CONFIG_DEFAULT_CFQ is not set
133# CONFIG_DEFAULT_NOOP is not set
134CONFIG_DEFAULT_IOSCHED="anticipatory"
135CONFIG_FREEZER=y
136
137#
138# System Type
139#
140# CONFIG_ARCH_AAEC2000 is not set
141# CONFIG_ARCH_INTEGRATOR is not set
142# CONFIG_ARCH_REALVIEW is not set
143# CONFIG_ARCH_VERSATILE is not set
144# CONFIG_ARCH_AT91 is not set
145# CONFIG_ARCH_CLPS711X is not set
146# CONFIG_ARCH_EBSA110 is not set
147# CONFIG_ARCH_EP93XX is not set
148# CONFIG_ARCH_GEMINI is not set
149# CONFIG_ARCH_FOOTBRIDGE is not set
150# CONFIG_ARCH_NETX is not set
151# CONFIG_ARCH_H720X is not set
152# CONFIG_ARCH_IMX is not set
153# CONFIG_ARCH_IOP13XX is not set
154# CONFIG_ARCH_IOP32X is not set
155# CONFIG_ARCH_IOP33X is not set
156# CONFIG_ARCH_IXP23XX is not set
157# CONFIG_ARCH_IXP2000 is not set
158# CONFIG_ARCH_IXP4XX is not set
159# CONFIG_ARCH_L7200 is not set
160# CONFIG_ARCH_KIRKWOOD is not set
161# CONFIG_ARCH_KS8695 is not set
162# CONFIG_ARCH_NS9XXX is not set
163# CONFIG_ARCH_LOKI is not set
164# CONFIG_ARCH_MV78XX0 is not set
165# CONFIG_ARCH_MXC is not set
166# CONFIG_ARCH_ORION5X is not set
167# CONFIG_ARCH_PNX4008 is not set
168# CONFIG_ARCH_PXA is not set
169# CONFIG_ARCH_MMP is not set
170# CONFIG_ARCH_RPC is not set
171# CONFIG_ARCH_SA1100 is not set
172CONFIG_ARCH_S3C2410=y
173# CONFIG_ARCH_S3C64XX is not set
174# CONFIG_ARCH_SHARK is not set
175# CONFIG_ARCH_LH7A40X is not set
176# CONFIG_ARCH_DAVINCI is not set
177# CONFIG_ARCH_OMAP is not set
178# CONFIG_ARCH_MSM is not set
179# CONFIG_ARCH_W90X900 is not set
180CONFIG_PLAT_S3C24XX=y
181CONFIG_S3C2410_CLOCK=y
182CONFIG_CPU_S3C244X=y
183CONFIG_S3C24XX_PWM=y
184CONFIG_S3C24XX_GPIO_EXTRA=0
185CONFIG_S3C2410_DMA=y
186# CONFIG_S3C2410_DMA_DEBUG is not set
187CONFIG_S3C24XX_ADC=y
188CONFIG_PLAT_S3C=y
189CONFIG_CPU_LLSERIAL_S3C2440_ONLY=y
190CONFIG_CPU_LLSERIAL_S3C2440=y
191
192#
193# Boot options
194#
195# CONFIG_S3C_BOOT_WATCHDOG is not set
196# CONFIG_S3C_BOOT_ERROR_RESET is not set
197CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
198
199#
200# Power management
201#
202# CONFIG_S3C2410_PM_DEBUG is not set
203# CONFIG_S3C2410_PM_CHECK is not set
204CONFIG_S3C_LOWLEVEL_UART_PORT=0
205CONFIG_S3C_GPIO_SPACE=0
206
207#
208# S3C2400 Machines
209#
210CONFIG_S3C2410_PM=y
211CONFIG_S3C2410_GPIO=y
212
213#
214# S3C2410 Machines
215#
216# CONFIG_ARCH_SMDK2410 is not set
217# CONFIG_ARCH_H1940 is not set
218# CONFIG_MACH_N30 is not set
219# CONFIG_ARCH_BAST is not set
220# CONFIG_MACH_OTOM is not set
221# CONFIG_MACH_AML_M5900 is not set
222# CONFIG_MACH_TCT_HAMMER is not set
223# CONFIG_MACH_VR1000 is not set
224# CONFIG_MACH_QT2410 is not set
225
226#
227# S3C2412 Machines
228#
229# CONFIG_MACH_JIVE is not set
230# CONFIG_MACH_SMDK2413 is not set
231# CONFIG_MACH_SMDK2412 is not set
232# CONFIG_MACH_VSTMS is not set
233CONFIG_CPU_S3C2440=y
234CONFIG_S3C2440_DMA=y
235
236#
237# S3C2440 Machines
238#
239# CONFIG_MACH_ANUBIS is not set
240# CONFIG_MACH_OSIRIS is not set
241# CONFIG_MACH_RX3715 is not set
242# CONFIG_ARCH_S3C2440 is not set
243# CONFIG_MACH_NEXCODER_2440 is not set
244# CONFIG_MACH_AT2440EVB is not set
245CONFIG_MACH_MINI2440=y
246
247#
248# S3C2442 Machines
249#
250
251#
252# S3C2443 Machines
253#
254# CONFIG_MACH_SMDK2443 is not set
255
256#
257# Processor Type
258#
259CONFIG_CPU_32=y
260CONFIG_CPU_ARM920T=y
261CONFIG_CPU_32v4T=y
262CONFIG_CPU_ABRT_EV4T=y
263CONFIG_CPU_PABRT_NOIFAR=y
264CONFIG_CPU_CACHE_V4WT=y
265CONFIG_CPU_CACHE_VIVT=y
266CONFIG_CPU_COPY_V4WB=y
267CONFIG_CPU_TLB_V4WBI=y
268CONFIG_CPU_CP15=y
269CONFIG_CPU_CP15_MMU=y
270
271#
272# Processor Features
273#
274CONFIG_ARM_THUMB=y
275# CONFIG_CPU_ICACHE_DISABLE is not set
276# CONFIG_CPU_DCACHE_DISABLE is not set
277# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
278# CONFIG_OUTER_CACHE is not set
279
280#
281# Bus support
282#
283# CONFIG_PCI_SYSCALL is not set
284# CONFIG_ARCH_SUPPORTS_MSI is not set
285# CONFIG_PCCARD is not set
286
287#
288# Kernel Features
289#
290CONFIG_VMSPLIT_3G=y
291# CONFIG_VMSPLIT_2G is not set
292# CONFIG_VMSPLIT_1G is not set
293CONFIG_PAGE_OFFSET=0xC0000000
294# CONFIG_PREEMPT is not set
295CONFIG_HZ=200
296CONFIG_AEABI=y
297# CONFIG_OABI_COMPAT is not set
298CONFIG_ARCH_FLATMEM_HAS_HOLES=y
299# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
300# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
301# CONFIG_HIGHMEM is not set
302CONFIG_SELECT_MEMORY_MODEL=y
303CONFIG_FLATMEM_MANUAL=y
304# CONFIG_DISCONTIGMEM_MANUAL is not set
305# CONFIG_SPARSEMEM_MANUAL is not set
306CONFIG_FLATMEM=y
307CONFIG_FLAT_NODE_MEM_MAP=y
308CONFIG_PAGEFLAGS_EXTENDED=y
309CONFIG_SPLIT_PTLOCK_CPUS=4096
310# CONFIG_PHYS_ADDR_T_64BIT is not set
311CONFIG_ZONE_DMA_FLAG=0
312CONFIG_VIRT_TO_BUS=y
313CONFIG_UNEVICTABLE_LRU=y
314CONFIG_HAVE_MLOCK=y
315CONFIG_HAVE_MLOCKED_PAGE_BIT=y
316CONFIG_ALIGNMENT_TRAP=y
317
318#
319# Boot options
320#
321CONFIG_ZBOOT_ROM_TEXT=0
322CONFIG_ZBOOT_ROM_BSS=0
323CONFIG_CMDLINE=""
324# CONFIG_XIP_KERNEL is not set
325CONFIG_KEXEC=y
326CONFIG_ATAGS_PROC=y
327
328#
329# CPU Power Management
330#
331CONFIG_CPU_IDLE=y
332CONFIG_CPU_IDLE_GOV_LADDER=y
333
334#
335# Floating point emulation
336#
337
338#
339# At least one emulation must be selected
340#
341
342#
343# Userspace binary formats
344#
345CONFIG_BINFMT_ELF=y
346# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
347CONFIG_HAVE_AOUT=y
348CONFIG_BINFMT_AOUT=m
349CONFIG_BINFMT_MISC=m
350
351#
352# Power management options
353#
354CONFIG_PM=y
355# CONFIG_PM_DEBUG is not set
356CONFIG_PM_SLEEP=y
357CONFIG_SUSPEND=y
358CONFIG_SUSPEND_FREEZER=y
359CONFIG_APM_EMULATION=y
360CONFIG_ARCH_SUSPEND_POSSIBLE=y
361CONFIG_NET=y
362
363#
364# Networking options
365#
366CONFIG_PACKET=y
367CONFIG_PACKET_MMAP=y
368CONFIG_UNIX=y
369CONFIG_XFRM=y
370CONFIG_XFRM_USER=m
371# CONFIG_XFRM_SUB_POLICY is not set
372# CONFIG_XFRM_MIGRATE is not set
373# CONFIG_XFRM_STATISTICS is not set
374CONFIG_NET_KEY=m
375# CONFIG_NET_KEY_MIGRATE is not set
376CONFIG_INET=y
377CONFIG_IP_MULTICAST=y
378CONFIG_IP_ADVANCED_ROUTER=y
379CONFIG_ASK_IP_FIB_HASH=y
380# CONFIG_IP_FIB_TRIE is not set
381CONFIG_IP_FIB_HASH=y
382CONFIG_IP_MULTIPLE_TABLES=y
383CONFIG_IP_ROUTE_MULTIPATH=y
384CONFIG_IP_ROUTE_VERBOSE=y
385CONFIG_IP_PNP=y
386CONFIG_IP_PNP_DHCP=y
387CONFIG_IP_PNP_BOOTP=y
388CONFIG_IP_PNP_RARP=y
389# CONFIG_NET_IPIP is not set
390# CONFIG_NET_IPGRE is not set
391CONFIG_IP_MROUTE=y
392CONFIG_IP_PIMSM_V1=y
393CONFIG_IP_PIMSM_V2=y
394# CONFIG_ARPD is not set
395CONFIG_SYN_COOKIES=y
396# CONFIG_INET_AH is not set
397# CONFIG_INET_ESP is not set
398# CONFIG_INET_IPCOMP is not set
399# CONFIG_INET_XFRM_TUNNEL is not set
400# CONFIG_INET_TUNNEL is not set
401# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
402# CONFIG_INET_XFRM_MODE_TUNNEL is not set
403# CONFIG_INET_XFRM_MODE_BEET is not set
404# CONFIG_INET_LRO is not set
405CONFIG_INET_DIAG=m
406CONFIG_INET_TCP_DIAG=m
407# CONFIG_TCP_CONG_ADVANCED is not set
408CONFIG_TCP_CONG_CUBIC=y
409CONFIG_DEFAULT_TCP_CONG="cubic"
410# CONFIG_TCP_MD5SIG is not set
411# CONFIG_IPV6 is not set
412# CONFIG_NETWORK_SECMARK is not set
413CONFIG_NETFILTER=y
414# CONFIG_NETFILTER_DEBUG is not set
415CONFIG_NETFILTER_ADVANCED=y
416CONFIG_BRIDGE_NETFILTER=y
417
418#
419# Core Netfilter Configuration
420#
421# CONFIG_NETFILTER_NETLINK_QUEUE is not set
422# CONFIG_NETFILTER_NETLINK_LOG is not set
423# CONFIG_NF_CONNTRACK is not set
424# CONFIG_NETFILTER_XTABLES is not set
425# CONFIG_IP_VS is not set
426
427#
428# IP: Netfilter Configuration
429#
430# CONFIG_NF_DEFRAG_IPV4 is not set
431# CONFIG_IP_NF_QUEUE is not set
432# CONFIG_IP_NF_IPTABLES is not set
433# CONFIG_IP_NF_ARPTABLES is not set
434# CONFIG_BRIDGE_NF_EBTABLES is not set
435# CONFIG_IP_DCCP is not set
436# CONFIG_IP_SCTP is not set
437# CONFIG_TIPC is not set
438# CONFIG_ATM is not set
439CONFIG_STP=m
440CONFIG_GARP=m
441CONFIG_BRIDGE=m
442# CONFIG_NET_DSA is not set
443CONFIG_VLAN_8021Q=m
444CONFIG_VLAN_8021Q_GVRP=y
445# CONFIG_DECNET is not set
446CONFIG_LLC=m
447# CONFIG_LLC2 is not set
448# CONFIG_IPX is not set
449# CONFIG_ATALK is not set
450# CONFIG_X25 is not set
451# CONFIG_LAPB is not set
452# CONFIG_ECONET is not set
453# CONFIG_WAN_ROUTER is not set
454# CONFIG_PHONET is not set
455# CONFIG_NET_SCHED is not set
456# CONFIG_DCB is not set
457
458#
459# Network testing
460#
461CONFIG_NET_PKTGEN=m
462# CONFIG_HAMRADIO is not set
463# CONFIG_CAN is not set
464# CONFIG_IRDA is not set
465CONFIG_BT=m
466CONFIG_BT_L2CAP=m
467CONFIG_BT_SCO=m
468CONFIG_BT_RFCOMM=m
469CONFIG_BT_RFCOMM_TTY=y
470CONFIG_BT_BNEP=m
471CONFIG_BT_BNEP_MC_FILTER=y
472CONFIG_BT_BNEP_PROTO_FILTER=y
473CONFIG_BT_HIDP=m
474
475#
476# Bluetooth device drivers
477#
478CONFIG_BT_HCIBTUSB=m
479CONFIG_BT_HCIBTSDIO=m
480CONFIG_BT_HCIUART=m
481CONFIG_BT_HCIUART_H4=y
482CONFIG_BT_HCIUART_BCSP=y
483CONFIG_BT_HCIUART_LL=y
484CONFIG_BT_HCIBCM203X=m
485CONFIG_BT_HCIBPA10X=m
486CONFIG_BT_HCIBFUSB=m
487CONFIG_BT_HCIVHCI=m
488# CONFIG_AF_RXRPC is not set
489CONFIG_FIB_RULES=y
490CONFIG_WIRELESS=y
491CONFIG_CFG80211=m
492CONFIG_CFG80211_REG_DEBUG=y
493CONFIG_WIRELESS_OLD_REGULATORY=y
494CONFIG_WIRELESS_EXT=y
495CONFIG_WIRELESS_EXT_SYSFS=y
496CONFIG_LIB80211=m
497CONFIG_LIB80211_CRYPT_WEP=m
498CONFIG_LIB80211_CRYPT_CCMP=m
499CONFIG_LIB80211_CRYPT_TKIP=m
500# CONFIG_LIB80211_DEBUG is not set
501CONFIG_MAC80211=m
502
503#
504# Rate control algorithm selection
505#
506CONFIG_MAC80211_RC_MINSTREL=y
507# CONFIG_MAC80211_RC_DEFAULT_PID is not set
508CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
509CONFIG_MAC80211_RC_DEFAULT="minstrel"
510CONFIG_MAC80211_MESH=y
511CONFIG_MAC80211_LEDS=y
512# CONFIG_MAC80211_DEBUGFS is not set
513# CONFIG_MAC80211_DEBUG_MENU is not set
514# CONFIG_WIMAX is not set
515# CONFIG_RFKILL is not set
516# CONFIG_NET_9P is not set
517
518#
519# Device Drivers
520#
521
522#
523# Generic Driver Options
524#
525CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
526CONFIG_STANDALONE=y
527CONFIG_PREVENT_FIRMWARE_BUILD=y
528CONFIG_FW_LOADER=y
529# CONFIG_FIRMWARE_IN_KERNEL is not set
530CONFIG_EXTRA_FIRMWARE=""
531# CONFIG_DEBUG_DRIVER is not set
532# CONFIG_DEBUG_DEVRES is not set
533# CONFIG_SYS_HYPERVISOR is not set
534CONFIG_CONNECTOR=m
535CONFIG_MTD=y
536# CONFIG_MTD_DEBUG is not set
537CONFIG_MTD_CONCAT=y
538CONFIG_MTD_PARTITIONS=y
539# CONFIG_MTD_TESTS is not set
540# CONFIG_MTD_REDBOOT_PARTS is not set
541CONFIG_MTD_CMDLINE_PARTS=y
542# CONFIG_MTD_AFS_PARTS is not set
543# CONFIG_MTD_AR7_PARTS is not set
544
545#
546# User Modules And Translation Layers
547#
548CONFIG_MTD_CHAR=y
549CONFIG_MTD_BLKDEVS=y
550CONFIG_MTD_BLOCK=y
551CONFIG_FTL=y
552CONFIG_NFTL=y
553CONFIG_NFTL_RW=y
554CONFIG_INFTL=y
555CONFIG_RFD_FTL=y
556# CONFIG_SSFDC is not set
557# CONFIG_MTD_OOPS is not set
558
559#
560# RAM/ROM/Flash chip drivers
561#
562CONFIG_MTD_CFI=y
563CONFIG_MTD_JEDECPROBE=y
564CONFIG_MTD_GEN_PROBE=y
565# CONFIG_MTD_CFI_ADV_OPTIONS is not set
566CONFIG_MTD_MAP_BANK_WIDTH_1=y
567CONFIG_MTD_MAP_BANK_WIDTH_2=y
568CONFIG_MTD_MAP_BANK_WIDTH_4=y
569# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
570# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
571# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
572CONFIG_MTD_CFI_I1=y
573CONFIG_MTD_CFI_I2=y
574# CONFIG_MTD_CFI_I4 is not set
575# CONFIG_MTD_CFI_I8 is not set
576# CONFIG_MTD_CFI_INTELEXT is not set
577CONFIG_MTD_CFI_AMDSTD=y
578CONFIG_MTD_CFI_STAA=y
579CONFIG_MTD_CFI_UTIL=y
580CONFIG_MTD_RAM=y
581CONFIG_MTD_ROM=y
582# CONFIG_MTD_ABSENT is not set
583
584#
585# Mapping drivers for chip access
586#
587# CONFIG_MTD_COMPLEX_MAPPINGS is not set
588# CONFIG_MTD_PHYSMAP is not set
589# CONFIG_MTD_ARM_INTEGRATOR is not set
590# CONFIG_MTD_IMPA7 is not set
591# CONFIG_MTD_PLATRAM is not set
592
593#
594# Self-contained MTD device drivers
595#
596# CONFIG_MTD_DATAFLASH is not set
597# CONFIG_MTD_M25P80 is not set
598# CONFIG_MTD_SLRAM is not set
599# CONFIG_MTD_PHRAM is not set
600# CONFIG_MTD_MTDRAM is not set
601# CONFIG_MTD_BLOCK2MTD is not set
602
603#
604# Disk-On-Chip Device Drivers
605#
606# CONFIG_MTD_DOC2000 is not set
607# CONFIG_MTD_DOC2001 is not set
608# CONFIG_MTD_DOC2001PLUS is not set
609CONFIG_MTD_NAND=y
610CONFIG_MTD_NAND_VERIFY_WRITE=y
611# CONFIG_MTD_NAND_ECC_SMC is not set
612# CONFIG_MTD_NAND_MUSEUM_IDS is not set
613# CONFIG_MTD_NAND_GPIO is not set
614CONFIG_MTD_NAND_IDS=y
615CONFIG_MTD_NAND_S3C2410=y
616# CONFIG_MTD_NAND_S3C2410_DEBUG is not set
617# CONFIG_MTD_NAND_S3C2410_HWECC is not set
618# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set
619# CONFIG_MTD_NAND_DISKONCHIP is not set
620# CONFIG_MTD_NAND_NANDSIM is not set
621CONFIG_MTD_NAND_PLATFORM=y
622# CONFIG_MTD_ALAUDA is not set
623# CONFIG_MTD_ONENAND is not set
624
625#
626# LPDDR flash memory drivers
627#
628CONFIG_MTD_LPDDR=y
629CONFIG_MTD_QINFO_PROBE=y
630
631#
632# UBI - Unsorted block images
633#
634# CONFIG_MTD_UBI is not set
635# CONFIG_PARPORT is not set
636CONFIG_BLK_DEV=y
637# CONFIG_BLK_DEV_COW_COMMON is not set
638CONFIG_BLK_DEV_LOOP=m
639# CONFIG_BLK_DEV_CRYPTOLOOP is not set
640CONFIG_BLK_DEV_NBD=m
641# CONFIG_BLK_DEV_UB is not set
642CONFIG_BLK_DEV_RAM=y
643CONFIG_BLK_DEV_RAM_COUNT=16
644CONFIG_BLK_DEV_RAM_SIZE=65536
645# CONFIG_BLK_DEV_XIP is not set
646CONFIG_CDROM_PKTCDVD=m
647CONFIG_CDROM_PKTCDVD_BUFFERS=8
648# CONFIG_CDROM_PKTCDVD_WCACHE is not set
649# CONFIG_ATA_OVER_ETH is not set
650CONFIG_MISC_DEVICES=y
651# CONFIG_ICS932S401 is not set
652# CONFIG_ENCLOSURE_SERVICES is not set
653# CONFIG_ISL29003 is not set
654# CONFIG_C2PORT is not set
655
656#
657# EEPROM support
658#
659CONFIG_EEPROM_AT24=y
660# CONFIG_EEPROM_AT25 is not set
661# CONFIG_EEPROM_LEGACY is not set
662# CONFIG_EEPROM_93CX6 is not set
663CONFIG_HAVE_IDE=y
664# CONFIG_IDE is not set
665
666#
667# SCSI device support
668#
669# CONFIG_RAID_ATTRS is not set
670CONFIG_SCSI=m
671CONFIG_SCSI_DMA=y
672# CONFIG_SCSI_TGT is not set
673# CONFIG_SCSI_NETLINK is not set
674# CONFIG_SCSI_PROC_FS is not set
675
676#
677# SCSI support type (disk, tape, CD-ROM)
678#
679CONFIG_BLK_DEV_SD=m
680# CONFIG_CHR_DEV_ST is not set
681# CONFIG_CHR_DEV_OSST is not set
682# CONFIG_BLK_DEV_SR is not set
683CONFIG_CHR_DEV_SG=m
684# CONFIG_CHR_DEV_SCH is not set
685
686#
687# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
688#
689# CONFIG_SCSI_MULTI_LUN is not set
690# CONFIG_SCSI_CONSTANTS is not set
691# CONFIG_SCSI_LOGGING is not set
692# CONFIG_SCSI_SCAN_ASYNC is not set
693CONFIG_SCSI_WAIT_SCAN=m
694
695#
696# SCSI Transports
697#
698# CONFIG_SCSI_SPI_ATTRS is not set
699# CONFIG_SCSI_FC_ATTRS is not set
700# CONFIG_SCSI_ISCSI_ATTRS is not set
701# CONFIG_SCSI_SAS_LIBSAS is not set
702# CONFIG_SCSI_SRP_ATTRS is not set
703# CONFIG_SCSI_LOWLEVEL is not set
704# CONFIG_SCSI_DH is not set
705# CONFIG_SCSI_OSD_INITIATOR is not set
706# CONFIG_ATA is not set
707# CONFIG_MD is not set
708CONFIG_NETDEVICES=y
709CONFIG_COMPAT_NET_DEV_OPS=y
710# CONFIG_DUMMY is not set
711# CONFIG_BONDING is not set
712# CONFIG_MACVLAN is not set
713# CONFIG_EQUALIZER is not set
714CONFIG_TUN=m
715# CONFIG_VETH is not set
716# CONFIG_PHYLIB is not set
717CONFIG_NET_ETHERNET=y
718CONFIG_MII=y
719# CONFIG_AX88796 is not set
720# CONFIG_SMC91X is not set
721CONFIG_DM9000=y
722CONFIG_DM9000_DEBUGLEVEL=4
723# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set
724# CONFIG_ENC28J60 is not set
725# CONFIG_ETHOC is not set
726# CONFIG_SMC911X is not set
727# CONFIG_SMSC911X is not set
728# CONFIG_DNET is not set
729# CONFIG_IBM_NEW_EMAC_ZMII is not set
730# CONFIG_IBM_NEW_EMAC_RGMII is not set
731# CONFIG_IBM_NEW_EMAC_TAH is not set
732# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
733# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
734# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
735# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
736# CONFIG_B44 is not set
737# CONFIG_NETDEV_1000 is not set
738# CONFIG_NETDEV_10000 is not set
739
740#
741# Wireless LAN
742#
743# CONFIG_WLAN_PRE80211 is not set
744CONFIG_WLAN_80211=y
745CONFIG_LIBERTAS=m
746# CONFIG_LIBERTAS_USB is not set
747CONFIG_LIBERTAS_SDIO=m
748# CONFIG_LIBERTAS_SPI is not set
749# CONFIG_LIBERTAS_DEBUG is not set
750# CONFIG_LIBERTAS_THINFIRM is not set
751# CONFIG_AT76C50X_USB is not set
752# CONFIG_USB_ZD1201 is not set
753# CONFIG_USB_NET_RNDIS_WLAN is not set
754# CONFIG_RTL8187 is not set
755# CONFIG_MAC80211_HWSIM is not set
756# CONFIG_P54_COMMON is not set
757# CONFIG_AR9170_USB is not set
758CONFIG_HOSTAP=m
759CONFIG_HOSTAP_FIRMWARE=y
760CONFIG_HOSTAP_FIRMWARE_NVRAM=y
761# CONFIG_B43 is not set
762# CONFIG_B43LEGACY is not set
763CONFIG_ZD1211RW=m
764CONFIG_ZD1211RW_DEBUG=y
765# CONFIG_RT2X00 is not set
766
767#
768# Enable WiMAX (Networking options) to see the WiMAX drivers
769#
770
771#
772# USB Network Adapters
773#
774# CONFIG_USB_CATC is not set
775# CONFIG_USB_KAWETH is not set
776# CONFIG_USB_PEGASUS is not set
777# CONFIG_USB_RTL8150 is not set
778# CONFIG_USB_USBNET is not set
779# CONFIG_WAN is not set
780CONFIG_PPP=m
781CONFIG_PPP_MULTILINK=y
782CONFIG_PPP_FILTER=y
783CONFIG_PPP_ASYNC=m
784CONFIG_PPP_SYNC_TTY=m
785CONFIG_PPP_DEFLATE=m
786CONFIG_PPP_BSDCOMP=m
787CONFIG_PPP_MPPE=m
788# CONFIG_PPPOE is not set
789# CONFIG_PPPOL2TP is not set
790# CONFIG_SLIP is not set
791CONFIG_SLHC=m
792# CONFIG_NETCONSOLE is not set
793# CONFIG_NETPOLL is not set
794# CONFIG_NET_POLL_CONTROLLER is not set
795# CONFIG_ISDN is not set
796
797#
798# Input device support
799#
800CONFIG_INPUT=y
801CONFIG_INPUT_FF_MEMLESS=y
802# CONFIG_INPUT_POLLDEV is not set
803
804#
805# Userland interfaces
806#
807CONFIG_INPUT_MOUSEDEV=y
808CONFIG_INPUT_MOUSEDEV_PSAUX=y
809CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
810CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
811# CONFIG_INPUT_JOYDEV is not set
812CONFIG_INPUT_EVDEV=y
813CONFIG_INPUT_EVBUG=m
814
815#
816# Input Device Drivers
817#
818CONFIG_INPUT_KEYBOARD=y
819# CONFIG_KEYBOARD_ATKBD is not set
820# CONFIG_KEYBOARD_SUNKBD is not set
821# CONFIG_KEYBOARD_LKKBD is not set
822# CONFIG_KEYBOARD_XTKBD is not set
823# CONFIG_KEYBOARD_NEWTON is not set
824# CONFIG_KEYBOARD_STOWAWAY is not set
825CONFIG_KEYBOARD_GPIO=y
826CONFIG_INPUT_MOUSE=y
827CONFIG_MOUSE_PS2=y
828CONFIG_MOUSE_PS2_ALPS=y
829CONFIG_MOUSE_PS2_LOGIPS2PP=y
830CONFIG_MOUSE_PS2_SYNAPTICS=y
831CONFIG_MOUSE_PS2_TRACKPOINT=y
832# CONFIG_MOUSE_PS2_ELANTECH is not set
833# CONFIG_MOUSE_PS2_TOUCHKIT is not set
834# CONFIG_MOUSE_SERIAL is not set
835# CONFIG_MOUSE_APPLETOUCH is not set
836# CONFIG_MOUSE_BCM5974 is not set
837# CONFIG_MOUSE_VSXXXAA is not set
838# CONFIG_MOUSE_GPIO is not set
839# CONFIG_INPUT_JOYSTICK is not set
840# CONFIG_INPUT_TABLET is not set
841CONFIG_INPUT_TOUCHSCREEN=y
842# CONFIG_TOUCHSCREEN_ADS7846 is not set
843# CONFIG_TOUCHSCREEN_AD7877 is not set
844# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
845# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
846# CONFIG_TOUCHSCREEN_AD7879 is not set
847# CONFIG_TOUCHSCREEN_FUJITSU is not set
848# CONFIG_TOUCHSCREEN_GUNZE is not set
849# CONFIG_TOUCHSCREEN_ELO is not set
850# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
851# CONFIG_TOUCHSCREEN_MTOUCH is not set
852# CONFIG_TOUCHSCREEN_INEXIO is not set
853# CONFIG_TOUCHSCREEN_MK712 is not set
854# CONFIG_TOUCHSCREEN_PENMOUNT is not set
855# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
856# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
857# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
858# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
859# CONFIG_TOUCHSCREEN_TSC2007 is not set
860# CONFIG_INPUT_MISC is not set
861
862#
863# Hardware I/O ports
864#
865CONFIG_SERIO=y
866CONFIG_SERIO_SERPORT=y
867CONFIG_SERIO_LIBPS2=y
868CONFIG_SERIO_RAW=y
869# CONFIG_GAMEPORT is not set
870
871#
872# Character devices
873#
874CONFIG_VT=y
875CONFIG_CONSOLE_TRANSLATIONS=y
876CONFIG_VT_CONSOLE=y
877CONFIG_HW_CONSOLE=y
878CONFIG_VT_HW_CONSOLE_BINDING=y
879CONFIG_DEVKMEM=y
880# CONFIG_SERIAL_NONSTANDARD is not set
881
882#
883# Serial drivers
884#
885# CONFIG_SERIAL_8250 is not set
886
887#
888# Non-8250 serial port support
889#
890CONFIG_SERIAL_SAMSUNG=y
891CONFIG_SERIAL_SAMSUNG_UARTS=3
892CONFIG_SERIAL_SAMSUNG_CONSOLE=y
893CONFIG_SERIAL_S3C2440=y
894# CONFIG_SERIAL_MAX3100 is not set
895CONFIG_SERIAL_CORE=y
896CONFIG_SERIAL_CORE_CONSOLE=y
897CONFIG_UNIX98_PTYS=y
898# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
899CONFIG_LEGACY_PTYS=y
900CONFIG_LEGACY_PTY_COUNT=128
901CONFIG_IPMI_HANDLER=m
902# CONFIG_IPMI_PANIC_EVENT is not set
903CONFIG_IPMI_DEVICE_INTERFACE=m
904CONFIG_IPMI_SI=m
905CONFIG_IPMI_WATCHDOG=m
906CONFIG_IPMI_POWEROFF=m
907CONFIG_HW_RANDOM=y
908# CONFIG_HW_RANDOM_TIMERIOMEM is not set
909# CONFIG_R3964 is not set
910# CONFIG_RAW_DRIVER is not set
911# CONFIG_TCG_TPM is not set
912CONFIG_I2C=y
913CONFIG_I2C_BOARDINFO=y
914CONFIG_I2C_CHARDEV=y
915CONFIG_I2C_HELPER_AUTO=y
916CONFIG_I2C_ALGOBIT=y
917
918#
919# I2C Hardware Bus support
920#
921
922#
923# I2C system bus drivers (mostly embedded / system-on-chip)
924#
925# CONFIG_I2C_GPIO is not set
926# CONFIG_I2C_OCORES is not set
927CONFIG_I2C_S3C2410=y
928CONFIG_I2C_SIMTEC=y
929
930#
931# External I2C/SMBus adapter drivers
932#
933# CONFIG_I2C_PARPORT_LIGHT is not set
934# CONFIG_I2C_TAOS_EVM is not set
935# CONFIG_I2C_TINY_USB is not set
936
937#
938# Other I2C/SMBus bus drivers
939#
940# CONFIG_I2C_PCA_PLATFORM is not set
941# CONFIG_I2C_STUB is not set
942
943#
944# Miscellaneous I2C Chip support
945#
946# CONFIG_DS1682 is not set
947# CONFIG_SENSORS_PCF8574 is not set
948# CONFIG_PCF8575 is not set
949# CONFIG_SENSORS_PCA9539 is not set
950# CONFIG_SENSORS_MAX6875 is not set
951CONFIG_SENSORS_TSL2550=m
952# CONFIG_I2C_DEBUG_CORE is not set
953# CONFIG_I2C_DEBUG_ALGO is not set
954# CONFIG_I2C_DEBUG_BUS is not set
955# CONFIG_I2C_DEBUG_CHIP is not set
956CONFIG_SPI=y
957# CONFIG_SPI_DEBUG is not set
958CONFIG_SPI_MASTER=y
959
960#
961# SPI Master Controller Drivers
962#
963CONFIG_SPI_BITBANG=y
964# CONFIG_SPI_GPIO is not set
965CONFIG_SPI_S3C24XX=y
966# CONFIG_SPI_S3C24XX_GPIO is not set
967
968#
969# SPI Protocol Masters
970#
971CONFIG_SPI_SPIDEV=y
972# CONFIG_SPI_TLE62X0 is not set
973CONFIG_ARCH_REQUIRE_GPIOLIB=y
974CONFIG_GPIOLIB=y
975# CONFIG_DEBUG_GPIO is not set
976CONFIG_GPIO_SYSFS=y
977
978#
979# Memory mapped GPIO expanders:
980#
981
982#
983# I2C GPIO expanders:
984#
985# CONFIG_GPIO_MAX732X is not set
986# CONFIG_GPIO_PCA953X is not set
987# CONFIG_GPIO_PCF857X is not set
988
989#
990# PCI GPIO expanders:
991#
992
993#
994# SPI GPIO expanders:
995#
996# CONFIG_GPIO_MAX7301 is not set
997# CONFIG_GPIO_MCP23S08 is not set
998# CONFIG_W1 is not set
999# CONFIG_POWER_SUPPLY is not set
1000CONFIG_HWMON=y
1001# CONFIG_HWMON_VID is not set
1002# CONFIG_SENSORS_AD7414 is not set
1003# CONFIG_SENSORS_AD7418 is not set
1004# CONFIG_SENSORS_ADCXX is not set
1005# CONFIG_SENSORS_ADM1021 is not set
1006# CONFIG_SENSORS_ADM1025 is not set
1007# CONFIG_SENSORS_ADM1026 is not set
1008# CONFIG_SENSORS_ADM1029 is not set
1009# CONFIG_SENSORS_ADM1031 is not set
1010# CONFIG_SENSORS_ADM9240 is not set
1011# CONFIG_SENSORS_ADT7462 is not set
1012# CONFIG_SENSORS_ADT7470 is not set
1013# CONFIG_SENSORS_ADT7473 is not set
1014# CONFIG_SENSORS_ADT7475 is not set
1015# CONFIG_SENSORS_ATXP1 is not set
1016# CONFIG_SENSORS_DS1621 is not set
1017# CONFIG_SENSORS_F71805F is not set
1018# CONFIG_SENSORS_F71882FG is not set
1019# CONFIG_SENSORS_F75375S is not set
1020# CONFIG_SENSORS_G760A is not set
1021# CONFIG_SENSORS_GL518SM is not set
1022# CONFIG_SENSORS_GL520SM is not set
1023# CONFIG_SENSORS_IBMAEM is not set
1024# CONFIG_SENSORS_IBMPEX is not set
1025# CONFIG_SENSORS_IT87 is not set
1026# CONFIG_SENSORS_LM63 is not set
1027# CONFIG_SENSORS_LM70 is not set
1028CONFIG_SENSORS_LM75=y
1029# CONFIG_SENSORS_LM77 is not set
1030# CONFIG_SENSORS_LM78 is not set
1031# CONFIG_SENSORS_LM80 is not set
1032# CONFIG_SENSORS_LM83 is not set
1033# CONFIG_SENSORS_LM85 is not set
1034# CONFIG_SENSORS_LM87 is not set
1035# CONFIG_SENSORS_LM90 is not set
1036# CONFIG_SENSORS_LM92 is not set
1037# CONFIG_SENSORS_LM93 is not set
1038# CONFIG_SENSORS_LTC4215 is not set
1039# CONFIG_SENSORS_LTC4245 is not set
1040# CONFIG_SENSORS_LM95241 is not set
1041# CONFIG_SENSORS_MAX1111 is not set
1042# CONFIG_SENSORS_MAX1619 is not set
1043# CONFIG_SENSORS_MAX6650 is not set
1044# CONFIG_SENSORS_PC87360 is not set
1045# CONFIG_SENSORS_PC87427 is not set
1046# CONFIG_SENSORS_PCF8591 is not set
1047# CONFIG_SENSORS_SHT15 is not set
1048# CONFIG_SENSORS_DME1737 is not set
1049# CONFIG_SENSORS_SMSC47M1 is not set
1050# CONFIG_SENSORS_SMSC47M192 is not set
1051# CONFIG_SENSORS_SMSC47B397 is not set
1052# CONFIG_SENSORS_ADS7828 is not set
1053# CONFIG_SENSORS_THMC50 is not set
1054# CONFIG_SENSORS_VT1211 is not set
1055# CONFIG_SENSORS_W83781D is not set
1056# CONFIG_SENSORS_W83791D is not set
1057# CONFIG_SENSORS_W83792D is not set
1058# CONFIG_SENSORS_W83793 is not set
1059# CONFIG_SENSORS_W83L785TS is not set
1060# CONFIG_SENSORS_W83L786NG is not set
1061# CONFIG_SENSORS_W83627HF is not set
1062# CONFIG_SENSORS_W83627EHF is not set
1063# CONFIG_SENSORS_LIS3_SPI is not set
1064# CONFIG_HWMON_DEBUG_CHIP is not set
1065CONFIG_THERMAL=m
1066# CONFIG_THERMAL_HWMON is not set
1067CONFIG_WATCHDOG=y
1068# CONFIG_WATCHDOG_NOWAYOUT is not set
1069
1070#
1071# Watchdog Device Drivers
1072#
1073# CONFIG_SOFT_WATCHDOG is not set
1074CONFIG_S3C2410_WATCHDOG=y
1075
1076#
1077# USB-based Watchdog Cards
1078#
1079# CONFIG_USBPCWATCHDOG is not set
1080CONFIG_SSB_POSSIBLE=y
1081
1082#
1083# Sonics Silicon Backplane
1084#
1085# CONFIG_SSB is not set
1086
1087#
1088# Multifunction device drivers
1089#
1090# CONFIG_MFD_CORE is not set
1091# CONFIG_MFD_SM501 is not set
1092# CONFIG_MFD_ASIC3 is not set
1093# CONFIG_HTC_EGPIO is not set
1094# CONFIG_HTC_PASIC3 is not set
1095# CONFIG_TPS65010 is not set
1096# CONFIG_TWL4030_CORE is not set
1097# CONFIG_MFD_TMIO is not set
1098# CONFIG_MFD_T7L66XB is not set
1099# CONFIG_MFD_TC6387XB is not set
1100# CONFIG_MFD_TC6393XB is not set
1101# CONFIG_PMIC_DA903X is not set
1102# CONFIG_MFD_WM8400 is not set
1103# CONFIG_MFD_WM8350_I2C is not set
1104# CONFIG_MFD_PCF50633 is not set
1105
1106#
1107# Multimedia devices
1108#
1109
1110#
1111# Multimedia core support
1112#
1113CONFIG_VIDEO_DEV=m
1114CONFIG_VIDEO_V4L2_COMMON=m
1115CONFIG_VIDEO_ALLOW_V4L1=y
1116CONFIG_VIDEO_V4L1_COMPAT=y
1117CONFIG_DVB_CORE=m
1118CONFIG_VIDEO_MEDIA=m
1119
1120#
1121# Multimedia drivers
1122#
1123# CONFIG_MEDIA_ATTACH is not set
1124CONFIG_MEDIA_TUNER=m
1125# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
1126CONFIG_MEDIA_TUNER_SIMPLE=m
1127CONFIG_MEDIA_TUNER_TDA8290=m
1128CONFIG_MEDIA_TUNER_TDA9887=m
1129CONFIG_MEDIA_TUNER_TEA5761=m
1130CONFIG_MEDIA_TUNER_TEA5767=m
1131CONFIG_MEDIA_TUNER_MT20XX=m
1132CONFIG_MEDIA_TUNER_XC2028=m
1133CONFIG_MEDIA_TUNER_XC5000=m
1134CONFIG_MEDIA_TUNER_MC44S803=m
1135CONFIG_VIDEO_V4L2=m
1136CONFIG_VIDEO_V4L1=m
1137CONFIG_VIDEOBUF_GEN=m
1138CONFIG_VIDEO_CAPTURE_DRIVERS=y
1139# CONFIG_VIDEO_ADV_DEBUG is not set
1140# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
1141CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
1142# CONFIG_VIDEO_VIVI is not set
1143# CONFIG_VIDEO_CPIA is not set
1144# CONFIG_VIDEO_CPIA2 is not set
1145# CONFIG_VIDEO_SAA5246A is not set
1146# CONFIG_VIDEO_SAA5249 is not set
1147# CONFIG_VIDEO_AU0828 is not set
1148CONFIG_SOC_CAMERA=m
1149# CONFIG_SOC_CAMERA_MT9M001 is not set
1150# CONFIG_SOC_CAMERA_MT9M111 is not set
1151# CONFIG_SOC_CAMERA_MT9T031 is not set
1152# CONFIG_SOC_CAMERA_MT9V022 is not set
1153# CONFIG_SOC_CAMERA_TW9910 is not set
1154CONFIG_SOC_CAMERA_PLATFORM=m
1155# CONFIG_SOC_CAMERA_OV772X is not set
1156# CONFIG_VIDEO_SH_MOBILE_CEU is not set
1157CONFIG_V4L_USB_DRIVERS=y
1158# CONFIG_USB_VIDEO_CLASS is not set
1159CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
1160CONFIG_USB_GSPCA=m
1161# CONFIG_USB_M5602 is not set
1162# CONFIG_USB_STV06XX is not set
1163# CONFIG_USB_GSPCA_CONEX is not set
1164# CONFIG_USB_GSPCA_ETOMS is not set
1165# CONFIG_USB_GSPCA_FINEPIX is not set
1166# CONFIG_USB_GSPCA_MARS is not set
1167# CONFIG_USB_GSPCA_MR97310A is not set
1168# CONFIG_USB_GSPCA_OV519 is not set
1169# CONFIG_USB_GSPCA_OV534 is not set
1170# CONFIG_USB_GSPCA_PAC207 is not set
1171# CONFIG_USB_GSPCA_PAC7311 is not set
1172# CONFIG_USB_GSPCA_SONIXB is not set
1173# CONFIG_USB_GSPCA_SONIXJ is not set
1174# CONFIG_USB_GSPCA_SPCA500 is not set
1175# CONFIG_USB_GSPCA_SPCA501 is not set
1176# CONFIG_USB_GSPCA_SPCA505 is not set
1177# CONFIG_USB_GSPCA_SPCA506 is not set
1178# CONFIG_USB_GSPCA_SPCA508 is not set
1179# CONFIG_USB_GSPCA_SPCA561 is not set
1180# CONFIG_USB_GSPCA_SQ905 is not set
1181# CONFIG_USB_GSPCA_SQ905C is not set
1182# CONFIG_USB_GSPCA_STK014 is not set
1183# CONFIG_USB_GSPCA_SUNPLUS is not set
1184# CONFIG_USB_GSPCA_T613 is not set
1185# CONFIG_USB_GSPCA_TV8532 is not set
1186# CONFIG_USB_GSPCA_VC032X is not set
1187CONFIG_USB_GSPCA_ZC3XX=m
1188# CONFIG_VIDEO_PVRUSB2 is not set
1189# CONFIG_VIDEO_HDPVR is not set
1190# CONFIG_VIDEO_EM28XX is not set
1191# CONFIG_VIDEO_CX231XX is not set
1192# CONFIG_VIDEO_USBVISION is not set
1193# CONFIG_USB_VICAM is not set
1194# CONFIG_USB_IBMCAM is not set
1195# CONFIG_USB_KONICAWC is not set
1196# CONFIG_USB_QUICKCAM_MESSENGER is not set
1197# CONFIG_USB_ET61X251 is not set
1198# CONFIG_VIDEO_OVCAMCHIP is not set
1199# CONFIG_USB_OV511 is not set
1200# CONFIG_USB_SE401 is not set
1201# CONFIG_USB_SN9C102 is not set
1202# CONFIG_USB_STV680 is not set
1203# CONFIG_USB_ZC0301 is not set
1204# CONFIG_USB_PWC is not set
1205# CONFIG_USB_PWC_INPUT_EVDEV is not set
1206# CONFIG_USB_ZR364XX is not set
1207# CONFIG_USB_STKWEBCAM is not set
1208# CONFIG_USB_S2255 is not set
1209CONFIG_RADIO_ADAPTERS=y
1210# CONFIG_USB_DSBR is not set
1211# CONFIG_USB_SI470X is not set
1212# CONFIG_USB_MR800 is not set
1213# CONFIG_RADIO_TEA5764 is not set
1214# CONFIG_DVB_DYNAMIC_MINORS is not set
1215CONFIG_DVB_CAPTURE_DRIVERS=y
1216# CONFIG_TTPCI_EEPROM is not set
1217
1218#
1219# Supported USB Adapters
1220#
1221# CONFIG_DVB_USB is not set
1222# CONFIG_DVB_SIANO_SMS1XXX is not set
1223
1224#
1225# Supported FlexCopII (B2C2) Adapters
1226#
1227# CONFIG_DVB_B2C2_FLEXCOP is not set
1228
1229#
1230# Supported DVB Frontends
1231#
1232# CONFIG_DVB_FE_CUSTOMISE is not set
1233# CONFIG_DAB is not set
1234
1235#
1236# Graphics support
1237#
1238# CONFIG_VGASTATE is not set
1239CONFIG_VIDEO_OUTPUT_CONTROL=y
1240CONFIG_FB=y
1241CONFIG_FIRMWARE_EDID=y
1242# CONFIG_FB_DDC is not set
1243# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1244CONFIG_FB_CFB_FILLRECT=y
1245CONFIG_FB_CFB_COPYAREA=y
1246CONFIG_FB_CFB_IMAGEBLIT=y
1247# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
1248# CONFIG_FB_SYS_FILLRECT is not set
1249# CONFIG_FB_SYS_COPYAREA is not set
1250# CONFIG_FB_SYS_IMAGEBLIT is not set
1251# CONFIG_FB_FOREIGN_ENDIAN is not set
1252# CONFIG_FB_SYS_FOPS is not set
1253# CONFIG_FB_SVGALIB is not set
1254# CONFIG_FB_MACMODES is not set
1255# CONFIG_FB_BACKLIGHT is not set
1256CONFIG_FB_MODE_HELPERS=y
1257CONFIG_FB_TILEBLITTING=y
1258
1259#
1260# Frame buffer hardware drivers
1261#
1262# CONFIG_FB_UVESA is not set
1263# CONFIG_FB_S1D13XXX is not set
1264CONFIG_FB_S3C2410=y
1265# CONFIG_FB_S3C2410_DEBUG is not set
1266# CONFIG_FB_VIRTUAL is not set
1267# CONFIG_FB_METRONOME is not set
1268# CONFIG_FB_MB862XX is not set
1269# CONFIG_FB_BROADSHEET is not set
1270CONFIG_BACKLIGHT_LCD_SUPPORT=y
1271CONFIG_LCD_CLASS_DEVICE=y
1272# CONFIG_LCD_LTV350QV is not set
1273# CONFIG_LCD_ILI9320 is not set
1274# CONFIG_LCD_TDO24M is not set
1275# CONFIG_LCD_VGG2432A4 is not set
1276CONFIG_LCD_PLATFORM=y
1277CONFIG_BACKLIGHT_CLASS_DEVICE=y
1278# CONFIG_BACKLIGHT_GENERIC is not set
1279CONFIG_BACKLIGHT_PWM=y
1280
1281#
1282# Display device support
1283#
1284CONFIG_DISPLAY_SUPPORT=y
1285
1286#
1287# Display hardware drivers
1288#
1289
1290#
1291# Console display driver support
1292#
1293# CONFIG_VGA_CONSOLE is not set
1294CONFIG_DUMMY_CONSOLE=y
1295CONFIG_FRAMEBUFFER_CONSOLE=y
1296CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
1297CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
1298CONFIG_FONTS=y
1299CONFIG_FONT_8x8=y
1300# CONFIG_FONT_8x16 is not set
1301# CONFIG_FONT_6x11 is not set
1302# CONFIG_FONT_7x14 is not set
1303# CONFIG_FONT_PEARL_8x8 is not set
1304# CONFIG_FONT_ACORN_8x8 is not set
1305CONFIG_FONT_MINI_4x6=y
1306# CONFIG_FONT_SUN8x16 is not set
1307# CONFIG_FONT_SUN12x22 is not set
1308# CONFIG_FONT_10x18 is not set
1309CONFIG_LOGO=y
1310# CONFIG_LOGO_LINUX_MONO is not set
1311# CONFIG_LOGO_LINUX_VGA16 is not set
1312CONFIG_LOGO_LINUX_CLUT224=y
1313CONFIG_SOUND=y
1314CONFIG_SOUND_OSS_CORE=y
1315CONFIG_SND=y
1316CONFIG_SND_TIMER=y
1317CONFIG_SND_PCM=y
1318CONFIG_SND_HWDEP=m
1319CONFIG_SND_RAWMIDI=m
1320CONFIG_SND_JACK=y
1321CONFIG_SND_SEQUENCER=m
1322CONFIG_SND_SEQ_DUMMY=m
1323CONFIG_SND_OSSEMUL=y
1324CONFIG_SND_MIXER_OSS=m
1325CONFIG_SND_PCM_OSS=m
1326CONFIG_SND_PCM_OSS_PLUGINS=y
1327CONFIG_SND_SEQUENCER_OSS=y
1328CONFIG_SND_DYNAMIC_MINORS=y
1329CONFIG_SND_SUPPORT_OLD_API=y
1330CONFIG_SND_VERBOSE_PROCFS=y
1331# CONFIG_SND_VERBOSE_PRINTK is not set
1332# CONFIG_SND_DEBUG is not set
1333# CONFIG_SND_DRIVERS is not set
1334# CONFIG_SND_ARM is not set
1335# CONFIG_SND_SPI is not set
1336CONFIG_SND_USB=y
1337CONFIG_SND_USB_AUDIO=m
1338CONFIG_SND_USB_CAIAQ=m
1339CONFIG_SND_USB_CAIAQ_INPUT=y
1340CONFIG_SND_SOC=y
1341CONFIG_SND_S3C24XX_SOC=y
1342CONFIG_SND_S3C24XX_SOC_I2S=y
1343# CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650 is not set
1344CONFIG_SND_S3C24XX_SOC_S3C24XX_UDA134X=y
1345CONFIG_SND_SOC_I2C_AND_SPI=y
1346# CONFIG_SND_SOC_ALL_CODECS is not set
1347CONFIG_SND_SOC_L3=y
1348CONFIG_SND_SOC_UDA134X=y
1349# CONFIG_SOUND_PRIME is not set
1350CONFIG_HID_SUPPORT=y
1351CONFIG_HID=y
1352# CONFIG_HID_DEBUG is not set
1353CONFIG_HIDRAW=y
1354
1355#
1356# USB Input Devices
1357#
1358CONFIG_USB_HID=y
1359CONFIG_HID_PID=y
1360CONFIG_USB_HIDDEV=y
1361
1362#
1363# Special HID drivers
1364#
1365CONFIG_HID_A4TECH=y
1366CONFIG_HID_APPLE=y
1367CONFIG_HID_BELKIN=y
1368CONFIG_HID_CHERRY=y
1369CONFIG_HID_CHICONY=y
1370CONFIG_HID_CYPRESS=y
1371# CONFIG_DRAGONRISE_FF is not set
1372CONFIG_HID_EZKEY=y
1373CONFIG_HID_KYE=y
1374CONFIG_HID_GYRATION=y
1375CONFIG_HID_KENSINGTON=y
1376CONFIG_HID_LOGITECH=y
1377# CONFIG_LOGITECH_FF is not set
1378# CONFIG_LOGIRUMBLEPAD2_FF is not set
1379CONFIG_HID_MICROSOFT=y
1380CONFIG_HID_MONTEREY=y
1381CONFIG_HID_NTRIG=y
1382CONFIG_HID_PANTHERLORD=y
1383# CONFIG_PANTHERLORD_FF is not set
1384CONFIG_HID_PETALYNX=y
1385CONFIG_HID_SAMSUNG=y
1386CONFIG_HID_SONY=y
1387CONFIG_HID_SUNPLUS=y
1388# CONFIG_GREENASIA_FF is not set
1389CONFIG_HID_TOPSEED=y
1390# CONFIG_THRUSTMASTER_FF is not set
1391# CONFIG_ZEROPLUS_FF is not set
1392CONFIG_USB_SUPPORT=y
1393CONFIG_USB_ARCH_HAS_HCD=y
1394CONFIG_USB_ARCH_HAS_OHCI=y
1395# CONFIG_USB_ARCH_HAS_EHCI is not set
1396CONFIG_USB=y
1397# CONFIG_USB_DEBUG is not set
1398# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1399
1400#
1401# Miscellaneous USB options
1402#
1403CONFIG_USB_DEVICEFS=y
1404# CONFIG_USB_DEVICE_CLASS is not set
1405# CONFIG_USB_DYNAMIC_MINORS is not set
1406# CONFIG_USB_SUSPEND is not set
1407# CONFIG_USB_OTG is not set
1408# CONFIG_USB_MON is not set
1409# CONFIG_USB_WUSB is not set
1410# CONFIG_USB_WUSB_CBAF is not set
1411
1412#
1413# USB Host Controller Drivers
1414#
1415# CONFIG_USB_C67X00_HCD is not set
1416# CONFIG_USB_OXU210HP_HCD is not set
1417# CONFIG_USB_ISP116X_HCD is not set
1418# CONFIG_USB_ISP1760_HCD is not set
1419CONFIG_USB_OHCI_HCD=y
1420# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
1421# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
1422CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1423# CONFIG_USB_SL811_HCD is not set
1424# CONFIG_USB_R8A66597_HCD is not set
1425# CONFIG_USB_HWA_HCD is not set
1426# CONFIG_USB_MUSB_HDRC is not set
1427# CONFIG_USB_GADGET_MUSB_HDRC is not set
1428
1429#
1430# USB Device Class drivers
1431#
1432CONFIG_USB_ACM=m
1433# CONFIG_USB_PRINTER is not set
1434CONFIG_USB_WDM=m
1435# CONFIG_USB_TMC is not set
1436
1437#
1438# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1439#
1440
1441#
1442# also be needed; see USB_STORAGE Help for more info
1443#
1444CONFIG_USB_STORAGE=m
1445# CONFIG_USB_STORAGE_DEBUG is not set
1446CONFIG_USB_STORAGE_DATAFAB=m
1447# CONFIG_USB_STORAGE_FREECOM is not set
1448CONFIG_USB_STORAGE_ISD200=m
1449CONFIG_USB_STORAGE_USBAT=m
1450CONFIG_USB_STORAGE_SDDR09=m
1451CONFIG_USB_STORAGE_SDDR55=m
1452CONFIG_USB_STORAGE_JUMPSHOT=m
1453CONFIG_USB_STORAGE_ALAUDA=m
1454# CONFIG_USB_STORAGE_ONETOUCH is not set
1455# CONFIG_USB_STORAGE_KARMA is not set
1456# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1457CONFIG_USB_LIBUSUAL=y
1458
1459#
1460# USB Imaging devices
1461#
1462# CONFIG_USB_MDC800 is not set
1463# CONFIG_USB_MICROTEK is not set
1464
1465#
1466# USB port drivers
1467#
1468CONFIG_USB_SERIAL=m
1469# CONFIG_USB_EZUSB is not set
1470# CONFIG_USB_SERIAL_GENERIC is not set
1471# CONFIG_USB_SERIAL_AIRCABLE is not set
1472# CONFIG_USB_SERIAL_ARK3116 is not set
1473# CONFIG_USB_SERIAL_BELKIN is not set
1474# CONFIG_USB_SERIAL_CH341 is not set
1475# CONFIG_USB_SERIAL_WHITEHEAT is not set
1476# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
1477CONFIG_USB_SERIAL_CP210X=m
1478# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1479# CONFIG_USB_SERIAL_EMPEG is not set
1480CONFIG_USB_SERIAL_FTDI_SIO=m
1481# CONFIG_USB_SERIAL_FUNSOFT is not set
1482# CONFIG_USB_SERIAL_VISOR is not set
1483# CONFIG_USB_SERIAL_IPAQ is not set
1484# CONFIG_USB_SERIAL_IR is not set
1485# CONFIG_USB_SERIAL_EDGEPORT is not set
1486# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
1487# CONFIG_USB_SERIAL_GARMIN is not set
1488# CONFIG_USB_SERIAL_IPW is not set
1489# CONFIG_USB_SERIAL_IUU is not set
1490# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
1491# CONFIG_USB_SERIAL_KEYSPAN is not set
1492# CONFIG_USB_SERIAL_KLSI is not set
1493# CONFIG_USB_SERIAL_KOBIL_SCT is not set
1494# CONFIG_USB_SERIAL_MCT_U232 is not set
1495# CONFIG_USB_SERIAL_MOS7720 is not set
1496# CONFIG_USB_SERIAL_MOS7840 is not set
1497# CONFIG_USB_SERIAL_MOTOROLA is not set
1498# CONFIG_USB_SERIAL_NAVMAN is not set
1499# CONFIG_USB_SERIAL_PL2303 is not set
1500# CONFIG_USB_SERIAL_OTI6858 is not set
1501# CONFIG_USB_SERIAL_QUALCOMM is not set
1502CONFIG_USB_SERIAL_SPCP8X5=m
1503# CONFIG_USB_SERIAL_HP4X is not set
1504# CONFIG_USB_SERIAL_SAFE is not set
1505# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
1506# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
1507# CONFIG_USB_SERIAL_SYMBOL is not set
1508# CONFIG_USB_SERIAL_TI is not set
1509# CONFIG_USB_SERIAL_CYBERJACK is not set
1510# CONFIG_USB_SERIAL_XIRCOM is not set
1511# CONFIG_USB_SERIAL_OPTION is not set
1512# CONFIG_USB_SERIAL_OMNINET is not set
1513# CONFIG_USB_SERIAL_OPTICON is not set
1514# CONFIG_USB_SERIAL_DEBUG is not set
1515
1516#
1517# USB Miscellaneous drivers
1518#
1519# CONFIG_USB_EMI62 is not set
1520# CONFIG_USB_EMI26 is not set
1521# CONFIG_USB_ADUTUX is not set
1522# CONFIG_USB_SEVSEG is not set
1523# CONFIG_USB_RIO500 is not set
1524# CONFIG_USB_LEGOTOWER is not set
1525# CONFIG_USB_LCD is not set
1526# CONFIG_USB_BERRY_CHARGE is not set
1527# CONFIG_USB_LED is not set
1528# CONFIG_USB_CYPRESS_CY7C63 is not set
1529# CONFIG_USB_CYTHERM is not set
1530# CONFIG_USB_IDMOUSE is not set
1531# CONFIG_USB_FTDI_ELAN is not set
1532# CONFIG_USB_APPLEDISPLAY is not set
1533# CONFIG_USB_LD is not set
1534# CONFIG_USB_TRANCEVIBRATOR is not set
1535# CONFIG_USB_IOWARRIOR is not set
1536# CONFIG_USB_TEST is not set
1537# CONFIG_USB_ISIGHTFW is not set
1538# CONFIG_USB_VST is not set
1539CONFIG_USB_GADGET=y
1540# CONFIG_USB_GADGET_DEBUG is not set
1541# CONFIG_USB_GADGET_DEBUG_FILES is not set
1542# CONFIG_USB_GADGET_DEBUG_FS is not set
1543CONFIG_USB_GADGET_VBUS_DRAW=2
1544CONFIG_USB_GADGET_SELECTED=y
1545# CONFIG_USB_GADGET_AT91 is not set
1546# CONFIG_USB_GADGET_ATMEL_USBA is not set
1547# CONFIG_USB_GADGET_FSL_USB2 is not set
1548# CONFIG_USB_GADGET_LH7A40X is not set
1549# CONFIG_USB_GADGET_OMAP is not set
1550# CONFIG_USB_GADGET_PXA25X is not set
1551# CONFIG_USB_GADGET_PXA27X is not set
1552CONFIG_USB_GADGET_S3C2410=y
1553CONFIG_USB_S3C2410=y
1554# CONFIG_USB_S3C2410_DEBUG is not set
1555# CONFIG_USB_GADGET_IMX is not set
1556# CONFIG_USB_GADGET_M66592 is not set
1557# CONFIG_USB_GADGET_AMD5536UDC is not set
1558# CONFIG_USB_GADGET_FSL_QE is not set
1559# CONFIG_USB_GADGET_CI13XXX is not set
1560# CONFIG_USB_GADGET_NET2280 is not set
1561# CONFIG_USB_GADGET_GOKU is not set
1562# CONFIG_USB_GADGET_DUMMY_HCD is not set
1563# CONFIG_USB_GADGET_DUALSPEED is not set
1564CONFIG_USB_ZERO=m
1565CONFIG_USB_ETH=m
1566CONFIG_USB_ETH_RNDIS=y
1567CONFIG_USB_GADGETFS=m
1568CONFIG_USB_FILE_STORAGE=m
1569# CONFIG_USB_FILE_STORAGE_TEST is not set
1570CONFIG_USB_G_SERIAL=m
1571# CONFIG_USB_MIDI_GADGET is not set
1572# CONFIG_USB_G_PRINTER is not set
1573CONFIG_USB_CDC_COMPOSITE=m
1574
1575#
1576# OTG and related infrastructure
1577#
1578# CONFIG_USB_GPIO_VBUS is not set
1579# CONFIG_NOP_USB_XCEIV is not set
1580CONFIG_MMC=y
1581# CONFIG_MMC_DEBUG is not set
1582# CONFIG_MMC_UNSAFE_RESUME is not set
1583
1584#
1585# MMC/SD/SDIO Card Drivers
1586#
1587CONFIG_MMC_BLOCK=y
1588CONFIG_MMC_BLOCK_BOUNCE=y
1589CONFIG_SDIO_UART=y
1590# CONFIG_MMC_TEST is not set
1591
1592#
1593# MMC/SD/SDIO Host Controller Drivers
1594#
1595CONFIG_MMC_SDHCI=y
1596CONFIG_MMC_SPI=y
1597CONFIG_MMC_S3C=y
1598# CONFIG_MEMSTICK is not set
1599# CONFIG_ACCESSIBILITY is not set
1600CONFIG_NEW_LEDS=y
1601CONFIG_LEDS_CLASS=y
1602
1603#
1604# LED drivers
1605#
1606CONFIG_LEDS_S3C24XX=y
1607# CONFIG_LEDS_PCA9532 is not set
1608CONFIG_LEDS_GPIO=y
1609CONFIG_LEDS_GPIO_PLATFORM=y
1610# CONFIG_LEDS_LP5521 is not set
1611# CONFIG_LEDS_PCA955X is not set
1612# CONFIG_LEDS_DAC124S085 is not set
1613# CONFIG_LEDS_PWM is not set
1614# CONFIG_LEDS_BD2802 is not set
1615
1616#
1617# LED Triggers
1618#
1619CONFIG_LEDS_TRIGGERS=y
1620CONFIG_LEDS_TRIGGER_TIMER=y
1621CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1622CONFIG_LEDS_TRIGGER_BACKLIGHT=y
1623CONFIG_LEDS_TRIGGER_GPIO=y
1624CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
1625
1626#
1627# iptables trigger is under Netfilter config (LED target)
1628#
1629CONFIG_RTC_LIB=y
1630CONFIG_RTC_CLASS=y
1631CONFIG_RTC_HCTOSYS=y
1632CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1633# CONFIG_RTC_DEBUG is not set
1634
1635#
1636# RTC interfaces
1637#
1638CONFIG_RTC_INTF_SYSFS=y
1639CONFIG_RTC_INTF_PROC=y
1640CONFIG_RTC_INTF_DEV=y
1641CONFIG_RTC_INTF_DEV_UIE_EMUL=y
1642# CONFIG_RTC_DRV_TEST is not set
1643
1644#
1645# I2C RTC drivers
1646#
1647# CONFIG_RTC_DRV_DS1307 is not set
1648# CONFIG_RTC_DRV_DS1374 is not set
1649# CONFIG_RTC_DRV_DS1672 is not set
1650# CONFIG_RTC_DRV_MAX6900 is not set
1651# CONFIG_RTC_DRV_RS5C372 is not set
1652# CONFIG_RTC_DRV_ISL1208 is not set
1653# CONFIG_RTC_DRV_X1205 is not set
1654# CONFIG_RTC_DRV_PCF8563 is not set
1655# CONFIG_RTC_DRV_PCF8583 is not set
1656# CONFIG_RTC_DRV_M41T80 is not set
1657# CONFIG_RTC_DRV_S35390A is not set
1658# CONFIG_RTC_DRV_FM3130 is not set
1659# CONFIG_RTC_DRV_RX8581 is not set
1660
1661#
1662# SPI RTC drivers
1663#
1664# CONFIG_RTC_DRV_M41T94 is not set
1665# CONFIG_RTC_DRV_DS1305 is not set
1666# CONFIG_RTC_DRV_DS1390 is not set
1667# CONFIG_RTC_DRV_MAX6902 is not set
1668# CONFIG_RTC_DRV_R9701 is not set
1669# CONFIG_RTC_DRV_RS5C348 is not set
1670# CONFIG_RTC_DRV_DS3234 is not set
1671
1672#
1673# Platform RTC drivers
1674#
1675# CONFIG_RTC_DRV_CMOS is not set
1676# CONFIG_RTC_DRV_DS1286 is not set
1677# CONFIG_RTC_DRV_DS1511 is not set
1678# CONFIG_RTC_DRV_DS1553 is not set
1679# CONFIG_RTC_DRV_DS1742 is not set
1680# CONFIG_RTC_DRV_STK17TA8 is not set
1681# CONFIG_RTC_DRV_M48T86 is not set
1682# CONFIG_RTC_DRV_M48T35 is not set
1683# CONFIG_RTC_DRV_M48T59 is not set
1684# CONFIG_RTC_DRV_BQ4802 is not set
1685# CONFIG_RTC_DRV_V3020 is not set
1686
1687#
1688# on-CPU RTC drivers
1689#
1690CONFIG_RTC_DRV_S3C=y
1691CONFIG_DMADEVICES=y
1692
1693#
1694# DMA Devices
1695#
1696# CONFIG_AUXDISPLAY is not set
1697# CONFIG_REGULATOR is not set
1698# CONFIG_UIO is not set
1699# CONFIG_STAGING is not set
1700
1701#
1702# File systems
1703#
1704CONFIG_EXT2_FS=m
1705CONFIG_EXT2_FS_XATTR=y
1706CONFIG_EXT2_FS_POSIX_ACL=y
1707CONFIG_EXT2_FS_SECURITY=y
1708# CONFIG_EXT2_FS_XIP is not set
1709CONFIG_EXT3_FS=y
1710# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1711CONFIG_EXT3_FS_XATTR=y
1712CONFIG_EXT3_FS_POSIX_ACL=y
1713CONFIG_EXT3_FS_SECURITY=y
1714# CONFIG_EXT4_FS is not set
1715CONFIG_JBD=y
1716# CONFIG_JBD_DEBUG is not set
1717CONFIG_FS_MBCACHE=y
1718# CONFIG_REISERFS_FS is not set
1719# CONFIG_JFS_FS is not set
1720CONFIG_FS_POSIX_ACL=y
1721CONFIG_FILE_LOCKING=y
1722# CONFIG_XFS_FS is not set
1723# CONFIG_GFS2_FS is not set
1724# CONFIG_OCFS2_FS is not set
1725# CONFIG_BTRFS_FS is not set
1726CONFIG_DNOTIFY=y
1727CONFIG_INOTIFY=y
1728CONFIG_INOTIFY_USER=y
1729# CONFIG_QUOTA is not set
1730CONFIG_AUTOFS_FS=y
1731CONFIG_AUTOFS4_FS=y
1732# CONFIG_FUSE_FS is not set
1733CONFIG_GENERIC_ACL=y
1734
1735#
1736# Caches
1737#
1738# CONFIG_FSCACHE is not set
1739
1740#
1741# CD-ROM/DVD Filesystems
1742#
1743# CONFIG_ISO9660_FS is not set
1744# CONFIG_UDF_FS is not set
1745
1746#
1747# DOS/FAT/NT Filesystems
1748#
1749CONFIG_FAT_FS=y
1750CONFIG_MSDOS_FS=y
1751CONFIG_VFAT_FS=y
1752CONFIG_FAT_DEFAULT_CODEPAGE=437
1753CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1754# CONFIG_NTFS_FS is not set
1755
1756#
1757# Pseudo filesystems
1758#
1759CONFIG_PROC_FS=y
1760CONFIG_PROC_SYSCTL=y
1761CONFIG_PROC_PAGE_MONITOR=y
1762CONFIG_SYSFS=y
1763CONFIG_TMPFS=y
1764CONFIG_TMPFS_POSIX_ACL=y
1765# CONFIG_HUGETLB_PAGE is not set
1766CONFIG_CONFIGFS_FS=m
1767CONFIG_MISC_FILESYSTEMS=y
1768# CONFIG_ADFS_FS is not set
1769# CONFIG_AFFS_FS is not set
1770# CONFIG_ECRYPT_FS is not set
1771# CONFIG_HFS_FS is not set
1772# CONFIG_HFSPLUS_FS is not set
1773# CONFIG_BEFS_FS is not set
1774# CONFIG_BFS_FS is not set
1775# CONFIG_EFS_FS is not set
1776CONFIG_JFFS2_FS=y
1777CONFIG_JFFS2_FS_DEBUG=0
1778CONFIG_JFFS2_FS_WRITEBUFFER=y
1779# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1780# CONFIG_JFFS2_SUMMARY is not set
1781# CONFIG_JFFS2_FS_XATTR is not set
1782# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1783CONFIG_JFFS2_ZLIB=y
1784# CONFIG_JFFS2_LZO is not set
1785CONFIG_JFFS2_RTIME=y
1786# CONFIG_JFFS2_RUBIN is not set
1787CONFIG_CRAMFS=y
1788# CONFIG_SQUASHFS is not set
1789# CONFIG_VXFS_FS is not set
1790# CONFIG_MINIX_FS is not set
1791# CONFIG_OMFS_FS is not set
1792# CONFIG_HPFS_FS is not set
1793# CONFIG_QNX4FS_FS is not set
1794CONFIG_ROMFS_FS=y
1795# CONFIG_ROMFS_BACKED_BY_BLOCK is not set
1796# CONFIG_ROMFS_BACKED_BY_MTD is not set
1797CONFIG_ROMFS_BACKED_BY_BOTH=y
1798CONFIG_ROMFS_ON_BLOCK=y
1799CONFIG_ROMFS_ON_MTD=y
1800# CONFIG_SYSV_FS is not set
1801# CONFIG_UFS_FS is not set
1802# CONFIG_NILFS2_FS is not set
1803CONFIG_NETWORK_FILESYSTEMS=y
1804CONFIG_NFS_FS=y
1805CONFIG_NFS_V3=y
1806CONFIG_NFS_V3_ACL=y
1807CONFIG_NFS_V4=y
1808CONFIG_ROOT_NFS=y
1809# CONFIG_NFSD is not set
1810CONFIG_LOCKD=y
1811CONFIG_LOCKD_V4=y
1812CONFIG_NFS_ACL_SUPPORT=y
1813CONFIG_NFS_COMMON=y
1814CONFIG_SUNRPC=y
1815CONFIG_SUNRPC_GSS=y
1816CONFIG_RPCSEC_GSS_KRB5=y
1817# CONFIG_RPCSEC_GSS_SPKM3 is not set
1818# CONFIG_SMB_FS is not set
1819# CONFIG_CIFS is not set
1820# CONFIG_NCP_FS is not set
1821# CONFIG_CODA_FS is not set
1822# CONFIG_AFS_FS is not set
1823
1824#
1825# Partition Types
1826#
1827CONFIG_PARTITION_ADVANCED=y
1828# CONFIG_ACORN_PARTITION is not set
1829# CONFIG_OSF_PARTITION is not set
1830# CONFIG_AMIGA_PARTITION is not set
1831# CONFIG_ATARI_PARTITION is not set
1832# CONFIG_MAC_PARTITION is not set
1833CONFIG_MSDOS_PARTITION=y
1834CONFIG_BSD_DISKLABEL=y
1835CONFIG_MINIX_SUBPARTITION=y
1836CONFIG_SOLARIS_X86_PARTITION=y
1837CONFIG_UNIXWARE_DISKLABEL=y
1838CONFIG_LDM_PARTITION=y
1839# CONFIG_LDM_DEBUG is not set
1840# CONFIG_SGI_PARTITION is not set
1841# CONFIG_ULTRIX_PARTITION is not set
1842# CONFIG_SUN_PARTITION is not set
1843# CONFIG_KARMA_PARTITION is not set
1844CONFIG_EFI_PARTITION=y
1845# CONFIG_SYSV68_PARTITION is not set
1846CONFIG_NLS=y
1847CONFIG_NLS_DEFAULT="cp437"
1848CONFIG_NLS_CODEPAGE_437=m
1849CONFIG_NLS_CODEPAGE_737=m
1850CONFIG_NLS_CODEPAGE_775=m
1851CONFIG_NLS_CODEPAGE_850=m
1852CONFIG_NLS_CODEPAGE_852=m
1853CONFIG_NLS_CODEPAGE_855=m
1854CONFIG_NLS_CODEPAGE_857=m
1855CONFIG_NLS_CODEPAGE_860=m
1856CONFIG_NLS_CODEPAGE_861=m
1857CONFIG_NLS_CODEPAGE_862=m
1858CONFIG_NLS_CODEPAGE_863=m
1859CONFIG_NLS_CODEPAGE_864=m
1860CONFIG_NLS_CODEPAGE_865=m
1861CONFIG_NLS_CODEPAGE_866=m
1862CONFIG_NLS_CODEPAGE_869=m
1863CONFIG_NLS_CODEPAGE_936=m
1864CONFIG_NLS_CODEPAGE_950=m
1865CONFIG_NLS_CODEPAGE_932=m
1866CONFIG_NLS_CODEPAGE_949=m
1867CONFIG_NLS_CODEPAGE_874=m
1868CONFIG_NLS_ISO8859_8=m
1869CONFIG_NLS_CODEPAGE_1250=m
1870CONFIG_NLS_CODEPAGE_1251=m
1871CONFIG_NLS_ASCII=m
1872CONFIG_NLS_ISO8859_1=m
1873CONFIG_NLS_ISO8859_2=m
1874CONFIG_NLS_ISO8859_3=m
1875CONFIG_NLS_ISO8859_4=m
1876CONFIG_NLS_ISO8859_5=m
1877CONFIG_NLS_ISO8859_6=m
1878CONFIG_NLS_ISO8859_7=m
1879CONFIG_NLS_ISO8859_9=m
1880CONFIG_NLS_ISO8859_13=m
1881CONFIG_NLS_ISO8859_14=m
1882CONFIG_NLS_ISO8859_15=m
1883CONFIG_NLS_KOI8_R=m
1884CONFIG_NLS_KOI8_U=m
1885CONFIG_NLS_UTF8=m
1886# CONFIG_DLM is not set
1887
1888#
1889# Kernel hacking
1890#
1891# CONFIG_PRINTK_TIME is not set
1892# CONFIG_ENABLE_WARN_DEPRECATED is not set
1893# CONFIG_ENABLE_MUST_CHECK is not set
1894CONFIG_FRAME_WARN=1024
1895# CONFIG_MAGIC_SYSRQ is not set
1896# CONFIG_UNUSED_SYMBOLS is not set
1897CONFIG_DEBUG_FS=y
1898# CONFIG_HEADERS_CHECK is not set
1899CONFIG_DEBUG_KERNEL=y
1900# CONFIG_DEBUG_SHIRQ is not set
1901CONFIG_DETECT_SOFTLOCKUP=y
1902# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1903CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1904CONFIG_DETECT_HUNG_TASK=y
1905# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
1906CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
1907# CONFIG_SCHED_DEBUG is not set
1908# CONFIG_SCHEDSTATS is not set
1909# CONFIG_TIMER_STATS is not set
1910# CONFIG_DEBUG_OBJECTS is not set
1911# CONFIG_SLUB_DEBUG_ON is not set
1912# CONFIG_SLUB_STATS is not set
1913# CONFIG_DEBUG_RT_MUTEXES is not set
1914# CONFIG_RT_MUTEX_TESTER is not set
1915# CONFIG_DEBUG_SPINLOCK is not set
1916# CONFIG_DEBUG_MUTEXES is not set
1917# CONFIG_DEBUG_LOCK_ALLOC is not set
1918# CONFIG_PROVE_LOCKING is not set
1919# CONFIG_LOCK_STAT is not set
1920# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1921# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1922# CONFIG_DEBUG_KOBJECT is not set
1923CONFIG_DEBUG_BUGVERBOSE=y
1924CONFIG_DEBUG_INFO=y
1925# CONFIG_DEBUG_VM is not set
1926# CONFIG_DEBUG_WRITECOUNT is not set
1927CONFIG_DEBUG_MEMORY_INIT=y
1928# CONFIG_DEBUG_LIST is not set
1929# CONFIG_DEBUG_SG is not set
1930# CONFIG_DEBUG_NOTIFIERS is not set
1931# CONFIG_BOOT_PRINTK_DELAY is not set
1932# CONFIG_RCU_TORTURE_TEST is not set
1933# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1934# CONFIG_BACKTRACE_SELF_TEST is not set
1935# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1936# CONFIG_FAULT_INJECTION is not set
1937# CONFIG_LATENCYTOP is not set
1938CONFIG_SYSCTL_SYSCALL_CHECK=y
1939# CONFIG_PAGE_POISONING is not set
1940CONFIG_HAVE_FUNCTION_TRACER=y
1941CONFIG_TRACING_SUPPORT=y
1942
1943#
1944# Tracers
1945#
1946# CONFIG_FUNCTION_TRACER is not set
1947# CONFIG_SCHED_TRACER is not set
1948# CONFIG_CONTEXT_SWITCH_TRACER is not set
1949# CONFIG_EVENT_TRACER is not set
1950# CONFIG_BOOT_TRACER is not set
1951# CONFIG_TRACE_BRANCH_PROFILING is not set
1952# CONFIG_STACK_TRACER is not set
1953# CONFIG_KMEMTRACE is not set
1954# CONFIG_WORKQUEUE_TRACER is not set
1955# CONFIG_BLK_DEV_IO_TRACE is not set
1956# CONFIG_DYNAMIC_DEBUG is not set
1957# CONFIG_SAMPLES is not set
1958CONFIG_HAVE_ARCH_KGDB=y
1959# CONFIG_KGDB is not set
1960CONFIG_ARM_UNWIND=y
1961CONFIG_DEBUG_USER=y
1962# CONFIG_DEBUG_ERRORS is not set
1963# CONFIG_DEBUG_STACK_USAGE is not set
1964# CONFIG_DEBUG_LL is not set
1965CONFIG_DEBUG_S3C_UART=0
1966
1967#
1968# Security options
1969#
1970CONFIG_KEYS=y
1971# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
1972# CONFIG_SECURITY is not set
1973# CONFIG_SECURITYFS is not set
1974CONFIG_SECURITY_FILE_CAPABILITIES=y
1975CONFIG_CRYPTO=y
1976
1977#
1978# Crypto core or helper
1979#
1980CONFIG_CRYPTO_FIPS=y
1981CONFIG_CRYPTO_ALGAPI=y
1982CONFIG_CRYPTO_ALGAPI2=y
1983CONFIG_CRYPTO_AEAD=m
1984CONFIG_CRYPTO_AEAD2=y
1985CONFIG_CRYPTO_BLKCIPHER=y
1986CONFIG_CRYPTO_BLKCIPHER2=y
1987CONFIG_CRYPTO_HASH=y
1988CONFIG_CRYPTO_HASH2=y
1989CONFIG_CRYPTO_RNG=m
1990CONFIG_CRYPTO_RNG2=y
1991CONFIG_CRYPTO_PCOMP=y
1992CONFIG_CRYPTO_MANAGER=y
1993CONFIG_CRYPTO_MANAGER2=y
1994CONFIG_CRYPTO_GF128MUL=m
1995CONFIG_CRYPTO_NULL=m
1996CONFIG_CRYPTO_WORKQUEUE=y
1997CONFIG_CRYPTO_CRYPTD=m
1998CONFIG_CRYPTO_AUTHENC=m
1999CONFIG_CRYPTO_TEST=m
2000
2001#
2002# Authenticated Encryption with Associated Data
2003#
2004CONFIG_CRYPTO_CCM=m
2005CONFIG_CRYPTO_GCM=m
2006CONFIG_CRYPTO_SEQIV=m
2007
2008#
2009# Block modes
2010#
2011CONFIG_CRYPTO_CBC=y
2012CONFIG_CRYPTO_CTR=m
2013CONFIG_CRYPTO_CTS=m
2014CONFIG_CRYPTO_ECB=y
2015CONFIG_CRYPTO_LRW=m
2016CONFIG_CRYPTO_PCBC=m
2017CONFIG_CRYPTO_XTS=m
2018
2019#
2020# Hash modes
2021#
2022CONFIG_CRYPTO_HMAC=y
2023CONFIG_CRYPTO_XCBC=m
2024
2025#
2026# Digest
2027#
2028CONFIG_CRYPTO_CRC32C=m
2029CONFIG_CRYPTO_MD4=m
2030CONFIG_CRYPTO_MD5=y
2031CONFIG_CRYPTO_MICHAEL_MIC=y
2032CONFIG_CRYPTO_RMD128=m
2033CONFIG_CRYPTO_RMD160=m
2034CONFIG_CRYPTO_RMD256=m
2035CONFIG_CRYPTO_RMD320=m
2036CONFIG_CRYPTO_SHA1=m
2037CONFIG_CRYPTO_SHA256=m
2038CONFIG_CRYPTO_SHA512=m
2039CONFIG_CRYPTO_TGR192=m
2040CONFIG_CRYPTO_WP512=m
2041
2042#
2043# Ciphers
2044#
2045CONFIG_CRYPTO_AES=y
2046CONFIG_CRYPTO_ANUBIS=m
2047CONFIG_CRYPTO_ARC4=y
2048CONFIG_CRYPTO_BLOWFISH=m
2049CONFIG_CRYPTO_CAMELLIA=m
2050CONFIG_CRYPTO_CAST5=m
2051CONFIG_CRYPTO_CAST6=m
2052CONFIG_CRYPTO_DES=y
2053CONFIG_CRYPTO_FCRYPT=m
2054CONFIG_CRYPTO_KHAZAD=m
2055CONFIG_CRYPTO_SALSA20=m
2056CONFIG_CRYPTO_SEED=m
2057CONFIG_CRYPTO_SERPENT=m
2058CONFIG_CRYPTO_TEA=m
2059CONFIG_CRYPTO_TWOFISH=m
2060CONFIG_CRYPTO_TWOFISH_COMMON=m
2061
2062#
2063# Compression
2064#
2065CONFIG_CRYPTO_DEFLATE=m
2066CONFIG_CRYPTO_ZLIB=m
2067CONFIG_CRYPTO_LZO=m
2068
2069#
2070# Random Number Generation
2071#
2072CONFIG_CRYPTO_ANSI_CPRNG=m
2073CONFIG_CRYPTO_HW=y
2074# CONFIG_BINARY_PRINTF is not set
2075
2076#
2077# Library routines
2078#
2079CONFIG_BITREVERSE=y
2080CONFIG_GENERIC_FIND_LAST_BIT=y
2081CONFIG_CRC_CCITT=m
2082CONFIG_CRC16=m
2083CONFIG_CRC_T10DIF=y
2084CONFIG_CRC_ITU_T=y
2085CONFIG_CRC32=y
2086CONFIG_CRC7=y
2087CONFIG_LIBCRC32C=m
2088CONFIG_ZLIB_INFLATE=y
2089CONFIG_ZLIB_DEFLATE=y
2090CONFIG_LZO_COMPRESS=m
2091CONFIG_LZO_DECOMPRESS=m
2092CONFIG_DECOMPRESS_GZIP=y
2093CONFIG_DECOMPRESS_BZIP2=y
2094CONFIG_DECOMPRESS_LZMA=y
2095CONFIG_HAS_IOMEM=y
2096CONFIG_HAS_DMA=y
2097CONFIG_NLATTR=y
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 94cc58ef61ae..0e97b8cb77d5 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -389,6 +389,8 @@
389#define __NR_inotify_init1 (__NR_SYSCALL_BASE+360) 389#define __NR_inotify_init1 (__NR_SYSCALL_BASE+360)
390#define __NR_preadv (__NR_SYSCALL_BASE+361) 390#define __NR_preadv (__NR_SYSCALL_BASE+361)
391#define __NR_pwritev (__NR_SYSCALL_BASE+362) 391#define __NR_pwritev (__NR_SYSCALL_BASE+362)
392#define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363)
393#define __NR_perf_counter_open (__NR_SYSCALL_BASE+364)
392 394
393/* 395/*
394 * The following SWIs are ARM private. 396 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 1680e9e9c831..f776e72a4cb8 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -372,6 +372,8 @@
372/* 360 */ CALL(sys_inotify_init1) 372/* 360 */ CALL(sys_inotify_init1)
373 CALL(sys_preadv) 373 CALL(sys_preadv)
374 CALL(sys_pwritev) 374 CALL(sys_pwritev)
375 CALL(sys_rt_tgsigqueueinfo)
376 CALL(sys_perf_counter_open)
375#ifndef syscalls_counted 377#ifndef syscalls_counted
376.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 378.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
377#define syscalls_counted 379#define syscalls_counted
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 6874c7dca75a..096f600dc8d8 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -167,7 +167,7 @@ void __init init_IRQ(void)
167 167
168#ifdef CONFIG_SMP 168#ifdef CONFIG_SMP
169 cpumask_setall(bad_irq_desc.affinity); 169 cpumask_setall(bad_irq_desc.affinity);
170 bad_irq_desc.cpu = smp_processor_id(); 170 bad_irq_desc.node = smp_processor_id();
171#endif 171#endif
172 init_arch_irq(); 172 init_arch_irq();
173} 173}
@@ -176,7 +176,7 @@ void __init init_IRQ(void)
176 176
177static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu) 177static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
178{ 178{
179 pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->cpu, cpu); 179 pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->node, cpu);
180 180
181 spin_lock_irq(&desc->lock); 181 spin_lock_irq(&desc->lock);
182 desc->chip->set_affinity(irq, cpumask_of(cpu)); 182 desc->chip->set_affinity(irq, cpumask_of(cpu));
@@ -195,7 +195,7 @@ void migrate_irqs(void)
195 for (i = 0; i < NR_IRQS; i++) { 195 for (i = 0; i < NR_IRQS; i++) {
196 struct irq_desc *desc = irq_desc + i; 196 struct irq_desc *desc = irq_desc + i;
197 197
198 if (desc->cpu == cpu) { 198 if (desc->node == cpu) {
199 unsigned int newcpu = cpumask_any_and(desc->affinity, 199 unsigned int newcpu = cpumask_any_and(desc->affinity,
200 cpu_online_mask); 200 cpu_online_mask);
201 if (newcpu >= nr_cpu_ids) { 201 if (newcpu >= nr_cpu_ids) {
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 1585423699ee..39196dff478c 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -114,9 +114,6 @@ void arm_machine_restart(char mode, const char *cmd)
114/* 114/*
115 * Function pointers to optional machine specific functions 115 * Function pointers to optional machine specific functions
116 */ 116 */
117void (*pm_idle)(void);
118EXPORT_SYMBOL(pm_idle);
119
120void (*pm_power_off)(void); 117void (*pm_power_off)(void);
121EXPORT_SYMBOL(pm_power_off); 118EXPORT_SYMBOL(pm_power_off);
122 119
@@ -130,20 +127,19 @@ EXPORT_SYMBOL_GPL(arm_pm_restart);
130 */ 127 */
131static void default_idle(void) 128static void default_idle(void)
132{ 129{
133 if (hlt_counter) 130 if (!need_resched())
134 cpu_relax(); 131 arch_idle();
135 else { 132 local_irq_enable();
136 local_irq_disable();
137 if (!need_resched())
138 arch_idle();
139 local_irq_enable();
140 }
141} 133}
142 134
135void (*pm_idle)(void) = default_idle;
136EXPORT_SYMBOL(pm_idle);
137
143/* 138/*
144 * The idle thread. We try to conserve power, while trying to keep 139 * The idle thread, has rather strange semantics for calling pm_idle,
145 * overall latency low. The architecture specific idle is passed 140 * but this is what x86 does and we need to do the same, so that
146 * a value to indicate the level of "idleness" of the system. 141 * things like cpuidle get called in the same way. The only difference
142 * is that we always respect 'hlt_counter' to prevent low power idle.
147 */ 143 */
148void cpu_idle(void) 144void cpu_idle(void)
149{ 145{
@@ -151,21 +147,31 @@ void cpu_idle(void)
151 147
152 /* endless idle loop with no priority at all */ 148 /* endless idle loop with no priority at all */
153 while (1) { 149 while (1) {
154 void (*idle)(void) = pm_idle; 150 tick_nohz_stop_sched_tick(1);
155 151 leds_event(led_idle_start);
152 while (!need_resched()) {
156#ifdef CONFIG_HOTPLUG_CPU 153#ifdef CONFIG_HOTPLUG_CPU
157 if (cpu_is_offline(smp_processor_id())) { 154 if (cpu_is_offline(smp_processor_id()))
158 leds_event(led_idle_start); 155 cpu_die();
159 cpu_die();
160 }
161#endif 156#endif
162 157
163 if (!idle) 158 local_irq_disable();
164 idle = default_idle; 159 if (hlt_counter) {
165 leds_event(led_idle_start); 160 local_irq_enable();
166 tick_nohz_stop_sched_tick(1); 161 cpu_relax();
167 while (!need_resched()) 162 } else {
168 idle(); 163 stop_critical_timings();
164 pm_idle();
165 start_critical_timings();
166 /*
167 * This will eventually be removed - pm_idle
168 * functions should always return with IRQs
169 * enabled.
170 */
171 WARN_ON(irqs_disabled());
172 local_irq_enable();
173 }
174 }
169 leds_event(led_idle_end); 175 leds_event(led_idle_end);
170 tick_nohz_restart_sched_tick(); 176 tick_nohz_restart_sched_tick();
171 preempt_enable_no_resched(); 177 preempt_enable_no_resched();
@@ -352,6 +358,23 @@ asm( ".section .text\n"
352" .size kernel_thread_helper, . - kernel_thread_helper\n" 358" .size kernel_thread_helper, . - kernel_thread_helper\n"
353" .previous"); 359" .previous");
354 360
361#ifdef CONFIG_ARM_UNWIND
362extern void kernel_thread_exit(long code);
363asm( ".section .text\n"
364" .align\n"
365" .type kernel_thread_exit, #function\n"
366"kernel_thread_exit:\n"
367" .fnstart\n"
368" .cantunwind\n"
369" bl do_exit\n"
370" nop\n"
371" .fnend\n"
372" .size kernel_thread_exit, . - kernel_thread_exit\n"
373" .previous");
374#else
375#define kernel_thread_exit do_exit
376#endif
377
355/* 378/*
356 * Create a kernel thread. 379 * Create a kernel thread.
357 */ 380 */
@@ -363,7 +386,7 @@ pid_t kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
363 386
364 regs.ARM_r1 = (unsigned long)arg; 387 regs.ARM_r1 = (unsigned long)arg;
365 regs.ARM_r2 = (unsigned long)fn; 388 regs.ARM_r2 = (unsigned long)fn;
366 regs.ARM_r3 = (unsigned long)do_exit; 389 regs.ARM_r3 = (unsigned long)kernel_thread_exit;
367 regs.ARM_pc = (unsigned long)kernel_thread_helper; 390 regs.ARM_pc = (unsigned long)kernel_thread_helper;
368 regs.ARM_cpsr = SVC_MODE | PSR_ENDSTATE; 391 regs.ARM_cpsr = SVC_MODE | PSR_ENDSTATE;
369 392
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c
index 1dedc2c7ff49..dd56e11f339a 100644
--- a/arch/arm/kernel/unwind.c
+++ b/arch/arm/kernel/unwind.c
@@ -212,7 +212,8 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl)
212 ctrl->vrs[14] = *vsp++; 212 ctrl->vrs[14] = *vsp++;
213 ctrl->vrs[SP] = (unsigned long)vsp; 213 ctrl->vrs[SP] = (unsigned long)vsp;
214 } else if (insn == 0xb0) { 214 } else if (insn == 0xb0) {
215 ctrl->vrs[PC] = ctrl->vrs[LR]; 215 if (ctrl->vrs[PC] == 0)
216 ctrl->vrs[PC] = ctrl->vrs[LR];
216 /* no further processing */ 217 /* no further processing */
217 ctrl->entries = 0; 218 ctrl->entries = 0;
218 } else if (insn == 0xb1) { 219 } else if (insn == 0xb1) {
@@ -309,18 +310,20 @@ int unwind_frame(struct stackframe *frame)
309 } 310 }
310 311
311 while (ctrl.entries > 0) { 312 while (ctrl.entries > 0) {
312 int urc; 313 int urc = unwind_exec_insn(&ctrl);
313
314 if (ctrl.vrs[SP] < low || ctrl.vrs[SP] >= high)
315 return -URC_FAILURE;
316 urc = unwind_exec_insn(&ctrl);
317 if (urc < 0) 314 if (urc < 0)
318 return urc; 315 return urc;
316 if (ctrl.vrs[SP] < low || ctrl.vrs[SP] >= high)
317 return -URC_FAILURE;
319 } 318 }
320 319
321 if (ctrl.vrs[PC] == 0) 320 if (ctrl.vrs[PC] == 0)
322 ctrl.vrs[PC] = ctrl.vrs[LR]; 321 ctrl.vrs[PC] = ctrl.vrs[LR];
323 322
323 /* check for infinite loop */
324 if (frame->pc == ctrl.vrs[PC])
325 return -URC_FAILURE;
326
324 frame->fp = ctrl.vrs[FP]; 327 frame->fp = ctrl.vrs[FP];
325 frame->sp = ctrl.vrs[SP]; 328 frame->sp = ctrl.vrs[SP];
326 frame->lr = ctrl.vrs[LR]; 329 frame->lr = ctrl.vrs[LR];
@@ -332,7 +335,6 @@ int unwind_frame(struct stackframe *frame)
332void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk) 335void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk)
333{ 336{
334 struct stackframe frame; 337 struct stackframe frame;
335 unsigned long high, low;
336 register unsigned long current_sp asm ("sp"); 338 register unsigned long current_sp asm ("sp");
337 339
338 pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk); 340 pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
@@ -362,9 +364,6 @@ void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk)
362 frame.pc = thread_saved_pc(tsk); 364 frame.pc = thread_saved_pc(tsk);
363 } 365 }
364 366
365 low = frame.sp & ~(THREAD_SIZE - 1);
366 high = low + THREAD_SIZE;
367
368 while (1) { 367 while (1) {
369 int urc; 368 int urc;
370 unsigned long where = frame.pc; 369 unsigned long where = frame.pc;
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 6c0779792546..4340bf3d2c84 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -84,6 +84,14 @@ SECTIONS
84 *(.exitcall.exit) 84 *(.exitcall.exit)
85 *(.ARM.exidx.exit.text) 85 *(.ARM.exidx.exit.text)
86 *(.ARM.extab.exit.text) 86 *(.ARM.extab.exit.text)
87#ifndef CONFIG_HOTPLUG_CPU
88 *(.ARM.exidx.cpuexit.text)
89 *(.ARM.extab.cpuexit.text)
90#endif
91#ifndef CONFIG_HOTPLUG
92 *(.ARM.exidx.devexit.text)
93 *(.ARM.extab.devexit.text)
94#endif
87#ifndef CONFIG_MMU 95#ifndef CONFIG_MMU
88 *(.fixup) 96 *(.fixup)
89 *(__ex_table) 97 *(__ex_table)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index ba528f85749c..b0665f161c03 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -302,7 +302,7 @@ int omap2_wait_clock_ready(void __iomem *reg, u32 mask, const char *name)
302 udelay(1); 302 udelay(1);
303 } 303 }
304 304
305 if (i < MAX_CLOCK_ENABLE_WAIT) 305 if (i <= MAX_CLOCK_ENABLE_WAIT)
306 pr_debug("Clock %s stable after %d loops\n", name, i); 306 pr_debug("Clock %s stable after %d loops\n", name, i);
307 else 307 else
308 printk(KERN_ERR "Clock %s didn't enable in %d tries\n", 308 printk(KERN_ERR "Clock %s didn't enable in %d tries\n",
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 9e43fe5209d3..045da923e75b 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -286,6 +286,20 @@ static struct omap_clk omap34xx_clks[] = {
286 286
287#define MIN_SDRC_DLL_LOCK_FREQ 83000000 287#define MIN_SDRC_DLL_LOCK_FREQ 83000000
288 288
289#define CYCLES_PER_MHZ 1000000
290
291/* Scale factor for fixed-point arith in omap3_core_dpll_m2_set_rate() */
292#define SDRC_MPURATE_SCALE 8
293
294/* 2^SDRC_MPURATE_BASE_SHIFT: MPU MHz that SDRC_MPURATE_LOOPS is defined for */
295#define SDRC_MPURATE_BASE_SHIFT 9
296
297/*
298 * SDRC_MPURATE_LOOPS: Number of MPU loops to execute at
299 * 2^MPURATE_BASE_SHIFT MHz for SDRC to stabilize
300 */
301#define SDRC_MPURATE_LOOPS 96
302
289/** 303/**
290 * omap3_dpll_recalc - recalculate DPLL rate 304 * omap3_dpll_recalc - recalculate DPLL rate
291 * @clk: DPLL struct clk 305 * @clk: DPLL struct clk
@@ -709,7 +723,8 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
709{ 723{
710 u32 new_div = 0; 724 u32 new_div = 0;
711 u32 unlock_dll = 0; 725 u32 unlock_dll = 0;
712 unsigned long validrate, sdrcrate; 726 u32 c;
727 unsigned long validrate, sdrcrate, mpurate;
713 struct omap_sdrc_params *sp; 728 struct omap_sdrc_params *sp;
714 729
715 if (!clk || !rate) 730 if (!clk || !rate)
@@ -718,18 +733,15 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
718 if (clk != &dpll3_m2_ck) 733 if (clk != &dpll3_m2_ck)
719 return -EINVAL; 734 return -EINVAL;
720 735
721 if (rate == clk->rate)
722 return 0;
723
724 validrate = omap2_clksel_round_rate_div(clk, rate, &new_div); 736 validrate = omap2_clksel_round_rate_div(clk, rate, &new_div);
725 if (validrate != rate) 737 if (validrate != rate)
726 return -EINVAL; 738 return -EINVAL;
727 739
728 sdrcrate = sdrc_ick.rate; 740 sdrcrate = sdrc_ick.rate;
729 if (rate > clk->rate) 741 if (rate > clk->rate)
730 sdrcrate <<= ((rate / clk->rate) - 1); 742 sdrcrate <<= ((rate / clk->rate) >> 1);
731 else 743 else
732 sdrcrate >>= ((clk->rate / rate) - 1); 744 sdrcrate >>= ((clk->rate / rate) >> 1);
733 745
734 sp = omap2_sdrc_get_params(sdrcrate); 746 sp = omap2_sdrc_get_params(sdrcrate);
735 if (!sp) 747 if (!sp)
@@ -740,17 +752,25 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
740 unlock_dll = 1; 752 unlock_dll = 1;
741 } 753 }
742 754
755 /*
756 * XXX This only needs to be done when the CPU frequency changes
757 */
758 mpurate = arm_fck.rate / CYCLES_PER_MHZ;
759 c = (mpurate << SDRC_MPURATE_SCALE) >> SDRC_MPURATE_BASE_SHIFT;
760 c += 1; /* for safety */
761 c *= SDRC_MPURATE_LOOPS;
762 c >>= SDRC_MPURATE_SCALE;
763 if (c == 0)
764 c = 1;
765
743 pr_debug("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate, 766 pr_debug("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate,
744 validrate); 767 validrate);
745 pr_debug("clock: SDRC timing params used: %08x %08x %08x\n", 768 pr_debug("clock: SDRC timing params used: %08x %08x %08x\n",
746 sp->rfr_ctrl, sp->actim_ctrla, sp->actim_ctrlb); 769 sp->rfr_ctrl, sp->actim_ctrla, sp->actim_ctrlb);
747 770
748 /* REVISIT: SRAM code doesn't support other M2 divisors yet */
749 WARN_ON(new_div != 1 && new_div != 2);
750
751 /* REVISIT: Add SDRC_MR changing to this code also */
752 omap3_configure_core_dpll(sp->rfr_ctrl, sp->actim_ctrla, 771 omap3_configure_core_dpll(sp->rfr_ctrl, sp->actim_ctrla,
753 sp->actim_ctrlb, new_div, unlock_dll); 772 sp->actim_ctrlb, new_div, unlock_dll, c,
773 sp->mr, rate > clk->rate);
754 774
755 return 0; 775 return 0;
756} 776}
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 32afd9448216..3a86b0f66031 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -21,6 +21,7 @@
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/clk.h>
24 25
25#include <asm/tlb.h> 26#include <asm/tlb.h>
26 27
@@ -241,6 +242,40 @@ void __init omap2_map_common_io(void)
241 omapfb_reserve_sdram(); 242 omapfb_reserve_sdram();
242} 243}
243 244
245/*
246 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
247 *
248 * Sets the CORE DPLL3 M2 divider to the same value that it's at
249 * currently. This has the effect of setting the SDRC SDRAM AC timing
250 * registers to the values currently defined by the kernel. Currently
251 * only defined for OMAP3; will return 0 if called on OMAP2. Returns
252 * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
253 * or passes along the return value of clk_set_rate().
254 */
255static int __init _omap2_init_reprogram_sdrc(void)
256{
257 struct clk *dpll3_m2_ck;
258 int v = -EINVAL;
259 long rate;
260
261 if (!cpu_is_omap34xx())
262 return 0;
263
264 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
265 if (!dpll3_m2_ck)
266 return -EINVAL;
267
268 rate = clk_get_rate(dpll3_m2_ck);
269 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
270 v = clk_set_rate(dpll3_m2_ck, rate);
271 if (v)
272 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
273
274 clk_put(dpll3_m2_ck);
275
276 return v;
277}
278
244void __init omap2_init_common_hw(struct omap_sdrc_params *sp) 279void __init omap2_init_common_hw(struct omap_sdrc_params *sp)
245{ 280{
246 omap2_mux_init(); 281 omap2_mux_init();
@@ -249,6 +284,7 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sp)
249 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); 284 clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
250 omap2_clk_init(); 285 omap2_clk_init();
251 omap2_sdrc_init(sp); 286 omap2_sdrc_init(sp);
287 _omap2_init_reprogram_sdrc();
252#endif 288#endif
253 gpmc_init(); 289 gpmc_init();
254} 290}
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 73e2971b1757..983f1cb676be 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -1099,7 +1099,7 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm)
1099 (c++ < PWRDM_TRANSITION_BAILOUT)) 1099 (c++ < PWRDM_TRANSITION_BAILOUT))
1100 udelay(1); 1100 udelay(1);
1101 1101
1102 if (c >= PWRDM_TRANSITION_BAILOUT) { 1102 if (c > PWRDM_TRANSITION_BAILOUT) {
1103 printk(KERN_ERR "powerdomain: waited too long for " 1103 printk(KERN_ERR "powerdomain: waited too long for "
1104 "powerdomain %s to complete transition\n", pwrdm->name); 1104 "powerdomain %s to complete transition\n", pwrdm->name);
1105 return -EAGAIN; 1105 return -EAGAIN;
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S
index c080c82521e1..f41f8d96ddba 100644
--- a/arch/arm/mach-omap2/sram34xx.S
+++ b/arch/arm/mach-omap2/sram34xx.S
@@ -3,13 +3,12 @@
3 * 3 *
4 * Omap3 specific functions that need to be run in internal SRAM 4 * Omap3 specific functions that need to be run in internal SRAM
5 * 5 *
6 * (C) Copyright 2007 6 * Copyright (C) 2004, 2007, 2008 Texas Instruments, Inc.
7 * Texas Instruments Inc. 7 * Copyright (C) 2008 Nokia Corporation
8 * Rajendra Nayak <rnayak@ti.com>
9 * 8 *
10 * (C) Copyright 2004 9 * Rajendra Nayak <rnayak@ti.com>
11 * Texas Instruments, <www.ti.com>
12 * Richard Woodruff <r-woodruff2@ti.com> 10 * Richard Woodruff <r-woodruff2@ti.com>
11 * Paul Walmsley
13 * 12 *
14 * This program is free software; you can redistribute it and/or 13 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as 14 * modify it under the terms of the GNU General Public License as
@@ -37,61 +36,112 @@
37 36
38 .text 37 .text
39 38
39/* r4 parameters */
40#define SDRC_NO_UNLOCK_DLL 0x0
41#define SDRC_UNLOCK_DLL 0x1
42
43/* SDRC_DLLA_CTRL bit settings */
44#define FIXEDDELAY_SHIFT 24
45#define FIXEDDELAY_MASK (0xff << FIXEDDELAY_SHIFT)
46#define DLLIDLE_MASK 0x4
47
48/*
49 * SDRC_DLLA_CTRL default values: TI hardware team indicates that
50 * FIXEDDELAY should be initialized to 0xf. This apparently was
51 * empirically determined during process testing, so no derivation
52 * was provided.
53 */
54#define FIXEDDELAY_DEFAULT (0x0f << FIXEDDELAY_SHIFT)
55
56/* SDRC_DLLA_STATUS bit settings */
57#define LOCKSTATUS_MASK 0x4
58
59/* SDRC_POWER bit settings */
60#define SRFRONIDLEREQ_MASK 0x40
61#define PWDENA_MASK 0x4
62
63/* CM_IDLEST1_CORE bit settings */
64#define ST_SDRC_MASK 0x2
65
66/* CM_ICLKEN1_CORE bit settings */
67#define EN_SDRC_MASK 0x2
68
69/* CM_CLKSEL1_PLL bit settings */
70#define CORE_DPLL_CLKOUT_DIV_SHIFT 0x1b
71
40/* 72/*
41 * Change frequency of core dpll 73 * omap3_sram_configure_core_dpll - change DPLL3 M2 divider
42 * r0 = sdrc_rfr_ctrl r1 = sdrc_actim_ctrla r2 = sdrc_actim_ctrlb r3 = M2 74 * r0 = new SDRC_RFR_CTRL register contents
43 * r4 = Unlock SDRC DLL? (1 = yes, 0 = no) -- only unlock DLL for 75 * r1 = new SDRC_ACTIM_CTRLA register contents
76 * r2 = new SDRC_ACTIM_CTRLB register contents
77 * r3 = new M2 divider setting (only 1 and 2 supported right now)
78 * r4 = unlock SDRC DLL? (1 = yes, 0 = no). Only unlock DLL for
44 * SDRC rates < 83MHz 79 * SDRC rates < 83MHz
80 * r5 = number of MPU cycles to wait for SDRC to stabilize after
81 * reprogramming the SDRC when switching to a slower MPU speed
82 * r6 = new SDRC_MR_0 register value
83 * r7 = increasing SDRC rate? (1 = yes, 0 = no)
84 *
45 */ 85 */
46ENTRY(omap3_sram_configure_core_dpll) 86ENTRY(omap3_sram_configure_core_dpll)
47 stmfd sp!, {r1-r12, lr} @ store regs to stack 87 stmfd sp!, {r1-r12, lr} @ store regs to stack
48 ldr r4, [sp, #52] @ pull extra args off the stack 88 ldr r4, [sp, #52] @ pull extra args off the stack
89 ldr r5, [sp, #56] @ load extra args from the stack
90 ldr r6, [sp, #60] @ load extra args from the stack
91 ldr r7, [sp, #64] @ load extra args from the stack
49 dsb @ flush buffered writes to interconnect 92 dsb @ flush buffered writes to interconnect
50 cmp r3, #0x2 93 cmp r7, #1 @ if increasing SDRC clk rate,
51 blne configure_sdrc 94 bleq configure_sdrc @ program the SDRC regs early (for RFR)
52 cmp r4, #0x1 95 cmp r4, #SDRC_UNLOCK_DLL @ set the intended DLL state
53 bleq unlock_dll 96 bleq unlock_dll
54 blne lock_dll 97 blne lock_dll
55 bl sdram_in_selfrefresh @ put the SDRAM in self refresh 98 bl sdram_in_selfrefresh @ put SDRAM in self refresh, idle SDRC
56 bl configure_core_dpll 99 bl configure_core_dpll @ change the DPLL3 M2 divider
57 bl enable_sdrc 100 bl enable_sdrc @ take SDRC out of idle
58 cmp r4, #0x1 101 cmp r4, #SDRC_UNLOCK_DLL @ wait for DLL status to change
59 bleq wait_dll_unlock 102 bleq wait_dll_unlock
60 blne wait_dll_lock 103 blne wait_dll_lock
61 cmp r3, #0x1 104 cmp r7, #1 @ if increasing SDRC clk rate,
62 blne configure_sdrc 105 beq return_to_sdram @ return to SDRAM code, otherwise,
106 bl configure_sdrc @ reprogram SDRC regs now
107 mov r12, r5
108 bl wait_clk_stable @ wait for SDRC to stabilize
109return_to_sdram:
63 isb @ prevent speculative exec past here 110 isb @ prevent speculative exec past here
64 mov r0, #0 @ return value 111 mov r0, #0 @ return value
65 ldmfd sp!, {r1-r12, pc} @ restore regs and return 112 ldmfd sp!, {r1-r12, pc} @ restore regs and return
66unlock_dll: 113unlock_dll:
67 ldr r11, omap3_sdrc_dlla_ctrl 114 ldr r11, omap3_sdrc_dlla_ctrl
68 ldr r12, [r11] 115 ldr r12, [r11]
69 orr r12, r12, #0x4 116 and r12, r12, #FIXEDDELAY_MASK
117 orr r12, r12, #FIXEDDELAY_DEFAULT
118 orr r12, r12, #DLLIDLE_MASK
70 str r12, [r11] @ (no OCP barrier needed) 119 str r12, [r11] @ (no OCP barrier needed)
71 bx lr 120 bx lr
72lock_dll: 121lock_dll:
73 ldr r11, omap3_sdrc_dlla_ctrl 122 ldr r11, omap3_sdrc_dlla_ctrl
74 ldr r12, [r11] 123 ldr r12, [r11]
75 bic r12, r12, #0x4 124 bic r12, r12, #DLLIDLE_MASK
76 str r12, [r11] @ (no OCP barrier needed) 125 str r12, [r11] @ (no OCP barrier needed)
77 bx lr 126 bx lr
78sdram_in_selfrefresh: 127sdram_in_selfrefresh:
79 ldr r11, omap3_sdrc_power @ read the SDRC_POWER register 128 ldr r11, omap3_sdrc_power @ read the SDRC_POWER register
80 ldr r12, [r11] @ read the contents of SDRC_POWER 129 ldr r12, [r11] @ read the contents of SDRC_POWER
81 mov r9, r12 @ keep a copy of SDRC_POWER bits 130 mov r9, r12 @ keep a copy of SDRC_POWER bits
82 orr r12, r12, #0x40 @ enable self refresh on idle req 131 orr r12, r12, #SRFRONIDLEREQ_MASK @ enable self refresh on idle
83 bic r12, r12, #0x4 @ clear PWDENA 132 bic r12, r12, #PWDENA_MASK @ clear PWDENA
84 str r12, [r11] @ write back to SDRC_POWER register 133 str r12, [r11] @ write back to SDRC_POWER register
85 ldr r12, [r11] @ posted-write barrier for SDRC 134 ldr r12, [r11] @ posted-write barrier for SDRC
135idle_sdrc:
86 ldr r11, omap3_cm_iclken1_core @ read the CM_ICLKEN1_CORE reg 136 ldr r11, omap3_cm_iclken1_core @ read the CM_ICLKEN1_CORE reg
87 ldr r12, [r11] 137 ldr r12, [r11]
88 bic r12, r12, #0x2 @ disable iclk bit for SDRC 138 bic r12, r12, #EN_SDRC_MASK @ disable iclk bit for SDRC
89 str r12, [r11] 139 str r12, [r11]
90wait_sdrc_idle: 140wait_sdrc_idle:
91 ldr r11, omap3_cm_idlest1_core 141 ldr r11, omap3_cm_idlest1_core
92 ldr r12, [r11] 142 ldr r12, [r11]
93 and r12, r12, #0x2 @ check for SDRC idle 143 and r12, r12, #ST_SDRC_MASK @ check for SDRC idle
94 cmp r12, #2 144 cmp r12, #ST_SDRC_MASK
95 bne wait_sdrc_idle 145 bne wait_sdrc_idle
96 bx lr 146 bx lr
97configure_core_dpll: 147configure_core_dpll:
@@ -99,36 +149,23 @@ configure_core_dpll:
99 ldr r12, [r11] 149 ldr r12, [r11]
100 ldr r10, core_m2_mask_val @ modify m2 for core dpll 150 ldr r10, core_m2_mask_val @ modify m2 for core dpll
101 and r12, r12, r10 151 and r12, r12, r10
102 orr r12, r12, r3, lsl #0x1B @ r3 contains the M2 val 152 orr r12, r12, r3, lsl #CORE_DPLL_CLKOUT_DIV_SHIFT
103 str r12, [r11] 153 str r12, [r11]
104 ldr r12, [r11] @ posted-write barrier for CM 154 ldr r12, [r11] @ posted-write barrier for CM
105 mov r12, #0x800 @ wait for the clock to stabilise
106 cmp r3, #2
107 bne wait_clk_stable
108 bx lr 155 bx lr
109wait_clk_stable: 156wait_clk_stable:
110 subs r12, r12, #1 157 subs r12, r12, #1
111 bne wait_clk_stable 158 bne wait_clk_stable
112 nop
113 nop
114 nop
115 nop
116 nop
117 nop
118 nop
119 nop
120 nop
121 nop
122 bx lr 159 bx lr
123enable_sdrc: 160enable_sdrc:
124 ldr r11, omap3_cm_iclken1_core 161 ldr r11, omap3_cm_iclken1_core
125 ldr r12, [r11] 162 ldr r12, [r11]
126 orr r12, r12, #0x2 @ enable iclk bit for SDRC 163 orr r12, r12, #EN_SDRC_MASK @ enable iclk bit for SDRC
127 str r12, [r11] 164 str r12, [r11]
128wait_sdrc_idle1: 165wait_sdrc_idle1:
129 ldr r11, omap3_cm_idlest1_core 166 ldr r11, omap3_cm_idlest1_core
130 ldr r12, [r11] 167 ldr r12, [r11]
131 and r12, r12, #0x2 168 and r12, r12, #ST_SDRC_MASK
132 cmp r12, #0 169 cmp r12, #0
133 bne wait_sdrc_idle1 170 bne wait_sdrc_idle1
134restore_sdrc_power_val: 171restore_sdrc_power_val:
@@ -138,14 +175,14 @@ restore_sdrc_power_val:
138wait_dll_lock: 175wait_dll_lock:
139 ldr r11, omap3_sdrc_dlla_status 176 ldr r11, omap3_sdrc_dlla_status
140 ldr r12, [r11] 177 ldr r12, [r11]
141 and r12, r12, #0x4 178 and r12, r12, #LOCKSTATUS_MASK
142 cmp r12, #0x4 179 cmp r12, #LOCKSTATUS_MASK
143 bne wait_dll_lock 180 bne wait_dll_lock
144 bx lr 181 bx lr
145wait_dll_unlock: 182wait_dll_unlock:
146 ldr r11, omap3_sdrc_dlla_status 183 ldr r11, omap3_sdrc_dlla_status
147 ldr r12, [r11] 184 ldr r12, [r11]
148 and r12, r12, #0x4 185 and r12, r12, #LOCKSTATUS_MASK
149 cmp r12, #0x0 186 cmp r12, #0x0
150 bne wait_dll_unlock 187 bne wait_dll_unlock
151 bx lr 188 bx lr
@@ -156,7 +193,9 @@ configure_sdrc:
156 str r1, [r11] 193 str r1, [r11]
157 ldr r11, omap3_sdrc_actim_ctrlb 194 ldr r11, omap3_sdrc_actim_ctrlb
158 str r2, [r11] 195 str r2, [r11]
159 ldr r2, [r11] @ posted-write barrier for SDRC 196 ldr r11, omap3_sdrc_mr_0
197 str r6, [r11]
198 ldr r6, [r11] @ posted-write barrier for SDRC
160 bx lr 199 bx lr
161 200
162omap3_sdrc_power: 201omap3_sdrc_power:
@@ -173,6 +212,8 @@ omap3_sdrc_actim_ctrla:
173 .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_A_0) 212 .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_A_0)
174omap3_sdrc_actim_ctrlb: 213omap3_sdrc_actim_ctrlb:
175 .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_B_0) 214 .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_B_0)
215omap3_sdrc_mr_0:
216 .word OMAP34XX_SDRC_REGADDR(SDRC_MR_0)
176omap3_sdrc_dlla_status: 217omap3_sdrc_dlla_status:
177 .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS) 218 .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
178omap3_sdrc_dlla_ctrl: 219omap3_sdrc_dlla_ctrl:
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 6f3f77d031d0..d78731edebb6 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -200,6 +200,6 @@ void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
200 200
201int __init orion5x_setup_sram_win(void) 201int __init orion5x_setup_sram_win(void)
202{ 202{
203 return setup_cpu_win(win_alloc_count, ORION5X_SRAM_PHYS_BASE, 203 return setup_cpu_win(win_alloc_count++, ORION5X_SRAM_PHYS_BASE,
204 ORION5X_SRAM_SIZE, TARGET_SRAM, ATTR_SRAM, -1); 204 ORION5X_SRAM_SIZE, TARGET_SRAM, ATTR_SRAM, -1);
205} 205}
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index eafcc49009ea..f87fa1253803 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -562,7 +562,7 @@ static struct platform_device orion5x_crypto_device = {
562 .resource = orion5x_crypto_res, 562 .resource = orion5x_crypto_res,
563}; 563};
564 564
565int __init orion5x_crypto_init(void) 565static int __init orion5x_crypto_init(void)
566{ 566{
567 int ret; 567 int ret;
568 568
@@ -697,6 +697,14 @@ void __init orion5x_init(void)
697 } 697 }
698 698
699 /* 699 /*
700 * The 5082/5181l/5182/6082/6082l/6183 have crypto
701 * while 5180n/5181/5281 don't have crypto.
702 */
703 if ((dev == MV88F5181_DEV_ID && rev >= MV88F5181L_REV_A0) ||
704 dev == MV88F5182_DEV_ID || dev == MV88F6183_DEV_ID)
705 orion5x_crypto_init();
706
707 /*
700 * Register watchdog driver 708 * Register watchdog driver
701 */ 709 */
702 orion5x_wdt_init(); 710 orion5x_wdt_init();
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index de483e83edd7..8f004503c96d 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -38,7 +38,6 @@ void orion5x_spi_init(void);
38void orion5x_uart0_init(void); 38void orion5x_uart0_init(void);
39void orion5x_uart1_init(void); 39void orion5x_uart1_init(void);
40void orion5x_xor_init(void); 40void orion5x_xor_init(void);
41int orion5x_crypto_init(void);
42 41
43/* 42/*
44 * PCIe/PCI functions. 43 * PCIe/PCI functions.
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index f4533f8ff4e8..89c992b8f75b 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -401,6 +401,16 @@ config MACH_PALMZ72
401 Say Y here if you intend to run this kernel on Palm Zire 72 401 Say Y here if you intend to run this kernel on Palm Zire 72
402 handheld computer. 402 handheld computer.
403 403
404config MACH_TREO680
405 bool "Palm Treo 680"
406 default y
407 depends on ARCH_PXA_PALM
408 select PXA27x
409 select IWMMXT
410 help
411 Say Y here if you intend to run this kernel on Palm Treo 680
412 smartphone.
413
404config MACH_PALMLD 414config MACH_PALMLD
405 bool "Palm LifeDrive" 415 bool "Palm LifeDrive"
406 default y 416 default y
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index d18ffef44b8c..d4c6122a342f 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_MACH_PALMT5) += palmt5.o
62obj-$(CONFIG_MACH_PALMTX) += palmtx.o 62obj-$(CONFIG_MACH_PALMTX) += palmtx.o
63obj-$(CONFIG_MACH_PALMLD) += palmld.o 63obj-$(CONFIG_MACH_PALMLD) += palmld.o
64obj-$(CONFIG_MACH_PALMZ72) += palmz72.o 64obj-$(CONFIG_MACH_PALMZ72) += palmz72.o
65obj-$(CONFIG_MACH_TREO680) += treo680.o
65obj-$(CONFIG_ARCH_VIPER) += viper.o 66obj-$(CONFIG_ARCH_VIPER) += viper.o
66 67
67ifeq ($(CONFIG_MACH_ZYLONITE),y) 68ifeq ($(CONFIG_MACH_ZYLONITE),y)
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 962dda2e154a..5363e1aea3fb 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -23,6 +23,7 @@
23#include <linux/pm.h> 23#include <linux/pm.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/backlight.h> 25#include <linux/backlight.h>
26#include <linux/i2c.h>
26#include <linux/io.h> 27#include <linux/io.h>
27#include <linux/spi/spi.h> 28#include <linux/spi/spi.h>
28#include <linux/spi/ads7846.h> 29#include <linux/spi/ads7846.h>
@@ -600,6 +601,10 @@ static struct platform_device *devices[] __initdata = {
600 &sharpsl_rom_device, 601 &sharpsl_rom_device,
601}; 602};
602 603
604static struct i2c_board_info __initdata corgi_i2c_devices[] = {
605 { I2C_BOARD_INFO("wm8731", 0x1b) },
606};
607
603static void corgi_poweroff(void) 608static void corgi_poweroff(void)
604{ 609{
605 if (!machine_is_corgi()) 610 if (!machine_is_corgi())
@@ -634,6 +639,7 @@ static void __init corgi_init(void)
634 pxa_set_mci_info(&corgi_mci_platform_data); 639 pxa_set_mci_info(&corgi_mci_platform_data);
635 pxa_set_ficp_info(&corgi_ficp_platform_data); 640 pxa_set_ficp_info(&corgi_ficp_platform_data);
636 pxa_set_i2c_info(NULL); 641 pxa_set_i2c_info(NULL);
642 i2c_register_board_info(0, ARRAY_AND_SIZE(corgi_i2c_devices));
637 643
638 platform_scoop_config = &corgi_pcmcia_config; 644 platform_scoop_config = &corgi_pcmcia_config;
639 645
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 243e0802b5f4..63b10d9bb1d3 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -30,6 +30,7 @@
30#include <linux/apm-emulation.h> 30#include <linux/apm-emulation.h>
31#include <linux/i2c.h> 31#include <linux/i2c.h>
32#include <linux/i2c/pca953x.h> 32#include <linux/i2c/pca953x.h>
33#include <linux/regulator/userspace-consumer.h>
33 34
34#include <media/soc_camera.h> 35#include <media/soc_camera.h>
35 36
@@ -735,6 +736,7 @@ static struct pxa2xx_spi_chip em_x270_libertas_chip = {
735 .rx_threshold = 1, 736 .rx_threshold = 1,
736 .tx_threshold = 1, 737 .tx_threshold = 1,
737 .timeout = 1000, 738 .timeout = 1000,
739 .gpio_cs = 14,
738}; 740};
739 741
740static unsigned long em_x270_libertas_pin_config[] = { 742static unsigned long em_x270_libertas_pin_config[] = {
@@ -803,7 +805,6 @@ static int em_x270_libertas_teardown(struct spi_device *spi)
803 805
804struct libertas_spi_platform_data em_x270_libertas_pdata = { 806struct libertas_spi_platform_data em_x270_libertas_pdata = {
805 .use_dummy_writes = 1, 807 .use_dummy_writes = 1,
806 .gpio_cs = 14,
807 .setup = em_x270_libertas_setup, 808 .setup = em_x270_libertas_setup,
808 .teardown = em_x270_libertas_teardown, 809 .teardown = em_x270_libertas_teardown,
809}; 810};
@@ -838,10 +839,14 @@ static void __init em_x270_init_spi(void)
838static inline void em_x270_init_spi(void) {} 839static inline void em_x270_init_spi(void) {}
839#endif 840#endif
840 841
841#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE) 842#if defined(CONFIG_SND_PXA2XX_LIB_AC97)
843static pxa2xx_audio_ops_t em_x270_ac97_info = {
844 .reset_gpio = 113,
845};
846
842static void __init em_x270_init_ac97(void) 847static void __init em_x270_init_ac97(void)
843{ 848{
844 pxa_set_ac97_info(NULL); 849 pxa_set_ac97_info(&em_x270_ac97_info);
845} 850}
846#else 851#else
847static inline void em_x270_init_ac97(void) {} 852static inline void em_x270_init_ac97(void) {}
@@ -1038,6 +1043,52 @@ static void __init em_x270_init_camera(void)
1038static inline void em_x270_init_camera(void) {} 1043static inline void em_x270_init_camera(void) {}
1039#endif 1044#endif
1040 1045
1046static struct regulator_bulk_data em_x270_gps_consumer_supply = {
1047 .supply = "vcc gps",
1048};
1049
1050static struct regulator_userspace_consumer_data em_x270_gps_consumer_data = {
1051 .name = "vcc gps",
1052 .num_supplies = 1,
1053 .supplies = &em_x270_gps_consumer_supply,
1054};
1055
1056static struct platform_device em_x270_gps_userspace_consumer = {
1057 .name = "reg-userspace-consumer",
1058 .id = 0,
1059 .dev = {
1060 .platform_data = &em_x270_gps_consumer_data,
1061 },
1062};
1063
1064static struct regulator_bulk_data em_x270_gprs_consumer_supply = {
1065 .supply = "vcc gprs",
1066};
1067
1068static struct regulator_userspace_consumer_data em_x270_gprs_consumer_data = {
1069 .name = "vcc gprs",
1070 .num_supplies = 1,
1071 .supplies = &em_x270_gprs_consumer_supply
1072};
1073
1074static struct platform_device em_x270_gprs_userspace_consumer = {
1075 .name = "reg-userspace-consumer",
1076 .id = 1,
1077 .dev = {
1078 .platform_data = &em_x270_gprs_consumer_data,
1079 }
1080};
1081
1082static struct platform_device *em_x270_userspace_consumers[] = {
1083 &em_x270_gps_userspace_consumer,
1084 &em_x270_gprs_userspace_consumer,
1085};
1086
1087static void __init em_x270_userspace_consumers_init(void)
1088{
1089 platform_add_devices(ARRAY_AND_SIZE(em_x270_userspace_consumers));
1090}
1091
1041/* DA9030 related initializations */ 1092/* DA9030 related initializations */
1042#define REGULATOR_CONSUMER(_name, _dev, _supply) \ 1093#define REGULATOR_CONSUMER(_name, _dev, _supply) \
1043 static struct regulator_consumer_supply _name##_consumers[] = { \ 1094 static struct regulator_consumer_supply _name##_consumers[] = { \
@@ -1047,11 +1098,11 @@ static inline void em_x270_init_camera(void) {}
1047 }, \ 1098 }, \
1048 } 1099 }
1049 1100
1050REGULATOR_CONSUMER(ldo3, NULL, "vcc gps"); 1101REGULATOR_CONSUMER(ldo3, &em_x270_gps_userspace_consumer.dev, "vcc gps");
1051REGULATOR_CONSUMER(ldo5, NULL, "vcc cam"); 1102REGULATOR_CONSUMER(ldo5, NULL, "vcc cam");
1052REGULATOR_CONSUMER(ldo10, &pxa_device_mci.dev, "vcc sdio"); 1103REGULATOR_CONSUMER(ldo10, &pxa_device_mci.dev, "vcc sdio");
1053REGULATOR_CONSUMER(ldo12, NULL, "vcc usb"); 1104REGULATOR_CONSUMER(ldo12, NULL, "vcc usb");
1054REGULATOR_CONSUMER(ldo19, NULL, "vcc gprs"); 1105REGULATOR_CONSUMER(ldo19, &em_x270_gprs_userspace_consumer.dev, "vcc gprs");
1055 1106
1056#define REGULATOR_INIT(_ldo, _min_uV, _max_uV, _ops_mask) \ 1107#define REGULATOR_INIT(_ldo, _min_uV, _max_uV, _ops_mask) \
1057 static struct regulator_init_data _ldo##_data = { \ 1108 static struct regulator_init_data _ldo##_data = { \
@@ -1062,6 +1113,7 @@ REGULATOR_CONSUMER(ldo19, NULL, "vcc gprs");
1062 .enabled = 0, \ 1113 .enabled = 0, \
1063 }, \ 1114 }, \
1064 .valid_ops_mask = _ops_mask, \ 1115 .valid_ops_mask = _ops_mask, \
1116 .apply_uV = 1, \
1065 }, \ 1117 }, \
1066 .num_consumer_supplies = ARRAY_SIZE(_ldo##_consumers), \ 1118 .num_consumer_supplies = ARRAY_SIZE(_ldo##_consumers), \
1067 .consumer_supplies = _ldo##_consumers, \ 1119 .consumer_supplies = _ldo##_consumers, \
@@ -1240,6 +1292,7 @@ static void __init em_x270_init(void)
1240 em_x270_init_spi(); 1292 em_x270_init_spi();
1241 em_x270_init_i2c(); 1293 em_x270_init_i2c();
1242 em_x270_init_camera(); 1294 em_x270_init_camera();
1295 em_x270_userspace_consumers_init();
1243} 1296}
1244 1297
1245MACHINE_START(EM_X270, "Compulab EM-X270") 1298MACHINE_START(EM_X270, "Compulab EM-X270")
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 7fff467e84fc..81359d574f88 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -30,6 +30,7 @@
30#include <linux/pwm_backlight.h> 30#include <linux/pwm_backlight.h>
31#include <linux/regulator/bq24022.h> 31#include <linux/regulator/bq24022.h>
32#include <linux/regulator/machine.h> 32#include <linux/regulator/machine.h>
33#include <linux/regulator/max1586.h>
33#include <linux/spi/ads7846.h> 34#include <linux/spi/ads7846.h>
34#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
35#include <linux/usb/gpio_vbus.h> 36#include <linux/usb/gpio_vbus.h>
@@ -775,6 +776,45 @@ static struct platform_device strataflash = {
775}; 776};
776 777
777/* 778/*
779 * Maxim MAX1587A on PI2C
780 */
781
782static struct regulator_consumer_supply max1587a_consumer = {
783 .supply = "vcc_core",
784};
785
786static struct regulator_init_data max1587a_v3_info = {
787 .constraints = {
788 .name = "vcc_core range",
789 .min_uV = 900000,
790 .max_uV = 1705000,
791 .always_on = 1,
792 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
793 },
794 .num_consumer_supplies = 1,
795 .consumer_supplies = &max1587a_consumer,
796};
797
798static struct max1586_subdev_data max1587a_subdev = {
799 .name = "vcc_core",
800 .id = MAX1586_V3,
801 .platform_data = &max1587a_v3_info,
802};
803
804static struct max1586_platform_data max1587a_info = {
805 .num_subdevs = 1,
806 .subdevs = &max1587a_subdev,
807 .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
808};
809
810static struct i2c_board_info __initdata pi2c_board_info[] = {
811 {
812 I2C_BOARD_INFO("max1586", 0x14),
813 .platform_data = &max1587a_info,
814 },
815};
816
817/*
778 * PCMCIA 818 * PCMCIA
779 */ 819 */
780 820
@@ -828,6 +868,7 @@ static void __init hx4700_init(void)
828 pxa_set_ficp_info(&ficp_info); 868 pxa_set_ficp_info(&ficp_info);
829 pxa27x_set_i2c_power_info(NULL); 869 pxa27x_set_i2c_power_info(NULL);
830 pxa_set_i2c_info(NULL); 870 pxa_set_i2c_info(NULL);
871 i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
831 pxa2xx_set_spi_info(2, &pxa_ssp2_master_info); 872 pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
832 spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info)); 873 spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
833 874
diff --git a/arch/arm/mach-pxa/include/mach/palmz72.h b/arch/arm/mach-pxa/include/mach/palmz72.h
index 5032307ebf7d..2806ef69ba5a 100644
--- a/arch/arm/mach-pxa/include/mach/palmz72.h
+++ b/arch/arm/mach-pxa/include/mach/palmz72.h
@@ -21,7 +21,7 @@
21/* SD/MMC */ 21/* SD/MMC */
22#define GPIO_NR_PALMZ72_SD_DETECT_N 14 22#define GPIO_NR_PALMZ72_SD_DETECT_N 14
23#define GPIO_NR_PALMZ72_SD_POWER_N 98 23#define GPIO_NR_PALMZ72_SD_POWER_N 98
24#define GPIO_NR_PALMZ72_SD_RO 115 24#define GPIO_NR_PALMZ72_SD_RO 115
25 25
26/* Touchscreen */ 26/* Touchscreen */
27#define GPIO_NR_PALMZ72_WM9712_IRQ 27 27#define GPIO_NR_PALMZ72_WM9712_IRQ 27
@@ -31,8 +31,7 @@
31 31
32/* USB */ 32/* USB */
33#define GPIO_NR_PALMZ72_USB_DETECT_N 15 33#define GPIO_NR_PALMZ72_USB_DETECT_N 15
34#define GPIO_NR_PALMZ72_USB_POWER 95 34#define GPIO_NR_PALMZ72_USB_PULLUP 95
35#define GPIO_NR_PALMZ72_USB_PULLUP 12
36 35
37/* LCD/Backlight */ 36/* LCD/Backlight */
38#define GPIO_NR_PALMZ72_BL_POWER 20 37#define GPIO_NR_PALMZ72_BL_POWER 20
diff --git a/arch/arm/mach-pxa/include/mach/treo680.h b/arch/arm/mach-pxa/include/mach/treo680.h
new file mode 100644
index 000000000000..af443b24d99a
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/treo680.h
@@ -0,0 +1,49 @@
1/*
2 * GPIOs and interrupts for Palm Treo 680 smartphone
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 */
9
10#ifndef _INCLUDE_TREO680_H_
11#define _INCLUDE_TREO680_H_
12
13/* GPIOs */
14#define GPIO_NR_TREO680_POWER_DETECT 0
15#define GPIO_NR_TREO680_AMP_EN 27
16#define GPIO_NR_TREO680_KEYB_BL 24
17#define GPIO_NR_TREO680_VIBRATE_EN 44
18#define GPIO_NR_TREO680_GREEN_LED 20
19#define GPIO_NR_TREO680_RED_LED 79
20#define GPIO_NR_TREO680_SD_DETECT_N 113
21#define GPIO_NR_TREO680_SD_READONLY 33
22#define GPIO_NR_TREO680_EP_DETECT_N 116
23#define GPIO_NR_TREO680_SD_POWER 42
24#define GPIO_NR_TREO680_USB_DETECT 1
25#define GPIO_NR_TREO680_USB_PULLUP 114
26#define GPIO_NR_TREO680_GSM_POWER 40
27#define GPIO_NR_TREO680_GSM_RESET 87
28#define GPIO_NR_TREO680_GSM_WAKE 57
29#define GPIO_NR_TREO680_GSM_HOST_WAKE 14
30#define GPIO_NR_TREO680_GSM_TRIGGER 10
31#define GPIO_NR_TREO680_BT_EN 43
32#define GPIO_NR_TREO680_IR_EN 115
33#define GPIO_NR_TREO680_IR_TXD 47
34#define GPIO_NR_TREO680_BL_POWER 38
35#define GPIO_NR_TREO680_LCD_POWER 25
36
37/* Various addresses */
38#define TREO680_PHYS_RAM_START 0xa0000000
39#define TREO680_PHYS_IO_START 0x40000000
40#define TREO680_STR_BASE 0xa2000000
41
42/* BACKLIGHT */
43#define TREO680_MAX_INTENSITY 254
44#define TREO680_DEFAULT_INTENSITY 160
45#define TREO680_LIMIT_MASK 0x7F
46#define TREO680_PRESCALER 63
47#define TREO680_PERIOD_NS 3500
48
49#endif
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index 4dc8c2ec40a9..2d28132c725b 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -37,6 +37,7 @@
37#include <linux/wm97xx_batt.h> 37#include <linux/wm97xx_batt.h>
38#include <linux/mtd/physmap.h> 38#include <linux/mtd/physmap.h>
39#include <linux/usb/gpio_vbus.h> 39#include <linux/usb/gpio_vbus.h>
40#include <linux/regulator/max1586.h>
40 41
41#include <asm/mach-types.h> 42#include <asm/mach-types.h>
42#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
@@ -717,6 +718,38 @@ static struct wm97xx_batt_info mioa701_battery_data = {
717}; 718};
718 719
719/* 720/*
721 * Voltage regulation
722 */
723static struct regulator_consumer_supply max1586_consumers[] = {
724 {
725 .supply = "vcc_core",
726 }
727};
728
729static struct regulator_init_data max1586_v3_info = {
730 .constraints = {
731 .name = "vcc_core range",
732 .min_uV = 1000000,
733 .max_uV = 1705000,
734 .always_on = 1,
735 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
736 },
737 .num_consumer_supplies = ARRAY_SIZE(max1586_consumers),
738 .consumer_supplies = max1586_consumers,
739};
740
741static struct max1586_subdev_data max1586_subdevs[] = {
742 { .name = "vcc_core", .id = MAX1586_V3,
743 .platform_data = &max1586_v3_info },
744};
745
746static struct max1586_platform_data max1586_info = {
747 .subdevs = max1586_subdevs,
748 .num_subdevs = ARRAY_SIZE(max1586_subdevs),
749 .v3_gain = MAX1586_GAIN_NO_R24, /* 700..1475 mV */
750};
751
752/*
720 * Camera interface 753 * Camera interface
721 */ 754 */
722struct pxacamera_platform_data mioa701_pxacamera_platform_data = { 755struct pxacamera_platform_data mioa701_pxacamera_platform_data = {
@@ -725,6 +758,13 @@ struct pxacamera_platform_data mioa701_pxacamera_platform_data = {
725 .mclk_10khz = 5000, 758 .mclk_10khz = 5000,
726}; 759};
727 760
761static struct i2c_board_info __initdata mioa701_pi2c_devices[] = {
762 {
763 I2C_BOARD_INFO("max1586", 0x14),
764 .platform_data = &max1586_info,
765 },
766};
767
728static struct soc_camera_link iclink = { 768static struct soc_camera_link iclink = {
729 .bus_id = 0, /* Must match id in pxa27x_device_camera in device.c */ 769 .bus_id = 0, /* Must match id in pxa27x_device_camera in device.c */
730}; 770};
@@ -825,7 +865,9 @@ static void __init mioa701_machine_init(void)
825 platform_add_devices(devices, ARRAY_SIZE(devices)); 865 platform_add_devices(devices, ARRAY_SIZE(devices));
826 gsm_init(); 866 gsm_init();
827 867
868 i2c_register_board_info(1, ARRAY_AND_SIZE(mioa701_pi2c_devices));
828 pxa_set_i2c_info(&i2c_pdata); 869 pxa_set_i2c_info(&i2c_pdata);
870 pxa27x_set_i2c_power_info(NULL);
829 pxa_set_camera_info(&mioa701_pxacamera_platform_data); 871 pxa_set_camera_info(&mioa701_pxacamera_platform_data);
830 i2c_register_board_info(0, ARRAY_AND_SIZE(mioa701_i2c_devices)); 872 i2c_register_board_info(0, ARRAY_AND_SIZE(mioa701_i2c_devices));
831} 873}
diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c
index b88eb4dd2c84..c3645aa3fa3d 100644
--- a/arch/arm/mach-pxa/palmz72.c
+++ b/arch/arm/mach-pxa/palmz72.c
@@ -27,7 +27,9 @@
27#include <linux/pda_power.h> 27#include <linux/pda_power.h>
28#include <linux/pwm_backlight.h> 28#include <linux/pwm_backlight.h>
29#include <linux/gpio.h> 29#include <linux/gpio.h>
30#include <linux/wm97xx_batt.h>
30#include <linux/power_supply.h> 31#include <linux/power_supply.h>
32#include <linux/usb/gpio_vbus.h>
31 33
32#include <asm/mach-types.h> 34#include <asm/mach-types.h>
33#include <asm/mach/arch.h> 35#include <asm/mach/arch.h>
@@ -41,6 +43,8 @@
41#include <mach/irda.h> 43#include <mach/irda.h>
42#include <mach/pxa27x_keypad.h> 44#include <mach/pxa27x_keypad.h>
43#include <mach/udc.h> 45#include <mach/udc.h>
46#include <mach/palmasoc.h>
47
44#include <mach/pm.h> 48#include <mach/pm.h>
45 49
46#include "generic.h" 50#include "generic.h"
@@ -66,6 +70,8 @@ static unsigned long palmz72_pin_config[] __initdata = {
66 GPIO29_AC97_SDATA_IN_0, 70 GPIO29_AC97_SDATA_IN_0,
67 GPIO30_AC97_SDATA_OUT, 71 GPIO30_AC97_SDATA_OUT,
68 GPIO31_AC97_SYNC, 72 GPIO31_AC97_SYNC,
73 GPIO89_AC97_SYSCLK,
74 GPIO113_AC97_nRESET,
69 75
70 /* IrDA */ 76 /* IrDA */
71 GPIO49_GPIO, /* ir disable */ 77 GPIO49_GPIO, /* ir disable */
@@ -77,8 +83,7 @@ static unsigned long palmz72_pin_config[] __initdata = {
77 83
78 /* USB */ 84 /* USB */
79 GPIO15_GPIO, /* usb detect */ 85 GPIO15_GPIO, /* usb detect */
80 GPIO12_GPIO, /* usb pullup */ 86 GPIO95_GPIO, /* usb pullup */
81 GPIO95_GPIO, /* usb power */
82 87
83 /* Matrix keypad */ 88 /* Matrix keypad */
84 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, 89 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
@@ -355,6 +360,22 @@ static struct platform_device palmz72_leds = {
355}; 360};
356 361
357/****************************************************************************** 362/******************************************************************************
363 * UDC
364 ******************************************************************************/
365static struct gpio_vbus_mach_info palmz72_udc_info = {
366 .gpio_vbus = GPIO_NR_PALMZ72_USB_DETECT_N,
367 .gpio_pullup = GPIO_NR_PALMZ72_USB_PULLUP,
368};
369
370static struct platform_device palmz72_gpio_vbus = {
371 .name = "gpio-vbus",
372 .id = -1,
373 .dev = {
374 .platform_data = &palmz72_udc_info,
375 },
376};
377
378/******************************************************************************
358 * Power supply 379 * Power supply
359 ******************************************************************************/ 380 ******************************************************************************/
360static int power_supply_init(struct device *dev) 381static int power_supply_init(struct device *dev)
@@ -422,6 +443,31 @@ static struct platform_device power_supply = {
422}; 443};
423 444
424/****************************************************************************** 445/******************************************************************************
446 * WM97xx battery
447 ******************************************************************************/
448static struct wm97xx_batt_info wm97xx_batt_pdata = {
449 .batt_aux = WM97XX_AUX_ID3,
450 .temp_aux = WM97XX_AUX_ID2,
451 .charge_gpio = -1,
452 .max_voltage = PALMZ72_BAT_MAX_VOLTAGE,
453 .min_voltage = PALMZ72_BAT_MIN_VOLTAGE,
454 .batt_mult = 1000,
455 .batt_div = 414,
456 .temp_mult = 1,
457 .temp_div = 1,
458 .batt_tech = POWER_SUPPLY_TECHNOLOGY_LIPO,
459 .batt_name = "main-batt",
460};
461
462/******************************************************************************
463 * aSoC audio
464 ******************************************************************************/
465static struct platform_device palmz72_asoc = {
466 .name = "palm27x-asoc",
467 .id = -1,
468};
469
470/******************************************************************************
425 * Framebuffer 471 * Framebuffer
426 ******************************************************************************/ 472 ******************************************************************************/
427static struct pxafb_mode_info palmz72_lcd_modes[] = { 473static struct pxafb_mode_info palmz72_lcd_modes[] = {
@@ -527,17 +573,32 @@ device_initcall(palmz72_pm_init);
527static struct platform_device *devices[] __initdata = { 573static struct platform_device *devices[] __initdata = {
528 &palmz72_backlight, 574 &palmz72_backlight,
529 &palmz72_leds, 575 &palmz72_leds,
576 &palmz72_asoc,
530 &power_supply, 577 &power_supply,
578 &palmz72_gpio_vbus,
531}; 579};
532 580
581/* setup udc GPIOs initial state */
582static void __init palmz72_udc_init(void)
583{
584 if (!gpio_request(GPIO_NR_PALMZ72_USB_PULLUP, "USB Pullup")) {
585 gpio_direction_output(GPIO_NR_PALMZ72_USB_PULLUP, 0);
586 gpio_free(GPIO_NR_PALMZ72_USB_PULLUP);
587 }
588}
589
533static void __init palmz72_init(void) 590static void __init palmz72_init(void)
534{ 591{
535 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config)); 592 pxa2xx_mfp_config(ARRAY_AND_SIZE(palmz72_pin_config));
593
536 set_pxa_fb_info(&palmz72_lcd_screen); 594 set_pxa_fb_info(&palmz72_lcd_screen);
537 pxa_set_mci_info(&palmz72_mci_platform_data); 595 pxa_set_mci_info(&palmz72_mci_platform_data);
596 palmz72_udc_init();
538 pxa_set_ac97_info(NULL); 597 pxa_set_ac97_info(NULL);
539 pxa_set_ficp_info(&palmz72_ficp_platform_data); 598 pxa_set_ficp_info(&palmz72_ficp_platform_data);
540 pxa_set_keypad_info(&palmz72_keypad_platform_data); 599 pxa_set_keypad_info(&palmz72_keypad_platform_data);
600 wm97xx_bat_set_pdata(&wm97xx_batt_pdata);
601
541 platform_add_devices(devices, ARRAY_SIZE(devices)); 602 platform_add_devices(devices, ARRAY_SIZE(devices));
542} 603}
543 604
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index ac431ed10399..9352d4a34837 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -22,6 +22,7 @@
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/mtd/physmap.h> 23#include <linux/mtd/physmap.h>
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/i2c.h>
25#include <linux/spi/spi.h> 26#include <linux/spi/spi.h>
26#include <linux/spi/ads7846.h> 27#include <linux/spi/ads7846.h>
27#include <linux/mtd/sharpsl.h> 28#include <linux/mtd/sharpsl.h>
@@ -486,6 +487,10 @@ static struct platform_device *devices[] __initdata = {
486 &sharpsl_rom_device, 487 &sharpsl_rom_device,
487}; 488};
488 489
490static struct i2c_board_info __initdata poodle_i2c_devices[] = {
491 { I2C_BOARD_INFO("wm8731", 0x1b) },
492};
493
489static void poodle_poweroff(void) 494static void poodle_poweroff(void)
490{ 495{
491 arm_machine_restart('h', NULL); 496 arm_machine_restart('h', NULL);
@@ -519,6 +524,7 @@ static void __init poodle_init(void)
519 pxa_set_mci_info(&poodle_mci_platform_data); 524 pxa_set_mci_info(&poodle_mci_platform_data);
520 pxa_set_ficp_info(&poodle_ficp_platform_data); 525 pxa_set_ficp_info(&poodle_ficp_platform_data);
521 pxa_set_i2c_info(NULL); 526 pxa_set_i2c_info(NULL);
527 i2c_register_board_info(0, ARRAY_AND_SIZE(poodle_i2c_devices));
522 poodle_init_spi(); 528 poodle_init_spi();
523} 529}
524 530
diff --git a/arch/arm/mach-pxa/treo680.c b/arch/arm/mach-pxa/treo680.c
new file mode 100644
index 000000000000..a06f19edebb3
--- /dev/null
+++ b/arch/arm/mach-pxa/treo680.c
@@ -0,0 +1,612 @@
1/*
2 * Hardware definitions for Palm Treo 680
3 *
4 * Author: Tomas Cech <sleep_walker@suse.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * (find more info at www.hackndev.com)
11 *
12 */
13
14#include <linux/platform_device.h>
15#include <linux/delay.h>
16#include <linux/irq.h>
17#include <linux/gpio_keys.h>
18#include <linux/input.h>
19#include <linux/pda_power.h>
20#include <linux/pwm_backlight.h>
21#include <linux/gpio.h>
22#include <linux/wm97xx_batt.h>
23#include <linux/power_supply.h>
24#include <linux/sysdev.h>
25#include <linux/w1-gpio.h>
26
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30
31#include <mach/pxa27x.h>
32#include <mach/pxa27x-udc.h>
33#include <mach/audio.h>
34#include <mach/treo680.h>
35#include <mach/mmc.h>
36#include <mach/pxafb.h>
37#include <mach/irda.h>
38#include <mach/pxa27x_keypad.h>
39#include <mach/udc.h>
40#include <mach/ohci.h>
41#include <mach/pxa2xx-regs.h>
42#include <mach/palmasoc.h>
43#include <mach/camera.h>
44
45#include <sound/pxa2xx-lib.h>
46
47#include "generic.h"
48#include "devices.h"
49
50/******************************************************************************
51 * Pin configuration
52 ******************************************************************************/
53static unsigned long treo680_pin_config[] __initdata = {
54 /* MMC */
55 GPIO32_MMC_CLK,
56 GPIO92_MMC_DAT_0,
57 GPIO109_MMC_DAT_1,
58 GPIO110_MMC_DAT_2,
59 GPIO111_MMC_DAT_3,
60 GPIO112_MMC_CMD,
61 GPIO33_GPIO, /* SD read only */
62 GPIO113_GPIO, /* SD detect */
63
64 /* AC97 */
65 GPIO28_AC97_BITCLK,
66 GPIO29_AC97_SDATA_IN_0,
67 GPIO30_AC97_SDATA_OUT,
68 GPIO31_AC97_SYNC,
69 GPIO89_AC97_SYSCLK,
70 GPIO95_AC97_nRESET,
71
72 /* IrDA */
73 GPIO46_FICP_RXD,
74 GPIO47_FICP_TXD,
75
76 /* PWM */
77 GPIO16_PWM0_OUT,
78
79 /* USB */
80 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, /* usb detect */
81
82 /* MATRIX KEYPAD */
83 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
84 GPIO101_KP_MKIN_1,
85 GPIO102_KP_MKIN_2,
86 GPIO97_KP_MKIN_3,
87 GPIO98_KP_MKIN_4,
88 GPIO99_KP_MKIN_5,
89 GPIO91_KP_MKIN_6,
90 GPIO13_KP_MKIN_7,
91 GPIO103_KP_MKOUT_0 | MFP_LPM_DRIVE_HIGH,
92 GPIO104_KP_MKOUT_1,
93 GPIO105_KP_MKOUT_2,
94 GPIO106_KP_MKOUT_3,
95 GPIO107_KP_MKOUT_4,
96 GPIO108_KP_MKOUT_5,
97 GPIO96_KP_MKOUT_6,
98 GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH, /* Hotsync button */
99
100 /* LCD */
101 GPIO58_LCD_LDD_0,
102 GPIO59_LCD_LDD_1,
103 GPIO60_LCD_LDD_2,
104 GPIO61_LCD_LDD_3,
105 GPIO62_LCD_LDD_4,
106 GPIO63_LCD_LDD_5,
107 GPIO64_LCD_LDD_6,
108 GPIO65_LCD_LDD_7,
109 GPIO66_LCD_LDD_8,
110 GPIO67_LCD_LDD_9,
111 GPIO68_LCD_LDD_10,
112 GPIO69_LCD_LDD_11,
113 GPIO70_LCD_LDD_12,
114 GPIO71_LCD_LDD_13,
115 GPIO72_LCD_LDD_14,
116 GPIO73_LCD_LDD_15,
117 GPIO74_LCD_FCLK,
118 GPIO75_LCD_LCLK,
119 GPIO76_LCD_PCLK,
120
121 /* Quick Capture Interface */
122 GPIO84_CIF_FV,
123 GPIO85_CIF_LV,
124 GPIO53_CIF_MCLK,
125 GPIO54_CIF_PCLK,
126 GPIO81_CIF_DD_0,
127 GPIO55_CIF_DD_1,
128 GPIO51_CIF_DD_2,
129 GPIO50_CIF_DD_3,
130 GPIO52_CIF_DD_4,
131 GPIO48_CIF_DD_5,
132 GPIO17_CIF_DD_6,
133 GPIO12_CIF_DD_7,
134
135 /* I2C */
136 GPIO117_I2C_SCL,
137 GPIO118_I2C_SDA,
138
139 /* GSM */
140 GPIO14_GPIO | WAKEUP_ON_EDGE_BOTH, /* GSM host wake up */
141 GPIO34_FFUART_RXD,
142 GPIO35_FFUART_CTS,
143 GPIO39_FFUART_TXD,
144 GPIO41_FFUART_RTS,
145
146 /* MISC. */
147 GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, /* external power detect */
148 GPIO15_GPIO | WAKEUP_ON_EDGE_BOTH, /* silent switch */
149 GPIO116_GPIO, /* headphone detect */
150 GPIO11_GPIO | WAKEUP_ON_EDGE_BOTH, /* bluetooth host wake up */
151};
152
153/******************************************************************************
154 * SD/MMC card controller
155 ******************************************************************************/
156static int treo680_mci_init(struct device *dev,
157 irq_handler_t treo680_detect_int, void *data)
158{
159 int err = 0;
160
161 /* Setup an interrupt for detecting card insert/remove events */
162 err = gpio_request(GPIO_NR_TREO680_SD_DETECT_N, "SD IRQ");
163
164 if (err)
165 goto err;
166
167 err = gpio_direction_input(GPIO_NR_TREO680_SD_DETECT_N);
168 if (err)
169 goto err2;
170
171 err = request_irq(gpio_to_irq(GPIO_NR_TREO680_SD_DETECT_N),
172 treo680_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
173 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
174 "SD/MMC card detect", data);
175
176 if (err) {
177 dev_err(dev, "%s: cannot request SD/MMC card detect IRQ\n",
178 __func__);
179 goto err2;
180 }
181
182 err = gpio_request(GPIO_NR_TREO680_SD_POWER, "SD_POWER");
183 if (err)
184 goto err3;
185
186 err = gpio_direction_output(GPIO_NR_TREO680_SD_POWER, 1);
187 if (err)
188 goto err4;
189
190 err = gpio_request(GPIO_NR_TREO680_SD_READONLY, "SD_READONLY");
191 if (err)
192 goto err4;
193
194 err = gpio_direction_input(GPIO_NR_TREO680_SD_READONLY);
195 if (err)
196 goto err5;
197
198 return 0;
199
200err5:
201 gpio_free(GPIO_NR_TREO680_SD_READONLY);
202err4:
203 gpio_free(GPIO_NR_TREO680_SD_POWER);
204err3:
205 free_irq(gpio_to_irq(GPIO_NR_TREO680_SD_DETECT_N), data);
206err2:
207 gpio_free(GPIO_NR_TREO680_SD_DETECT_N);
208err:
209 return err;
210}
211
212static void treo680_mci_exit(struct device *dev, void *data)
213{
214 gpio_free(GPIO_NR_TREO680_SD_READONLY);
215 gpio_free(GPIO_NR_TREO680_SD_POWER);
216 free_irq(gpio_to_irq(GPIO_NR_TREO680_SD_DETECT_N), data);
217 gpio_free(GPIO_NR_TREO680_SD_DETECT_N);
218}
219
220static void treo680_mci_power(struct device *dev, unsigned int vdd)
221{
222 struct pxamci_platform_data *p_d = dev->platform_data;
223 gpio_set_value(GPIO_NR_TREO680_SD_POWER, p_d->ocr_mask & (1 << vdd));
224}
225
226static int treo680_mci_get_ro(struct device *dev)
227{
228 return gpio_get_value(GPIO_NR_TREO680_SD_READONLY);
229}
230
231static struct pxamci_platform_data treo680_mci_platform_data = {
232 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
233 .setpower = treo680_mci_power,
234 .get_ro = treo680_mci_get_ro,
235 .init = treo680_mci_init,
236 .exit = treo680_mci_exit,
237};
238
239/******************************************************************************
240 * GPIO keyboard
241 ******************************************************************************/
242static unsigned int treo680_matrix_keys[] = {
243 KEY(0, 0, KEY_F8), /* Red/Off/Power */
244 KEY(0, 1, KEY_LEFT),
245 KEY(0, 2, KEY_LEFTCTRL), /* Alternate */
246 KEY(0, 3, KEY_L),
247 KEY(0, 4, KEY_A),
248 KEY(0, 5, KEY_Q),
249 KEY(0, 6, KEY_P),
250
251 KEY(1, 0, KEY_RIGHTCTRL), /* Menu */
252 KEY(1, 1, KEY_RIGHT),
253 KEY(1, 2, KEY_LEFTSHIFT), /* Left shift */
254 KEY(1, 3, KEY_Z),
255 KEY(1, 4, KEY_S),
256 KEY(1, 5, KEY_W),
257
258 KEY(2, 0, KEY_F1), /* Phone */
259 KEY(2, 1, KEY_UP),
260 KEY(2, 2, KEY_0),
261 KEY(2, 3, KEY_X),
262 KEY(2, 4, KEY_D),
263 KEY(2, 5, KEY_E),
264
265 KEY(3, 0, KEY_F10), /* Calendar */
266 KEY(3, 1, KEY_DOWN),
267 KEY(3, 2, KEY_SPACE),
268 KEY(3, 3, KEY_C),
269 KEY(3, 4, KEY_F),
270 KEY(3, 5, KEY_R),
271
272 KEY(4, 0, KEY_F12), /* Mail */
273 KEY(4, 1, KEY_KPENTER),
274 KEY(4, 2, KEY_RIGHTALT), /* Alt */
275 KEY(4, 3, KEY_V),
276 KEY(4, 4, KEY_G),
277 KEY(4, 5, KEY_T),
278
279 KEY(5, 0, KEY_F9), /* Home */
280 KEY(5, 1, KEY_PAGEUP), /* Side up */
281 KEY(5, 2, KEY_DOT),
282 KEY(5, 3, KEY_B),
283 KEY(5, 4, KEY_H),
284 KEY(5, 5, KEY_Y),
285
286 KEY(6, 0, KEY_TAB), /* Side Activate */
287 KEY(6, 1, KEY_PAGEDOWN), /* Side down */
288 KEY(6, 2, KEY_ENTER),
289 KEY(6, 3, KEY_N),
290 KEY(6, 4, KEY_J),
291 KEY(6, 5, KEY_U),
292
293 KEY(7, 0, KEY_F6), /* Green/Call */
294 KEY(7, 1, KEY_O),
295 KEY(7, 2, KEY_BACKSPACE),
296 KEY(7, 3, KEY_M),
297 KEY(7, 4, KEY_K),
298 KEY(7, 5, KEY_I),
299};
300
301static struct pxa27x_keypad_platform_data treo680_keypad_platform_data = {
302 .matrix_key_rows = 8,
303 .matrix_key_cols = 7,
304 .matrix_key_map = treo680_matrix_keys,
305 .matrix_key_map_size = ARRAY_SIZE(treo680_matrix_keys),
306 .direct_key_map = { KEY_CONNECT },
307 .direct_key_num = 1,
308
309 .debounce_interval = 30,
310};
311
312/******************************************************************************
313 * aSoC audio
314 ******************************************************************************/
315
316static pxa2xx_audio_ops_t treo680_ac97_pdata = {
317 .reset_gpio = 95,
318};
319
320/******************************************************************************
321 * Backlight
322 ******************************************************************************/
323static int treo680_backlight_init(struct device *dev)
324{
325 int ret;
326
327 ret = gpio_request(GPIO_NR_TREO680_BL_POWER, "BL POWER");
328 if (ret)
329 goto err;
330 ret = gpio_direction_output(GPIO_NR_TREO680_BL_POWER, 0);
331 if (ret)
332 goto err2;
333 ret = gpio_request(GPIO_NR_TREO680_LCD_POWER, "LCD POWER");
334 if (ret)
335 goto err2;
336 ret = gpio_direction_output(GPIO_NR_TREO680_LCD_POWER, 0);
337 if (ret)
338 goto err3;
339
340 return 0;
341err3:
342 gpio_free(GPIO_NR_TREO680_LCD_POWER);
343err2:
344 gpio_free(GPIO_NR_TREO680_BL_POWER);
345err:
346 return ret;
347}
348
349static int treo680_backlight_notify(int brightness)
350{
351 gpio_set_value(GPIO_NR_TREO680_BL_POWER, brightness);
352 return TREO680_MAX_INTENSITY - brightness;
353};
354
355static void treo680_backlight_exit(struct device *dev)
356{
357 gpio_free(GPIO_NR_TREO680_BL_POWER);
358 gpio_free(GPIO_NR_TREO680_LCD_POWER);
359}
360
361static struct platform_pwm_backlight_data treo680_backlight_data = {
362 .pwm_id = 0,
363 .max_brightness = TREO680_MAX_INTENSITY,
364 .dft_brightness = TREO680_DEFAULT_INTENSITY,
365 .pwm_period_ns = TREO680_PERIOD_NS,
366 .init = treo680_backlight_init,
367 .notify = treo680_backlight_notify,
368 .exit = treo680_backlight_exit,
369};
370
371static struct platform_device treo680_backlight = {
372 .name = "pwm-backlight",
373 .dev = {
374 .parent = &pxa27x_device_pwm0.dev,
375 .platform_data = &treo680_backlight_data,
376 },
377};
378
379/******************************************************************************
380 * IrDA
381 ******************************************************************************/
382static void treo680_transceiver_mode(struct device *dev, int mode)
383{
384 gpio_set_value(GPIO_NR_TREO680_IR_EN, mode & IR_OFF);
385 pxa2xx_transceiver_mode(dev, mode);
386}
387
388static int treo680_irda_startup(struct device *dev)
389{
390 int err;
391
392 err = gpio_request(GPIO_NR_TREO680_IR_EN, "Ir port disable");
393 if (err)
394 goto err1;
395
396 err = gpio_direction_output(GPIO_NR_TREO680_IR_EN, 1);
397 if (err)
398 goto err2;
399
400 return 0;
401
402err2:
403 dev_err(dev, "treo680_irda: cannot change IR gpio direction\n");
404 gpio_free(GPIO_NR_TREO680_IR_EN);
405err1:
406 dev_err(dev, "treo680_irda: cannot allocate IR gpio\n");
407 return err;
408}
409
410static void treo680_irda_shutdown(struct device *dev)
411{
412 gpio_free(GPIO_NR_TREO680_AMP_EN);
413}
414
415static struct pxaficp_platform_data treo680_ficp_info = {
416 .transceiver_cap = IR_FIRMODE | IR_SIRMODE | IR_OFF,
417 .startup = treo680_irda_startup,
418 .shutdown = treo680_irda_shutdown,
419 .transceiver_mode = treo680_transceiver_mode,
420};
421
422/******************************************************************************
423 * UDC
424 ******************************************************************************/
425static struct pxa2xx_udc_mach_info treo680_udc_info __initdata = {
426 .gpio_vbus = GPIO_NR_TREO680_USB_DETECT,
427 .gpio_vbus_inverted = 1,
428 .gpio_pullup = GPIO_NR_TREO680_USB_PULLUP,
429};
430
431
432/******************************************************************************
433 * USB host
434 ******************************************************************************/
435static struct pxaohci_platform_data treo680_ohci_info = {
436 .port_mode = PMM_PERPORT_MODE,
437 .flags = ENABLE_PORT1 | ENABLE_PORT3,
438 .power_budget = 0,
439};
440
441/******************************************************************************
442 * Power supply
443 ******************************************************************************/
444static int power_supply_init(struct device *dev)
445{
446 int ret;
447
448 ret = gpio_request(GPIO_NR_TREO680_POWER_DETECT, "CABLE_STATE_AC");
449 if (ret)
450 goto err1;
451 ret = gpio_direction_input(GPIO_NR_TREO680_POWER_DETECT);
452 if (ret)
453 goto err2;
454
455 return 0;
456
457err2:
458 gpio_free(GPIO_NR_TREO680_POWER_DETECT);
459err1:
460 return ret;
461}
462
463static int treo680_is_ac_online(void)
464{
465 return gpio_get_value(GPIO_NR_TREO680_POWER_DETECT);
466}
467
468static void power_supply_exit(struct device *dev)
469{
470 gpio_free(GPIO_NR_TREO680_POWER_DETECT);
471}
472
473static char *treo680_supplicants[] = {
474 "main-battery",
475};
476
477static struct pda_power_pdata power_supply_info = {
478 .init = power_supply_init,
479 .is_ac_online = treo680_is_ac_online,
480 .exit = power_supply_exit,
481 .supplied_to = treo680_supplicants,
482 .num_supplicants = ARRAY_SIZE(treo680_supplicants),
483};
484
485static struct platform_device power_supply = {
486 .name = "pda-power",
487 .id = -1,
488 .dev = {
489 .platform_data = &power_supply_info,
490 },
491};
492
493/******************************************************************************
494 * Vibra and LEDs
495 ******************************************************************************/
496static struct gpio_led gpio_leds[] = {
497 {
498 .name = "treo680:vibra:vibra",
499 .default_trigger = "none",
500 .gpio = GPIO_NR_TREO680_VIBRATE_EN,
501 },
502 {
503 .name = "treo680:green:led",
504 .default_trigger = "mmc0",
505 .gpio = GPIO_NR_TREO680_GREEN_LED,
506 },
507 {
508 .name = "treo680:keybbl:keybbl",
509 .default_trigger = "none",
510 .gpio = GPIO_NR_TREO680_KEYB_BL,
511 },
512};
513
514static struct gpio_led_platform_data gpio_led_info = {
515 .leds = gpio_leds,
516 .num_leds = ARRAY_SIZE(gpio_leds),
517};
518
519static struct platform_device treo680_leds = {
520 .name = "leds-gpio",
521 .id = -1,
522 .dev = {
523 .platform_data = &gpio_led_info,
524 }
525};
526
527
528/******************************************************************************
529 * Framebuffer
530 ******************************************************************************/
531/* TODO: add support for 324x324 */
532static struct pxafb_mode_info treo680_lcd_modes[] = {
533{
534 .pixclock = 86538,
535 .xres = 320,
536 .yres = 320,
537 .bpp = 16,
538
539 .left_margin = 20,
540 .right_margin = 8,
541 .upper_margin = 8,
542 .lower_margin = 5,
543
544 .hsync_len = 4,
545 .vsync_len = 1,
546},
547};
548
549static struct pxafb_mach_info treo680_lcd_screen = {
550 .modes = treo680_lcd_modes,
551 .num_modes = ARRAY_SIZE(treo680_lcd_modes),
552 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
553};
554
555/******************************************************************************
556 * Power management - standby
557 ******************************************************************************/
558static void __init treo680_pm_init(void)
559{
560 static u32 resume[] = {
561 0xe3a00101, /* mov r0, #0x40000000 */
562 0xe380060f, /* orr r0, r0, #0x00f00000 */
563 0xe590f008, /* ldr pc, [r0, #0x08] */
564 };
565
566 /* this is where the bootloader jumps */
567 memcpy(phys_to_virt(TREO680_STR_BASE), resume, sizeof(resume));
568}
569
570/******************************************************************************
571 * Machine init
572 ******************************************************************************/
573static struct platform_device *devices[] __initdata = {
574 &treo680_backlight,
575 &treo680_leds,
576 &power_supply,
577};
578
579/* setup udc GPIOs initial state */
580static void __init treo680_udc_init(void)
581{
582 if (!gpio_request(GPIO_NR_TREO680_USB_PULLUP, "UDC Vbus")) {
583 gpio_direction_output(GPIO_NR_TREO680_USB_PULLUP, 1);
584 gpio_free(GPIO_NR_TREO680_USB_PULLUP);
585 }
586}
587
588static void __init treo680_init(void)
589{
590 treo680_pm_init();
591 pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
592 pxa_set_keypad_info(&treo680_keypad_platform_data);
593 set_pxa_fb_info(&treo680_lcd_screen);
594 pxa_set_mci_info(&treo680_mci_platform_data);
595 treo680_udc_init();
596 pxa_set_udc_info(&treo680_udc_info);
597 pxa_set_ac97_info(&treo680_ac97_pdata);
598 pxa_set_ficp_info(&treo680_ficp_info);
599 pxa_set_ohci_info(&treo680_ohci_info);
600
601 platform_add_devices(devices, ARRAY_SIZE(devices));
602}
603
604MACHINE_START(TREO680, "Palm Treo 680")
605 .phys_io = TREO680_PHYS_IO_START,
606 .io_pg_offst = io_p2v(0x40000000),
607 .boot_params = 0xa0000100,
608 .map_io = pxa_map_io,
609 .init_irq = pxa27x_init_irq,
610 .timer = &pxa_timer,
611 .init_machine = treo680_init,
612MACHINE_END
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 1fe294d0bf9d..ede2a57240a3 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -27,6 +27,7 @@
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/leds.h> 28#include <asm/leds.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/smp_twd.h>
30#include <asm/hardware/gic.h> 31#include <asm/hardware/gic.h>
31#include <asm/hardware/cache-l2x0.h> 32#include <asm/hardware/cache-l2x0.h>
32 33
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c
index 6cd9377ddb82..50e25fc5f8ab 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.c
+++ b/arch/arm/mach-s3c2410/usb-simtec.c
@@ -22,7 +22,6 @@
22#include <linux/timer.h> 22#include <linux/timer.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/device.h> 24#include <linux/device.h>
25#include <linux/gpio.h>
26#include <linux/io.h> 25#include <linux/io.h>
27 26
28#include <asm/mach/arch.h> 27#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 5df73cbf2b40..8cfeaec37306 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -84,5 +84,15 @@ config MACH_AT2440EVB
84 help 84 help
85 Say Y here if you are using the AT2440EVB development board 85 Say Y here if you are using the AT2440EVB development board
86 86
87config MACH_MINI2440
88 bool "MINI2440 development board"
89 select CPU_S3C2440
90 select EEPROM_AT24
91 select LEDS_TRIGGER_BACKLIGHT
92 select SND_S3C24XX_SOC_S3C24XX_UDA134X
93 help
94 Say Y here to select support for the MINI2440. Is a 10cm x 10cm board
95 available via various sources. It can come with a 3.5" or 7" touch LCD.
96
87endmenu 97endmenu
88 98
diff --git a/arch/arm/mach-s3c2440/Makefile b/arch/arm/mach-s3c2440/Makefile
index 0b4440e79b90..bfadcf684a2a 100644
--- a/arch/arm/mach-s3c2440/Makefile
+++ b/arch/arm/mach-s3c2440/Makefile
@@ -22,3 +22,4 @@ obj-$(CONFIG_MACH_RX3715) += mach-rx3715.o
22obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o 22obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o
23obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o 23obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o
24obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o 24obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o
25obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
new file mode 100644
index 000000000000..6a5bc3021bdb
--- /dev/null
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -0,0 +1,703 @@
1/* linux/arch/arm/mach-s3c2440/mach-mini2440.c
2 *
3 * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
4 * Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
5 * and modifications by SBZ <sbz@spgui.org> and
6 * Weibing <http://weibing.blogbus.com> and
7 * Michel Pollet <buserror@gmail.com>
8 *
9 * For product information, visit http://code.google.com/p/mini2440/
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/interrupt.h>
19#include <linux/list.h>
20#include <linux/timer.h>
21#include <linux/init.h>
22#include <linux/gpio.h>
23#include <linux/input.h>
24#include <linux/io.h>
25#include <linux/serial_core.h>
26#include <linux/dm9000.h>
27#include <linux/i2c/at24.h>
28#include <linux/platform_device.h>
29#include <linux/gpio_keys.h>
30#include <linux/i2c.h>
31#include <linux/mmc/host.h>
32
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35
36#include <mach/hardware.h>
37#include <mach/fb.h>
38#include <asm/mach-types.h>
39
40#include <plat/regs-serial.h>
41#include <mach/regs-gpio.h>
42#include <mach/leds-gpio.h>
43#include <mach/regs-mem.h>
44#include <mach/regs-lcd.h>
45#include <mach/irqs.h>
46#include <plat/nand.h>
47#include <plat/iic.h>
48#include <plat/mci.h>
49#include <plat/udc.h>
50
51#include <plat/regs-serial.h>
52
53#include <linux/mtd/mtd.h>
54#include <linux/mtd/nand.h>
55#include <linux/mtd/nand_ecc.h>
56#include <linux/mtd/partitions.h>
57
58#include <plat/clock.h>
59#include <plat/devs.h>
60#include <plat/cpu.h>
61
62#include <sound/s3c24xx_uda134x.h>
63
64#define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300)
65
66static struct map_desc mini2440_iodesc[] __initdata = {
67 /* nothing to declare, move along */
68};
69
70#define UCON S3C2410_UCON_DEFAULT
71#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
72#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
73
74
75static struct s3c2410_uartcfg mini2440_uartcfgs[] __initdata = {
76 [0] = {
77 .hwport = 0,
78 .flags = 0,
79 .ucon = UCON,
80 .ulcon = ULCON,
81 .ufcon = UFCON,
82 },
83 [1] = {
84 .hwport = 1,
85 .flags = 0,
86 .ucon = UCON,
87 .ulcon = ULCON,
88 .ufcon = UFCON,
89 },
90 [2] = {
91 .hwport = 2,
92 .flags = 0,
93 .ucon = UCON,
94 .ulcon = ULCON,
95 .ufcon = UFCON,
96 },
97};
98
99/* USB device UDC support */
100
101static void mini2440_udc_pullup(enum s3c2410_udc_cmd_e cmd)
102{
103 pr_debug("udc: pullup(%d)\n", cmd);
104
105 switch (cmd) {
106 case S3C2410_UDC_P_ENABLE :
107 s3c2410_gpio_setpin(S3C2410_GPC(5), 1);
108 break;
109 case S3C2410_UDC_P_DISABLE :
110 s3c2410_gpio_setpin(S3C2410_GPC(5), 0);
111 break;
112 case S3C2410_UDC_P_RESET :
113 break;
114 default:
115 break;
116 }
117}
118
119static struct s3c2410_udc_mach_info mini2440_udc_cfg __initdata = {
120 .udc_command = mini2440_udc_pullup,
121};
122
123
124/* LCD timing and setup */
125
126/*
127 * This macro simplifies the table bellow
128 */
129#define _LCD_DECLARE(_clock,_xres,margin_left,margin_right,hsync, \
130 _yres,margin_top,margin_bottom,vsync, refresh) \
131 .width = _xres, \
132 .xres = _xres, \
133 .height = _yres, \
134 .yres = _yres, \
135 .left_margin = margin_left, \
136 .right_margin = margin_right, \
137 .upper_margin = margin_top, \
138 .lower_margin = margin_bottom, \
139 .hsync_len = hsync, \
140 .vsync_len = vsync, \
141 .pixclock = ((_clock*100000000000LL) / \
142 ((refresh) * \
143 (hsync + margin_left + _xres + margin_right) * \
144 (vsync + margin_top + _yres + margin_bottom))), \
145 .bpp = 16,\
146 .type = (S3C2410_LCDCON1_TFT16BPP |\
147 S3C2410_LCDCON1_TFT)
148
149struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
150 [0] = { /* mini2440 + 3.5" TFT + touchscreen */
151 _LCD_DECLARE(
152 7, /* The 3.5 is quite fast */
153 240, 21, 38, 6, /* x timing */
154 320, 4, 4, 2, /* y timing */
155 60), /* refresh rate */
156 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
157 S3C2410_LCDCON5_INVVLINE |
158 S3C2410_LCDCON5_INVVFRAME |
159 S3C2410_LCDCON5_INVVDEN |
160 S3C2410_LCDCON5_PWREN),
161 },
162 [1] = { /* mini2440 + 7" TFT + touchscreen */
163 _LCD_DECLARE(
164 10, /* the 7" runs slower */
165 800, 40, 40, 48, /* x timing */
166 480, 29, 3, 3, /* y timing */
167 50), /* refresh rate */
168 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
169 S3C2410_LCDCON5_INVVLINE |
170 S3C2410_LCDCON5_INVVFRAME |
171 S3C2410_LCDCON5_PWREN),
172 },
173 /* The VGA shield can outout at several resolutions. All share
174 * the same timings, however, anything smaller than 1024x768
175 * will only be displayed in the top left corner of a 1024x768
176 * XGA output unless you add optional dip switches to the shield.
177 * Therefore timings for other resolutions have been ommited here.
178 */
179 [2] = {
180 _LCD_DECLARE(
181 10,
182 1024, 1, 2, 2, /* y timing */
183 768, 200, 16, 16, /* x timing */
184 24), /* refresh rate, maximum stable,
185 tested with the FPGA shield */
186 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
187 S3C2410_LCDCON5_HWSWP),
188 },
189};
190
191/* todo - put into gpio header */
192
193#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2))
194#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2))
195
196struct s3c2410fb_mach_info mini2440_fb_info __initdata = {
197 .displays = &mini2440_lcd_cfg[0], /* not constant! see init */
198 .num_displays = 1,
199 .default_display = 0,
200
201 /* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN
202 * and disable the pull down resistors on pins we are using for LCD
203 * data. */
204
205 .gpcup = (0xf << 1) | (0x3f << 10),
206
207 .gpccon = (S3C2410_GPC1_VCLK | S3C2410_GPC2_VLINE |
208 S3C2410_GPC3_VFRAME | S3C2410_GPC4_VM |
209 S3C2410_GPC10_VD2 | S3C2410_GPC11_VD3 |
210 S3C2410_GPC12_VD4 | S3C2410_GPC13_VD5 |
211 S3C2410_GPC14_VD6 | S3C2410_GPC15_VD7),
212
213 .gpccon_mask = (S3C2410_GPCCON_MASK(1) | S3C2410_GPCCON_MASK(2) |
214 S3C2410_GPCCON_MASK(3) | S3C2410_GPCCON_MASK(4) |
215 S3C2410_GPCCON_MASK(10) | S3C2410_GPCCON_MASK(11) |
216 S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) |
217 S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)),
218
219 .gpdup = (0x3f << 2) | (0x3f << 10),
220
221 .gpdcon = (S3C2410_GPD2_VD10 | S3C2410_GPD3_VD11 |
222 S3C2410_GPD4_VD12 | S3C2410_GPD5_VD13 |
223 S3C2410_GPD6_VD14 | S3C2410_GPD7_VD15 |
224 S3C2410_GPD10_VD18 | S3C2410_GPD11_VD19 |
225 S3C2410_GPD12_VD20 | S3C2410_GPD13_VD21 |
226 S3C2410_GPD14_VD22 | S3C2410_GPD15_VD23),
227
228 .gpdcon_mask = (S3C2410_GPDCON_MASK(2) | S3C2410_GPDCON_MASK(3) |
229 S3C2410_GPDCON_MASK(4) | S3C2410_GPDCON_MASK(5) |
230 S3C2410_GPDCON_MASK(6) | S3C2410_GPDCON_MASK(7) |
231 S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)|
232 S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)|
233 S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)),
234};
235
236/* MMC/SD */
237
238static struct s3c24xx_mci_pdata mini2440_mmc_cfg __initdata = {
239 .gpio_detect = S3C2410_GPG(8),
240 .gpio_wprotect = S3C2410_GPH(8),
241 .set_power = NULL,
242 .ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34,
243};
244
245/* NAND Flash on MINI2440 board */
246
247static struct mtd_partition mini2440_default_nand_part[] __initdata = {
248 [0] = {
249 .name = "u-boot",
250 .size = SZ_256K,
251 .offset = 0,
252 },
253 [1] = {
254 .name = "u-boot-env",
255 .size = SZ_128K,
256 .offset = SZ_256K,
257 },
258 [2] = {
259 .name = "kernel",
260 /* 5 megabytes, for a kernel with no modules
261 * or a uImage with a ramdisk attached */
262 .size = 0x00500000,
263 .offset = SZ_256K + SZ_128K,
264 },
265 [3] = {
266 .name = "root",
267 .offset = SZ_256K + SZ_128K + 0x00500000,
268 .size = MTDPART_SIZ_FULL,
269 },
270};
271
272static struct s3c2410_nand_set mini2440_nand_sets[] __initdata = {
273 [0] = {
274 .name = "nand",
275 .nr_chips = 1,
276 .nr_partitions = ARRAY_SIZE(mini2440_default_nand_part),
277 .partitions = mini2440_default_nand_part,
278 },
279};
280
281static struct s3c2410_platform_nand mini2440_nand_info __initdata = {
282 .tacls = 0,
283 .twrph0 = 25,
284 .twrph1 = 15,
285 .nr_sets = ARRAY_SIZE(mini2440_nand_sets),
286 .sets = mini2440_nand_sets,
287 .ignore_unset_ecc = 1,
288};
289
290/* DM9000AEP 10/100 ethernet controller */
291
292static struct resource mini2440_dm9k_resource[] __initdata = {
293 [0] = {
294 .start = MACH_MINI2440_DM9K_BASE,
295 .end = MACH_MINI2440_DM9K_BASE + 3,
296 .flags = IORESOURCE_MEM
297 },
298 [1] = {
299 .start = MACH_MINI2440_DM9K_BASE + 4,
300 .end = MACH_MINI2440_DM9K_BASE + 7,
301 .flags = IORESOURCE_MEM
302 },
303 [2] = {
304 .start = IRQ_EINT7,
305 .end = IRQ_EINT7,
306 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
307 }
308};
309
310/*
311 * The DM9000 has no eeprom, and it's MAC address is set by
312 * the bootloader before starting the kernel.
313 */
314static struct dm9000_plat_data mini2440_dm9k_pdata __initdata = {
315 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
316};
317
318static struct platform_device mini2440_device_eth __initdata = {
319 .name = "dm9000",
320 .id = -1,
321 .num_resources = ARRAY_SIZE(mini2440_dm9k_resource),
322 .resource = mini2440_dm9k_resource,
323 .dev = {
324 .platform_data = &mini2440_dm9k_pdata,
325 },
326};
327
328/* CON5
329 * +--+ /-----\
330 * | | | |
331 * | | | BAT |
332 * | | \_____/
333 * | |
334 * | | +----+ +----+
335 * | | | K5 | | K1 |
336 * | | +----+ +----+
337 * | | +----+ +----+
338 * | | | K4 | | K2 |
339 * | | +----+ +----+
340 * | | +----+ +----+
341 * | | | K6 | | K3 |
342 * | | +----+ +----+
343 * .....
344 */
345static struct gpio_keys_button mini2440_buttons[] __initdata = {
346 {
347 .gpio = S3C2410_GPG(0), /* K1 */
348 .code = KEY_F1,
349 .desc = "Button 1",
350 .active_low = 1,
351 },
352 {
353 .gpio = S3C2410_GPG(3), /* K2 */
354 .code = KEY_F2,
355 .desc = "Button 2",
356 .active_low = 1,
357 },
358 {
359 .gpio = S3C2410_GPG(5), /* K3 */
360 .code = KEY_F3,
361 .desc = "Button 3",
362 .active_low = 1,
363 },
364 {
365 .gpio = S3C2410_GPG(6), /* K4 */
366 .code = KEY_POWER,
367 .desc = "Power",
368 .active_low = 1,
369 },
370 {
371 .gpio = S3C2410_GPG(7), /* K5 */
372 .code = KEY_F5,
373 .desc = "Button 5",
374 .active_low = 1,
375 },
376#if 0
377 /* this pin is also known as TCLK1 and seems to already
378 * marked as "in use" somehow in the kernel -- possibly wrongly */
379 {
380 .gpio = S3C2410_GPG(11), /* K6 */
381 .code = KEY_F6,
382 .desc = "Button 6",
383 .active_low = 1,
384 },
385#endif
386};
387
388static struct gpio_keys_platform_data mini2440_button_data __initdata = {
389 .buttons = mini2440_buttons,
390 .nbuttons = ARRAY_SIZE(mini2440_buttons),
391};
392
393static struct platform_device mini2440_button_device __initdata = {
394 .name = "gpio-keys",
395 .id = -1,
396 .dev = {
397 .platform_data = &mini2440_button_data,
398 }
399};
400
401/* LEDS */
402
403static struct s3c24xx_led_platdata mini2440_led1_pdata __initdata = {
404 .name = "led1",
405 .gpio = S3C2410_GPB(5),
406 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
407 .def_trigger = "heartbeat",
408};
409
410static struct s3c24xx_led_platdata mini2440_led2_pdata __initdata = {
411 .name = "led2",
412 .gpio = S3C2410_GPB(6),
413 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
414 .def_trigger = "nand-disk",
415};
416
417static struct s3c24xx_led_platdata mini2440_led3_pdata __initdata = {
418 .name = "led3",
419 .gpio = S3C2410_GPB(7),
420 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
421 .def_trigger = "mmc0",
422};
423
424static struct s3c24xx_led_platdata mini2440_led4_pdata __initdata = {
425 .name = "led4",
426 .gpio = S3C2410_GPB(8),
427 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
428 .def_trigger = "",
429};
430
431static struct s3c24xx_led_platdata mini2440_led_backlight_pdata __initdata = {
432 .name = "backlight",
433 .gpio = S3C2410_GPG(4),
434 .def_trigger = "backlight",
435};
436
437static struct platform_device mini2440_led1 __initdata = {
438 .name = "s3c24xx_led",
439 .id = 1,
440 .dev = {
441 .platform_data = &mini2440_led1_pdata,
442 },
443};
444
445static struct platform_device mini2440_led2 __initdata = {
446 .name = "s3c24xx_led",
447 .id = 2,
448 .dev = {
449 .platform_data = &mini2440_led2_pdata,
450 },
451};
452
453static struct platform_device mini2440_led3 __initdata = {
454 .name = "s3c24xx_led",
455 .id = 3,
456 .dev = {
457 .platform_data = &mini2440_led3_pdata,
458 },
459};
460
461static struct platform_device mini2440_led4 __initdata = {
462 .name = "s3c24xx_led",
463 .id = 4,
464 .dev = {
465 .platform_data = &mini2440_led4_pdata,
466 },
467};
468
469static struct platform_device mini2440_led_backlight __initdata = {
470 .name = "s3c24xx_led",
471 .id = 5,
472 .dev = {
473 .platform_data = &mini2440_led_backlight_pdata,
474 },
475};
476
477/* AUDIO */
478
479static struct s3c24xx_uda134x_platform_data mini2440_audio_pins __initdata = {
480 .l3_clk = S3C2410_GPB(4),
481 .l3_mode = S3C2410_GPB(2),
482 .l3_data = S3C2410_GPB(3),
483 .model = UDA134X_UDA1341
484};
485
486static struct platform_device mini2440_audio __initdata = {
487 .name = "s3c24xx_uda134x",
488 .id = 0,
489 .dev = {
490 .platform_data = &mini2440_audio_pins,
491 },
492};
493
494/*
495 * I2C devices
496 */
497static struct at24_platform_data at24c08 = {
498 .byte_len = SZ_8K / 8,
499 .page_size = 16,
500};
501
502static struct i2c_board_info mini2440_i2c_devs[] __initdata = {
503 {
504 I2C_BOARD_INFO("24c08", 0x50),
505 .platform_data = &at24c08,
506 },
507};
508
509static struct platform_device *mini2440_devices[] __initdata = {
510 &s3c_device_usb,
511 &s3c_device_wdt,
512/* &s3c_device_adc,*/ /* ADC doesn't like living with touchscreen ! */
513 &s3c_device_i2c0,
514 &s3c_device_rtc,
515 &s3c_device_usbgadget,
516 &mini2440_device_eth,
517 &mini2440_led1,
518 &mini2440_led2,
519 &mini2440_led3,
520 &mini2440_led4,
521 &mini2440_button_device,
522 &s3c_device_nand,
523 &s3c_device_sdi,
524 &s3c_device_iis,
525 &mini2440_audio,
526/* &s3c_device_timer[0],*/ /* buzzer pwm, no API for it */
527 /* remaining devices are optional */
528};
529
530static void __init mini2440_map_io(void)
531{
532 s3c24xx_init_io(mini2440_iodesc, ARRAY_SIZE(mini2440_iodesc));
533 s3c24xx_init_clocks(12000000);
534 s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs));
535
536 s3c_device_nand.dev.platform_data = &mini2440_nand_info;
537 s3c_device_sdi.dev.platform_data = &mini2440_mmc_cfg;
538}
539
540/*
541 * mini2440_features string
542 *
543 * t = Touchscreen present
544 * b = backlight control
545 * c = camera [TODO]
546 * 0-9 LCD configuration
547 *
548 */
549static char mini2440_features_str[12] __initdata = "0tb";
550
551static int __init mini2440_features_setup(char *str)
552{
553 if (str)
554 strlcpy(mini2440_features_str, str, sizeof(mini2440_features_str));
555 return 1;
556}
557
558__setup("mini2440=", mini2440_features_setup);
559
560#define FEATURE_SCREEN (1 << 0)
561#define FEATURE_BACKLIGHT (1 << 1)
562#define FEATURE_TOUCH (1 << 2)
563#define FEATURE_CAMERA (1 << 3)
564
565struct mini2440_features_t {
566 int count;
567 int done;
568 int lcd_index;
569 struct platform_device *optional[8];
570};
571
572static void mini2440_parse_features(
573 struct mini2440_features_t * features,
574 const char * features_str )
575{
576 const char * fp = features_str;
577
578 features->count = 0;
579 features->done = 0;
580 features->lcd_index = -1;
581
582 while (*fp) {
583 char f = *fp++;
584
585 switch (f) {
586 case '0'...'9': /* tft screen */
587 if (features->done & FEATURE_SCREEN) {
588 printk(KERN_INFO "MINI2440: '%c' ignored, "
589 "screen type already set\n", f);
590 } else {
591 int li = f - '0';
592 if (li >= ARRAY_SIZE(mini2440_lcd_cfg))
593 printk(KERN_INFO "MINI2440: "
594 "'%c' out of range LCD mode\n", f);
595 else {
596 features->optional[features->count++] =
597 &s3c_device_lcd;
598 features->lcd_index = li;
599 }
600 }
601 features->done |= FEATURE_SCREEN;
602 break;
603 case 'b':
604 if (features->done & FEATURE_BACKLIGHT)
605 printk(KERN_INFO "MINI2440: '%c' ignored, "
606 "backlight already set\n", f);
607 else {
608 features->optional[features->count++] =
609 &mini2440_led_backlight;
610 }
611 features->done |= FEATURE_BACKLIGHT;
612 break;
613 case 't':
614 printk(KERN_INFO "MINI2440: '%c' ignored, "
615 "touchscreen not compiled in\n", f);
616 break;
617 case 'c':
618 if (features->done & FEATURE_CAMERA)
619 printk(KERN_INFO "MINI2440: '%c' ignored, "
620 "camera already registered\n", f);
621 else
622 features->optional[features->count++] =
623 &s3c_device_camif;
624 features->done |= FEATURE_CAMERA;
625 break;
626 }
627 }
628}
629
630static void __init mini2440_init(void)
631{
632 struct mini2440_features_t features = { 0 };
633 int i;
634
635 printk(KERN_INFO "MINI2440: Option string mini2440=%s\n",
636 mini2440_features_str);
637
638 /* Parse the feature string */
639 mini2440_parse_features(&features, mini2440_features_str);
640
641 /* turn LCD on */
642 s3c2410_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND);
643
644 /* Turn the backlight early on */
645 s3c2410_gpio_setpin(S3C2410_GPG(4), 1);
646 s3c2410_gpio_cfgpin(S3C2410_GPG(4), S3C2410_GPIO_OUTPUT);
647
648 /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */
649 s3c2410_gpio_pullup(S3C2410_GPB(1), 0);
650 s3c2410_gpio_setpin(S3C2410_GPB(1), 0);
651 s3c2410_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPIO_INPUT);
652
653 /* Make sure the D+ pullup pin is output */
654 s3c2410_gpio_cfgpin(S3C2410_GPC(5), S3C2410_GPIO_OUTPUT);
655
656 /* mark the key as input, without pullups (there is one on the board) */
657 for (i = 0; i < ARRAY_SIZE(mini2440_buttons); i++) {
658 s3c2410_gpio_pullup(mini2440_buttons[i].gpio, 0);
659 s3c2410_gpio_cfgpin(mini2440_buttons[i].gpio,
660 S3C2410_GPIO_INPUT);
661 }
662 if (features.lcd_index != -1) {
663 int li;
664
665 mini2440_fb_info.displays =
666 &mini2440_lcd_cfg[features.lcd_index];
667
668 printk(KERN_INFO "MINI2440: LCD");
669 for (li = 0; li < ARRAY_SIZE(mini2440_lcd_cfg); li++)
670 if (li == features.lcd_index)
671 printk(" [%d:%dx%d]", li,
672 mini2440_lcd_cfg[li].width,
673 mini2440_lcd_cfg[li].height);
674 else
675 printk(" %d:%dx%d", li,
676 mini2440_lcd_cfg[li].width,
677 mini2440_lcd_cfg[li].height);
678 printk("\n");
679 s3c24xx_fb_set_platdata(&mini2440_fb_info);
680 }
681 s3c24xx_udc_set_platdata(&mini2440_udc_cfg);
682 s3c_i2c0_set_platdata(NULL);
683 i2c_register_board_info(0, mini2440_i2c_devs,
684 ARRAY_SIZE(mini2440_i2c_devs));
685
686 platform_add_devices(mini2440_devices, ARRAY_SIZE(mini2440_devices));
687
688 if (features.count) /* the optional features */
689 platform_add_devices(features.optional, features.count);
690
691}
692
693
694MACHINE_START(MINI2440, "MINI2440")
695 /* Maintainer: Michel Pollet <buserror@gmail.com> */
696 .phys_io = S3C2410_PA_UART,
697 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
698 .boot_params = S3C2410_SDRAM_PA + 0x100,
699 .map_io = mini2440_map_io,
700 .init_machine = mini2440_init,
701 .init_irq = s3c24xx_init_irq,
702 .timer = &s3c24xx_timer,
703MACHINE_END
diff --git a/arch/arm/mach-s3c2442/Kconfig b/arch/arm/mach-s3c2442/Kconfig
index b289d198020e..103e913f2258 100644
--- a/arch/arm/mach-s3c2442/Kconfig
+++ b/arch/arm/mach-s3c2442/Kconfig
@@ -24,6 +24,18 @@ config SMDK2440_CPU2442
24 depends on ARCH_S3C2440 24 depends on ARCH_S3C2440
25 select CPU_S3C2442 25 select CPU_S3C2442
26 26
27config MACH_NEO1973_GTA02
28 bool "Openmoko GTA02 / Freerunner phone"
29 select CPU_S3C2442
30 select MFD_PCF50633
31 select PCF50633_GPIO
32 select I2C
33 select POWER_SUPPLY
34 select MACH_NEO1973
35 select S3C2410_PWM
36 help
37 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
38
27 39
28endmenu 40endmenu
29 41
diff --git a/arch/arm/mach-s3c2442/Makefile b/arch/arm/mach-s3c2442/Makefile
index 2a909c6c5798..2a19113a5769 100644
--- a/arch/arm/mach-s3c2442/Makefile
+++ b/arch/arm/mach-s3c2442/Makefile
@@ -12,5 +12,7 @@ obj- :=
12obj-$(CONFIG_CPU_S3C2442) += s3c2442.o 12obj-$(CONFIG_CPU_S3C2442) += s3c2442.o
13obj-$(CONFIG_CPU_S3C2442) += clock.o 13obj-$(CONFIG_CPU_S3C2442) += clock.o
14 14
15obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o
16
15# Machine support 17# Machine support
16 18
diff --git a/arch/arm/mach-s3c2442/include/mach/gta02.h b/arch/arm/mach-s3c2442/include/mach/gta02.h
new file mode 100644
index 000000000000..953331d8d56a
--- /dev/null
+++ b/arch/arm/mach-s3c2442/include/mach/gta02.h
@@ -0,0 +1,84 @@
1#ifndef _GTA02_H
2#define _GTA02_H
3
4#include <mach/regs-gpio.h>
5
6/* Different hardware revisions, passed in ATAG_REVISION by u-boot */
7#define GTA02v1_SYSTEM_REV 0x00000310
8#define GTA02v2_SYSTEM_REV 0x00000320
9#define GTA02v3_SYSTEM_REV 0x00000330
10#define GTA02v4_SYSTEM_REV 0x00000340
11#define GTA02v5_SYSTEM_REV 0x00000350
12/* since A7 is basically same as A6, we use A6 PCB ID */
13#define GTA02v6_SYSTEM_REV 0x00000360
14
15#define GTA02_GPIO_n3DL_GSM S3C2410_GPA(13) /* v1 + v2 + v3 only */
16
17#define GTA02_GPIO_PWR_LED1 S3C2410_GPB(0)
18#define GTA02_GPIO_PWR_LED2 S3C2410_GPB(1)
19#define GTA02_GPIO_AUX_LED S3C2410_GPB(2)
20#define GTA02_GPIO_VIBRATOR_ON S3C2410_GPB(3)
21#define GTA02_GPIO_MODEM_RST S3C2410_GPB(5)
22#define GTA02_GPIO_BT_EN S3C2410_GPB(6)
23#define GTA02_GPIO_MODEM_ON S3C2410_GPB(7)
24#define GTA02_GPIO_EXTINT8 S3C2410_GPB(8)
25#define GTA02_GPIO_USB_PULLUP S3C2410_GPB(9)
26
27#define GTA02_GPIO_PIO5 S3C2410_GPC(5) /* v3 + v4 only */
28
29#define GTA02v3_GPIO_nG1_CS S3C2410_GPD(12) /* v3 + v4 only */
30#define GTA02v3_GPIO_nG2_CS S3C2410_GPD(13) /* v3 + v4 only */
31#define GTA02v5_GPIO_HDQ S3C2410_GPD(14) /* v5 + */
32
33#define GTA02_GPIO_nG1_INT S3C2410_GPF(0)
34#define GTA02_GPIO_IO1 S3C2410_GPF(1)
35#define GTA02_GPIO_PIO_2 S3C2410_GPF(2) /* v2 + v3 + v4 only */
36#define GTA02_GPIO_JACK_INSERT S3C2410_GPF(4)
37#define GTA02_GPIO_WLAN_GPIO1 S3C2410_GPF(5) /* v2 + v3 + v4 only */
38#define GTA02_GPIO_AUX_KEY S3C2410_GPF(6)
39#define GTA02_GPIO_HOLD_KEY S3C2410_GPF(7)
40
41#define GTA02_GPIO_3D_IRQ S3C2410_GPG(4)
42#define GTA02v2_GPIO_nG2_INT S3C2410_GPG(8) /* v2 + v3 + v4 only */
43#define GTA02v3_GPIO_nUSB_OC S3C2410_GPG(9) /* v3 + v4 only */
44#define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG(10) /* v3 + v4 only */
45#define GTA02v3_GPIO_nGSM_OC S3C2410_GPG(11) /* v3 + v4 only */
46
47#define GTA02_GPIO_AMP_SHUT S3C2440_GPJ1 /* v2 + v3 + v4 only */
48#define GTA02v1_GPIO_WLAN_GPIO10 S3C2440_GPJ2
49#define GTA02_GPIO_HP_IN S3C2440_GPJ2 /* v2 + v3 + v4 only */
50#define GTA02_GPIO_INT0 S3C2440_GPJ3 /* v2 + v3 + v4 only */
51#define GTA02_GPIO_nGSM_EN S3C2440_GPJ4
52#define GTA02_GPIO_3D_RESET S3C2440_GPJ5
53#define GTA02_GPIO_nDL_GSM S3C2440_GPJ6 /* v4 + v5 only */
54#define GTA02_GPIO_WLAN_GPIO0 S3C2440_GPJ7
55#define GTA02v1_GPIO_BAT_ID S3C2440_GPJ8
56#define GTA02_GPIO_KEEPACT S3C2440_GPJ8
57#define GTA02v1_GPIO_HP_IN S3C2440_GPJ10
58#define GTA02_CHIP_PWD S3C2440_GPJ11 /* v2 + v3 + v4 only */
59#define GTA02_GPIO_nWLAN_RESET S3C2440_GPJ12 /* v2 + v3 + v4 only */
60
61#define GTA02_IRQ_GSENSOR_1 IRQ_EINT0
62#define GTA02_IRQ_MODEM IRQ_EINT1
63#define GTA02_IRQ_PIO_2 IRQ_EINT2 /* v2 + v3 + v4 only */
64#define GTA02_IRQ_nJACK_INSERT IRQ_EINT4
65#define GTA02_IRQ_WLAN_GPIO1 IRQ_EINT5
66#define GTA02_IRQ_AUX IRQ_EINT6
67#define GTA02_IRQ_nHOLD IRQ_EINT7
68#define GTA02_IRQ_PCF50633 IRQ_EINT9
69#define GTA02_IRQ_3D IRQ_EINT12
70#define GTA02_IRQ_GSENSOR_2 IRQ_EINT16 /* v2 + v3 + v4 only */
71#define GTA02v3_IRQ_nUSB_OC IRQ_EINT17 /* v3 + v4 only */
72#define GTA02v3_IRQ_nUSB_FLT IRQ_EINT18 /* v3 + v4 only */
73#define GTA02v3_IRQ_nGSM_OC IRQ_EINT19 /* v3 + v4 only */
74
75/* returns 00 000 on GTA02 A5 and earlier, A6 returns 01 001 */
76#define GTA02_PCB_ID1_0 S3C2410_GPC(13)
77#define GTA02_PCB_ID1_1 S3C2410_GPC(15)
78#define GTA02_PCB_ID1_2 S3C2410_GPD(0)
79#define GTA02_PCB_ID2_0 S3C2410_GPD(3)
80#define GTA02_PCB_ID2_1 S3C2410_GPD(4)
81
82int gta02_get_pcb_revision(void);
83
84#endif /* _GTA02_H */
diff --git a/arch/arm/mach-s3c2442/mach-gta02.c b/arch/arm/mach-s3c2442/mach-gta02.c
new file mode 100644
index 000000000000..e23b581aa0e1
--- /dev/null
+++ b/arch/arm/mach-s3c2442/mach-gta02.c
@@ -0,0 +1,646 @@
1/*
2 * linux/arch/arm/mach-s3c2442/mach-gta02.c
3 *
4 * S3C2442 Machine Support for Openmoko GTA02 / FreeRunner.
5 *
6 * Copyright (C) 2006-2009 by Openmoko, Inc.
7 * Authors: Harald Welte <laforge@openmoko.org>
8 * Andy Green <andy@openmoko.org>
9 * Werner Almesberger <werner@openmoko.org>
10 * All rights reserved.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 *
27 */
28
29#include <linux/kernel.h>
30#include <linux/types.h>
31#include <linux/interrupt.h>
32#include <linux/list.h>
33#include <linux/delay.h>
34#include <linux/timer.h>
35#include <linux/init.h>
36#include <linux/gpio.h>
37#include <linux/workqueue.h>
38#include <linux/platform_device.h>
39#include <linux/serial_core.h>
40#include <linux/spi/spi.h>
41
42#include <linux/mmc/host.h>
43
44#include <linux/mtd/mtd.h>
45#include <linux/mtd/nand.h>
46#include <linux/mtd/nand_ecc.h>
47#include <linux/mtd/partitions.h>
48#include <linux/mtd/physmap.h>
49#include <linux/io.h>
50
51#include <linux/i2c.h>
52#include <linux/backlight.h>
53#include <linux/regulator/machine.h>
54
55#include <linux/mfd/pcf50633/core.h>
56#include <linux/mfd/pcf50633/mbc.h>
57#include <linux/mfd/pcf50633/adc.h>
58#include <linux/mfd/pcf50633/gpio.h>
59#include <linux/mfd/pcf50633/pmic.h>
60
61#include <asm/mach/arch.h>
62#include <asm/mach/map.h>
63#include <asm/mach/irq.h>
64
65#include <asm/irq.h>
66#include <asm/mach-types.h>
67
68#include <mach/regs-irq.h>
69#include <mach/regs-gpio.h>
70#include <mach/regs-gpioj.h>
71#include <mach/fb.h>
72
73#include <mach/spi.h>
74#include <mach/spi-gpio.h>
75#include <plat/usb-control.h>
76#include <mach/regs-mem.h>
77#include <mach/hardware.h>
78
79#include <mach/gta02.h>
80
81#include <plat/regs-serial.h>
82#include <plat/nand.h>
83#include <plat/devs.h>
84#include <plat/cpu.h>
85#include <plat/pm.h>
86#include <plat/udc.h>
87#include <plat/gpio-cfg.h>
88#include <plat/iic.h>
89
90static struct pcf50633 *gta02_pcf;
91
92/*
93 * This gets called every 1ms when we paniced.
94 */
95
96static long gta02_panic_blink(long count)
97{
98 long delay = 0;
99 static long last_blink;
100 static char led;
101
102 /* Fast blink: 200ms period. */
103 if (count - last_blink < 100)
104 return 0;
105
106 led ^= 1;
107 gpio_direction_output(GTA02_GPIO_AUX_LED, led);
108
109 last_blink = count;
110
111 return delay;
112}
113
114
115static struct map_desc gta02_iodesc[] __initdata = {
116 {
117 .virtual = 0xe0000000,
118 .pfn = __phys_to_pfn(S3C2410_CS3 + 0x01000000),
119 .length = SZ_1M,
120 .type = MT_DEVICE
121 },
122};
123
124#define UCON (S3C2410_UCON_DEFAULT | S3C2443_UCON_RXERR_IRQEN)
125#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
126#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
127
128static struct s3c2410_uartcfg gta02_uartcfgs[] = {
129 [0] = {
130 .hwport = 0,
131 .flags = 0,
132 .ucon = UCON,
133 .ulcon = ULCON,
134 .ufcon = UFCON,
135 },
136 [1] = {
137 .hwport = 1,
138 .flags = 0,
139 .ucon = UCON,
140 .ulcon = ULCON,
141 .ufcon = UFCON,
142 },
143 [2] = {
144 .hwport = 2,
145 .flags = 0,
146 .ucon = UCON,
147 .ulcon = ULCON,
148 .ufcon = UFCON,
149 },
150};
151
152#ifdef CONFIG_CHARGER_PCF50633
153/*
154 * On GTA02 the 1A charger features a 48K resistor to 0V on the ID pin.
155 * We use this to recognize that we can pull 1A from the USB socket.
156 *
157 * These constants are the measured pcf50633 ADC levels with the 1A
158 * charger / 48K resistor, and with no pulldown resistor.
159 */
160
161#define ADC_NOM_CHG_DETECT_1A 6
162#define ADC_NOM_CHG_DETECT_USB 43
163
164static void
165gta02_configure_pmu_for_charger(struct pcf50633 *pcf, void *unused, int res)
166{
167 int ma;
168
169 /* Interpret charger type */
170 if (res < ((ADC_NOM_CHG_DETECT_USB + ADC_NOM_CHG_DETECT_1A) / 2)) {
171
172 /*
173 * Sanity - stop GPO driving out now that we have a 1A charger
174 * GPO controls USB Host power generation on GTA02
175 */
176 pcf50633_gpio_set(pcf, PCF50633_GPO, 0);
177
178 ma = 1000;
179 } else
180 ma = 100;
181
182 pcf50633_mbc_usb_curlim_set(pcf, ma);
183}
184
185static struct delayed_work gta02_charger_work;
186static int gta02_usb_vbus_draw;
187
188static void gta02_charger_worker(struct work_struct *work)
189{
190 if (gta02_usb_vbus_draw) {
191 pcf50633_mbc_usb_curlim_set(gta02_pcf, gta02_usb_vbus_draw);
192 return;
193 }
194
195#ifdef CONFIG_PCF50633_ADC
196 pcf50633_adc_async_read(gta02_pcf,
197 PCF50633_ADCC1_MUX_ADCIN1,
198 PCF50633_ADCC1_AVERAGE_16,
199 gta02_configure_pmu_for_charger,
200 NULL);
201#else
202 /*
203 * If the PCF50633 ADC is disabled we fallback to a
204 * 100mA limit for safety.
205 */
206 pcf50633_mbc_usb_curlim_set(pcf, 100);
207#endif
208}
209
210#define GTA02_CHARGER_CONFIGURE_TIMEOUT ((3000 * HZ) / 1000)
211
212static void gta02_pmu_event_callback(struct pcf50633 *pcf, int irq)
213{
214 if (irq == PCF50633_IRQ_USBINS) {
215 schedule_delayed_work(&gta02_charger_work,
216 GTA02_CHARGER_CONFIGURE_TIMEOUT);
217
218 return;
219 }
220
221 if (irq == PCF50633_IRQ_USBREM) {
222 cancel_delayed_work_sync(&gta02_charger_work);
223 gta02_usb_vbus_draw = 0;
224 }
225}
226
227static void gta02_udc_vbus_draw(unsigned int ma)
228{
229 if (!gta02_pcf)
230 return;
231
232 gta02_usb_vbus_draw = ma;
233
234 schedule_delayed_work(&gta02_charger_work,
235 GTA02_CHARGER_CONFIGURE_TIMEOUT);
236}
237#else /* !CONFIG_CHARGER_PCF50633 */
238#define gta02_pmu_event_callback NULL
239#define gta02_udc_vbus_draw NULL
240#endif
241
242/*
243 * This is called when pc50633 is probed, unfortunately quite late in the
244 * day since it is an I2C bus device. Here we can belatedly define some
245 * platform devices with the advantage that we can mark the pcf50633 as the
246 * parent. This makes them get suspended and resumed with their parent
247 * the pcf50633 still around.
248 */
249
250static void gta02_pmu_attach_child_devices(struct pcf50633 *pcf);
251
252
253static char *gta02_batteries[] = {
254 "battery",
255};
256
257struct pcf50633_platform_data gta02_pcf_pdata = {
258 .resumers = {
259 [0] = PCF50633_INT1_USBINS |
260 PCF50633_INT1_USBREM |
261 PCF50633_INT1_ALARM,
262 [1] = PCF50633_INT2_ONKEYF,
263 [2] = PCF50633_INT3_ONKEY1S,
264 [3] = PCF50633_INT4_LOWSYS |
265 PCF50633_INT4_LOWBAT |
266 PCF50633_INT4_HIGHTMP,
267 },
268
269 .batteries = gta02_batteries,
270 .num_batteries = ARRAY_SIZE(gta02_batteries),
271 .reg_init_data = {
272 [PCF50633_REGULATOR_AUTO] = {
273 .constraints = {
274 .min_uV = 3300000,
275 .max_uV = 3300000,
276 .valid_modes_mask = REGULATOR_MODE_NORMAL,
277 .always_on = 1,
278 .apply_uV = 1,
279 .state_mem = {
280 .enabled = 1,
281 },
282 },
283 },
284 [PCF50633_REGULATOR_DOWN1] = {
285 .constraints = {
286 .min_uV = 1300000,
287 .max_uV = 1600000,
288 .valid_modes_mask = REGULATOR_MODE_NORMAL,
289 .always_on = 1,
290 .apply_uV = 1,
291 },
292 },
293 [PCF50633_REGULATOR_DOWN2] = {
294 .constraints = {
295 .min_uV = 1800000,
296 .max_uV = 1800000,
297 .valid_modes_mask = REGULATOR_MODE_NORMAL,
298 .apply_uV = 1,
299 .always_on = 1,
300 .state_mem = {
301 .enabled = 1,
302 },
303 },
304 },
305 [PCF50633_REGULATOR_HCLDO] = {
306 .constraints = {
307 .min_uV = 2000000,
308 .max_uV = 3300000,
309 .valid_modes_mask = REGULATOR_MODE_NORMAL,
310 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
311 .always_on = 1,
312 },
313 },
314 [PCF50633_REGULATOR_LDO1] = {
315 .constraints = {
316 .min_uV = 3300000,
317 .max_uV = 3300000,
318 .valid_modes_mask = REGULATOR_MODE_NORMAL,
319 .apply_uV = 1,
320 .state_mem = {
321 .enabled = 0,
322 },
323 },
324 },
325 [PCF50633_REGULATOR_LDO2] = {
326 .constraints = {
327 .min_uV = 3300000,
328 .max_uV = 3300000,
329 .valid_modes_mask = REGULATOR_MODE_NORMAL,
330 .apply_uV = 1,
331 },
332 },
333 [PCF50633_REGULATOR_LDO3] = {
334 .constraints = {
335 .min_uV = 3000000,
336 .max_uV = 3000000,
337 .valid_modes_mask = REGULATOR_MODE_NORMAL,
338 .apply_uV = 1,
339 },
340 },
341 [PCF50633_REGULATOR_LDO4] = {
342 .constraints = {
343 .min_uV = 3200000,
344 .max_uV = 3200000,
345 .valid_modes_mask = REGULATOR_MODE_NORMAL,
346 .apply_uV = 1,
347 },
348 },
349 [PCF50633_REGULATOR_LDO5] = {
350 .constraints = {
351 .min_uV = 3000000,
352 .max_uV = 3000000,
353 .valid_modes_mask = REGULATOR_MODE_NORMAL,
354 .apply_uV = 1,
355 .state_mem = {
356 .enabled = 1,
357 },
358 },
359 },
360 [PCF50633_REGULATOR_LDO6] = {
361 .constraints = {
362 .min_uV = 3000000,
363 .max_uV = 3000000,
364 .valid_modes_mask = REGULATOR_MODE_NORMAL,
365 },
366 },
367 [PCF50633_REGULATOR_MEMLDO] = {
368 .constraints = {
369 .min_uV = 1800000,
370 .max_uV = 1800000,
371 .valid_modes_mask = REGULATOR_MODE_NORMAL,
372 .state_mem = {
373 .enabled = 1,
374 },
375 },
376 },
377
378 },
379 .probe_done = gta02_pmu_attach_child_devices,
380 .mbc_event_callback = gta02_pmu_event_callback,
381};
382
383
384/* NOR Flash. */
385
386#define GTA02_FLASH_BASE 0x18000000 /* GCS3 */
387#define GTA02_FLASH_SIZE 0x200000 /* 2MBytes */
388
389static struct physmap_flash_data gta02_nor_flash_data = {
390 .width = 2,
391};
392
393static struct resource gta02_nor_flash_resource = {
394 .start = GTA02_FLASH_BASE,
395 .end = GTA02_FLASH_BASE + GTA02_FLASH_SIZE - 1,
396 .flags = IORESOURCE_MEM,
397};
398
399static struct platform_device gta02_nor_flash = {
400 .name = "physmap-flash",
401 .id = 0,
402 .dev = {
403 .platform_data = &gta02_nor_flash_data,
404 },
405 .resource = &gta02_nor_flash_resource,
406 .num_resources = 1,
407};
408
409
410struct platform_device s3c24xx_pwm_device = {
411 .name = "s3c24xx_pwm",
412 .num_resources = 0,
413};
414
415static struct i2c_board_info gta02_i2c_devs[] __initdata = {
416 {
417 I2C_BOARD_INFO("pcf50633", 0x73),
418 .irq = GTA02_IRQ_PCF50633,
419 .platform_data = &gta02_pcf_pdata,
420 },
421 {
422 I2C_BOARD_INFO("wm8753", 0x1a),
423 },
424};
425
426static struct s3c2410_nand_set gta02_nand_sets[] = {
427 [0] = {
428 /*
429 * This name is also hard-coded in the boot loaders, so
430 * changing it would would require all users to upgrade
431 * their boot loaders, some of which are stored in a NOR
432 * that is considered to be immutable.
433 */
434 .name = "neo1973-nand",
435 .nr_chips = 1,
436 .use_bbt = 1,
437 .force_soft_ecc = 1,
438 },
439};
440
441/*
442 * Choose a set of timings derived from S3C@2442B MCP54
443 * data sheet (K5D2G13ACM-D075 MCP Memory).
444 */
445
446static struct s3c2410_platform_nand gta02_nand_info = {
447 .tacls = 0,
448 .twrph0 = 25,
449 .twrph1 = 15,
450 .nr_sets = ARRAY_SIZE(gta02_nand_sets),
451 .sets = gta02_nand_sets,
452};
453
454
455static void gta02_udc_command(enum s3c2410_udc_cmd_e cmd)
456{
457 switch (cmd) {
458 case S3C2410_UDC_P_ENABLE:
459 pr_debug("%s S3C2410_UDC_P_ENABLE\n", __func__);
460 gpio_direction_output(GTA02_GPIO_USB_PULLUP, 1);
461 break;
462 case S3C2410_UDC_P_DISABLE:
463 pr_debug("%s S3C2410_UDC_P_DISABLE\n", __func__);
464 gpio_direction_output(GTA02_GPIO_USB_PULLUP, 0);
465 break;
466 case S3C2410_UDC_P_RESET:
467 pr_debug("%s S3C2410_UDC_P_RESET\n", __func__);
468 /* FIXME: Do something here. */
469 }
470}
471
472/* Get PMU to set USB current limit accordingly. */
473static struct s3c2410_udc_mach_info gta02_udc_cfg = {
474 .vbus_draw = gta02_udc_vbus_draw,
475 .udc_command = gta02_udc_command,
476
477};
478
479
480
481static void gta02_bl_set_intensity(int intensity)
482{
483 struct pcf50633 *pcf = gta02_pcf;
484 int old_intensity = pcf50633_reg_read(pcf, PCF50633_REG_LEDOUT);
485
486 /* We map 8-bit intensity to 6-bit intensity in hardware. */
487 intensity >>= 2;
488
489 /*
490 * This can happen during, eg, print of panic on blanked console,
491 * but we can't service i2c without interrupts active, so abort.
492 */
493 if (in_atomic()) {
494 printk(KERN_ERR "gta02_bl_set_intensity called while atomic\n");
495 return;
496 }
497
498 old_intensity = pcf50633_reg_read(pcf, PCF50633_REG_LEDOUT);
499 if (intensity == old_intensity)
500 return;
501
502 /* We can't do this anywhere else. */
503 pcf50633_reg_write(pcf, PCF50633_REG_LEDDIM, 5);
504
505 if (!(pcf50633_reg_read(pcf, PCF50633_REG_LEDENA) & 3))
506 old_intensity = 0;
507
508 /*
509 * The PCF50633 cannot handle LEDOUT = 0 (datasheet p60)
510 * if seen, you have to re-enable the LED unit.
511 */
512 if (!intensity || !old_intensity)
513 pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 0);
514
515 /* Illegal to set LEDOUT to 0. */
516 if (!intensity)
517 pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f, 2);
518 else
519 pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f,
520 intensity);
521
522 if (intensity)
523 pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 2);
524
525}
526
527static struct generic_bl_info gta02_bl_info = {
528 .name = "gta02-bl",
529 .max_intensity = 0xff,
530 .default_intensity = 0xff,
531 .set_bl_intensity = gta02_bl_set_intensity,
532};
533
534static struct platform_device gta02_bl_dev = {
535 .name = "generic-bl",
536 .id = 1,
537 .dev = {
538 .platform_data = &gta02_bl_info,
539 },
540};
541
542
543
544/* USB */
545static struct s3c2410_hcd_info gta02_usb_info = {
546 .port[0] = {
547 .flags = S3C_HCDFLG_USED,
548 },
549 .port[1] = {
550 .flags = 0,
551 },
552};
553
554
555static void __init gta02_map_io(void)
556{
557 s3c24xx_init_io(gta02_iodesc, ARRAY_SIZE(gta02_iodesc));
558 s3c24xx_init_clocks(12000000);
559 s3c24xx_init_uarts(gta02_uartcfgs, ARRAY_SIZE(gta02_uartcfgs));
560}
561
562
563/* These are the guys that don't need to be children of PMU. */
564
565static struct platform_device *gta02_devices[] __initdata = {
566 &s3c_device_usb,
567 &s3c_device_wdt,
568 &s3c_device_sdi,
569 &s3c_device_usbgadget,
570 &s3c_device_nand,
571 &gta02_nor_flash,
572 &s3c24xx_pwm_device,
573 &s3c_device_iis,
574 &s3c_device_i2c0,
575};
576
577/* These guys DO need to be children of PMU. */
578
579static struct platform_device *gta02_devices_pmu_children[] = {
580 &gta02_bl_dev,
581};
582
583
584/*
585 * This is called when pc50633 is probed, quite late in the day since it is an
586 * I2C bus device. Here we can define platform devices with the advantage that
587 * we can mark the pcf50633 as the parent. This makes them get suspended and
588 * resumed with their parent the pcf50633 still around. All devices whose
589 * operation depends on something from pcf50633 must have this relationship
590 * made explicit like this, or suspend and resume will become an unreliable
591 * hellworld.
592 */
593
594static void gta02_pmu_attach_child_devices(struct pcf50633 *pcf)
595{
596 int n;
597
598 /* Grab a copy of the now probed PMU pointer. */
599 gta02_pcf = pcf;
600
601 for (n = 0; n < ARRAY_SIZE(gta02_devices_pmu_children); n++)
602 gta02_devices_pmu_children[n]->dev.parent = pcf->dev;
603
604 platform_add_devices(gta02_devices_pmu_children,
605 ARRAY_SIZE(gta02_devices_pmu_children));
606}
607
608static void gta02_poweroff(void)
609{
610 pcf50633_reg_set_bit_mask(gta02_pcf, PCF50633_REG_OOCSHDWN, 1, 1);
611}
612
613static void __init gta02_machine_init(void)
614{
615 /* Set the panic callback to make AUX LED blink at ~5Hz. */
616 panic_blink = gta02_panic_blink;
617
618 s3c_pm_init();
619
620#ifdef CONFIG_CHARGER_PCF50633
621 INIT_DELAYED_WORK(&gta02_charger_work, gta02_charger_worker);
622#endif
623
624 s3c_device_usb.dev.platform_data = &gta02_usb_info;
625 s3c_device_nand.dev.platform_data = &gta02_nand_info;
626
627 s3c24xx_udc_set_platdata(&gta02_udc_cfg);
628 s3c_i2c0_set_platdata(NULL);
629
630 i2c_register_board_info(0, gta02_i2c_devs, ARRAY_SIZE(gta02_i2c_devs));
631
632 platform_add_devices(gta02_devices, ARRAY_SIZE(gta02_devices));
633 pm_power_off = gta02_poweroff;
634}
635
636
637MACHINE_START(NEO1973_GTA02, "GTA02")
638 /* Maintainer: Nelson Castillo <arhuaco@freaks-unidos.net> */
639 .phys_io = S3C2410_PA_UART,
640 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
641 .boot_params = S3C2410_SDRAM_PA + 0x100,
642 .map_io = gta02_map_io,
643 .init_irq = s3c24xx_init_irq,
644 .init_machine = gta02_machine_init,
645 .timer = &s3c24xx_timer,
646MACHINE_END
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 3a398befed41..03cd27d917b9 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -62,6 +62,12 @@
62#define SHIFT_ASR 0x40 62#define SHIFT_ASR 0x40
63#define SHIFT_RORRRX 0x60 63#define SHIFT_RORRRX 0x60
64 64
65#define BAD_INSTR 0xdeadc0de
66
67/* Thumb-2 32 bit format per ARMv7 DDI0406A A6.3, either f800h,e800h,f800h */
68#define IS_T32(hi16) \
69 (((hi16) & 0xe000) == 0xe000 && ((hi16) & 0x1800))
70
65static unsigned long ai_user; 71static unsigned long ai_user;
66static unsigned long ai_sys; 72static unsigned long ai_sys;
67static unsigned long ai_skipped; 73static unsigned long ai_skipped;
@@ -332,38 +338,48 @@ do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
332 struct pt_regs *regs) 338 struct pt_regs *regs)
333{ 339{
334 unsigned int rd = RD_BITS(instr); 340 unsigned int rd = RD_BITS(instr);
335 341 unsigned int rd2;
336 if (((rd & 1) == 1) || (rd == 14)) 342 int load;
343
344 if ((instr & 0xfe000000) == 0xe8000000) {
345 /* ARMv7 Thumb-2 32-bit LDRD/STRD */
346 rd2 = (instr >> 8) & 0xf;
347 load = !!(LDST_L_BIT(instr));
348 } else if (((rd & 1) == 1) || (rd == 14))
337 goto bad; 349 goto bad;
350 else {
351 load = ((instr & 0xf0) == 0xd0);
352 rd2 = rd + 1;
353 }
338 354
339 ai_dword += 1; 355 ai_dword += 1;
340 356
341 if (user_mode(regs)) 357 if (user_mode(regs))
342 goto user; 358 goto user;
343 359
344 if ((instr & 0xf0) == 0xd0) { 360 if (load) {
345 unsigned long val; 361 unsigned long val;
346 get32_unaligned_check(val, addr); 362 get32_unaligned_check(val, addr);
347 regs->uregs[rd] = val; 363 regs->uregs[rd] = val;
348 get32_unaligned_check(val, addr + 4); 364 get32_unaligned_check(val, addr + 4);
349 regs->uregs[rd + 1] = val; 365 regs->uregs[rd2] = val;
350 } else { 366 } else {
351 put32_unaligned_check(regs->uregs[rd], addr); 367 put32_unaligned_check(regs->uregs[rd], addr);
352 put32_unaligned_check(regs->uregs[rd + 1], addr + 4); 368 put32_unaligned_check(regs->uregs[rd2], addr + 4);
353 } 369 }
354 370
355 return TYPE_LDST; 371 return TYPE_LDST;
356 372
357 user: 373 user:
358 if ((instr & 0xf0) == 0xd0) { 374 if (load) {
359 unsigned long val; 375 unsigned long val;
360 get32t_unaligned_check(val, addr); 376 get32t_unaligned_check(val, addr);
361 regs->uregs[rd] = val; 377 regs->uregs[rd] = val;
362 get32t_unaligned_check(val, addr + 4); 378 get32t_unaligned_check(val, addr + 4);
363 regs->uregs[rd + 1] = val; 379 regs->uregs[rd2] = val;
364 } else { 380 } else {
365 put32t_unaligned_check(regs->uregs[rd], addr); 381 put32t_unaligned_check(regs->uregs[rd], addr);
366 put32t_unaligned_check(regs->uregs[rd + 1], addr + 4); 382 put32t_unaligned_check(regs->uregs[rd2], addr + 4);
367 } 383 }
368 384
369 return TYPE_LDST; 385 return TYPE_LDST;
@@ -616,8 +632,72 @@ thumb2arm(u16 tinstr)
616 /* Else fall through for illegal instruction case */ 632 /* Else fall through for illegal instruction case */
617 633
618 default: 634 default:
619 return 0xdeadc0de; 635 return BAD_INSTR;
636 }
637}
638
639/*
640 * Convert Thumb-2 32 bit LDM, STM, LDRD, STRD to equivalent instruction
641 * handlable by ARM alignment handler, also find the corresponding handler,
642 * so that we can reuse ARM userland alignment fault fixups for Thumb.
643 *
644 * @pinstr: original Thumb-2 instruction; returns new handlable instruction
645 * @regs: register context.
646 * @poffset: return offset from faulted addr for later writeback
647 *
648 * NOTES:
649 * 1. Comments below refer to ARMv7 DDI0406A Thumb Instruction sections.
650 * 2. Register name Rt from ARMv7 is same as Rd from ARMv6 (Rd is Rt)
651 */
652static void *
653do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs,
654 union offset_union *poffset)
655{
656 unsigned long instr = *pinstr;
657 u16 tinst1 = (instr >> 16) & 0xffff;
658 u16 tinst2 = instr & 0xffff;
659 poffset->un = 0;
660
661 switch (tinst1 & 0xffe0) {
662 /* A6.3.5 Load/Store multiple */
663 case 0xe880: /* STM/STMIA/STMEA,LDM/LDMIA, PUSH/POP T2 */
664 case 0xe8a0: /* ...above writeback version */
665 case 0xe900: /* STMDB/STMFD, LDMDB/LDMEA */
666 case 0xe920: /* ...above writeback version */
667 /* no need offset decision since handler calculates it */
668 return do_alignment_ldmstm;
669
670 case 0xf840: /* POP/PUSH T3 (single register) */
671 if (RN_BITS(instr) == 13 && (tinst2 & 0x09ff) == 0x0904) {
672 u32 L = !!(LDST_L_BIT(instr));
673 const u32 subset[2] = {
674 0xe92d0000, /* STMDB sp!,{registers} */
675 0xe8bd0000, /* LDMIA sp!,{registers} */
676 };
677 *pinstr = subset[L] | (1<<RD_BITS(instr));
678 return do_alignment_ldmstm;
679 }
680 /* Else fall through for illegal instruction case */
681 break;
682
683 /* A6.3.6 Load/store double, STRD/LDRD(immed, lit, reg) */
684 case 0xe860:
685 case 0xe960:
686 case 0xe8e0:
687 case 0xe9e0:
688 poffset->un = (tinst2 & 0xff) << 2;
689 case 0xe940:
690 case 0xe9c0:
691 return do_alignment_ldrdstrd;
692
693 /*
694 * No need to handle load/store instructions up to word size
695 * since ARMv6 and later CPUs can perform unaligned accesses.
696 */
697 default:
698 break;
620 } 699 }
700 return NULL;
621} 701}
622 702
623static int 703static int
@@ -630,6 +710,8 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
630 mm_segment_t fs; 710 mm_segment_t fs;
631 unsigned int fault; 711 unsigned int fault;
632 u16 tinstr = 0; 712 u16 tinstr = 0;
713 int isize = 4;
714 int thumb2_32b = 0;
633 715
634 instrptr = instruction_pointer(regs); 716 instrptr = instruction_pointer(regs);
635 717
@@ -637,8 +719,19 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
637 set_fs(KERNEL_DS); 719 set_fs(KERNEL_DS);
638 if (thumb_mode(regs)) { 720 if (thumb_mode(regs)) {
639 fault = __get_user(tinstr, (u16 *)(instrptr & ~1)); 721 fault = __get_user(tinstr, (u16 *)(instrptr & ~1));
640 if (!(fault)) 722 if (!fault) {
641 instr = thumb2arm(tinstr); 723 if (cpu_architecture() >= CPU_ARCH_ARMv7 &&
724 IS_T32(tinstr)) {
725 /* Thumb-2 32-bit */
726 u16 tinst2 = 0;
727 fault = __get_user(tinst2, (u16 *)(instrptr+2));
728 instr = (tinstr << 16) | tinst2;
729 thumb2_32b = 1;
730 } else {
731 isize = 2;
732 instr = thumb2arm(tinstr);
733 }
734 }
642 } else 735 } else
643 fault = __get_user(instr, (u32 *)instrptr); 736 fault = __get_user(instr, (u32 *)instrptr);
644 set_fs(fs); 737 set_fs(fs);
@@ -655,7 +748,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
655 748
656 fixup: 749 fixup:
657 750
658 regs->ARM_pc += thumb_mode(regs) ? 2 : 4; 751 regs->ARM_pc += isize;
659 752
660 switch (CODING_BITS(instr)) { 753 switch (CODING_BITS(instr)) {
661 case 0x00000000: /* 3.13.4 load/store instruction extensions */ 754 case 0x00000000: /* 3.13.4 load/store instruction extensions */
@@ -714,18 +807,25 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
714 handler = do_alignment_ldrstr; 807 handler = do_alignment_ldrstr;
715 break; 808 break;
716 809
717 case 0x08000000: /* ldm or stm */ 810 case 0x08000000: /* ldm or stm, or thumb-2 32bit instruction */
718 handler = do_alignment_ldmstm; 811 if (thumb2_32b)
812 handler = do_alignment_t32_to_handler(&instr, regs, &offset);
813 else
814 handler = do_alignment_ldmstm;
719 break; 815 break;
720 816
721 default: 817 default:
722 goto bad; 818 goto bad;
723 } 819 }
724 820
821 if (!handler)
822 goto bad;
725 type = handler(addr, instr, regs); 823 type = handler(addr, instr, regs);
726 824
727 if (type == TYPE_ERROR || type == TYPE_FAULT) 825 if (type == TYPE_ERROR || type == TYPE_FAULT) {
826 regs->ARM_pc -= isize;
728 goto bad_or_fault; 827 goto bad_or_fault;
828 }
729 829
730 if (type == TYPE_LDST) 830 if (type == TYPE_LDST)
731 do_alignment_finish_ldst(addr, instr, regs, offset); 831 do_alignment_finish_ldst(addr, instr, regs, offset);
@@ -735,7 +835,6 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
735 bad_or_fault: 835 bad_or_fault:
736 if (type == TYPE_ERROR) 836 if (type == TYPE_ERROR)
737 goto bad; 837 goto bad;
738 regs->ARM_pc -= thumb_mode(regs) ? 2 : 4;
739 /* 838 /*
740 * We got a fault - fix it up, or die. 839 * We got a fault - fix it up, or die.
741 */ 840 */
@@ -751,8 +850,8 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
751 */ 850 */
752 printk(KERN_ERR "Alignment trap: not handling instruction " 851 printk(KERN_ERR "Alignment trap: not handling instruction "
753 "%0*lx at [<%08lx>]\n", 852 "%0*lx at [<%08lx>]\n",
754 thumb_mode(regs) ? 4 : 8, 853 isize << 1,
755 thumb_mode(regs) ? tinstr : instr, instrptr); 854 isize == 2 ? tinstr : instr, instrptr);
756 ai_skipped += 1; 855 ai_skipped += 1;
757 return 1; 856 return 1;
758 857
@@ -763,8 +862,8 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
763 printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx " 862 printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx "
764 "Address=0x%08lx FSR 0x%03x\n", current->comm, 863 "Address=0x%08lx FSR 0x%03x\n", current->comm,
765 task_pid_nr(current), instrptr, 864 task_pid_nr(current), instrptr,
766 thumb_mode(regs) ? 4 : 8, 865 isize << 1,
767 thumb_mode(regs) ? tinstr : instr, 866 isize == 2 ? tinstr : instr,
768 addr, fsr); 867 addr, fsr);
769 868
770 if (ai_usermode & UM_FIXUP) 869 if (ai_usermode & UM_FIXUP)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index fdaa9bb87c16..4722582b17b8 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -836,6 +836,13 @@ void __init reserve_node_zero(pg_data_t *pgdat)
836 BOOTMEM_EXCLUSIVE); 836 BOOTMEM_EXCLUSIVE);
837 } 837 }
838 838
839 if (machine_is_treo680()) {
840 reserve_bootmem_node(pgdat, 0xa0000000, 0x1000,
841 BOOTMEM_EXCLUSIVE);
842 reserve_bootmem_node(pgdat, 0xa2000000, 0x1000,
843 BOOTMEM_EXCLUSIVE);
844 }
845
839 if (machine_is_palmt5()) 846 if (machine_is_palmt5())
840 reserve_bootmem_node(pgdat, 0xa0200000, 0x1000, 847 reserve_bootmem_node(pgdat, 0xa0200000, 0x1000,
841 BOOTMEM_EXCLUSIVE); 848 BOOTMEM_EXCLUSIVE);
diff --git a/arch/arm/plat-omap/include/mach/sram.h b/arch/arm/plat-omap/include/mach/sram.h
index dca7c16ae903..4d53cc59d7a3 100644
--- a/arch/arm/plat-omap/include/mach/sram.h
+++ b/arch/arm/plat-omap/include/mach/sram.h
@@ -24,7 +24,8 @@ extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
24extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, 24extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl,
25 u32 sdrc_actim_ctrla, 25 u32 sdrc_actim_ctrla,
26 u32 sdrc_actim_ctrlb, u32 m2, 26 u32 sdrc_actim_ctrlb, u32 m2,
27 u32 unlock_dll); 27 u32 unlock_dll, u32 f, u32 sdrc_mr,
28 u32 inc);
28 29
29/* Do not use these */ 30/* Do not use these */
30extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); 31extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
@@ -62,7 +63,8 @@ extern unsigned long omap243x_sram_reprogram_sdrc_sz;
62extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl, 63extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl,
63 u32 sdrc_actim_ctrla, 64 u32 sdrc_actim_ctrla,
64 u32 sdrc_actim_ctrlb, u32 m2, 65 u32 sdrc_actim_ctrlb, u32 m2,
65 u32 unlock_dll); 66 u32 unlock_dll, u32 f, u32 sdrc_mr,
67 u32 inc);
66extern unsigned long omap3_sram_configure_core_dpll_sz; 68extern unsigned long omap3_sram_configure_core_dpll_sz;
67 69
68#endif 70#endif
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index a5b9bcd6b108..65006df3f1b7 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -371,15 +371,17 @@ static inline int omap243x_sram_init(void)
371static u32 (*_omap3_sram_configure_core_dpll)(u32 sdrc_rfr_ctrl, 371static u32 (*_omap3_sram_configure_core_dpll)(u32 sdrc_rfr_ctrl,
372 u32 sdrc_actim_ctrla, 372 u32 sdrc_actim_ctrla,
373 u32 sdrc_actim_ctrlb, 373 u32 sdrc_actim_ctrlb,
374 u32 m2, u32 unlock_dll); 374 u32 m2, u32 unlock_dll,
375 u32 f, u32 sdrc_mr, u32 inc);
375u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla, 376u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla,
376 u32 sdrc_actim_ctrlb, u32 m2, u32 unlock_dll) 377 u32 sdrc_actim_ctrlb, u32 m2, u32 unlock_dll,
378 u32 f, u32 sdrc_mr, u32 inc)
377{ 379{
378 BUG_ON(!_omap3_sram_configure_core_dpll); 380 BUG_ON(!_omap3_sram_configure_core_dpll);
379 return _omap3_sram_configure_core_dpll(sdrc_rfr_ctrl, 381 return _omap3_sram_configure_core_dpll(sdrc_rfr_ctrl,
380 sdrc_actim_ctrla, 382 sdrc_actim_ctrla,
381 sdrc_actim_ctrlb, m2, 383 sdrc_actim_ctrlb, m2,
382 unlock_dll); 384 unlock_dll, f, sdrc_mr, inc);
383} 385}
384 386
385/* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */ 387/* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
index 610651455a78..74bb7cb5da49 100644
--- a/arch/arm/plat-s3c/Makefile
+++ b/arch/arm/plat-s3c/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o
34obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o 34obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o
35obj-y += dev-i2c0.o 35obj-y += dev-i2c0.o
36obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o 36obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
37obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o
37obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o 38obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
38obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o 39obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
39obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o 40obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
diff --git a/arch/arm/plat-s3c/dev-audio.c b/arch/arm/plat-s3c/dev-audio.c
new file mode 100644
index 000000000000..1322beb40dd7
--- /dev/null
+++ b/arch/arm/plat-s3c/dev-audio.c
@@ -0,0 +1,68 @@
1/* linux/arch/arm/plat-s3c/dev-audio.c
2 *
3 * Copyright 2009 Wolfson Microelectronics
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/platform_device.h>
15
16#include <mach/irqs.h>
17#include <mach/map.h>
18
19#include <plat/devs.h>
20
21
22static struct resource s3c64xx_iis0_resource[] = {
23 [0] = {
24 .start = S3C64XX_PA_IIS0,
25 .end = S3C64XX_PA_IIS0 + 0x100 - 1,
26 .flags = IORESOURCE_MEM,
27 },
28};
29
30struct platform_device s3c64xx_device_iis0 = {
31 .name = "s3c64xx-iis",
32 .id = 0,
33 .num_resources = ARRAY_SIZE(s3c64xx_iis0_resource),
34 .resource = s3c64xx_iis0_resource,
35};
36EXPORT_SYMBOL(s3c64xx_device_iis0);
37
38static struct resource s3c64xx_iis1_resource[] = {
39 [0] = {
40 .start = S3C64XX_PA_IIS1,
41 .end = S3C64XX_PA_IIS1 + 0x100 - 1,
42 .flags = IORESOURCE_MEM,
43 },
44};
45
46struct platform_device s3c64xx_device_iis1 = {
47 .name = "s3c64xx-iis",
48 .id = 1,
49 .num_resources = ARRAY_SIZE(s3c64xx_iis1_resource),
50 .resource = s3c64xx_iis1_resource,
51};
52EXPORT_SYMBOL(s3c64xx_device_iis1);
53
54static struct resource s3c64xx_iisv4_resource[] = {
55 [0] = {
56 .start = S3C64XX_PA_IISV4,
57 .end = S3C64XX_PA_IISV4 + 0x100 - 1,
58 .flags = IORESOURCE_MEM,
59 },
60};
61
62struct platform_device s3c64xx_device_iisv4 = {
63 .name = "s3c64xx-iis-v4",
64 .id = -1,
65 .num_resources = ARRAY_SIZE(s3c64xx_iisv4_resource),
66 .resource = s3c64xx_iisv4_resource,
67};
68EXPORT_SYMBOL(s3c64xx_device_iisv4);
diff --git a/arch/arm/plat-s3c/gpio-config.c b/arch/arm/plat-s3c/gpio-config.c
index 08044dec9731..456969b6fa0d 100644
--- a/arch/arm/plat-s3c/gpio-config.c
+++ b/arch/arm/plat-s3c/gpio-config.c
@@ -119,7 +119,7 @@ int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
119 unsigned int shift = (off & 7) * 4; 119 unsigned int shift = (off & 7) * 4;
120 u32 con; 120 u32 con;
121 121
122 if (off < 8 && chip->chip.ngpio >= 8) 122 if (off < 8 && chip->chip.ngpio > 8)
123 reg -= 4; 123 reg -= 4;
124 124
125 if (s3c_gpio_is_cfg_special(cfg)) { 125 if (s3c_gpio_is_cfg_special(cfg)) {
diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h
index a0b6768fddcf..b5b9c4d46e9a 100644
--- a/arch/arm/plat-s3c/include/plat/devs.h
+++ b/arch/arm/plat-s3c/include/plat/devs.h
@@ -24,13 +24,16 @@ extern struct platform_device *s3c24xx_uart_src[];
24 24
25extern struct platform_device s3c_device_timer[]; 25extern struct platform_device s3c_device_timer[];
26 26
27extern struct platform_device s3c64xx_device_iis0;
28extern struct platform_device s3c64xx_device_iis1;
29extern struct platform_device s3c64xx_device_iisv4;
30
27extern struct platform_device s3c_device_fb; 31extern struct platform_device s3c_device_fb;
28extern struct platform_device s3c_device_usb; 32extern struct platform_device s3c_device_usb;
29extern struct platform_device s3c_device_lcd; 33extern struct platform_device s3c_device_lcd;
30extern struct platform_device s3c_device_wdt; 34extern struct platform_device s3c_device_wdt;
31extern struct platform_device s3c_device_i2c0; 35extern struct platform_device s3c_device_i2c0;
32extern struct platform_device s3c_device_i2c1; 36extern struct platform_device s3c_device_i2c1;
33extern struct platform_device s3c_device_iis;
34extern struct platform_device s3c_device_rtc; 37extern struct platform_device s3c_device_rtc;
35extern struct platform_device s3c_device_adc; 38extern struct platform_device s3c_device_adc;
36extern struct platform_device s3c_device_sdi; 39extern struct platform_device s3c_device_sdi;
diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile
index 2ed5df34f9ea..3c8882cd6268 100644
--- a/arch/arm/plat-s3c64xx/Makefile
+++ b/arch/arm/plat-s3c64xx/Makefile
@@ -23,6 +23,7 @@ obj-y += gpiolib.o
23 23
24obj-$(CONFIG_CPU_S3C6400_INIT) += s3c6400-init.o 24obj-$(CONFIG_CPU_S3C6400_INIT) += s3c6400-init.o
25obj-$(CONFIG_CPU_S3C6400_CLOCK) += s3c6400-clock.o 25obj-$(CONFIG_CPU_S3C6400_CLOCK) += s3c6400-clock.o
26obj-$(CONFIG_CPU_FREQ_S3C64XX) += cpufreq.o
26 27
27# PM support 28# PM support
28 29
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c
index 0bc2fa1dfc40..7a36e899360d 100644
--- a/arch/arm/plat-s3c64xx/clock.c
+++ b/arch/arm/plat-s3c64xx/clock.c
@@ -191,7 +191,7 @@ static struct clk init_clocks[] = {
191 .id = -1, 191 .id = -1,
192 .parent = &clk_h, 192 .parent = &clk_h,
193 .enable = s3c64xx_hclk_ctrl, 193 .enable = s3c64xx_hclk_ctrl,
194 .ctrlbit = S3C_CLKCON_SCLK_UHOST, 194 .ctrlbit = S3C_CLKCON_HCLK_UHOST,
195 }, { 195 }, {
196 .name = "hsmmc", 196 .name = "hsmmc",
197 .id = 0, 197 .id = 0,
diff --git a/arch/arm/plat-s3c64xx/cpufreq.c b/arch/arm/plat-s3c64xx/cpufreq.c
new file mode 100644
index 000000000000..e6e0843215df
--- /dev/null
+++ b/arch/arm/plat-s3c64xx/cpufreq.c
@@ -0,0 +1,262 @@
1/* linux/arch/arm/plat-s3c64xx/cpufreq.c
2 *
3 * Copyright 2009 Wolfson Microelectronics plc
4 *
5 * S3C64xx CPUfreq Support
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/init.h>
15#include <linux/cpufreq.h>
16#include <linux/clk.h>
17#include <linux/err.h>
18#include <linux/regulator/consumer.h>
19
20static struct clk *armclk;
21static struct regulator *vddarm;
22
23#ifdef CONFIG_CPU_S3C6410
24struct s3c64xx_dvfs {
25 unsigned int vddarm_min;
26 unsigned int vddarm_max;
27};
28
29static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = {
30 [0] = { 1000000, 1000000 },
31 [1] = { 1000000, 1050000 },
32 [2] = { 1050000, 1100000 },
33 [3] = { 1050000, 1150000 },
34 [4] = { 1250000, 1350000 },
35};
36
37static struct cpufreq_frequency_table s3c64xx_freq_table[] = {
38 { 0, 66000 },
39 { 0, 133000 },
40 { 1, 222000 },
41 { 1, 266000 },
42 { 2, 333000 },
43 { 2, 400000 },
44 { 3, 532000 },
45 { 3, 533000 },
46 { 4, 667000 },
47 { 0, CPUFREQ_TABLE_END },
48};
49#endif
50
51static int s3c64xx_cpufreq_verify_speed(struct cpufreq_policy *policy)
52{
53 if (policy->cpu != 0)
54 return -EINVAL;
55
56 return cpufreq_frequency_table_verify(policy, s3c64xx_freq_table);
57}
58
59static unsigned int s3c64xx_cpufreq_get_speed(unsigned int cpu)
60{
61 if (cpu != 0)
62 return 0;
63
64 return clk_get_rate(armclk) / 1000;
65}
66
67static int s3c64xx_cpufreq_set_target(struct cpufreq_policy *policy,
68 unsigned int target_freq,
69 unsigned int relation)
70{
71 int ret;
72 unsigned int i;
73 struct cpufreq_freqs freqs;
74 struct s3c64xx_dvfs *dvfs;
75
76 ret = cpufreq_frequency_table_target(policy, s3c64xx_freq_table,
77 target_freq, relation, &i);
78 if (ret != 0)
79 return ret;
80
81 freqs.cpu = 0;
82 freqs.old = clk_get_rate(armclk) / 1000;
83 freqs.new = s3c64xx_freq_table[i].frequency;
84 freqs.flags = 0;
85 dvfs = &s3c64xx_dvfs_table[s3c64xx_freq_table[i].index];
86
87 if (freqs.old == freqs.new)
88 return 0;
89
90 pr_debug("cpufreq: Transition %d-%dkHz\n", freqs.old, freqs.new);
91
92 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
93
94#ifdef CONFIG_REGULATOR
95 if (vddarm && freqs.new > freqs.old) {
96 ret = regulator_set_voltage(vddarm,
97 dvfs->vddarm_min,
98 dvfs->vddarm_max);
99 if (ret != 0) {
100 pr_err("cpufreq: Failed to set VDDARM for %dkHz: %d\n",
101 freqs.new, ret);
102 goto err;
103 }
104 }
105#endif
106
107 ret = clk_set_rate(armclk, freqs.new * 1000);
108 if (ret < 0) {
109 pr_err("cpufreq: Failed to set rate %dkHz: %d\n",
110 freqs.new, ret);
111 goto err;
112 }
113
114#ifdef CONFIG_REGULATOR
115 if (vddarm && freqs.new < freqs.old) {
116 ret = regulator_set_voltage(vddarm,
117 dvfs->vddarm_min,
118 dvfs->vddarm_max);
119 if (ret != 0) {
120 pr_err("cpufreq: Failed to set VDDARM for %dkHz: %d\n",
121 freqs.new, ret);
122 goto err_clk;
123 }
124 }
125#endif
126
127 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
128
129 pr_debug("cpufreq: Set actual frequency %lukHz\n",
130 clk_get_rate(armclk) / 1000);
131
132 return 0;
133
134err_clk:
135 if (clk_set_rate(armclk, freqs.old * 1000) < 0)
136 pr_err("Failed to restore original clock rate\n");
137err:
138 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
139
140 return ret;
141}
142
143#ifdef CONFIG_REGULATOR
144static void __init s3c64xx_cpufreq_constrain_voltages(void)
145{
146 int count, v, i, found;
147 struct cpufreq_frequency_table *freq;
148 struct s3c64xx_dvfs *dvfs;
149
150 count = regulator_count_voltages(vddarm);
151 if (count < 0) {
152 pr_err("cpufreq: Unable to check supported voltages\n");
153 return;
154 }
155
156 freq = s3c64xx_freq_table;
157 while (freq->frequency != CPUFREQ_TABLE_END) {
158 if (freq->frequency == CPUFREQ_ENTRY_INVALID)
159 continue;
160
161 dvfs = &s3c64xx_dvfs_table[freq->index];
162 found = 0;
163
164 for (i = 0; i < count; i++) {
165 v = regulator_list_voltage(vddarm, i);
166 if (v >= dvfs->vddarm_min && v <= dvfs->vddarm_max)
167 found = 1;
168 }
169
170 if (!found) {
171 pr_debug("cpufreq: %dkHz unsupported by regulator\n",
172 freq->frequency);
173 freq->frequency = CPUFREQ_ENTRY_INVALID;
174 }
175
176 freq++;
177 }
178}
179#endif
180
181static int __init s3c64xx_cpufreq_driver_init(struct cpufreq_policy *policy)
182{
183 int ret;
184 struct cpufreq_frequency_table *freq;
185
186 if (policy->cpu != 0)
187 return -EINVAL;
188
189 if (s3c64xx_freq_table == NULL) {
190 pr_err("cpufreq: No frequency information for this CPU\n");
191 return -ENODEV;
192 }
193
194 armclk = clk_get(NULL, "armclk");
195 if (IS_ERR(armclk)) {
196 pr_err("cpufreq: Unable to obtain ARMCLK: %ld\n",
197 PTR_ERR(armclk));
198 return PTR_ERR(armclk);
199 }
200
201#ifdef CONFIG_REGULATOR
202 vddarm = regulator_get(NULL, "vddarm");
203 if (IS_ERR(vddarm)) {
204 ret = PTR_ERR(vddarm);
205 pr_err("cpufreq: Failed to obtain VDDARM: %d\n", ret);
206 pr_err("cpufreq: Only frequency scaling available\n");
207 vddarm = NULL;
208 } else {
209 s3c64xx_cpufreq_constrain_voltages();
210 }
211#endif
212
213 freq = s3c64xx_freq_table;
214 while (freq->frequency != CPUFREQ_TABLE_END) {
215 unsigned long r;
216
217 /* Check for frequencies we can generate */
218 r = clk_round_rate(armclk, freq->frequency * 1000);
219 r /= 1000;
220 if (r != freq->frequency)
221 freq->frequency = CPUFREQ_ENTRY_INVALID;
222
223 /* If we have no regulator then assume startup
224 * frequency is the maximum we can support. */
225 if (!vddarm && freq->frequency > s3c64xx_cpufreq_get_speed(0))
226 freq->frequency = CPUFREQ_ENTRY_INVALID;
227
228 freq++;
229 }
230
231 policy->cur = clk_get_rate(armclk) / 1000;
232
233 /* Pick a conservative guess in ns: we'll need ~1 I2C/SPI
234 * write plus clock reprogramming. */
235 policy->cpuinfo.transition_latency = 2 * 1000 * 1000;
236
237 ret = cpufreq_frequency_table_cpuinfo(policy, s3c64xx_freq_table);
238 if (ret != 0) {
239 pr_err("cpufreq: Failed to configure frequency table: %d\n",
240 ret);
241 regulator_put(vddarm);
242 clk_put(armclk);
243 }
244
245 return ret;
246}
247
248static struct cpufreq_driver s3c64xx_cpufreq_driver = {
249 .owner = THIS_MODULE,
250 .flags = 0,
251 .verify = s3c64xx_cpufreq_verify_speed,
252 .target = s3c64xx_cpufreq_set_target,
253 .get = s3c64xx_cpufreq_get_speed,
254 .init = s3c64xx_cpufreq_driver_init,
255 .name = "s3c",
256};
257
258static int __init s3c64xx_cpufreq_init(void)
259{
260 return cpufreq_register_driver(&s3c64xx_cpufreq_driver);
261}
262module_init(s3c64xx_cpufreq_init);
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/plat-s3c64xx/gpiolib.c
index da7b60ee5e67..92859290ea33 100644
--- a/arch/arm/plat-s3c64xx/gpiolib.c
+++ b/arch/arm/plat-s3c64xx/gpiolib.c
@@ -321,6 +321,11 @@ static struct s3c_gpio_cfg gpio_2bit_cfg_eint11 = {
321 .get_pull = s3c_gpio_getpull_updown, 321 .get_pull = s3c_gpio_getpull_updown,
322}; 322};
323 323
324int s3c64xx_gpio2int_gpn(struct gpio_chip *chip, unsigned pin)
325{
326 return IRQ_EINT(0) + pin;
327}
328
324static struct s3c_gpio_chip gpio_2bit[] = { 329static struct s3c_gpio_chip gpio_2bit[] = {
325 { 330 {
326 .base = S3C64XX_GPF_BASE, 331 .base = S3C64XX_GPF_BASE,
@@ -353,6 +358,7 @@ static struct s3c_gpio_chip gpio_2bit[] = {
353 .base = S3C64XX_GPN(0), 358 .base = S3C64XX_GPN(0),
354 .ngpio = S3C64XX_GPIO_N_NR, 359 .ngpio = S3C64XX_GPIO_N_NR,
355 .label = "GPN", 360 .label = "GPN",
361 .to_irq = s3c64xx_gpio2int_gpn,
356 }, 362 },
357 }, { 363 }, {
358 .base = S3C64XX_GPO_BASE, 364 .base = S3C64XX_GPO_BASE,
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
index 52836d41e333..a8777a755dfa 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
+++ b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
@@ -88,11 +88,11 @@
88#define S3C6400_CLKDIV2_SPI0_SHIFT (0) 88#define S3C6400_CLKDIV2_SPI0_SHIFT (0)
89 89
90/* HCLK GATE Registers */ 90/* HCLK GATE Registers */
91#define S3C_CLKCON_HCLK_BUS (1<<30) 91#define S3C_CLKCON_HCLK_3DSE (1<<31)
92#define S3C_CLKCON_HCLK_SECUR (1<<29) 92#define S3C_CLKCON_HCLK_UHOST (1<<29)
93#define S3C_CLKCON_HCLK_SDMA1 (1<<28) 93#define S3C_CLKCON_HCLK_SECUR (1<<28)
94#define S3C_CLKCON_HCLK_SDMA2 (1<<27) 94#define S3C_CLKCON_HCLK_SDMA1 (1<<27)
95#define S3C_CLKCON_HCLK_UHOST (1<<26) 95#define S3C_CLKCON_HCLK_SDMA0 (1<<26)
96#define S3C_CLKCON_HCLK_IROM (1<<25) 96#define S3C_CLKCON_HCLK_IROM (1<<25)
97#define S3C_CLKCON_HCLK_DDR1 (1<<24) 97#define S3C_CLKCON_HCLK_DDR1 (1<<24)
98#define S3C_CLKCON_HCLK_DDR0 (1<<23) 98#define S3C_CLKCON_HCLK_DDR0 (1<<23)
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index fec64678a63a..33026eff2aa4 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Fri May 29 10:14:20 2009 15# Last update: Sat Jun 20 22:28:39 2009
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -1455,7 +1455,7 @@ gba MACH_GBA GBA 1457
1455h6044 MACH_H6044 H6044 1458 1455h6044 MACH_H6044 H6044 1458
1456app MACH_APP APP 1459 1456app MACH_APP APP 1459
1457tct_hammer MACH_TCT_HAMMER TCT_HAMMER 1460 1457tct_hammer MACH_TCT_HAMMER TCT_HAMMER 1460
1458herald MACH_HERMES HERMES 1461 1458herald MACH_HERALD HERALD 1461
1459artemis MACH_ARTEMIS ARTEMIS 1462 1459artemis MACH_ARTEMIS ARTEMIS 1462
1460htctitan MACH_HTCTITAN HTCTITAN 1463 1460htctitan MACH_HTCTITAN HTCTITAN 1463
1461qranium MACH_QRANIUM QRANIUM 1464 1461qranium MACH_QRANIUM QRANIUM 1464
@@ -2245,3 +2245,38 @@ str9 MACH_STR9 STR9 2257
2245omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258 2245omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
2246simcom MACH_SIMCOM SIMCOM 2259 2246simcom MACH_SIMCOM SIMCOM 2259
2247mcwebio MACH_MCWEBIO MCWEBIO 2260 2247mcwebio MACH_MCWEBIO MCWEBIO 2260
2248omap3_phrazer MACH_OMAP3_PHRAZER OMAP3_PHRAZER 2261
2249darwin MACH_DARWIN DARWIN 2262
2250oratiscomu MACH_ORATISCOMU ORATISCOMU 2263
2251rtsbc20 MACH_RTSBC20 RTSBC20 2264
2252i780 MACH_I780 I780 2265
2253gemini324 MACH_GEMINI324 GEMINI324 2266
2254oratislan MACH_ORATISLAN ORATISLAN 2267
2255oratisalog MACH_ORATISALOG ORATISALOG 2268
2256oratismadi MACH_ORATISMADI ORATISMADI 2269
2257oratisot16 MACH_ORATISOT16 ORATISOT16 2270
2258oratisdesk MACH_ORATISDESK ORATISDESK 2271
2259v2p_ca9 MACH_V2P_CA9 V2P_CA9 2272
2260sintexo MACH_SINTEXO SINTEXO 2273
2261cm3389 MACH_CM3389 CM3389 2274
2262omap3_cio MACH_OMAP3_CIO OMAP3_CIO 2275
2263sgh_i900 MACH_SGH_I900 SGH_I900 2276
2264bst100 MACH_BST100 BST100 2277
2265passion MACH_PASSION PASSION 2278
2266indesign_at91sam MACH_INDESIGN_AT91SAM INDESIGN_AT91SAM 2279
2267c4_badger MACH_C4_BADGER C4_BADGER 2280
2268c4_viper MACH_C4_VIPER C4_VIPER 2281
2269d2net MACH_D2NET D2NET 2282
2270bigdisk MACH_BIGDISK BIGDISK 2283
2271notalvision MACH_NOTALVISION NOTALVISION 2284
2272omap3_kboc MACH_OMAP3_KBOC OMAP3_KBOC 2285
2273cyclone MACH_CYCLONE CYCLONE 2286
2274ninja MACH_NINJA NINJA 2287
2275at91sam9g20ek_2mmc MACH_AT91SAM9G20EK_2MMC AT91SAM9G20EK_2MMC 2288
2276bcmring MACH_BCMRING BCMRING 2289
2277resol_dl2 MACH_RESOL_DL2 RESOL_DL2 2290
2278ifosw MACH_IFOSW IFOSW 2291
2279htcrhodium MACH_HTCRHODIUM HTCRHODIUM 2292
2280htctopaz MACH_HTCTOPAZ HTCTOPAZ 2293
2281matrix504 MACH_MATRIX504 MATRIX504 2294
2282mrfsa MACH_MRFSA MRFSA 2295
diff --git a/sound/soc/pxa/corgi.c b/sound/soc/pxa/corgi.c
index d5be2b30cda5..fefe1a57f31a 100644
--- a/sound/soc/pxa/corgi.c
+++ b/sound/soc/pxa/corgi.c
@@ -320,38 +320,6 @@ static struct snd_soc_device corgi_snd_devdata = {
320 .codec_dev = &soc_codec_dev_wm8731, 320 .codec_dev = &soc_codec_dev_wm8731,
321}; 321};
322 322
323/*
324 * FIXME: This is a temporary bodge to avoid cross-tree merge issues.
325 * New drivers should register the wm8731 I2C device in the machine
326 * setup code (under arch/arm for ARM systems).
327 */
328static int wm8731_i2c_register(void)
329{
330 struct i2c_board_info info;
331 struct i2c_adapter *adapter;
332 struct i2c_client *client;
333
334 memset(&info, 0, sizeof(struct i2c_board_info));
335 info.addr = 0x1b;
336 strlcpy(info.type, "wm8731", I2C_NAME_SIZE);
337
338 adapter = i2c_get_adapter(0);
339 if (!adapter) {
340 printk(KERN_ERR "can't get i2c adapter 0\n");
341 return -ENODEV;
342 }
343
344 client = i2c_new_device(adapter, &info);
345 i2c_put_adapter(adapter);
346 if (!client) {
347 printk(KERN_ERR "can't add i2c device at 0x%x\n",
348 (unsigned int)info.addr);
349 return -ENODEV;
350 }
351
352 return 0;
353}
354
355static struct platform_device *corgi_snd_device; 323static struct platform_device *corgi_snd_device;
356 324
357static int __init corgi_init(void) 325static int __init corgi_init(void)
@@ -362,10 +330,6 @@ static int __init corgi_init(void)
362 machine_is_husky())) 330 machine_is_husky()))
363 return -ENODEV; 331 return -ENODEV;
364 332
365 ret = wm8731_i2c_register();
366 if (ret != 0)
367 return ret;
368
369 corgi_snd_device = platform_device_alloc("soc-audio", -1); 333 corgi_snd_device = platform_device_alloc("soc-audio", -1);
370 if (!corgi_snd_device) 334 if (!corgi_snd_device)
371 return -ENOMEM; 335 return -ENOMEM;
diff --git a/sound/soc/pxa/poodle.c b/sound/soc/pxa/poodle.c
index a51058f66747..c5f36e0eab58 100644
--- a/sound/soc/pxa/poodle.c
+++ b/sound/soc/pxa/poodle.c
@@ -280,38 +280,6 @@ static struct snd_soc_card snd_soc_poodle = {
280 .num_links = 1, 280 .num_links = 1,
281}; 281};
282 282
283/*
284 * FIXME: This is a temporary bodge to avoid cross-tree merge issues.
285 * New drivers should register the wm8731 I2C device in the machine
286 * setup code (under arch/arm for ARM systems).
287 */
288static int wm8731_i2c_register(void)
289{
290 struct i2c_board_info info;
291 struct i2c_adapter *adapter;
292 struct i2c_client *client;
293
294 memset(&info, 0, sizeof(struct i2c_board_info));
295 info.addr = 0x1b;
296 strlcpy(info.type, "wm8731", I2C_NAME_SIZE);
297
298 adapter = i2c_get_adapter(0);
299 if (!adapter) {
300 printk(KERN_ERR "can't get i2c adapter 0\n");
301 return -ENODEV;
302 }
303
304 client = i2c_new_device(adapter, &info);
305 i2c_put_adapter(adapter);
306 if (!client) {
307 printk(KERN_ERR "can't add i2c device at 0x%x\n",
308 (unsigned int)info.addr);
309 return -ENODEV;
310 }
311
312 return 0;
313}
314
315/* poodle audio subsystem */ 283/* poodle audio subsystem */
316static struct snd_soc_device poodle_snd_devdata = { 284static struct snd_soc_device poodle_snd_devdata = {
317 .card = &snd_soc_poodle, 285 .card = &snd_soc_poodle,
@@ -327,10 +295,6 @@ static int __init poodle_init(void)
327 if (!machine_is_poodle()) 295 if (!machine_is_poodle())
328 return -ENODEV; 296 return -ENODEV;
329 297
330 ret = wm8731_i2c_register();
331 if (ret != 0)
332 return ret;
333
334 locomo_gpio_set_dir(&poodle_locomo_device.dev, 298 locomo_gpio_set_dir(&poodle_locomo_device.dev,
335 POODLE_LOCOMO_GPIO_AMP_ON, 0); 299 POODLE_LOCOMO_GPIO_AMP_ON, 0);
336 /* should we mute HP at startup - burning power ?*/ 300 /* should we mute HP at startup - burning power ?*/
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-25 09:43:57 -0500