diff options
author | Yitchak Gertner <gertner@broadcom.com> | 2008-08-13 18:51:28 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-08-13 19:02:35 -0400 |
commit | 9dabc4242f7e51d98a71af7ee11a36e637897f9e (patch) | |
tree | f915bc4477b1ac6fae1e607b6b92700c519c68ad | |
parent | 326262307bad2391a6393bb1968ed9a9a16fc617 (diff) |
bnx2x: Self-test false positive
Self-test false positive
- The memory test should use a mask according to the chip type
- In the register test, check the port only once and not inside the for
loop (not causing a failure - just ugly)
Signed-off-by: Yitchak Gertner <gertner@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/bnx2x_main.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c index b8cdce21c5d9..a4177e964c56 100644 --- a/drivers/net/bnx2x_main.c +++ b/drivers/net/bnx2x_main.c | |||
@@ -8420,6 +8420,7 @@ static int bnx2x_test_registers(struct bnx2x *bp) | |||
8420 | { | 8420 | { |
8421 | int idx, i, rc = -ENODEV; | 8421 | int idx, i, rc = -ENODEV; |
8422 | u32 wr_val = 0; | 8422 | u32 wr_val = 0; |
8423 | int port = BP_PORT(bp); | ||
8423 | static const struct { | 8424 | static const struct { |
8424 | u32 offset0; | 8425 | u32 offset0; |
8425 | u32 offset1; | 8426 | u32 offset1; |
@@ -8485,7 +8486,6 @@ static int bnx2x_test_registers(struct bnx2x *bp) | |||
8485 | 8486 | ||
8486 | for (i = 0; reg_tbl[i].offset0 != 0xffffffff; i++) { | 8487 | for (i = 0; reg_tbl[i].offset0 != 0xffffffff; i++) { |
8487 | u32 offset, mask, save_val, val; | 8488 | u32 offset, mask, save_val, val; |
8488 | int port = BP_PORT(bp); | ||
8489 | 8489 | ||
8490 | offset = reg_tbl[i].offset0 + port*reg_tbl[i].offset1; | 8490 | offset = reg_tbl[i].offset0 + port*reg_tbl[i].offset1; |
8491 | mask = reg_tbl[i].mask; | 8491 | mask = reg_tbl[i].mask; |
@@ -8531,16 +8531,17 @@ static int bnx2x_test_memory(struct bnx2x *bp) | |||
8531 | static const struct { | 8531 | static const struct { |
8532 | char *name; | 8532 | char *name; |
8533 | u32 offset; | 8533 | u32 offset; |
8534 | u32 mask; | 8534 | u32 e1_mask; |
8535 | u32 e1h_mask; | ||
8535 | } prty_tbl[] = { | 8536 | } prty_tbl[] = { |
8536 | { "CCM_REG_CCM_PRTY_STS", CCM_REG_CCM_PRTY_STS, 0 }, | 8537 | { "CCM_PRTY_STS", CCM_REG_CCM_PRTY_STS, 0x3ffc0, 0 }, |
8537 | { "CFC_REG_CFC_PRTY_STS", CFC_REG_CFC_PRTY_STS, 0 }, | 8538 | { "CFC_PRTY_STS", CFC_REG_CFC_PRTY_STS, 0x2, 0x2 }, |
8538 | { "DMAE_REG_DMAE_PRTY_STS", DMAE_REG_DMAE_PRTY_STS, 0 }, | 8539 | { "DMAE_PRTY_STS", DMAE_REG_DMAE_PRTY_STS, 0, 0 }, |
8539 | { "TCM_REG_TCM_PRTY_STS", TCM_REG_TCM_PRTY_STS, 0 }, | 8540 | { "TCM_PRTY_STS", TCM_REG_TCM_PRTY_STS, 0x3ffc0, 0 }, |
8540 | { "UCM_REG_UCM_PRTY_STS", UCM_REG_UCM_PRTY_STS, 0 }, | 8541 | { "UCM_PRTY_STS", UCM_REG_UCM_PRTY_STS, 0x3ffc0, 0 }, |
8541 | { "XCM_REG_XCM_PRTY_STS", XCM_REG_XCM_PRTY_STS, 0x1 }, | 8542 | { "XCM_PRTY_STS", XCM_REG_XCM_PRTY_STS, 0x3ffc1, 0 }, |
8542 | 8543 | ||
8543 | { NULL, 0xffffffff, 0 } | 8544 | { NULL, 0xffffffff, 0, 0 } |
8544 | }; | 8545 | }; |
8545 | 8546 | ||
8546 | if (!netif_running(bp->dev)) | 8547 | if (!netif_running(bp->dev)) |
@@ -8554,7 +8555,8 @@ static int bnx2x_test_memory(struct bnx2x *bp) | |||
8554 | /* Check the parity status */ | 8555 | /* Check the parity status */ |
8555 | for (i = 0; prty_tbl[i].offset != 0xffffffff; i++) { | 8556 | for (i = 0; prty_tbl[i].offset != 0xffffffff; i++) { |
8556 | val = REG_RD(bp, prty_tbl[i].offset); | 8557 | val = REG_RD(bp, prty_tbl[i].offset); |
8557 | if (val & ~(prty_tbl[i].mask)) { | 8558 | if ((CHIP_IS_E1(bp) && (val & ~(prty_tbl[i].e1_mask))) || |
8559 | (CHIP_IS_E1H(bp) && (val & ~(prty_tbl[i].e1h_mask)))) { | ||
8558 | DP(NETIF_MSG_HW, | 8560 | DP(NETIF_MSG_HW, |
8559 | "%s is 0x%x\n", prty_tbl[i].name, val); | 8561 | "%s is 0x%x\n", prty_tbl[i].name, val); |
8560 | goto test_mem_exit; | 8562 | goto test_mem_exit; |