aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2010-02-01 13:46:49 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-02-01 13:46:49 -0500
commit9ce929078af868ce5f5b0b3537184dad642fba43 (patch)
tree8d61d65f46ba894bbc346f5e0cfde72e7b2308de
parent13af75740f345a5ddb5f7020a688c0f96b0d9f1f (diff)
parent17aafccab4352b422aa01fa6ebf82daff693a5b3 (diff)
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm/radeon/kms: Fix oops after radeon_cs_parser_init() failure. drm/radeon/kms: move radeon KMS on/off switch out of staging. drm/radeon/kms: Bailout of blit if error happen & protect with mutex V3 drm/vmwgfx: Don't send bad flags to the host drm/vmwgfx: Request SVGA version 2 and bail if not found drm/vmwgfx: Correctly detect 3D drm/ttm: remove unnecessary save_flags and ttm_flag_masked in ttm_bo_util.c drm/kms: Remove incorrect comment in struct drm_mode_modeinfo drm/ttm: remove padding from ttm_ref_object on 64bit builds drm/radeon/kms: release agp on error. drm/kms/radeon/agp: Move the check of the aper_size after drm_acp_acquire and drm_agp_info drm/kms/radeon/agp: Fix warning, format ‘%d’ expects type ‘int’, but argument 4 has type ‘size_t’ drm/ttm: Avoid conflicting reserve_memtype during ttm_tt_set_page_caching. drm/kms/radeon: pick digitial encoders smarter. (v3) drm/radeon/kms: use active device to pick connector for encoder drm/radeon/kms: fix incorrect logic in DP vs eDP connector checking.
Diffstat
-rw-r--r--drivers/gpu/drm/Kconfig2
-rw-r--r--drivers/gpu/drm/radeon/atombios_dp.c27
-rw-r--r--drivers/gpu/drm/radeon/r600.c54
-rw-r--r--drivers/gpu/drm/radeon/r600_blit_kms.c7
-rw-r--r--drivers/gpu/drm/radeon/radeon.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_agp.c18
-rw-r--r--drivers/gpu/drm/radeon/radeon_cs.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c165
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h2
-rw-r--r--drivers/gpu/drm/radeon/rv770.c31
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo_util.c9
-rw-r--r--drivers/gpu/drm/ttm/ttm_object.c2
-rw-r--r--drivers/gpu/drm/ttm/ttm_tt.c23
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_drv.c13
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_drv.h3
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c19
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c2
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_kms.c10
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_resource.c16
-rw-r--r--drivers/staging/Kconfig2
-rw-r--r--include/drm/drm_mode.h2
21 files changed, 245 insertions, 165 deletions
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 96eddd17e050..305c59003963 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -66,6 +66,8 @@ config DRM_RADEON
66 66
67 If M is selected, the module will be called radeon. 67 If M is selected, the module will be called radeon.
68 68
69source "drivers/gpu/drm/radeon/Kconfig"
70
69config DRM_I810 71config DRM_I810
70 tristate "Intel I810" 72 tristate "Intel I810"
71 depends on DRM && AGP && AGP_INTEL 73 depends on DRM && AGP && AGP_INTEL
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index 3eb0ca5b3d73..71060114d5de 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -468,7 +468,7 @@ void radeon_dp_set_link_config(struct drm_connector *connector,
468 struct radeon_connector *radeon_connector; 468 struct radeon_connector *radeon_connector;
469 struct radeon_connector_atom_dig *dig_connector; 469 struct radeon_connector_atom_dig *dig_connector;
470 470
471 if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) || 471 if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) &&
472 (connector->connector_type != DRM_MODE_CONNECTOR_eDP)) 472 (connector->connector_type != DRM_MODE_CONNECTOR_eDP))
473 return; 473 return;
474 474
@@ -583,7 +583,7 @@ void dp_link_train(struct drm_encoder *encoder,
583 u8 train_set[4]; 583 u8 train_set[4];
584 int i; 584 int i;
585 585
586 if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) || 586 if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) &&
587 (connector->connector_type != DRM_MODE_CONNECTOR_eDP)) 587 (connector->connector_type != DRM_MODE_CONNECTOR_eDP))
588 return; 588 return;
589 589
@@ -596,21 +596,14 @@ void dp_link_train(struct drm_encoder *encoder,
596 return; 596 return;
597 dig_connector = radeon_connector->con_priv; 597 dig_connector = radeon_connector->con_priv;
598 598
599 if (ASIC_IS_DCE32(rdev)) { 599 if (dig->dig_encoder)
600 if (dig->dig_block) 600 enc_id |= ATOM_DP_CONFIG_DIG2_ENCODER;
601 enc_id |= ATOM_DP_CONFIG_DIG2_ENCODER; 601 else
602 else 602 enc_id |= ATOM_DP_CONFIG_DIG1_ENCODER;
603 enc_id |= ATOM_DP_CONFIG_DIG1_ENCODER; 603 if (dig_connector->linkb)
604 if (dig_connector->linkb) 604 enc_id |= ATOM_DP_CONFIG_LINK_B;
605 enc_id |= ATOM_DP_CONFIG_LINK_B; 605 else
606 else 606 enc_id |= ATOM_DP_CONFIG_LINK_A;
607 enc_id |= ATOM_DP_CONFIG_LINK_A;
608 } else {
609 if (dig_connector->linkb)
610 enc_id |= ATOM_DP_CONFIG_DIG2_ENCODER | ATOM_DP_CONFIG_LINK_B;
611 else
612 enc_id |= ATOM_DP_CONFIG_DIG1_ENCODER | ATOM_DP_CONFIG_LINK_A;
613 }
614 607
615 memset(link_configuration, 0, DP_LINK_CONFIGURATION_SIZE); 608 memset(link_configuration, 0, DP_LINK_CONFIGURATION_SIZE);
616 if (dig_connector->dp_clock == 270000) 609 if (dig_connector->dp_clock == 270000)
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index da9aa3c31bcf..1b6d0001b20e 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1788,23 +1788,24 @@ void r600_fence_ring_emit(struct radeon_device *rdev,
1788 radeon_ring_write(rdev, RB_INT_STAT); 1788 radeon_ring_write(rdev, RB_INT_STAT);
1789} 1789}
1790 1790
1791int r600_copy_dma(struct radeon_device *rdev,
1792 uint64_t src_offset,
1793 uint64_t dst_offset,
1794 unsigned num_pages,
1795 struct radeon_fence *fence)
1796{
1797 /* FIXME: implement */
1798 return 0;
1799}
1800
1801int r600_copy_blit(struct radeon_device *rdev, 1791int r600_copy_blit(struct radeon_device *rdev,
1802 uint64_t src_offset, uint64_t dst_offset, 1792 uint64_t src_offset, uint64_t dst_offset,
1803 unsigned num_pages, struct radeon_fence *fence) 1793 unsigned num_pages, struct radeon_fence *fence)
1804{ 1794{
1805 r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE); 1795 int r;
1796
1797 mutex_lock(&rdev->r600_blit.mutex);
1798 rdev->r600_blit.vb_ib = NULL;
1799 r = r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE);
1800 if (r) {
1801 if (rdev->r600_blit.vb_ib)
1802 radeon_ib_free(rdev, &rdev->r600_blit.vb_ib);
1803 mutex_unlock(&rdev->r600_blit.mutex);
1804 return r;
1805 }
1806 r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE); 1806 r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE);
1807 r600_blit_done_copy(rdev, fence); 1807 r600_blit_done_copy(rdev, fence);
1808 mutex_unlock(&rdev->r600_blit.mutex);
1808 return 0; 1809 return 0;
1809} 1810}
1810 1811
@@ -1860,26 +1861,19 @@ int r600_startup(struct radeon_device *rdev)
1860 return r; 1861 return r;
1861 } 1862 }
1862 r600_gpu_init(rdev); 1863 r600_gpu_init(rdev);
1863 1864 /* pin copy shader into vram */
1864 if (!rdev->r600_blit.shader_obj) { 1865 if (rdev->r600_blit.shader_obj) {
1865 r = r600_blit_init(rdev); 1866 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
1867 if (unlikely(r != 0))
1868 return r;
1869 r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
1870 &rdev->r600_blit.shader_gpu_addr);
1871 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
1866 if (r) { 1872 if (r) {
1867 DRM_ERROR("radeon: failed blitter (%d).\n", r); 1873 dev_err(rdev->dev, "(%d) pin blit object failed\n", r);
1868 return r; 1874 return r;
1869 } 1875 }
1870 } 1876 }
1871
1872 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
1873 if (unlikely(r != 0))
1874 return r;
1875 r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
1876 &rdev->r600_blit.shader_gpu_addr);
1877 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
1878 if (r) {
1879 dev_err(rdev->dev, "(%d) pin blit object failed\n", r);
1880 return r;
1881 }
1882
1883 /* Enable IRQ */ 1877 /* Enable IRQ */
1884 r = r600_irq_init(rdev); 1878 r = r600_irq_init(rdev);
1885 if (r) { 1879 if (r) {
@@ -2051,6 +2045,12 @@ int r600_init(struct radeon_device *rdev)
2051 r = r600_pcie_gart_init(rdev); 2045 r = r600_pcie_gart_init(rdev);
2052 if (r) 2046 if (r)
2053 return r; 2047 return r;
2048 r = r600_blit_init(rdev);
2049 if (r) {
2050 r600_blit_fini(rdev);
2051 rdev->asic->copy = NULL;
2052 dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
2053 }
2054 2054
2055 rdev->accel_working = true; 2055 rdev->accel_working = true;
2056 r = r600_startup(rdev); 2056 r = r600_startup(rdev);
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c
index 2bedce477a97..af1c3ca8a4cb 100644
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -449,6 +449,7 @@ int r600_blit_init(struct radeon_device *rdev)
449 u32 packet2s[16]; 449 u32 packet2s[16];
450 int num_packet2s = 0; 450 int num_packet2s = 0;
451 451
452 mutex_init(&rdev->r600_blit.mutex);
452 rdev->r600_blit.state_offset = 0; 453 rdev->r600_blit.state_offset = 0;
453 454
454 if (rdev->family >= CHIP_RV770) 455 if (rdev->family >= CHIP_RV770)
@@ -557,7 +558,8 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
557 int dwords_per_loop = 76, num_loops; 558 int dwords_per_loop = 76, num_loops;
558 559
559 r = r600_vb_ib_get(rdev); 560 r = r600_vb_ib_get(rdev);
560 WARN_ON(r); 561 if (r)
562 return r;
561 563
562 /* set_render_target emits 2 extra dwords on rv6xx */ 564 /* set_render_target emits 2 extra dwords on rv6xx */
563 if (rdev->family > CHIP_R600 && rdev->family < CHIP_RV770) 565 if (rdev->family > CHIP_R600 && rdev->family < CHIP_RV770)
@@ -583,7 +585,8 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
583 ring_size += 5; /* done copy */ 585 ring_size += 5; /* done copy */
584 ring_size += 7; /* fence emit for done copy */ 586 ring_size += 7; /* fence emit for done copy */
585 r = radeon_ring_lock(rdev, ring_size); 587 r = radeon_ring_lock(rdev, ring_size);
586 WARN_ON(r); 588 if (r)
589 return r;
587 590
588 set_default_state(rdev); /* 14 */ 591 set_default_state(rdev); /* 14 */
589 set_shaders(rdev); /* 26 */ 592 set_shaders(rdev); /* 26 */
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index f7df1a7e4413..2d5f2bfa7201 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -416,6 +416,7 @@ struct r600_ih {
416}; 416};
417 417
418struct r600_blit { 418struct r600_blit {
419 struct mutex mutex;
419 struct radeon_bo *shader_obj; 420 struct radeon_bo *shader_obj;
420 u64 shader_gpu_addr; 421 u64 shader_gpu_addr;
421 u32 vs_offset, ps_offset; 422 u32 vs_offset, ps_offset;
diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c
index c9ad7f5cc1ac..c0681a5556dc 100644
--- a/drivers/gpu/drm/radeon/radeon_agp.c
+++ b/drivers/gpu/drm/radeon/radeon_agp.c
@@ -133,13 +133,6 @@ int radeon_agp_init(struct radeon_device *rdev)
133 bool is_v3; 133 bool is_v3;
134 int ret; 134 int ret;
135 135
136 if (rdev->ddev->agp->agp_info.aper_size < 32) {
137 dev_warn(rdev->dev, "AGP aperture to small (%dM) "
138 "need at least 32M, disabling AGP\n",
139 rdev->ddev->agp->agp_info.aper_size);
140 return -EINVAL;
141 }
142
143 /* Acquire AGP. */ 136 /* Acquire AGP. */
144 if (!rdev->ddev->agp->acquired) { 137 if (!rdev->ddev->agp->acquired) {
145 ret = drm_agp_acquire(rdev->ddev); 138 ret = drm_agp_acquire(rdev->ddev);
@@ -151,9 +144,19 @@ int radeon_agp_init(struct radeon_device *rdev)
151 144
152 ret = drm_agp_info(rdev->ddev, &info); 145 ret = drm_agp_info(rdev->ddev, &info);
153 if (ret) { 146 if (ret) {
147 drm_agp_release(rdev->ddev);
154 DRM_ERROR("Unable to get AGP info: %d\n", ret); 148 DRM_ERROR("Unable to get AGP info: %d\n", ret);
155 return ret; 149 return ret;
156 } 150 }
151
152 if (rdev->ddev->agp->agp_info.aper_size < 32) {
153 drm_agp_release(rdev->ddev);
154 dev_warn(rdev->dev, "AGP aperture too small (%zuM) "
155 "need at least 32M, disabling AGP\n",
156 rdev->ddev->agp->agp_info.aper_size);
157 return -EINVAL;
158 }
159
157 mode.mode = info.mode; 160 mode.mode = info.mode;
158 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; 161 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode;
159 is_v3 = !!(agp_status & RADEON_AGPv3_MODE); 162 is_v3 = !!(agp_status & RADEON_AGPv3_MODE);
@@ -228,6 +231,7 @@ int radeon_agp_init(struct radeon_device *rdev)
228 ret = drm_agp_enable(rdev->ddev, mode); 231 ret = drm_agp_enable(rdev->ddev, mode);
229 if (ret) { 232 if (ret) {
230 DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); 233 DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);
234 drm_agp_release(rdev->ddev);
231 return ret; 235 return ret;
232 } 236 }
233 237
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index 1496cb8658ef..1190148cf5e6 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -189,7 +189,7 @@ static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
189{ 189{
190 unsigned i; 190 unsigned i;
191 191
192 if (error) { 192 if (error && parser->ib) {
193 radeon_bo_list_unvalidate(&parser->validated, 193 radeon_bo_list_unvalidate(&parser->validated,
194 parser->ib->fence); 194 parser->ib->fence);
195 } else { 195 } else {
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 82eb551970b9..3c91724457ca 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -156,6 +156,26 @@ radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t
156 return ret; 156 return ret;
157} 157}
158 158
159static inline bool radeon_encoder_is_digital(struct drm_encoder *encoder)
160{
161 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
162 switch (radeon_encoder->encoder_id) {
163 case ENCODER_OBJECT_ID_INTERNAL_LVDS:
164 case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
165 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
166 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
167 case ENCODER_OBJECT_ID_INTERNAL_DVO1:
168 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
169 case ENCODER_OBJECT_ID_INTERNAL_DDI:
170 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
171 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
172 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
173 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
174 return true;
175 default:
176 return false;
177 }
178}
159void 179void
160radeon_link_encoder_connector(struct drm_device *dev) 180radeon_link_encoder_connector(struct drm_device *dev)
161{ 181{
@@ -202,7 +222,7 @@ radeon_get_connector_for_encoder(struct drm_encoder *encoder)
202 222
203 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 223 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
204 radeon_connector = to_radeon_connector(connector); 224 radeon_connector = to_radeon_connector(connector);
205 if (radeon_encoder->devices & radeon_connector->devices) 225 if (radeon_encoder->active_device & radeon_connector->devices)
206 return connector; 226 return connector;
207 } 227 }
208 return NULL; 228 return NULL;
@@ -676,31 +696,11 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
676 696
677 memset(&args, 0, sizeof(args)); 697 memset(&args, 0, sizeof(args));
678 698
679 if (ASIC_IS_DCE32(rdev)) { 699 if (dig->dig_encoder)
680 if (dig->dig_block) 700 index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
681 index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl); 701 else
682 else 702 index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
683 index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); 703 num = dig->dig_encoder + 1;
684 num = dig->dig_block + 1;
685 } else {
686 switch (radeon_encoder->encoder_id) {
687 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
688 /* XXX doesn't really matter which dig encoder we pick as long as it's
689 * not already in use
690 */
691 if (dig_connector->linkb)
692 index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
693 else
694 index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
695 num = 1;
696 break;
697 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
698 /* Only dig2 encoder can drive LVTMA */
699 index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
700 num = 2;
701 break;
702 }
703 }
704 704
705 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); 705 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev);
706 706
@@ -822,7 +822,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
822 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); 822 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
823 } 823 }
824 if (ASIC_IS_DCE32(rdev)) { 824 if (ASIC_IS_DCE32(rdev)) {
825 if (dig->dig_block) 825 if (dig->dig_encoder == 1)
826 args.v2.acConfig.ucEncoderSel = 1; 826 args.v2.acConfig.ucEncoderSel = 1;
827 if (dig_connector->linkb) 827 if (dig_connector->linkb)
828 args.v2.acConfig.ucLinkSel = 1; 828 args.v2.acConfig.ucLinkSel = 1;
@@ -849,17 +849,16 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
849 args.v2.acConfig.fCoherentMode = 1; 849 args.v2.acConfig.fCoherentMode = 1;
850 } 850 }
851 } else { 851 } else {
852
852 args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; 853 args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
853 854
855 if (dig->dig_encoder)
856 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
857 else
858 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
859
854 switch (radeon_encoder->encoder_id) { 860 switch (radeon_encoder->encoder_id) {
855 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 861 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
856 /* XXX doesn't really matter which dig encoder we pick as long as it's
857 * not already in use
858 */
859 if (dig_connector->linkb)
860 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
861 else
862 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
863 if (rdev->flags & RADEON_IS_IGP) { 862 if (rdev->flags & RADEON_IS_IGP) {
864 if (radeon_encoder->pixel_clock > 165000) { 863 if (radeon_encoder->pixel_clock > 165000) {
865 if (dig_connector->igp_lane_info & 0x3) 864 if (dig_connector->igp_lane_info & 0x3)
@@ -878,10 +877,6 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
878 } 877 }
879 } 878 }
880 break; 879 break;
881 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
882 /* Only dig2 encoder can drive LVTMA */
883 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
884 break;
885 } 880 }
886 881
887 if (radeon_encoder->pixel_clock > 165000) 882 if (radeon_encoder->pixel_clock > 165000)
@@ -1046,6 +1041,7 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
1046 union crtc_sourc_param args; 1041 union crtc_sourc_param args;
1047 int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source); 1042 int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source);
1048 uint8_t frev, crev; 1043 uint8_t frev, crev;
1044 struct radeon_encoder_atom_dig *dig;
1049 1045
1050 memset(&args, 0, sizeof(args)); 1046 memset(&args, 0, sizeof(args));
1051 1047
@@ -1109,40 +1105,16 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
1109 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 1105 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
1110 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: 1106 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
1111 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: 1107 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
1112 if (ASIC_IS_DCE32(rdev)) { 1108 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
1113 if (radeon_crtc->crtc_id) 1109 dig = radeon_encoder->enc_priv;
1114 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; 1110 if (dig->dig_encoder)
1115 else 1111 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
1116 args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; 1112 else
1117 } else { 1113 args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
1118 struct drm_connector *connector;
1119 struct radeon_connector *radeon_connector;
1120 struct radeon_connector_atom_dig *dig_connector;
1121
1122 connector = radeon_get_connector_for_encoder(encoder);
1123 if (!connector)
1124 return;
1125 radeon_connector = to_radeon_connector(connector);
1126 if (!radeon_connector->con_priv)
1127 return;
1128 dig_connector = radeon_connector->con_priv;
1129
1130 /* XXX doesn't really matter which dig encoder we pick as long as it's
1131 * not already in use
1132 */
1133 if (dig_connector->linkb)
1134 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
1135 else
1136 args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
1137 }
1138 break; 1114 break;
1139 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: 1115 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
1140 args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID; 1116 args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID;
1141 break; 1117 break;
1142 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
1143 /* Only dig2 encoder can drive LVTMA */
1144 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
1145 break;
1146 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: 1118 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
1147 if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) 1119 if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
1148 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; 1120 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
@@ -1202,6 +1174,47 @@ atombios_apply_encoder_quirks(struct drm_encoder *encoder,
1202 } 1174 }
1203} 1175}
1204 1176
1177static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder)
1178{
1179 struct drm_device *dev = encoder->dev;
1180 struct radeon_device *rdev = dev->dev_private;
1181 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
1182 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1183 struct drm_encoder *test_encoder;
1184 struct radeon_encoder_atom_dig *dig;
1185 uint32_t dig_enc_in_use = 0;
1186 /* on DCE32 and encoder can driver any block so just crtc id */
1187 if (ASIC_IS_DCE32(rdev)) {
1188 return radeon_crtc->crtc_id;
1189 }
1190
1191 /* on DCE3 - LVTMA can only be driven by DIGB */
1192 list_for_each_entry(test_encoder, &dev->mode_config.encoder_list, head) {
1193 struct radeon_encoder *radeon_test_encoder;
1194
1195 if (encoder == test_encoder)
1196 continue;
1197
1198 if (!radeon_encoder_is_digital(test_encoder))
1199 continue;
1200
1201 radeon_test_encoder = to_radeon_encoder(test_encoder);
1202 dig = radeon_test_encoder->enc_priv;
1203
1204 if (dig->dig_encoder >= 0)
1205 dig_enc_in_use |= (1 << dig->dig_encoder);
1206 }
1207
1208 if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA) {
1209 if (dig_enc_in_use & 0x2)
1210 DRM_ERROR("LVDS required digital encoder 2 but it was in use - stealing\n");
1211 return 1;
1212 }
1213 if (!(dig_enc_in_use & 1))
1214 return 0;
1215 return 1;
1216}
1217
1205static void 1218static void
1206radeon_atom_encoder_mode_set(struct drm_encoder *encoder, 1219radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1207 struct drm_display_mode *mode, 1220 struct drm_display_mode *mode,
@@ -1214,12 +1227,9 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1214 1227
1215 if (radeon_encoder->active_device & 1228 if (radeon_encoder->active_device &
1216 (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) { 1229 (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) {
1217 if (radeon_encoder->enc_priv) { 1230 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
1218 struct radeon_encoder_atom_dig *dig; 1231 if (dig)
1219 1232 dig->dig_encoder = radeon_atom_pick_dig_encoder(encoder);
1220 dig = radeon_encoder->enc_priv;
1221 dig->dig_block = radeon_crtc->crtc_id;
1222 }
1223 } 1233 }
1224 radeon_encoder->pixel_clock = adjusted_mode->clock; 1234 radeon_encoder->pixel_clock = adjusted_mode->clock;
1225 1235
@@ -1379,7 +1389,13 @@ static void radeon_atom_encoder_commit(struct drm_encoder *encoder)
1379static void radeon_atom_encoder_disable(struct drm_encoder *encoder) 1389static void radeon_atom_encoder_disable(struct drm_encoder *encoder)
1380{ 1390{
1381 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 1391 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1392 struct radeon_encoder_atom_dig *dig;
1382 radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); 1393 radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
1394
1395 if (radeon_encoder_is_digital(encoder)) {
1396 dig = radeon_encoder->enc_priv;
1397 dig->dig_encoder = -1;
1398 }
1383 radeon_encoder->active_device = 0; 1399 radeon_encoder->active_device = 0;
1384} 1400}
1385 1401
@@ -1436,6 +1452,7 @@ radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder)
1436 1452
1437 /* coherent mode by default */ 1453 /* coherent mode by default */
1438 dig->coherent_mode = true; 1454 dig->coherent_mode = true;
1455 dig->dig_encoder = -1;
1439 1456
1440 return dig; 1457 return dig;
1441} 1458}
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 96b851f92f4c..e81b2aeb6a8f 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -299,7 +299,7 @@ struct radeon_atom_ss {
299struct radeon_encoder_atom_dig { 299struct radeon_encoder_atom_dig {
300 /* atom dig */ 300 /* atom dig */
301 bool coherent_mode; 301 bool coherent_mode;
302 int dig_block; 302 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
303 /* atom lvds */ 303 /* atom lvds */
304 uint32_t lvds_misc; 304 uint32_t lvds_misc;
305 uint16_t panel_pwr_delay; 305 uint16_t panel_pwr_delay;
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 55f6ffc4e58b..afd9e8213c29 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -887,26 +887,19 @@ static int rv770_startup(struct radeon_device *rdev)
887 return r; 887 return r;
888 } 888 }
889 rv770_gpu_init(rdev); 889 rv770_gpu_init(rdev);
890 890 /* pin copy shader into vram */
891 if (!rdev->r600_blit.shader_obj) { 891 if (rdev->r600_blit.shader_obj) {
892 r = r600_blit_init(rdev); 892 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
893 if (unlikely(r != 0))
894 return r;
895 r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
896 &rdev->r600_blit.shader_gpu_addr);
897 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
893 if (r) { 898 if (r) {
894 DRM_ERROR("radeon: failed blitter (%d).\n", r); 899 DRM_ERROR("failed to pin blit object %d\n", r);
895 return r; 900 return r;
896 } 901 }
897 } 902 }
898
899 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
900 if (unlikely(r != 0))
901 return r;
902 r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
903 &rdev->r600_blit.shader_gpu_addr);
904 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
905 if (r) {
906 DRM_ERROR("failed to pin blit object %d\n", r);
907 return r;
908 }
909
910 /* Enable IRQ */ 903 /* Enable IRQ */
911 r = r600_irq_init(rdev); 904 r = r600_irq_init(rdev);
912 if (r) { 905 if (r) {
@@ -1062,6 +1055,12 @@ int rv770_init(struct radeon_device *rdev)
1062 r = r600_pcie_gart_init(rdev); 1055 r = r600_pcie_gart_init(rdev);
1063 if (r) 1056 if (r)
1064 return r; 1057 return r;
1058 r = r600_blit_init(rdev);
1059 if (r) {
1060 r600_blit_fini(rdev);
1061 rdev->asic->copy = NULL;
1062 dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
1063 }
1065 1064
1066 rdev->accel_working = true; 1065 rdev->accel_working = true;
1067 r = rv770_startup(rdev); 1066 r = rv770_startup(rdev);
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
index 2ecf7d0c64f6..5ca37a58a98c 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -53,7 +53,6 @@ int ttm_bo_move_ttm(struct ttm_buffer_object *bo,
53{ 53{
54 struct ttm_tt *ttm = bo->ttm; 54 struct ttm_tt *ttm = bo->ttm;
55 struct ttm_mem_reg *old_mem = &bo->mem; 55 struct ttm_mem_reg *old_mem = &bo->mem;
56 uint32_t save_flags = old_mem->placement;
57 int ret; 56 int ret;
58 57
59 if (old_mem->mem_type != TTM_PL_SYSTEM) { 58 if (old_mem->mem_type != TTM_PL_SYSTEM) {
@@ -62,7 +61,6 @@ int ttm_bo_move_ttm(struct ttm_buffer_object *bo,
62 ttm_flag_masked(&old_mem->placement, TTM_PL_FLAG_SYSTEM, 61 ttm_flag_masked(&old_mem->placement, TTM_PL_FLAG_SYSTEM,
63 TTM_PL_MASK_MEM); 62 TTM_PL_MASK_MEM);
64 old_mem->mem_type = TTM_PL_SYSTEM; 63 old_mem->mem_type = TTM_PL_SYSTEM;
65 save_flags = old_mem->placement;
66 } 64 }
67 65
68 ret = ttm_tt_set_placement_caching(ttm, new_mem->placement); 66 ret = ttm_tt_set_placement_caching(ttm, new_mem->placement);
@@ -77,7 +75,7 @@ int ttm_bo_move_ttm(struct ttm_buffer_object *bo,
77 75
78 *old_mem = *new_mem; 76 *old_mem = *new_mem;
79 new_mem->mm_node = NULL; 77 new_mem->mm_node = NULL;
80 ttm_flag_masked(&save_flags, new_mem->placement, TTM_PL_MASK_MEMTYPE); 78
81 return 0; 79 return 0;
82} 80}
83EXPORT_SYMBOL(ttm_bo_move_ttm); 81EXPORT_SYMBOL(ttm_bo_move_ttm);
@@ -219,7 +217,6 @@ int ttm_bo_move_memcpy(struct ttm_buffer_object *bo,
219 void *old_iomap; 217 void *old_iomap;
220 void *new_iomap; 218 void *new_iomap;
221 int ret; 219 int ret;
222 uint32_t save_flags = old_mem->placement;
223 unsigned long i; 220 unsigned long i;
224 unsigned long page; 221 unsigned long page;
225 unsigned long add = 0; 222 unsigned long add = 0;
@@ -270,7 +267,6 @@ out2:
270 267
271 *old_mem = *new_mem; 268 *old_mem = *new_mem;
272 new_mem->mm_node = NULL; 269 new_mem->mm_node = NULL;
273 ttm_flag_masked(&save_flags, new_mem->placement, TTM_PL_MASK_MEMTYPE);
274 270
275 if ((man->flags & TTM_MEMTYPE_FLAG_FIXED) && (ttm != NULL)) { 271 if ((man->flags & TTM_MEMTYPE_FLAG_FIXED) && (ttm != NULL)) {
276 ttm_tt_unbind(ttm); 272 ttm_tt_unbind(ttm);
@@ -537,7 +533,6 @@ int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
537 struct ttm_mem_type_manager *man = &bdev->man[new_mem->mem_type]; 533 struct ttm_mem_type_manager *man = &bdev->man[new_mem->mem_type];
538 struct ttm_mem_reg *old_mem = &bo->mem; 534 struct ttm_mem_reg *old_mem = &bo->mem;
539 int ret; 535 int ret;
540 uint32_t save_flags = old_mem->placement;
541 struct ttm_buffer_object *ghost_obj; 536 struct ttm_buffer_object *ghost_obj;
542 void *tmp_obj = NULL; 537 void *tmp_obj = NULL;
543 538
@@ -598,7 +593,7 @@ int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
598 593
599 *old_mem = *new_mem; 594 *old_mem = *new_mem;
600 new_mem->mm_node = NULL; 595 new_mem->mm_node = NULL;
601 ttm_flag_masked(&save_flags, new_mem->placement, TTM_PL_MASK_MEMTYPE); 596
602 return 0; 597 return 0;
603} 598}
604EXPORT_SYMBOL(ttm_bo_move_accel_cleanup); 599EXPORT_SYMBOL(ttm_bo_move_accel_cleanup);
diff --git a/drivers/gpu/drm/ttm/ttm_object.c b/drivers/gpu/drm/ttm/ttm_object.c
index 1099abac824b..75e9d6f86ba4 100644
--- a/drivers/gpu/drm/ttm/ttm_object.c
+++ b/drivers/gpu/drm/ttm/ttm_object.c
@@ -109,8 +109,8 @@ struct ttm_ref_object {
109 struct drm_hash_item hash; 109 struct drm_hash_item hash;
110 struct list_head head; 110 struct list_head head;
111 struct kref kref; 111 struct kref kref;
112 struct ttm_base_object *obj;
113 enum ttm_ref_type ref_type; 112 enum ttm_ref_type ref_type;
113 struct ttm_base_object *obj;
114 struct ttm_object_file *tfile; 114 struct ttm_object_file *tfile;
115}; 115};
116 116
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index 9c2b1cc5dba5..e2123af7775a 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -198,17 +198,26 @@ EXPORT_SYMBOL(ttm_tt_populate);
198static inline int ttm_tt_set_page_caching(struct page *p, 198static inline int ttm_tt_set_page_caching(struct page *p,
199 enum ttm_caching_state c_state) 199 enum ttm_caching_state c_state)
200{ 200{
201 int ret = 0;
202
201 if (PageHighMem(p)) 203 if (PageHighMem(p))
202 return 0; 204 return 0;
203 205
204 switch (c_state) { 206 if (get_page_memtype(p) != -1) {
205 case tt_cached: 207 /* p isn't in the default caching state, set it to
206 return set_pages_wb(p, 1); 208 * writeback first to free its current memtype. */
207 case tt_wc: 209
208 return set_memory_wc((unsigned long) page_address(p), 1); 210 ret = set_pages_wb(p, 1);
209 default: 211 if (ret)
210 return set_pages_uc(p, 1); 212 return ret;
211 } 213 }
214
215 if (c_state == tt_wc)
216 ret = set_memory_wc((unsigned long) page_address(p), 1);
217 else if (c_state == tt_uncached)
218 ret = set_pages_uc(p, 1);
219
220 return ret;
212} 221}
213#else /* CONFIG_X86 */ 222#else /* CONFIG_X86 */
214static inline int ttm_tt_set_page_caching(struct page *p, 223static inline int ttm_tt_set_page_caching(struct page *p,
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index dedd121d8fe7..a6e8f687fa64 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -209,6 +209,7 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
209{ 209{
210 struct vmw_private *dev_priv; 210 struct vmw_private *dev_priv;
211 int ret; 211 int ret;
212 uint32_t svga_id;
212 213
213 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL); 214 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
214 if (unlikely(dev_priv == NULL)) { 215 if (unlikely(dev_priv == NULL)) {
@@ -239,6 +240,16 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
239 dev_priv->mmio_start = pci_resource_start(dev->pdev, 2); 240 dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
240 241
241 mutex_lock(&dev_priv->hw_mutex); 242 mutex_lock(&dev_priv->hw_mutex);
243
244 vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
245 svga_id = vmw_read(dev_priv, SVGA_REG_ID);
246 if (svga_id != SVGA_ID_2) {
247 ret = -ENOSYS;
248 DRM_ERROR("Unsuported SVGA ID 0x%x\n", svga_id);
249 mutex_unlock(&dev_priv->hw_mutex);
250 goto out_err0;
251 }
252
242 dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES); 253 dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
243 254
244 if (dev_priv->capabilities & SVGA_CAP_GMR) { 255 if (dev_priv->capabilities & SVGA_CAP_GMR) {
@@ -357,6 +368,8 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
357 dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier; 368 dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
358 register_pm_notifier(&dev_priv->pm_nb); 369 register_pm_notifier(&dev_priv->pm_nb);
359 370
371 DRM_INFO("%s", vmw_fifo_have_3d(dev_priv) ? "Have 3D\n" : "No 3D\n");
372
360 return 0; 373 return 0;
361 374
362out_no_device: 375out_no_device:
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
index 50529a7f06fb..135be9688c90 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -96,6 +96,8 @@ struct vmw_surface {
96 struct drm_vmw_size *sizes; 96 struct drm_vmw_size *sizes;
97 uint32_t num_sizes; 97 uint32_t num_sizes;
98 98
99 bool scanout;
100
99 /* TODO so far just a extra pointer */ 101 /* TODO so far just a extra pointer */
100 struct vmw_cursor_snooper snooper; 102 struct vmw_cursor_snooper snooper;
101}; 103};
@@ -389,6 +391,7 @@ extern int vmw_fifo_send_fence(struct vmw_private *dev_priv,
389 uint32_t *sequence); 391 uint32_t *sequence);
390extern void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason); 392extern void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason);
391extern int vmw_fifo_mmap(struct file *filp, struct vm_area_struct *vma); 393extern int vmw_fifo_mmap(struct file *filp, struct vm_area_struct *vma);
394extern bool vmw_fifo_have_3d(struct vmw_private *dev_priv);
392 395
393/** 396/**
394 * TTM glue - vmwgfx_ttm_glue.c 397 * TTM glue - vmwgfx_ttm_glue.c
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
index f7d5f70b52dd..4157547cc6e4 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
@@ -29,6 +29,25 @@
29#include "drmP.h" 29#include "drmP.h"
30#include "ttm/ttm_placement.h" 30#include "ttm/ttm_placement.h"
31 31
32bool vmw_fifo_have_3d(struct vmw_private *dev_priv)
33{
34 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
35 uint32_t fifo_min, hwversion;
36
37 fifo_min = ioread32(fifo_mem + SVGA_FIFO_MIN);
38 if (fifo_min <= SVGA_FIFO_3D_HWVERSION * sizeof(unsigned int))
39 return false;
40
41 hwversion = ioread32(fifo_mem + SVGA_FIFO_3D_HWVERSION);
42 if (hwversion == 0)
43 return false;
44
45 if (hwversion < SVGA3D_HWVERSION_WS65_B1)
46 return false;
47
48 return true;
49}
50
32int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo) 51int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
33{ 52{
34 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; 53 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
index 5fa6a4ed238a..778851f9f1d6 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
@@ -43,7 +43,7 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data,
43 param->value = vmw_overlay_num_free_overlays(dev_priv); 43 param->value = vmw_overlay_num_free_overlays(dev_priv);
44 break; 44 break;
45 case DRM_VMW_PARAM_3D: 45 case DRM_VMW_PARAM_3D:
46 param->value = dev_priv->capabilities & SVGA_CAP_3D ? 1 : 0; 46 param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
47 break; 47 break;
48 case DRM_VMW_PARAM_FIFO_OFFSET: 48 case DRM_VMW_PARAM_FIFO_OFFSET:
49 param->value = dev_priv->mmio_start; 49 param->value = dev_priv->mmio_start;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 686692de209a..eeba6d1d06e4 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -707,6 +707,9 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
707 if (ret) 707 if (ret)
708 goto try_dmabuf; 708 goto try_dmabuf;
709 709
710 if (!surface->scanout)
711 goto err_not_scanout;
712
710 ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb, 713 ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
711 mode_cmd->width, mode_cmd->height); 714 mode_cmd->width, mode_cmd->height);
712 715
@@ -740,6 +743,13 @@ try_dmabuf:
740 } 743 }
741 744
742 return &vfb->base; 745 return &vfb->base;
746
747err_not_scanout:
748 DRM_ERROR("surface not marked as scanout\n");
749 /* vmw_user_surface_lookup takes one ref */
750 vmw_surface_unreference(&surface);
751
752 return NULL;
743} 753}
744 754
745static int vmw_kms_fb_changed(struct drm_device *dev) 755static int vmw_kms_fb_changed(struct drm_device *dev)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
index e01db120efff..c7efbd47ab84 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -35,6 +35,11 @@
35#define VMW_RES_SURFACE ttm_driver_type1 35#define VMW_RES_SURFACE ttm_driver_type1
36#define VMW_RES_STREAM ttm_driver_type2 36#define VMW_RES_STREAM ttm_driver_type2
37 37
38/* XXX: This isn't a real hardware flag, but just a hack for kernel to
39 * know about primary surfaces. Find a better way to accomplish this.
40 */
41#define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9)
42
38struct vmw_user_context { 43struct vmw_user_context {
39 struct ttm_base_object base; 44 struct ttm_base_object base;
40 struct vmw_resource res; 45 struct vmw_resource res;
@@ -599,8 +604,17 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
599 if (unlikely(ret != 0)) 604 if (unlikely(ret != 0))
600 goto out_err1; 605 goto out_err1;
601 606
607 if (srf->flags & SVGA3D_SURFACE_HINT_SCANOUT) {
608 /* we should not send this flag down to hardware since
609 * its not a official one
610 */
611 srf->flags &= ~SVGA3D_SURFACE_HINT_SCANOUT;
612 srf->scanout = true;
613 } else {
614 srf->scanout = false;
615 }
602 616
603 if (srf->flags & (1 << 9) && 617 if (srf->scanout &&
604 srf->num_sizes == 1 && 618 srf->num_sizes == 1 &&
605 srf->sizes[0].width == 64 && 619 srf->sizes[0].width == 64 &&
606 srf->sizes[0].height == 64 && 620 srf->sizes[0].height == 64 &&
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index 94eb86319ff3..fc2e963e65e9 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -99,8 +99,6 @@ source "drivers/staging/line6/Kconfig"
99 99
100source "drivers/gpu/drm/vmwgfx/Kconfig" 100source "drivers/gpu/drm/vmwgfx/Kconfig"
101 101
102source "drivers/gpu/drm/radeon/Kconfig"
103
104source "drivers/gpu/drm/nouveau/Kconfig" 102source "drivers/gpu/drm/nouveau/Kconfig"
105 103
106source "drivers/staging/octeon/Kconfig" 104source "drivers/staging/octeon/Kconfig"
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index bc4fdf27bd2e..c5ba1636613c 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -85,7 +85,7 @@ struct drm_mode_modeinfo {
85 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; 85 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
86 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; 86 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
87 87
88 __u32 vrefresh; /* vertical refresh * 1000 */ 88 __u32 vrefresh;
89 89
90 __u32 flags; 90 __u32 flags;
91 __u32 type; 91 __u32 type;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 02:18:48 -0500