diff options
author | Michael Neuling <mikey@neuling.org> | 2008-06-26 03:07:48 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2008-06-30 21:28:43 -0400 |
commit | 9c75a31c3525a127f70b919856e32be3d8b03755 (patch) | |
tree | 3beee76d3dd4a55af868b5edfbef80c911819fed | |
parent | 9e7511861c4f8d35852a3721c5bcd92661cb4c9f (diff) |
powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers. Update all code to use these new macros.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r-- | arch/powerpc/kernel/align.c | 6 | ||||
-rw-r--r-- | arch/powerpc/kernel/process.c | 2 | ||||
-rw-r--r-- | arch/powerpc/kernel/ptrace.c | 10 | ||||
-rw-r--r-- | arch/powerpc/kernel/ptrace32.c | 14 | ||||
-rw-r--r-- | arch/powerpc/kernel/softemu8xx.c | 4 | ||||
-rw-r--r-- | arch/powerpc/math-emu/math.c | 56 | ||||
-rw-r--r-- | include/asm-powerpc/ppc_asm.h | 5 | ||||
-rw-r--r-- | include/asm-powerpc/processor.h | 4 |
8 files changed, 58 insertions, 43 deletions
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c index e06f75daeba3..c95954c81454 100644 --- a/arch/powerpc/kernel/align.c +++ b/arch/powerpc/kernel/align.c | |||
@@ -366,7 +366,7 @@ static int emulate_multiple(struct pt_regs *regs, unsigned char __user *addr, | |||
366 | static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr, | 366 | static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr, |
367 | unsigned int reg, unsigned int flags) | 367 | unsigned int reg, unsigned int flags) |
368 | { | 368 | { |
369 | char *ptr = (char *) ¤t->thread.fpr[reg]; | 369 | char *ptr = (char *) ¤t->thread.TS_FPR(reg); |
370 | int i, ret; | 370 | int i, ret; |
371 | 371 | ||
372 | if (!(flags & F)) | 372 | if (!(flags & F)) |
@@ -784,7 +784,7 @@ int fix_alignment(struct pt_regs *regs) | |||
784 | return -EFAULT; | 784 | return -EFAULT; |
785 | } | 785 | } |
786 | } else if (flags & F) { | 786 | } else if (flags & F) { |
787 | data.dd = current->thread.fpr[reg]; | 787 | data.dd = current->thread.TS_FPR(reg); |
788 | if (flags & S) { | 788 | if (flags & S) { |
789 | /* Single-precision FP store requires conversion... */ | 789 | /* Single-precision FP store requires conversion... */ |
790 | #ifdef CONFIG_PPC_FPU | 790 | #ifdef CONFIG_PPC_FPU |
@@ -862,7 +862,7 @@ int fix_alignment(struct pt_regs *regs) | |||
862 | if (unlikely(ret)) | 862 | if (unlikely(ret)) |
863 | return -EFAULT; | 863 | return -EFAULT; |
864 | } else if (flags & F) | 864 | } else if (flags & F) |
865 | current->thread.fpr[reg] = data.dd; | 865 | current->thread.TS_FPR(reg) = data.dd; |
866 | else | 866 | else |
867 | regs->gpr[reg] = data.ll; | 867 | regs->gpr[reg] = data.ll; |
868 | 868 | ||
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 7de41c3948ec..582df70439cb 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c | |||
@@ -110,7 +110,7 @@ int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs) | |||
110 | return 0; | 110 | return 0; |
111 | flush_fp_to_thread(current); | 111 | flush_fp_to_thread(current); |
112 | 112 | ||
113 | memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs)); | 113 | memcpy(fpregs, &tsk->thread.TS_FPR(0), sizeof(*fpregs)); |
114 | 114 | ||
115 | return 1; | 115 | return 1; |
116 | } | 116 | } |
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c index 2a9fe97e4521..59ff08704e94 100644 --- a/arch/powerpc/kernel/ptrace.c +++ b/arch/powerpc/kernel/ptrace.c | |||
@@ -218,7 +218,7 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset, | |||
218 | flush_fp_to_thread(target); | 218 | flush_fp_to_thread(target); |
219 | 219 | ||
220 | BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != | 220 | BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != |
221 | offsetof(struct thread_struct, fpr[32])); | 221 | offsetof(struct thread_struct, TS_FPR(32))); |
222 | 222 | ||
223 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | 223 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
224 | &target->thread.fpr, 0, -1); | 224 | &target->thread.fpr, 0, -1); |
@@ -231,7 +231,7 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset, | |||
231 | flush_fp_to_thread(target); | 231 | flush_fp_to_thread(target); |
232 | 232 | ||
233 | BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != | 233 | BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != |
234 | offsetof(struct thread_struct, fpr[32])); | 234 | offsetof(struct thread_struct, TS_FPR(32))); |
235 | 235 | ||
236 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, | 236 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
237 | &target->thread.fpr, 0, -1); | 237 | &target->thread.fpr, 0, -1); |
@@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
728 | tmp = ptrace_get_reg(child, (int) index); | 728 | tmp = ptrace_get_reg(child, (int) index); |
729 | } else { | 729 | } else { |
730 | flush_fp_to_thread(child); | 730 | flush_fp_to_thread(child); |
731 | tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; | 731 | tmp = ((unsigned long *)child->thread.fpr) |
732 | [TS_FPRWIDTH * (index - PT_FPR0)]; | ||
732 | } | 733 | } |
733 | ret = put_user(tmp,(unsigned long __user *) data); | 734 | ret = put_user(tmp,(unsigned long __user *) data); |
734 | break; | 735 | break; |
@@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
755 | ret = ptrace_put_reg(child, index, data); | 756 | ret = ptrace_put_reg(child, index, data); |
756 | } else { | 757 | } else { |
757 | flush_fp_to_thread(child); | 758 | flush_fp_to_thread(child); |
758 | ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data; | 759 | ((unsigned long *)child->thread.fpr) |
760 | [TS_FPRWIDTH * (index - PT_FPR0)] = data; | ||
759 | ret = 0; | 761 | ret = 0; |
760 | } | 762 | } |
761 | break; | 763 | break; |
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c index 4c1de6af4c09..67bf1a1e7e14 100644 --- a/arch/powerpc/kernel/ptrace32.c +++ b/arch/powerpc/kernel/ptrace32.c | |||
@@ -64,6 +64,11 @@ static long compat_ptrace_old(struct task_struct *child, long request, | |||
64 | return -EPERM; | 64 | return -EPERM; |
65 | } | 65 | } |
66 | 66 | ||
67 | /* Macros to workout the correct index for the FPR in the thread struct */ | ||
68 | #define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) | ||
69 | #define FPRHALF(i) (((i) - PT_FPR0) & 1) | ||
70 | #define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) + FPRHALF(i) | ||
71 | |||
67 | long compat_arch_ptrace(struct task_struct *child, compat_long_t request, | 72 | long compat_arch_ptrace(struct task_struct *child, compat_long_t request, |
68 | compat_ulong_t caddr, compat_ulong_t cdata) | 73 | compat_ulong_t caddr, compat_ulong_t cdata) |
69 | { | 74 | { |
@@ -122,7 +127,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, | |||
122 | * to be an array of unsigned int (32 bits) - the | 127 | * to be an array of unsigned int (32 bits) - the |
123 | * index passed in is based on this assumption. | 128 | * index passed in is based on this assumption. |
124 | */ | 129 | */ |
125 | tmp = ((unsigned int *)child->thread.fpr)[index - PT_FPR0]; | 130 | tmp = ((unsigned int *)child->thread.fpr) |
131 | [FPRINDEX(index)]; | ||
126 | } | 132 | } |
127 | ret = put_user((unsigned int)tmp, (u32 __user *)data); | 133 | ret = put_user((unsigned int)tmp, (u32 __user *)data); |
128 | break; | 134 | break; |
@@ -162,7 +168,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, | |||
162 | CHECK_FULL_REGS(child->thread.regs); | 168 | CHECK_FULL_REGS(child->thread.regs); |
163 | if (numReg >= PT_FPR0) { | 169 | if (numReg >= PT_FPR0) { |
164 | flush_fp_to_thread(child); | 170 | flush_fp_to_thread(child); |
165 | tmp = ((unsigned long int *)child->thread.fpr)[numReg - PT_FPR0]; | 171 | tmp = ((unsigned long int *)child->thread.fpr) |
172 | [FPRINDEX(numReg)]; | ||
166 | } else { /* register within PT_REGS struct */ | 173 | } else { /* register within PT_REGS struct */ |
167 | tmp = ptrace_get_reg(child, numReg); | 174 | tmp = ptrace_get_reg(child, numReg); |
168 | } | 175 | } |
@@ -217,7 +224,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, | |||
217 | * to be an array of unsigned int (32 bits) - the | 224 | * to be an array of unsigned int (32 bits) - the |
218 | * index passed in is based on this assumption. | 225 | * index passed in is based on this assumption. |
219 | */ | 226 | */ |
220 | ((unsigned int *)child->thread.fpr)[index - PT_FPR0] = data; | 227 | ((unsigned int *)child->thread.fpr) |
228 | [FPRINDEX(index)] = data; | ||
221 | ret = 0; | 229 | ret = 0; |
222 | } | 230 | } |
223 | break; | 231 | break; |
diff --git a/arch/powerpc/kernel/softemu8xx.c b/arch/powerpc/kernel/softemu8xx.c index 67d6f6890edc..c906c4bf6835 100644 --- a/arch/powerpc/kernel/softemu8xx.c +++ b/arch/powerpc/kernel/softemu8xx.c | |||
@@ -124,7 +124,7 @@ int Soft_emulate_8xx(struct pt_regs *regs) | |||
124 | disp = instword & 0xffff; | 124 | disp = instword & 0xffff; |
125 | 125 | ||
126 | ea = (u32 *)(regs->gpr[idxreg] + disp); | 126 | ea = (u32 *)(regs->gpr[idxreg] + disp); |
127 | ip = (u32 *)¤t->thread.fpr[flreg]; | 127 | ip = (u32 *)¤t->thread.TS_FPR(flreg); |
128 | 128 | ||
129 | switch ( inst ) | 129 | switch ( inst ) |
130 | { | 130 | { |
@@ -168,7 +168,7 @@ int Soft_emulate_8xx(struct pt_regs *regs) | |||
168 | break; | 168 | break; |
169 | case FMR: | 169 | case FMR: |
170 | /* assume this is a fp move -- Cort */ | 170 | /* assume this is a fp move -- Cort */ |
171 | memcpy(ip, ¤t->thread.fpr[(instword>>11)&0x1f], | 171 | memcpy(ip, ¤t->thread.TS_FPR((instword>>11)&0x1f), |
172 | sizeof(double)); | 172 | sizeof(double)); |
173 | break; | 173 | break; |
174 | default: | 174 | default: |
diff --git a/arch/powerpc/math-emu/math.c b/arch/powerpc/math-emu/math.c index 381306bb1590..29e545e0272e 100644 --- a/arch/powerpc/math-emu/math.c +++ b/arch/powerpc/math-emu/math.c | |||
@@ -230,14 +230,14 @@ do_mathemu(struct pt_regs *regs) | |||
230 | case LFD: | 230 | case LFD: |
231 | idx = (insn >> 16) & 0x1f; | 231 | idx = (insn >> 16) & 0x1f; |
232 | sdisp = (insn & 0xffff); | 232 | sdisp = (insn & 0xffff); |
233 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 233 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
234 | op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); | 234 | op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); |
235 | lfd(op0, op1, op2, op3); | 235 | lfd(op0, op1, op2, op3); |
236 | break; | 236 | break; |
237 | case LFDU: | 237 | case LFDU: |
238 | idx = (insn >> 16) & 0x1f; | 238 | idx = (insn >> 16) & 0x1f; |
239 | sdisp = (insn & 0xffff); | 239 | sdisp = (insn & 0xffff); |
240 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 240 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
241 | op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); | 241 | op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); |
242 | lfd(op0, op1, op2, op3); | 242 | lfd(op0, op1, op2, op3); |
243 | regs->gpr[idx] = (unsigned long)op1; | 243 | regs->gpr[idx] = (unsigned long)op1; |
@@ -245,21 +245,21 @@ do_mathemu(struct pt_regs *regs) | |||
245 | case STFD: | 245 | case STFD: |
246 | idx = (insn >> 16) & 0x1f; | 246 | idx = (insn >> 16) & 0x1f; |
247 | sdisp = (insn & 0xffff); | 247 | sdisp = (insn & 0xffff); |
248 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 248 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
249 | op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); | 249 | op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); |
250 | stfd(op0, op1, op2, op3); | 250 | stfd(op0, op1, op2, op3); |
251 | break; | 251 | break; |
252 | case STFDU: | 252 | case STFDU: |
253 | idx = (insn >> 16) & 0x1f; | 253 | idx = (insn >> 16) & 0x1f; |
254 | sdisp = (insn & 0xffff); | 254 | sdisp = (insn & 0xffff); |
255 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 255 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
256 | op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); | 256 | op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); |
257 | stfd(op0, op1, op2, op3); | 257 | stfd(op0, op1, op2, op3); |
258 | regs->gpr[idx] = (unsigned long)op1; | 258 | regs->gpr[idx] = (unsigned long)op1; |
259 | break; | 259 | break; |
260 | case OP63: | 260 | case OP63: |
261 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 261 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
262 | op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; | 262 | op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); |
263 | fmr(op0, op1, op2, op3); | 263 | fmr(op0, op1, op2, op3); |
264 | break; | 264 | break; |
265 | default: | 265 | default: |
@@ -356,28 +356,28 @@ do_mathemu(struct pt_regs *regs) | |||
356 | 356 | ||
357 | switch (type) { | 357 | switch (type) { |
358 | case AB: | 358 | case AB: |
359 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 359 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
360 | op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f]; | 360 | op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); |
361 | op2 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; | 361 | op2 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); |
362 | break; | 362 | break; |
363 | 363 | ||
364 | case AC: | 364 | case AC: |
365 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 365 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
366 | op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f]; | 366 | op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); |
367 | op2 = (void *)¤t->thread.fpr[(insn >> 6) & 0x1f]; | 367 | op2 = (void *)¤t->thread.TS_FPR((insn >> 6) & 0x1f); |
368 | break; | 368 | break; |
369 | 369 | ||
370 | case ABC: | 370 | case ABC: |
371 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 371 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
372 | op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f]; | 372 | op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); |
373 | op2 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; | 373 | op2 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); |
374 | op3 = (void *)¤t->thread.fpr[(insn >> 6) & 0x1f]; | 374 | op3 = (void *)¤t->thread.TS_FPR((insn >> 6) & 0x1f); |
375 | break; | 375 | break; |
376 | 376 | ||
377 | case D: | 377 | case D: |
378 | idx = (insn >> 16) & 0x1f; | 378 | idx = (insn >> 16) & 0x1f; |
379 | sdisp = (insn & 0xffff); | 379 | sdisp = (insn & 0xffff); |
380 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 380 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
381 | op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); | 381 | op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); |
382 | break; | 382 | break; |
383 | 383 | ||
@@ -387,27 +387,27 @@ do_mathemu(struct pt_regs *regs) | |||
387 | goto illegal; | 387 | goto illegal; |
388 | 388 | ||
389 | sdisp = (insn & 0xffff); | 389 | sdisp = (insn & 0xffff); |
390 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 390 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
391 | op1 = (void *)(regs->gpr[idx] + sdisp); | 391 | op1 = (void *)(regs->gpr[idx] + sdisp); |
392 | break; | 392 | break; |
393 | 393 | ||
394 | case X: | 394 | case X: |
395 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 395 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
396 | break; | 396 | break; |
397 | 397 | ||
398 | case XA: | 398 | case XA: |
399 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 399 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
400 | op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f]; | 400 | op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); |
401 | break; | 401 | break; |
402 | 402 | ||
403 | case XB: | 403 | case XB: |
404 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 404 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
405 | op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; | 405 | op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); |
406 | break; | 406 | break; |
407 | 407 | ||
408 | case XE: | 408 | case XE: |
409 | idx = (insn >> 16) & 0x1f; | 409 | idx = (insn >> 16) & 0x1f; |
410 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 410 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
411 | if (!idx) { | 411 | if (!idx) { |
412 | if (((insn >> 1) & 0x3ff) == STFIWX) | 412 | if (((insn >> 1) & 0x3ff) == STFIWX) |
413 | op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]); | 413 | op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]); |
@@ -421,7 +421,7 @@ do_mathemu(struct pt_regs *regs) | |||
421 | 421 | ||
422 | case XEU: | 422 | case XEU: |
423 | idx = (insn >> 16) & 0x1f; | 423 | idx = (insn >> 16) & 0x1f; |
424 | op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; | 424 | op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); |
425 | op1 = (void *)((idx ? regs->gpr[idx] : 0) | 425 | op1 = (void *)((idx ? regs->gpr[idx] : 0) |
426 | + regs->gpr[(insn >> 11) & 0x1f]); | 426 | + regs->gpr[(insn >> 11) & 0x1f]); |
427 | break; | 427 | break; |
@@ -429,8 +429,8 @@ do_mathemu(struct pt_regs *regs) | |||
429 | case XCR: | 429 | case XCR: |
430 | op0 = (void *)®s->ccr; | 430 | op0 = (void *)®s->ccr; |
431 | op1 = (void *)((insn >> 23) & 0x7); | 431 | op1 = (void *)((insn >> 23) & 0x7); |
432 | op2 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f]; | 432 | op2 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); |
433 | op3 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; | 433 | op3 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); |
434 | break; | 434 | break; |
435 | 435 | ||
436 | case XCRL: | 436 | case XCRL: |
@@ -450,7 +450,7 @@ do_mathemu(struct pt_regs *regs) | |||
450 | 450 | ||
451 | case XFLB: | 451 | case XFLB: |
452 | op0 = (void *)((insn >> 17) & 0xff); | 452 | op0 = (void *)((insn >> 17) & 0xff); |
453 | op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; | 453 | op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); |
454 | break; | 454 | break; |
455 | 455 | ||
456 | default: | 456 | default: |
diff --git a/include/asm-powerpc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h index ef96bfd4ef4c..8f0426f973c9 100644 --- a/include/asm-powerpc/ppc_asm.h +++ b/include/asm-powerpc/ppc_asm.h | |||
@@ -6,6 +6,7 @@ | |||
6 | 6 | ||
7 | #include <linux/stringify.h> | 7 | #include <linux/stringify.h> |
8 | #include <asm/asm-compat.h> | 8 | #include <asm/asm-compat.h> |
9 | #include <asm/processor.h> | ||
9 | 10 | ||
10 | #ifndef __ASSEMBLY__ | 11 | #ifndef __ASSEMBLY__ |
11 | #error __FILE__ should only be used in assembler files | 12 | #error __FILE__ should only be used in assembler files |
@@ -83,13 +84,13 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); \ | |||
83 | #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) | 84 | #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) |
84 | #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) | 85 | #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) |
85 | 86 | ||
86 | #define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base) | 87 | #define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*TS_FPRWIDTH*(n)(base) |
87 | #define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base) | 88 | #define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base) |
88 | #define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base) | 89 | #define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base) |
89 | #define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base) | 90 | #define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base) |
90 | #define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base) | 91 | #define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base) |
91 | #define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base) | 92 | #define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base) |
92 | #define REST_FPR(n, base) lfd n,THREAD_FPR0+8*(n)(base) | 93 | #define REST_FPR(n, base) lfd n,THREAD_FPR0+8*TS_FPRWIDTH*(n)(base) |
93 | #define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base) | 94 | #define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base) |
94 | #define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base) | 95 | #define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base) |
95 | #define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base) | 96 | #define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base) |
diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h index a1deed85f31d..a23da6356e06 100644 --- a/include/asm-powerpc/processor.h +++ b/include/asm-powerpc/processor.h | |||
@@ -12,6 +12,8 @@ | |||
12 | 12 | ||
13 | #include <asm/reg.h> | 13 | #include <asm/reg.h> |
14 | 14 | ||
15 | #define TS_FPRWIDTH 1 | ||
16 | |||
15 | #ifndef __ASSEMBLY__ | 17 | #ifndef __ASSEMBLY__ |
16 | #include <linux/compiler.h> | 18 | #include <linux/compiler.h> |
17 | #include <asm/ptrace.h> | 19 | #include <asm/ptrace.h> |
@@ -140,6 +142,8 @@ typedef struct { | |||
140 | unsigned long seg; | 142 | unsigned long seg; |
141 | } mm_segment_t; | 143 | } mm_segment_t; |
142 | 144 | ||
145 | #define TS_FPR(i) fpr[i] | ||
146 | |||
143 | struct thread_struct { | 147 | struct thread_struct { |
144 | unsigned long ksp; /* Kernel stack pointer */ | 148 | unsigned long ksp; /* Kernel stack pointer */ |
145 | unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */ | 149 | unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */ |