diff options
| author | Len Brown <len.brown@intel.com> | 2012-10-31 01:29:52 -0400 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2012-11-23 21:40:04 -0500 |
| commit | 9c63a650bb100e7553d60c991ba0c5db9c743239 (patch) | |
| tree | baa57daf942bbf8e121400c0a79528e6a5f63fb7 | |
| parent | d91bb17c2a874493603c4d99db305d8caf2d180c (diff) | |
tools/power/x86/turbostat: share kernel MSR #defines
Now that turbostat is built in the kernel tree,
it can share MSR #defines with the kernel.
Signed-off-by: Len Brown <len.brown@intel.com>
Cc: x86@kernel.org
| -rw-r--r-- | arch/x86/include/asm/msr-index.h | 14 | ||||
| -rw-r--r-- | tools/power/x86/turbostat/Makefile | 1 | ||||
| -rw-r--r-- | tools/power/x86/turbostat/turbostat.c | 26 |
3 files changed, 22 insertions, 19 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 7f0edceb7563..2639f816628e 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
| @@ -35,11 +35,14 @@ | |||
| 35 | #define MSR_IA32_PERFCTR0 0x000000c1 | 35 | #define MSR_IA32_PERFCTR0 0x000000c1 |
| 36 | #define MSR_IA32_PERFCTR1 0x000000c2 | 36 | #define MSR_IA32_PERFCTR1 0x000000c2 |
| 37 | #define MSR_FSB_FREQ 0x000000cd | 37 | #define MSR_FSB_FREQ 0x000000cd |
| 38 | #define MSR_NHM_PLATFORM_INFO 0x000000ce | ||
| 38 | 39 | ||
| 39 | #define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 | 40 | #define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 |
| 40 | #define NHM_C3_AUTO_DEMOTE (1UL << 25) | 41 | #define NHM_C3_AUTO_DEMOTE (1UL << 25) |
| 41 | #define NHM_C1_AUTO_DEMOTE (1UL << 26) | 42 | #define NHM_C1_AUTO_DEMOTE (1UL << 26) |
| 42 | #define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25) | 43 | #define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25) |
| 44 | #define SNB_C1_AUTO_UNDEMOTE (1UL << 27) | ||
| 45 | #define SNB_C3_AUTO_UNDEMOTE (1UL << 28) | ||
| 43 | 46 | ||
| 44 | #define MSR_MTRRcap 0x000000fe | 47 | #define MSR_MTRRcap 0x000000fe |
| 45 | #define MSR_IA32_BBL_CR_CTL 0x00000119 | 48 | #define MSR_IA32_BBL_CR_CTL 0x00000119 |
| @@ -55,6 +58,8 @@ | |||
| 55 | 58 | ||
| 56 | #define MSR_OFFCORE_RSP_0 0x000001a6 | 59 | #define MSR_OFFCORE_RSP_0 0x000001a6 |
| 57 | #define MSR_OFFCORE_RSP_1 0x000001a7 | 60 | #define MSR_OFFCORE_RSP_1 0x000001a7 |
| 61 | #define MSR_NHM_TURBO_RATIO_LIMIT 0x000001ad | ||
| 62 | #define MSR_IVT_TURBO_RATIO_LIMIT 0x000001ae | ||
| 58 | 63 | ||
| 59 | #define MSR_LBR_SELECT 0x000001c8 | 64 | #define MSR_LBR_SELECT 0x000001c8 |
| 60 | #define MSR_LBR_TOS 0x000001c9 | 65 | #define MSR_LBR_TOS 0x000001c9 |
| @@ -103,6 +108,15 @@ | |||
| 103 | #define MSR_IA32_MC0_ADDR 0x00000402 | 108 | #define MSR_IA32_MC0_ADDR 0x00000402 |
| 104 | #define MSR_IA32_MC0_MISC 0x00000403 | 109 | #define MSR_IA32_MC0_MISC 0x00000403 |
| 105 | 110 | ||
| 111 | /* C-state Residency Counters */ | ||
| 112 | #define MSR_PKG_C3_RESIDENCY 0x000003f8 | ||
| 113 | #define MSR_PKG_C6_RESIDENCY 0x000003f9 | ||
| 114 | #define MSR_PKG_C7_RESIDENCY 0x000003fa | ||
| 115 | #define MSR_CORE_C3_RESIDENCY 0x000003fc | ||
| 116 | #define MSR_CORE_C6_RESIDENCY 0x000003fd | ||
| 117 | #define MSR_CORE_C7_RESIDENCY 0x000003fe | ||
| 118 | #define MSR_PKG_C2_RESIDENCY 0x0000060d | ||
| 119 | |||
| 106 | #define MSR_AMD64_MC0_MASK 0xc0010044 | 120 | #define MSR_AMD64_MC0_MASK 0xc0010044 |
| 107 | 121 | ||
| 108 | #define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x)) | 122 | #define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x)) |
diff --git a/tools/power/x86/turbostat/Makefile b/tools/power/x86/turbostat/Makefile index f85649554191..51880e8467b3 100644 --- a/tools/power/x86/turbostat/Makefile +++ b/tools/power/x86/turbostat/Makefile | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | turbostat : turbostat.c | 1 | turbostat : turbostat.c |
| 2 | CFLAGS += -Wall | 2 | CFLAGS += -Wall |
| 3 | CFLAGS += -I../../../../arch/x86/include/ | ||
| 3 | 4 | ||
| 4 | clean : | 5 | clean : |
| 5 | rm -f turbostat | 6 | rm -f turbostat |
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index ea095abbe97e..3c063a00f3bf 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c | |||
| @@ -20,6 +20,7 @@ | |||
| 20 | */ | 20 | */ |
| 21 | 21 | ||
| 22 | #define _GNU_SOURCE | 22 | #define _GNU_SOURCE |
| 23 | #include <asm/msr.h> | ||
| 23 | #include <stdio.h> | 24 | #include <stdio.h> |
| 24 | #include <unistd.h> | 25 | #include <unistd.h> |
| 25 | #include <sys/types.h> | 26 | #include <sys/types.h> |
| @@ -35,19 +36,6 @@ | |||
| 35 | #include <ctype.h> | 36 | #include <ctype.h> |
| 36 | #include <sched.h> | 37 | #include <sched.h> |
| 37 | 38 | ||
| 38 | #define MSR_NEHALEM_PLATFORM_INFO 0xCE | ||
| 39 | #define MSR_NEHALEM_TURBO_RATIO_LIMIT 0x1AD | ||
| 40 | #define MSR_IVT_TURBO_RATIO_LIMIT 0x1AE | ||
| 41 | #define MSR_APERF 0xE8 | ||
| 42 | #define MSR_MPERF 0xE7 | ||
| 43 | #define MSR_PKG_C2_RESIDENCY 0x60D /* SNB only */ | ||
| 44 | #define MSR_PKG_C3_RESIDENCY 0x3F8 | ||
| 45 | #define MSR_PKG_C6_RESIDENCY 0x3F9 | ||
| 46 | #define MSR_PKG_C7_RESIDENCY 0x3FA /* SNB only */ | ||
| 47 | #define MSR_CORE_C3_RESIDENCY 0x3FC | ||
| 48 | #define MSR_CORE_C6_RESIDENCY 0x3FD | ||
| 49 | #define MSR_CORE_C7_RESIDENCY 0x3FE /* SNB only */ | ||
| 50 | |||
| 51 | char *proc_stat = "/proc/stat"; | 39 | char *proc_stat = "/proc/stat"; |
| 52 | unsigned int interval_sec = 5; /* set with -i interval_sec */ | 40 | unsigned int interval_sec = 5; /* set with -i interval_sec */ |
| 53 | unsigned int verbose; /* set with -v */ | 41 | unsigned int verbose; /* set with -v */ |
| @@ -674,9 +662,9 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |||
| 674 | t->tsc = rdtsc(); /* we are running on local CPU of interest */ | 662 | t->tsc = rdtsc(); /* we are running on local CPU of interest */ |
| 675 | 663 | ||
| 676 | if (has_aperf) { | 664 | if (has_aperf) { |
| 677 | if (get_msr(cpu, MSR_APERF, &t->aperf)) | 665 | if (get_msr(cpu, MSR_IA32_APERF, &t->aperf)) |
| 678 | return -3; | 666 | return -3; |
| 679 | if (get_msr(cpu, MSR_MPERF, &t->mperf)) | 667 | if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf)) |
| 680 | return -4; | 668 | return -4; |
| 681 | } | 669 | } |
| 682 | 670 | ||
| @@ -742,10 +730,10 @@ void print_verbose_header(void) | |||
| 742 | if (!do_nehalem_platform_info) | 730 | if (!do_nehalem_platform_info) |
| 743 | return; | 731 | return; |
| 744 | 732 | ||
| 745 | get_msr(0, MSR_NEHALEM_PLATFORM_INFO, &msr); | 733 | get_msr(0, MSR_NHM_PLATFORM_INFO, &msr); |
| 746 | 734 | ||
| 747 | if (verbose > 1) | 735 | if (verbose > 1) |
| 748 | fprintf(stderr, "MSR_NEHALEM_PLATFORM_INFO: 0x%llx\n", msr); | 736 | fprintf(stderr, "MSR_NHM_PLATFORM_INFO: 0x%llx\n", msr); |
| 749 | 737 | ||
| 750 | ratio = (msr >> 40) & 0xFF; | 738 | ratio = (msr >> 40) & 0xFF; |
| 751 | fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n", | 739 | fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n", |
| @@ -808,10 +796,10 @@ print_nhm_turbo_ratio_limits: | |||
| 808 | if (!do_nehalem_turbo_ratio_limit) | 796 | if (!do_nehalem_turbo_ratio_limit) |
| 809 | return; | 797 | return; |
| 810 | 798 | ||
| 811 | get_msr(0, MSR_NEHALEM_TURBO_RATIO_LIMIT, &msr); | 799 | get_msr(0, MSR_NHM_TURBO_RATIO_LIMIT, &msr); |
| 812 | 800 | ||
| 813 | if (verbose > 1) | 801 | if (verbose > 1) |
| 814 | fprintf(stderr, "MSR_NEHALEM_TURBO_RATIO_LIMIT: 0x%llx\n", msr); | 802 | fprintf(stderr, "MSR_NHM_TURBO_RATIO_LIMIT: 0x%llx\n", msr); |
| 815 | 803 | ||
| 816 | ratio = (msr >> 56) & 0xFF; | 804 | ratio = (msr >> 56) & 0xFF; |
| 817 | if (ratio) | 805 | if (ratio) |
