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authorPankaj Dubey <pankaj.dubey@samsung.com>2014-11-12 21:42:59 -0500
committerKukjin Kim <kgene.kim@samsung.com>2014-11-12 21:42:59 -0500
commit9c50b2a98cf0ca70480b70a4490a87177519094c (patch)
tree87cc3025d0eb649ef258b4bc3b558efe34dfd3b4
parent13cfa6c4f7facfc690ba9e99ec382c151fddaced (diff)
ARM: EXYNOS: Remove unused static iomapping
This patch removes all unused static iomapping from exynos4/5_iodesc table, and at the same time removes related macros from mach/map.h and plat/map-s5p.h. All such mappings are present in exynos.c but not currently there are no users of these mappings, so it is safe to remove these. Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/mach-exynos/exynos.c50
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h23
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s5p.h21
3 files changed, 0 insertions, 94 deletions
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 6b283eb3202e..6de7cf5ef2b2 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -41,41 +41,11 @@ static struct map_desc exynos4_iodesc[] __initdata = {
41 .length = SZ_64K, 41 .length = SZ_64K,
42 .type = MT_DEVICE, 42 .type = MT_DEVICE,
43 }, { 43 }, {
44 .virtual = (unsigned long)S3C_VA_TIMER,
45 .pfn = __phys_to_pfn(EXYNOS4_PA_TIMER),
46 .length = SZ_16K,
47 .type = MT_DEVICE,
48 }, {
49 .virtual = (unsigned long)S3C_VA_WATCHDOG,
50 .pfn = __phys_to_pfn(EXYNOS4_PA_WATCHDOG),
51 .length = SZ_4K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = (unsigned long)S5P_VA_SROMC, 44 .virtual = (unsigned long)S5P_VA_SROMC,
55 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), 45 .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
56 .length = SZ_4K, 46 .length = SZ_4K,
57 .type = MT_DEVICE, 47 .type = MT_DEVICE,
58 }, { 48 }, {
59 .virtual = (unsigned long)S5P_VA_SYSTIMER,
60 .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
61 .length = SZ_4K,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
65 .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
66 .length = SZ_4K,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = (unsigned long)S5P_VA_GIC_CPU,
70 .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU),
71 .length = SZ_64K,
72 .type = MT_DEVICE,
73 }, {
74 .virtual = (unsigned long)S5P_VA_GIC_DIST,
75 .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
76 .length = SZ_64K,
77 .type = MT_DEVICE,
78 }, {
79 .virtual = (unsigned long)S5P_VA_CMU, 49 .virtual = (unsigned long)S5P_VA_CMU,
80 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), 50 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
81 .length = SZ_128K, 51 .length = SZ_128K,
@@ -86,11 +56,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
86 .length = SZ_8K, 56 .length = SZ_8K,
87 .type = MT_DEVICE, 57 .type = MT_DEVICE,
88 }, { 58 }, {
89 .virtual = (unsigned long)S5P_VA_L2CC,
90 .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC),
91 .length = SZ_4K,
92 .type = MT_DEVICE,
93 }, {
94 .virtual = (unsigned long)S5P_VA_DMC0, 59 .virtual = (unsigned long)S5P_VA_DMC0,
95 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), 60 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
96 .length = SZ_64K, 61 .length = SZ_64K,
@@ -100,11 +65,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
100 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC1), 65 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC1),
101 .length = SZ_64K, 66 .length = SZ_64K,
102 .type = MT_DEVICE, 67 .type = MT_DEVICE,
103 }, {
104 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
105 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
106 .length = SZ_4K,
107 .type = MT_DEVICE,
108 }, 68 },
109}; 69};
110 70
@@ -115,16 +75,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
115 .length = SZ_64K, 75 .length = SZ_64K,
116 .type = MT_DEVICE, 76 .type = MT_DEVICE,
117 }, { 77 }, {
118 .virtual = (unsigned long)S3C_VA_TIMER,
119 .pfn = __phys_to_pfn(EXYNOS5_PA_TIMER),
120 .length = SZ_16K,
121 .type = MT_DEVICE,
122 }, {
123 .virtual = (unsigned long)S3C_VA_WATCHDOG,
124 .pfn = __phys_to_pfn(EXYNOS5_PA_WATCHDOG),
125 .length = SZ_4K,
126 .type = MT_DEVICE,
127 }, {
128 .virtual = (unsigned long)S5P_VA_SROMC, 78 .virtual = (unsigned long)S5P_VA_SROMC,
129 .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC), 79 .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC),
130 .length = SZ_4K, 80 .length = SZ_4K,
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index f0b7e92bad6c..1ad3f496ef56 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -30,40 +30,17 @@
30#define EXYNOS4_PA_CMU 0x10030000 30#define EXYNOS4_PA_CMU 0x10030000
31#define EXYNOS5_PA_CMU 0x10010000 31#define EXYNOS5_PA_CMU 0x10010000
32 32
33#define EXYNOS4_PA_SYSTIMER 0x10050000
34
35#define EXYNOS4_PA_WATCHDOG 0x10060000
36#define EXYNOS5_PA_WATCHDOG 0x101D0000
37
38#define EXYNOS4_PA_DMC0 0x10400000 33#define EXYNOS4_PA_DMC0 0x10400000
39#define EXYNOS4_PA_DMC1 0x10410000 34#define EXYNOS4_PA_DMC1 0x10410000
40 35
41#define EXYNOS4_PA_COMBINER 0x10440000
42#define EXYNOS5_PA_COMBINER 0x10440000
43
44#define EXYNOS4_PA_GIC_CPU 0x10480000
45#define EXYNOS4_PA_GIC_DIST 0x10490000
46#define EXYNOS5_PA_GIC_CPU 0x10482000
47#define EXYNOS5_PA_GIC_DIST 0x10481000
48
49#define EXYNOS4_PA_COREPERI 0x10500000 36#define EXYNOS4_PA_COREPERI 0x10500000
50#define EXYNOS4_PA_L2CC 0x10502000 37#define EXYNOS4_PA_L2CC 0x10502000
51 38
52#define EXYNOS4_PA_SROMC 0x12570000 39#define EXYNOS4_PA_SROMC 0x12570000
53#define EXYNOS5_PA_SROMC 0x12250000 40#define EXYNOS5_PA_SROMC 0x12250000
54 41
55#define EXYNOS4_PA_HSPHY 0x125B0000
56
57#define EXYNOS4_PA_UART 0x13800000
58#define EXYNOS5_PA_UART 0x12C00000
59
60#define EXYNOS4_PA_TIMER 0x139D0000
61#define EXYNOS5_PA_TIMER 0x12DD0000
62
63/* Compatibility UART */ 42/* Compatibility UART */
64 43
65#define EXYNOS5440_PA_UART0 0x000B0000 44#define EXYNOS5440_PA_UART0 0x000B0000
66 45
67#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
68
69#endif /* __ASM_ARCH_MAP_H */ 46#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h
index f5b9d3ff9cd4..f5cf2bd208e0 100644
--- a/arch/arm/plat-samsung/include/plat/map-s5p.h
+++ b/arch/arm/plat-samsung/include/plat/map-s5p.h
@@ -15,43 +15,22 @@
15 15
16#define S5P_VA_CHIPID S3C_ADDR(0x02000000) 16#define S5P_VA_CHIPID S3C_ADDR(0x02000000)
17#define S5P_VA_CMU S3C_ADDR(0x02100000) 17#define S5P_VA_CMU S3C_ADDR(0x02100000)
18#define S5P_VA_GPIO S3C_ADDR(0x02200000)
19#define S5P_VA_GPIO1 S5P_VA_GPIO
20#define S5P_VA_GPIO2 S3C_ADDR(0x02240000)
21#define S5P_VA_GPIO3 S3C_ADDR(0x02280000)
22 18
23#define S5P_VA_SYSRAM S3C_ADDR(0x02400000)
24#define S5P_VA_SYSRAM_NS S3C_ADDR(0x02410000)
25#define S5P_VA_DMC0 S3C_ADDR(0x02440000) 19#define S5P_VA_DMC0 S3C_ADDR(0x02440000)
26#define S5P_VA_DMC1 S3C_ADDR(0x02480000) 20#define S5P_VA_DMC1 S3C_ADDR(0x02480000)
27#define S5P_VA_SROMC S3C_ADDR(0x024C0000) 21#define S5P_VA_SROMC S3C_ADDR(0x024C0000)
28 22
29#define S5P_VA_SYSTIMER S3C_ADDR(0x02500000)
30#define S5P_VA_L2CC S3C_ADDR(0x02600000)
31
32#define S5P_VA_COMBINER_BASE S3C_ADDR(0x02700000)
33#define S5P_VA_COMBINER(x) (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10)
34
35#define S5P_VA_COREPERI_BASE S3C_ADDR(0x02800000) 23#define S5P_VA_COREPERI_BASE S3C_ADDR(0x02800000)
36#define S5P_VA_COREPERI(x) (S5P_VA_COREPERI_BASE + (x)) 24#define S5P_VA_COREPERI(x) (S5P_VA_COREPERI_BASE + (x))
37#define S5P_VA_SCU S5P_VA_COREPERI(0x0) 25#define S5P_VA_SCU S5P_VA_COREPERI(0x0)
38#define S5P_VA_TWD S5P_VA_COREPERI(0x600) 26#define S5P_VA_TWD S5P_VA_COREPERI(0x600)
39 27
40#define S5P_VA_GIC_CPU S3C_ADDR(0x02810000)
41#define S5P_VA_GIC_DIST S3C_ADDR(0x02820000)
42
43#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) 28#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
44#define VA_VIC0 VA_VIC(0) 29#define VA_VIC0 VA_VIC(0)
45#define VA_VIC1 VA_VIC(1) 30#define VA_VIC1 VA_VIC(1)
46#define VA_VIC2 VA_VIC(2) 31#define VA_VIC2 VA_VIC(2)
47#define VA_VIC3 VA_VIC(3) 32#define VA_VIC3 VA_VIC(3)
48 33
49#define S5P_VA_UART(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
50#define S5P_VA_UART0 S5P_VA_UART(0)
51#define S5P_VA_UART1 S5P_VA_UART(1)
52#define S5P_VA_UART2 S5P_VA_UART(2)
53#define S5P_VA_UART3 S5P_VA_UART(3)
54
55#ifndef S3C_UART_OFFSET 34#ifndef S3C_UART_OFFSET
56#define S3C_UART_OFFSET (0x400) 35#define S3C_UART_OFFSET (0x400)
57#endif 36#endif