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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-08-30 01:14:46 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-08-30 01:14:46 -0400
commit9bb7361d99fb5c510e62b521e4292581fa1bee98 (patch)
treef9a4797a2e97006947011fcdbf8677a84fbdf182
parentc6a389f123b9f68d605bb7e0f9b32ec1e3e14132 (diff)
parent9fcd768d0cc88b41ea459e25d2db12d3e25fa9dd (diff)
Merge remote-tracking branch 'jwb/next' into next
-rw-r--r--arch/powerpc/Kconfig2
-rw-r--r--arch/powerpc/boot/dts/hcu4.dts168
-rw-r--r--arch/powerpc/boot/dts/yosemite.dts36
-rw-r--r--arch/powerpc/configs/40x/hcu4_defconfig80
-rw-r--r--arch/powerpc/configs/ppc40x_defconfig1
-rw-r--r--arch/powerpc/include/asm/kexec.h2
-rw-r--r--arch/powerpc/kernel/misc_32.S171
-rw-r--r--arch/powerpc/platforms/40x/Kconfig8
-rw-r--r--arch/powerpc/platforms/40x/Makefile1
-rw-r--r--arch/powerpc/platforms/40x/hcu4.c61
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c89
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.h12
-rw-r--r--drivers/edac/ppc4xx_edac.c2
13 files changed, 294 insertions, 339 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 6926b61acfea..0a3d5560c9be 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -345,7 +345,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
345 345
346config KEXEC 346config KEXEC
347 bool "kexec system call (EXPERIMENTAL)" 347 bool "kexec system call (EXPERIMENTAL)"
348 depends on (PPC_BOOK3S || FSL_BOOKE) && EXPERIMENTAL 348 depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP && !47x)) && EXPERIMENTAL
349 help 349 help
350 kexec is a system call that implements the ability to shutdown your 350 kexec is a system call that implements the ability to shutdown your
351 current kernel, and to start another kernel. It is like a reboot 351 current kernel, and to start another kernel. It is like a reboot
diff --git a/arch/powerpc/boot/dts/hcu4.dts b/arch/powerpc/boot/dts/hcu4.dts
deleted file mode 100644
index 7988598da4c9..000000000000
--- a/arch/powerpc/boot/dts/hcu4.dts
+++ /dev/null
@@ -1,168 +0,0 @@
1/*
2* Device Tree Source for Netstal Maschinen HCU4
3* based on the IBM Walnut
4*
5* Copyright 2008
6* Niklaus Giger <niklaus.giger@member.fsf.org>
7*
8* Copyright 2007 IBM Corp.
9* Josh Boyer <jwboyer@linux.vnet.ibm.com>
10*
11* This file is licensed under the terms of the GNU General Public
12* License version 2. This program is licensed "as is" without
13* any warranty of any kind, whether express or implied.
14*/
15
16/dts-v1/;
17
18/ {
19 #address-cells = <0x1>;
20 #size-cells = <0x1>;
21 model = "netstal,hcu4";
22 compatible = "netstal,hcu4";
23 dcr-parent = <0x1>;
24
25 aliases {
26 ethernet0 = "/plb/opb/ethernet@ef600800";
27 serial0 = "/plb/opb/serial@ef600300";
28 };
29
30 cpus {
31 #address-cells = <0x1>;
32 #size-cells = <0x0>;
33
34 cpu@0 {
35 device_type = "cpu";
36 model = "PowerPC,405GPr";
37 reg = <0x0>;
38 clock-frequency = <0>; /* Filled in by U-Boot */
39 timebase-frequency = <0x0>; /* Filled in by U-Boot */
40 i-cache-line-size = <0x20>;
41 d-cache-line-size = <0x20>;
42 i-cache-size = <0x4000>;
43 d-cache-size = <0x4000>;
44 dcr-controller;
45 dcr-access-method = "native";
46 linux,phandle = <0x1>;
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x0 0x0>; /* Filled in by U-Boot */
53 };
54
55 UIC0: interrupt-controller {
56 compatible = "ibm,uic";
57 interrupt-controller;
58 cell-index = <0x0>;
59 dcr-reg = <0xc0 0x9>;
60 #address-cells = <0x0>;
61 #size-cells = <0x0>;
62 #interrupt-cells = <0x2>;
63 linux,phandle = <0x2>;
64 };
65
66 plb {
67 compatible = "ibm,plb3";
68 #address-cells = <0x1>;
69 #size-cells = <0x1>;
70 ranges;
71 clock-frequency = <0x0>; /* Filled in by U-Boot */
72
73 SDRAM0: memory-controller {
74 compatible = "ibm,sdram-405gp";
75 dcr-reg = <0x10 0x2>;
76 };
77
78 MAL: mcmal {
79 compatible = "ibm,mcmal-405gp", "ibm,mcmal";
80 dcr-reg = <0x180 0x62>;
81 num-tx-chans = <0x1>;
82 num-rx-chans = <0x1>;
83 interrupt-parent = <0x2>;
84 interrupts = <0xb 0x4 0xc 0x4 0xa 0x4 0xd 0x4 0xe 0x4>;
85 linux,phandle = <0x3>;
86 };
87
88 POB0: opb {
89 compatible = "ibm,opb-405gp", "ibm,opb";
90 #address-cells = <0x1>;
91 #size-cells = <0x1>;
92 ranges = <0xef600000 0xef600000 0xa00000>;
93 dcr-reg = <0xa0 0x5>;
94 clock-frequency = <0x0>; /* Filled in by U-Boot */
95
96 UART0: serial@ef600300 {
97 device_type = "serial";
98 compatible = "ns16550";
99 reg = <0xef600300 0x8>;
100 virtual-reg = <0xef600300>;
101 clock-frequency = <0x0>;/* Filled in by U-Boot */
102 current-speed = <0>; /* Filled in by U-Boot */
103 interrupt-parent = <0x2>;
104 interrupts = <0x0 0x4>;
105 };
106
107 IIC: i2c@ef600500 {
108 compatible = "ibm,iic-405gp", "ibm,iic";
109 reg = <0xef600500 0x11>;
110 interrupt-parent = <0x2>;
111 interrupts = <0x2 0x4>;
112 };
113
114 GPIO: gpio@ef600700 {
115 compatible = "ibm,gpio-405gp";
116 reg = <0xef600700 0x20>;
117 };
118
119 EMAC: ethernet@ef600800 {
120 device_type = "network";
121 compatible = "ibm,emac-405gp", "ibm,emac";
122 interrupt-parent = <0x2>;
123 interrupts = <0xf 0x4 0x9 0x4>;
124 local-mac-address = [00 00 00 00 00 00];
125 reg = <0xef600800 0x70>;
126 mal-device = <0x3>;
127 mal-tx-channel = <0x0>;
128 mal-rx-channel = <0x0>;
129 cell-index = <0x0>;
130 max-frame-size = <0x5dc>;
131 rx-fifo-size = <0x1000>;
132 tx-fifo-size = <0x800>;
133 phy-mode = "rmii";
134 phy-map = <0x1>;
135 };
136 };
137
138 EBC0: ebc {
139 compatible = "ibm,ebc-405gp", "ibm,ebc";
140 dcr-reg = <0x12 0x2>;
141 #address-cells = <0x2>;
142 #size-cells = <0x1>;
143 clock-frequency = <0x0>; /* Filled in by U-Boot */
144
145 sram@0,0 {
146 reg = <0x0 0x0 0x80000>;
147 };
148
149 flash@0,80000 {
150 compatible = "jedec-flash";
151 bank-width = <0x1>;
152 reg = <0x0 0x80000 0x80000>;
153 #address-cells = <0x1>;
154 #size-cells = <0x1>;
155
156 partition@0 {
157 label = "OpenBIOS";
158 reg = <0x0 0x80000>;
159 read-only;
160 };
161 };
162 };
163 };
164
165 chosen {
166 linux,stdout-path = "/plb/opb/serial@ef600300";
167 };
168};
diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts
index 64923245f0e5..30bb4753577a 100644
--- a/arch/powerpc/boot/dts/yosemite.dts
+++ b/arch/powerpc/boot/dts/yosemite.dts
@@ -138,6 +138,42 @@
138 clock-frequency = <0>; /* Filled in by zImage */ 138 clock-frequency = <0>; /* Filled in by zImage */
139 interrupts = <0x5 0x1>; 139 interrupts = <0x5 0x1>;
140 interrupt-parent = <&UIC1>; 140 interrupt-parent = <&UIC1>;
141
142 nor_flash@0,0 {
143 compatible = "amd,s29gl256n", "cfi-flash";
144 bank-width = <2>;
145 reg = <0x00000000 0x00000000 0x04000000>;
146 #address-cells = <1>;
147 #size-cells = <1>;
148 partition@0 {
149 label = "kernel";
150 reg = <0x00000000 0x001e0000>;
151 };
152 partition@1e0000 {
153 label = "dtb";
154 reg = <0x001e0000 0x00020000>;
155 };
156 partition@200000 {
157 label = "ramdisk";
158 reg = <0x00200000 0x01400000>;
159 };
160 partition@1600000 {
161 label = "jffs2";
162 reg = <0x01600000 0x00400000>;
163 };
164 partition@1a00000 {
165 label = "user";
166 reg = <0x01a00000 0x02540000>;
167 };
168 partition@3f40000 {
169 label = "env";
170 reg = <0x03f40000 0x00040000>;
171 };
172 partition@3f80000 {
173 label = "u-boot";
174 reg = <0x03f80000 0x00080000>;
175 };
176 };
141 }; 177 };
142 178
143 UART0: serial@ef600300 { 179 UART0: serial@ef600300 {
diff --git a/arch/powerpc/configs/40x/hcu4_defconfig b/arch/powerpc/configs/40x/hcu4_defconfig
deleted file mode 100644
index ebeb4accad65..000000000000
--- a/arch/powerpc/configs/40x/hcu4_defconfig
+++ /dev/null
@@ -1,80 +0,0 @@
1CONFIG_40x=y
2CONFIG_EXPERIMENTAL=y
3CONFIG_SYSVIPC=y
4CONFIG_POSIX_MQUEUE=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y
7# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
8CONFIG_EXPERT=y
9CONFIG_KALLSYMS_ALL=y
10CONFIG_KALLSYMS_EXTRA_PASS=y
11CONFIG_MODULES=y
12CONFIG_MODULE_UNLOAD=y
13# CONFIG_BLK_DEV_BSG is not set
14CONFIG_HCU4=y
15# CONFIG_WALNUT is not set
16CONFIG_SPARSE_IRQ=y
17CONFIG_PCI=y
18CONFIG_NET=y
19CONFIG_PACKET=y
20CONFIG_UNIX=y
21CONFIG_INET=y
22CONFIG_IP_PNP=y
23CONFIG_IP_PNP_DHCP=y
24CONFIG_IP_PNP_BOOTP=y
25# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
26# CONFIG_INET_XFRM_MODE_TUNNEL is not set
27# CONFIG_INET_XFRM_MODE_BEET is not set
28# CONFIG_INET_LRO is not set
29# CONFIG_IPV6 is not set
30CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
31CONFIG_CONNECTOR=y
32CONFIG_MTD=y
33CONFIG_MTD_PARTITIONS=y
34CONFIG_MTD_CMDLINE_PARTS=y
35CONFIG_MTD_OF_PARTS=y
36CONFIG_MTD_CHAR=y
37CONFIG_MTD_BLOCK=m
38CONFIG_MTD_CFI=y
39CONFIG_MTD_JEDECPROBE=y
40CONFIG_MTD_CFI_AMDSTD=y
41CONFIG_MTD_PHYSMAP_OF=y
42CONFIG_PROC_DEVICETREE=y
43CONFIG_BLK_DEV_RAM=y
44CONFIG_BLK_DEV_RAM_SIZE=35000
45CONFIG_NETDEVICES=y
46CONFIG_NET_ETHERNET=y
47CONFIG_IBM_NEW_EMAC=y
48# CONFIG_INPUT is not set
49# CONFIG_SERIO is not set
50# CONFIG_VT is not set
51CONFIG_SERIAL_8250=y
52CONFIG_SERIAL_8250_CONSOLE=y
53CONFIG_SERIAL_8250_EXTENDED=y
54CONFIG_SERIAL_8250_SHARE_IRQ=y
55CONFIG_SERIAL_OF_PLATFORM=y
56# CONFIG_HW_RANDOM is not set
57# CONFIG_HWMON is not set
58CONFIG_VIDEO_OUTPUT_CONTROL=m
59# CONFIG_USB_SUPPORT is not set
60CONFIG_EXT2_FS=y
61CONFIG_INOTIFY=y
62CONFIG_PROC_KCORE=y
63CONFIG_TMPFS=y
64CONFIG_CRAMFS=y
65CONFIG_NFS_FS=y
66CONFIG_NFS_V3=y
67CONFIG_ROOT_NFS=y
68CONFIG_MAGIC_SYSRQ=y
69CONFIG_DEBUG_FS=y
70CONFIG_DEBUG_KERNEL=y
71CONFIG_DETECT_HUNG_TASK=y
72# CONFIG_RCU_CPU_STALL_DETECTOR is not set
73CONFIG_SYSCTL_SYSCALL_CHECK=y
74CONFIG_CRYPTO=y
75CONFIG_CRYPTO_CBC=y
76CONFIG_CRYPTO_ECB=y
77CONFIG_CRYPTO_PCBC=y
78CONFIG_CRYPTO_MD5=y
79CONFIG_CRYPTO_DES=y
80# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/configs/ppc40x_defconfig b/arch/powerpc/configs/ppc40x_defconfig
index bfd634b5ada7..e9d920c5a87a 100644
--- a/arch/powerpc/configs/ppc40x_defconfig
+++ b/arch/powerpc/configs/ppc40x_defconfig
@@ -14,7 +14,6 @@ CONFIG_MODULE_UNLOAD=y
14CONFIG_PPC4xx_GPIO=y 14CONFIG_PPC4xx_GPIO=y
15CONFIG_ACADIA=y 15CONFIG_ACADIA=y
16CONFIG_EP405=y 16CONFIG_EP405=y
17CONFIG_HCU4=y
18CONFIG_HOTFOOT=y 17CONFIG_HOTFOOT=y
19CONFIG_KILAUEA=y 18CONFIG_KILAUEA=y
20CONFIG_MAKALU=y 19CONFIG_MAKALU=y
diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h
index 8a33698c61bd..f921eb121d39 100644
--- a/arch/powerpc/include/asm/kexec.h
+++ b/arch/powerpc/include/asm/kexec.h
@@ -2,7 +2,7 @@
2#define _ASM_POWERPC_KEXEC_H 2#define _ASM_POWERPC_KEXEC_H
3#ifdef __KERNEL__ 3#ifdef __KERNEL__
4 4
5#ifdef CONFIG_FSL_BOOKE 5#if defined(CONFIG_FSL_BOOKE) || defined(CONFIG_44x)
6 6
7/* 7/*
8 * On FSL-BookE we setup a 1:1 mapping which covers the first 2GiB of memory 8 * On FSL-BookE we setup a 1:1 mapping which covers the first 2GiB of memory
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 998a10028608..f7d760ab5ca1 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -8,6 +8,8 @@
8 * kexec bits: 8 * kexec bits:
9 * Copyright (C) 2002-2003 Eric Biederman <ebiederm@xmission.com> 9 * Copyright (C) 2002-2003 Eric Biederman <ebiederm@xmission.com>
10 * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz 10 * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz
11 * PPC44x port. Copyright (C) 2011, IBM Corporation
12 * Author: Suzuki Poulose <suzuki@in.ibm.com>
11 * 13 *
12 * This program is free software; you can redistribute it and/or 14 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License 15 * modify it under the terms of the GNU General Public License
@@ -736,6 +738,175 @@ relocate_new_kernel:
736 mr r5, r31 738 mr r5, r31
737 739
738 li r0, 0 740 li r0, 0
741#elif defined(CONFIG_44x) && !defined(CONFIG_47x)
742
743/*
744 * Code for setting up 1:1 mapping for PPC440x for KEXEC
745 *
746 * We cannot switch off the MMU on PPC44x.
747 * So we:
748 * 1) Invalidate all the mappings except the one we are running from.
749 * 2) Create a tmp mapping for our code in the other address space(TS) and
750 * jump to it. Invalidate the entry we started in.
751 * 3) Create a 1:1 mapping for 0-2GiB in chunks of 256M in original TS.
752 * 4) Jump to the 1:1 mapping in original TS.
753 * 5) Invalidate the tmp mapping.
754 *
755 * - Based on the kexec support code for FSL BookE
756 * - Doesn't support 47x yet.
757 *
758 */
759 /* Save our parameters */
760 mr r29, r3
761 mr r30, r4
762 mr r31, r5
763
764 /* Load our MSR_IS and TID to MMUCR for TLB search */
765 mfspr r3,SPRN_PID
766 mfmsr r4
767 andi. r4,r4,MSR_IS@l
768 beq wmmucr
769 oris r3,r3,PPC44x_MMUCR_STS@h
770wmmucr:
771 mtspr SPRN_MMUCR,r3
772 sync
773
774 /*
775 * Invalidate all the TLB entries except the current entry
776 * where we are running from
777 */
778 bl 0f /* Find our address */
7790: mflr r5 /* Make it accessible */
780 tlbsx r23,0,r5 /* Find entry we are in */
781 li r4,0 /* Start at TLB entry 0 */
782 li r3,0 /* Set PAGEID inval value */
7831: cmpw r23,r4 /* Is this our entry? */
784 beq skip /* If so, skip the inval */
785 tlbwe r3,r4,PPC44x_TLB_PAGEID /* If not, inval the entry */
786skip:
787 addi r4,r4,1 /* Increment */
788 cmpwi r4,64 /* Are we done? */
789 bne 1b /* If not, repeat */
790 isync
791
792 /* Create a temp mapping and jump to it */
793 andi. r6, r23, 1 /* Find the index to use */
794 addi r24, r6, 1 /* r24 will contain 1 or 2 */
795
796 mfmsr r9 /* get the MSR */
797 rlwinm r5, r9, 27, 31, 31 /* Extract the MSR[IS] */
798 xori r7, r5, 1 /* Use the other address space */
799
800 /* Read the current mapping entries */
801 tlbre r3, r23, PPC44x_TLB_PAGEID
802 tlbre r4, r23, PPC44x_TLB_XLAT
803 tlbre r5, r23, PPC44x_TLB_ATTRIB
804
805 /* Save our current XLAT entry */
806 mr r25, r4
807
808 /* Extract the TLB PageSize */
809 li r10, 1 /* r10 will hold PageSize */
810 rlwinm r11, r3, 0, 24, 27 /* bits 24-27 */
811
812 /* XXX: As of now we use 256M, 4K pages */
813 cmpwi r11, PPC44x_TLB_256M
814 bne tlb_4k
815 rotlwi r10, r10, 28 /* r10 = 256M */
816 b write_out
817tlb_4k:
818 cmpwi r11, PPC44x_TLB_4K
819 bne default
820 rotlwi r10, r10, 12 /* r10 = 4K */
821 b write_out
822default:
823 rotlwi r10, r10, 10 /* r10 = 1K */
824
825write_out:
826 /*
827 * Write out the tmp 1:1 mapping for this code in other address space
828 * Fixup EPN = RPN , TS=other address space
829 */
830 insrwi r3, r7, 1, 23 /* Bit 23 is TS for PAGEID field */
831
832 /* Write out the tmp mapping entries */
833 tlbwe r3, r24, PPC44x_TLB_PAGEID
834 tlbwe r4, r24, PPC44x_TLB_XLAT
835 tlbwe r5, r24, PPC44x_TLB_ATTRIB
836
837 subi r11, r10, 1 /* PageOffset Mask = PageSize - 1 */
838 not r10, r11 /* Mask for PageNum */
839
840 /* Switch to other address space in MSR */
841 insrwi r9, r7, 1, 26 /* Set MSR[IS] = r7 */
842
843 bl 1f
8441: mflr r8
845 addi r8, r8, (2f-1b) /* Find the target offset */
846
847 /* Jump to the tmp mapping */
848 mtspr SPRN_SRR0, r8
849 mtspr SPRN_SRR1, r9
850 rfi
851
8522:
853 /* Invalidate the entry we were executing from */
854 li r3, 0
855 tlbwe r3, r23, PPC44x_TLB_PAGEID
856
857 /* attribute fields. rwx for SUPERVISOR mode */
858 li r5, 0
859 ori r5, r5, (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G)
860
861 /* Create 1:1 mapping in 256M pages */
862 xori r7, r7, 1 /* Revert back to Original TS */
863
864 li r8, 0 /* PageNumber */
865 li r6, 3 /* TLB Index, start at 3 */
866
867next_tlb:
868 rotlwi r3, r8, 28 /* Create EPN (bits 0-3) */
869 mr r4, r3 /* RPN = EPN */
870 ori r3, r3, (PPC44x_TLB_VALID | PPC44x_TLB_256M) /* SIZE = 256M, Valid */
871 insrwi r3, r7, 1, 23 /* Set TS from r7 */
872
873 tlbwe r3, r6, PPC44x_TLB_PAGEID /* PageID field : EPN, V, SIZE */
874 tlbwe r4, r6, PPC44x_TLB_XLAT /* Address translation : RPN */
875 tlbwe r5, r6, PPC44x_TLB_ATTRIB /* Attributes */
876
877 addi r8, r8, 1 /* Increment PN */
878 addi r6, r6, 1 /* Increment TLB Index */
879 cmpwi r8, 8 /* Are we done ? */
880 bne next_tlb
881 isync
882
883 /* Jump to the new mapping 1:1 */
884 li r9,0
885 insrwi r9, r7, 1, 26 /* Set MSR[IS] = r7 */
886
887 bl 1f
8881: mflr r8
889 and r8, r8, r11 /* Get our offset within page */
890 addi r8, r8, (2f-1b)
891
892 and r5, r25, r10 /* Get our target PageNum */
893 or r8, r8, r5 /* Target jump address */
894
895 mtspr SPRN_SRR0, r8
896 mtspr SPRN_SRR1, r9
897 rfi
8982:
899 /* Invalidate the tmp entry we used */
900 li r3, 0
901 tlbwe r3, r24, PPC44x_TLB_PAGEID
902 sync
903
904 /* Restore the parameters */
905 mr r3, r29
906 mr r4, r30
907 mr r5, r31
908
909 li r0, 0
739#else 910#else
740 li r0, 0 911 li r0, 0
741 912
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
index d733d7ca939c..ae5e0bfc0234 100644
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -32,14 +32,6 @@ config EP405
32 help 32 help
33 This option enables support for the EP405/EP405PC boards. 33 This option enables support for the EP405/EP405PC boards.
34 34
35config HCU4
36 bool "Hcu4"
37 depends on 40x
38 default n
39 select 405GPR
40 help
41 This option enables support for the Nestal Maschinen HCU4 board.
42
43config HOTFOOT 35config HOTFOOT
44 bool "Hotfoot" 36 bool "Hotfoot"
45 depends on 40x 37 depends on 40x
diff --git a/arch/powerpc/platforms/40x/Makefile b/arch/powerpc/platforms/40x/Makefile
index 56e89004c468..88c22de0c850 100644
--- a/arch/powerpc/platforms/40x/Makefile
+++ b/arch/powerpc/platforms/40x/Makefile
@@ -1,4 +1,3 @@
1obj-$(CONFIG_HCU4) += hcu4.o
2obj-$(CONFIG_WALNUT) += walnut.o 1obj-$(CONFIG_WALNUT) += walnut.o
3obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD) += virtex.o 2obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD) += virtex.o
4obj-$(CONFIG_EP405) += ep405.o 3obj-$(CONFIG_EP405) += ep405.o
diff --git a/arch/powerpc/platforms/40x/hcu4.c b/arch/powerpc/platforms/40x/hcu4.c
deleted file mode 100644
index 60b2afecab75..000000000000
--- a/arch/powerpc/platforms/40x/hcu4.c
+++ /dev/null
@@ -1,61 +0,0 @@
1/*
2 * Architecture- / platform-specific boot-time initialization code for
3 * IBM PowerPC 4xx based boards. Adapted from original
4 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
5 * <dan@net4x.com>.
6 *
7 * Copyright(c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
8 *
9 * Rewritten and ported to the merged powerpc tree:
10 * Copyright 2007 IBM Corporation
11 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
12 *
13 * 2002 (c) MontaVista, Software, Inc. This file is licensed under
14 * the terms of the GNU General Public License version 2. This program
15 * is licensed "as is" without any warranty of any kind, whether express
16 * or implied.
17 */
18
19#include <linux/init.h>
20#include <linux/of_platform.h>
21
22#include <asm/machdep.h>
23#include <asm/prom.h>
24#include <asm/udbg.h>
25#include <asm/time.h>
26#include <asm/uic.h>
27#include <asm/ppc4xx.h>
28
29static __initdata struct of_device_id hcu4_of_bus[] = {
30 { .compatible = "ibm,plb3", },
31 { .compatible = "ibm,opb", },
32 { .compatible = "ibm,ebc", },
33 {},
34};
35
36static int __init hcu4_device_probe(void)
37{
38 of_platform_bus_probe(NULL, hcu4_of_bus, NULL);
39 return 0;
40}
41machine_device_initcall(hcu4, hcu4_device_probe);
42
43static int __init hcu4_probe(void)
44{
45 unsigned long root = of_get_flat_dt_root();
46
47 if (!of_flat_dt_is_compatible(root, "netstal,hcu4"))
48 return 0;
49
50 return 1;
51}
52
53define_machine(hcu4) {
54 .name = "HCU4",
55 .probe = hcu4_probe,
56 .progress = udbg_progress,
57 .init_IRQ = uic_init_tree,
58 .get_irq = uic_get_irq,
59 .restart = ppc4xx_reset_system,
60 .calibrate_decr = generic_calibrate_decr,
61};
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index dbfe96bc878a..2ec046d0a394 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -1092,6 +1092,10 @@ static int __init ppc460sx_pciex_core_init(struct device_node *np)
1092 mtdcri(SDR0, PESDR1_460SX_HSSSLEW, 0xFFFF0000); 1092 mtdcri(SDR0, PESDR1_460SX_HSSSLEW, 0xFFFF0000);
1093 mtdcri(SDR0, PESDR2_460SX_HSSSLEW, 0xFFFF0000); 1093 mtdcri(SDR0, PESDR2_460SX_HSSSLEW, 0xFFFF0000);
1094 1094
1095 /* Set HSS PRBS enabled */
1096 mtdcri(SDR0, PESDR0_460SX_HSSCTLSET, 0x00001130);
1097 mtdcri(SDR0, PESDR2_460SX_HSSCTLSET, 0x00001130);
1098
1095 udelay(100); 1099 udelay(100);
1096 1100
1097 /* De-assert PLLRESET */ 1101 /* De-assert PLLRESET */
@@ -1132,9 +1136,6 @@ static int ppc460sx_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
1132 dcri_clrset(SDR0, port->sdr_base + PESDRn_UTLSET2, 1136 dcri_clrset(SDR0, port->sdr_base + PESDRn_UTLSET2,
1133 0, 0x01000000); 1137 0, 0x01000000);
1134 1138
1135 /*Gen-1*/
1136 mtdcri(SDR0, port->sdr_base + PESDRn_460SX_RCEI, 0x08000000);
1137
1138 dcri_clrset(SDR0, port->sdr_base + PESDRn_RCSSET, 1139 dcri_clrset(SDR0, port->sdr_base + PESDRn_RCSSET,
1139 (PESDRx_RCSSET_RSTGU | PESDRx_RCSSET_RSTDL), 1140 (PESDRx_RCSSET_RSTGU | PESDRx_RCSSET_RSTDL),
1140 PESDRx_RCSSET_RSTPYN); 1141 PESDRx_RCSSET_RSTPYN);
@@ -1148,14 +1149,42 @@ static int ppc460sx_pciex_init_utl(struct ppc4xx_pciex_port *port)
1148{ 1149{
1149 /* Max 128 Bytes */ 1150 /* Max 128 Bytes */
1150 out_be32 (port->utl_base + PEUTL_PBBSZ, 0x00000000); 1151 out_be32 (port->utl_base + PEUTL_PBBSZ, 0x00000000);
1152 /* Assert VRB and TXE - per datasheet turn off addr validation */
1153 out_be32(port->utl_base + PEUTL_PCTL, 0x80800000);
1151 return 0; 1154 return 0;
1152} 1155}
1153 1156
1157static void __init ppc460sx_pciex_check_link(struct ppc4xx_pciex_port *port)
1158{
1159 void __iomem *mbase;
1160 int attempt = 50;
1161
1162 port->link = 0;
1163
1164 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
1165 if (mbase == NULL) {
1166 printk(KERN_ERR "%s: Can't map internal config space !",
1167 port->node->full_name);
1168 goto done;
1169 }
1170
1171 while (attempt && (0 == (in_le32(mbase + PECFG_460SX_DLLSTA)
1172 & PECFG_460SX_DLLSTA_LINKUP))) {
1173 attempt--;
1174 mdelay(10);
1175 }
1176 if (attempt)
1177 port->link = 1;
1178done:
1179 iounmap(mbase);
1180
1181}
1182
1154static struct ppc4xx_pciex_hwops ppc460sx_pcie_hwops __initdata = { 1183static struct ppc4xx_pciex_hwops ppc460sx_pcie_hwops __initdata = {
1155 .core_init = ppc460sx_pciex_core_init, 1184 .core_init = ppc460sx_pciex_core_init,
1156 .port_init_hw = ppc460sx_pciex_init_port_hw, 1185 .port_init_hw = ppc460sx_pciex_init_port_hw,
1157 .setup_utl = ppc460sx_pciex_init_utl, 1186 .setup_utl = ppc460sx_pciex_init_utl,
1158 .check_link = ppc4xx_pciex_check_link_sdr, 1187 .check_link = ppc460sx_pciex_check_link,
1159}; 1188};
1160 1189
1161#endif /* CONFIG_44x */ 1190#endif /* CONFIG_44x */
@@ -1338,15 +1367,15 @@ static int __init ppc4xx_pciex_port_init(struct ppc4xx_pciex_port *port)
1338 if (rc != 0) 1367 if (rc != 0)
1339 return rc; 1368 return rc;
1340 1369
1341 if (ppc4xx_pciex_hwops->check_link)
1342 ppc4xx_pciex_hwops->check_link(port);
1343
1344 /* 1370 /*
1345 * Initialize mapping: disable all regions and configure 1371 * Initialize mapping: disable all regions and configure
1346 * CFG and REG regions based on resources in the device tree 1372 * CFG and REG regions based on resources in the device tree
1347 */ 1373 */
1348 ppc4xx_pciex_port_init_mapping(port); 1374 ppc4xx_pciex_port_init_mapping(port);
1349 1375
1376 if (ppc4xx_pciex_hwops->check_link)
1377 ppc4xx_pciex_hwops->check_link(port);
1378
1350 /* 1379 /*
1351 * Map UTL 1380 * Map UTL
1352 */ 1381 */
@@ -1360,13 +1389,23 @@ static int __init ppc4xx_pciex_port_init(struct ppc4xx_pciex_port *port)
1360 ppc4xx_pciex_hwops->setup_utl(port); 1389 ppc4xx_pciex_hwops->setup_utl(port);
1361 1390
1362 /* 1391 /*
1363 * Check for VC0 active and assert RDY. 1392 * Check for VC0 active or PLL Locked and assert RDY.
1364 */ 1393 */
1365 if (port->sdr_base) { 1394 if (port->sdr_base) {
1366 if (port->link && 1395 if (of_device_is_compatible(port->node,
1367 ppc4xx_pciex_wait_on_sdr(port, PESDRn_RCSSTS, 1396 "ibm,plb-pciex-460sx")){
1368 1 << 16, 1 << 16, 5000)) { 1397 if (port->link && ppc4xx_pciex_wait_on_sdr(port,
1369 printk(KERN_INFO "PCIE%d: VC0 not active\n", port->index); 1398 PESDRn_RCSSTS,
1399 1 << 12, 1 << 12, 5000)) {
1400 printk(KERN_INFO "PCIE%d: PLL not locked\n",
1401 port->index);
1402 port->link = 0;
1403 }
1404 } else if (port->link &&
1405 ppc4xx_pciex_wait_on_sdr(port, PESDRn_RCSSTS,
1406 1 << 16, 1 << 16, 5000)) {
1407 printk(KERN_INFO "PCIE%d: VC0 not active\n",
1408 port->index);
1370 port->link = 0; 1409 port->link = 0;
1371 } 1410 }
1372 1411
@@ -1573,8 +1612,15 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port,
1573 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAH, lah); 1612 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAH, lah);
1574 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAL, lal); 1613 dcr_write(port->dcrs, DCRO_PEGPL_OMR1BAL, lal);
1575 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKH, 0x7fffffff); 1614 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKH, 0x7fffffff);
1576 /* Note that 3 here means enabled | single region */ 1615 /*Enabled and single region */
1577 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL, sa | 3); 1616 if (of_device_is_compatible(port->node, "ibm,plb-pciex-460sx"))
1617 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,
1618 sa | DCRO_PEGPL_460SX_OMR1MSKL_UOT
1619 | DCRO_PEGPL_OMRxMSKL_VAL);
1620 else
1621 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,
1622 sa | DCRO_PEGPL_OMR1MSKL_UOT
1623 | DCRO_PEGPL_OMRxMSKL_VAL);
1578 break; 1624 break;
1579 case 1: 1625 case 1:
1580 out_le32(mbase + PECFG_POM1LAH, pciah); 1626 out_le32(mbase + PECFG_POM1LAH, pciah);
@@ -1582,8 +1628,8 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port,
1582 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAH, lah); 1628 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAH, lah);
1583 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAL, lal); 1629 dcr_write(port->dcrs, DCRO_PEGPL_OMR2BAL, lal);
1584 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKH, 0x7fffffff); 1630 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKH, 0x7fffffff);
1585 /* Note that 3 here means enabled | single region */ 1631 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL,
1586 dcr_write(port->dcrs, DCRO_PEGPL_OMR2MSKL, sa | 3); 1632 sa | DCRO_PEGPL_OMRxMSKL_VAL);
1587 break; 1633 break;
1588 case 2: 1634 case 2:
1589 out_le32(mbase + PECFG_POM2LAH, pciah); 1635 out_le32(mbase + PECFG_POM2LAH, pciah);
@@ -1592,7 +1638,9 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port,
1592 dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAL, lal); 1638 dcr_write(port->dcrs, DCRO_PEGPL_OMR3BAL, lal);
1593 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKH, 0x7fffffff); 1639 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKH, 0x7fffffff);
1594 /* Note that 3 here means enabled | IO space !!! */ 1640 /* Note that 3 here means enabled | IO space !!! */
1595 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL, sa | 3); 1641 dcr_write(port->dcrs, DCRO_PEGPL_OMR3MSKL,
1642 sa | DCRO_PEGPL_OMR3MSKL_IO
1643 | DCRO_PEGPL_OMRxMSKL_VAL);
1596 break; 1644 break;
1597 } 1645 }
1598 1646
@@ -1693,6 +1741,9 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
1693 if (res->flags & IORESOURCE_PREFETCH) 1741 if (res->flags & IORESOURCE_PREFETCH)
1694 sa |= 0x8; 1742 sa |= 0x8;
1695 1743
1744 if (of_device_is_compatible(port->node, "ibm,plb-pciex-460sx"))
1745 sa |= PCI_BASE_ADDRESS_MEM_TYPE_64;
1746
1696 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); 1747 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1697 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa)); 1748 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
1698 1749
@@ -1854,6 +1905,10 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1854 } 1905 }
1855 out_le16(mbase + 0x202, val); 1906 out_le16(mbase + 0x202, val);
1856 1907
1908 /* Enable Bus master, memory, and io space */
1909 if (of_device_is_compatible(port->node, "ibm,plb-pciex-460sx"))
1910 out_le16(mbase + 0x204, 0x7);
1911
1857 if (!port->endpoint) { 1912 if (!port->endpoint) {
1858 /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */ 1913 /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
1859 out_le32(mbase + 0x208, 0x06040001); 1914 out_le32(mbase + 0x208, 0x06040001);
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.h b/arch/powerpc/sysdev/ppc4xx_pci.h
index c39a134e8684..32ce763a375a 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.h
+++ b/arch/powerpc/sysdev/ppc4xx_pci.h
@@ -464,6 +464,18 @@
464#define PECFG_POM2LAL 0x390 464#define PECFG_POM2LAL 0x390
465#define PECFG_POM2LAH 0x394 465#define PECFG_POM2LAH 0x394
466 466
467/* 460sx only */
468#define PECFG_460SX_DLLSTA 0x3f8
469
470/* 460sx Bit Mappings */
471#define PECFG_460SX_DLLSTA_LINKUP 0x00000010
472#define DCRO_PEGPL_460SX_OMR1MSKL_UOT 0x00000004
473
474/* PEGPL Bit Mappings */
475#define DCRO_PEGPL_OMRxMSKL_VAL 0x00000001
476#define DCRO_PEGPL_OMR1MSKL_UOT 0x00000002
477#define DCRO_PEGPL_OMR3MSKL_IO 0x00000002
478
467/* SDR Bit Mappings */ 479/* SDR Bit Mappings */
468#define PESDRx_RCSSET_HLDPLB 0x10000000 480#define PESDRx_RCSSET_HLDPLB 0x10000000
469#define PESDRx_RCSSET_RSTGU 0x01000000 481#define PESDRx_RCSSET_RSTGU 0x01000000
diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c
index 0de7d8770891..38400963e245 100644
--- a/drivers/edac/ppc4xx_edac.c
+++ b/drivers/edac/ppc4xx_edac.c
@@ -205,7 +205,7 @@ static struct platform_driver ppc4xx_edac_driver = {
205 .remove = ppc4xx_edac_remove, 205 .remove = ppc4xx_edac_remove,
206 .driver = { 206 .driver = {
207 .owner = THIS_MODULE, 207 .owner = THIS_MODULE,
208 .name = PPC4XX_EDAC_MODULE_NAME 208 .name = PPC4XX_EDAC_MODULE_NAME,
209 .of_match_table = ppc4xx_edac_match, 209 .of_match_table = ppc4xx_edac_match,
210 }, 210 },
211}; 211};