diff options
author | Tony Lindgren <tony@atomide.com> | 2012-06-25 10:41:17 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2012-06-25 10:41:17 -0400 |
commit | 9a17d88e0586bb7189655f8f99484a872a474626 (patch) | |
tree | 9e162e41ecdcef6c166b3b9378b2ff4c541d9555 | |
parent | 6b16351acbd415e66ba16bf7d473ece1574cf0bc (diff) | |
parent | fafcdd53220f44d7ae2f06a9ce20c8d550df2d9b (diff) |
Merge tag 'omap-devel-c-for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-pm
Reimplement the OMAP PRCM I/O chain code. Needed for I/O wakeups to
work correctly.
Conflicts:
arch/arm/mach-omap2/prm2xxx_3xxx.c
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 38 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm34xx.c | 44 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm-common.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm2xxx_3xxx.c | 57 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm2xxx_3xxx.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm44xx.c | 63 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm44xx.h | 2 |
7 files changed, 162 insertions, 56 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 773193670ea2..09f44d56e026 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
@@ -153,6 +153,7 @@ | |||
153 | #include "prm44xx.h" | 153 | #include "prm44xx.h" |
154 | #include "prminst44xx.h" | 154 | #include "prminst44xx.h" |
155 | #include "mux.h" | 155 | #include "mux.h" |
156 | #include "pm.h" | ||
156 | 157 | ||
157 | /* Maximum microseconds to wait for OMAP module to softreset */ | 158 | /* Maximum microseconds to wait for OMAP module to softreset */ |
158 | #define MAX_MODULE_SOFTRESET_WAIT 10000 | 159 | #define MAX_MODULE_SOFTRESET_WAIT 10000 |
@@ -172,6 +173,9 @@ static LIST_HEAD(omap_hwmod_list); | |||
172 | /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ | 173 | /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ |
173 | static struct omap_hwmod *mpu_oh; | 174 | static struct omap_hwmod *mpu_oh; |
174 | 175 | ||
176 | /* io_chain_lock: used to serialize reconfigurations of the I/O chain */ | ||
177 | static DEFINE_SPINLOCK(io_chain_lock); | ||
178 | |||
175 | /* | 179 | /* |
176 | * linkspace: ptr to a buffer that struct omap_hwmod_link records are | 180 | * linkspace: ptr to a buffer that struct omap_hwmod_link records are |
177 | * allocated from - used to reduce the number of small memory | 181 | * allocated from - used to reduce the number of small memory |
@@ -1738,6 +1742,32 @@ static int _reset(struct omap_hwmod *oh) | |||
1738 | } | 1742 | } |
1739 | 1743 | ||
1740 | /** | 1744 | /** |
1745 | * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain | ||
1746 | * | ||
1747 | * Call the appropriate PRM function to clear any logged I/O chain | ||
1748 | * wakeups and to reconfigure the chain. This apparently needs to be | ||
1749 | * done upon every mux change. Since hwmods can be concurrently | ||
1750 | * enabled and idled, hold a spinlock around the I/O chain | ||
1751 | * reconfiguration sequence. No return value. | ||
1752 | * | ||
1753 | * XXX When the PRM code is moved to drivers, this function can be removed, | ||
1754 | * as the PRM infrastructure should abstract this. | ||
1755 | */ | ||
1756 | static void _reconfigure_io_chain(void) | ||
1757 | { | ||
1758 | unsigned long flags; | ||
1759 | |||
1760 | spin_lock_irqsave(&io_chain_lock, flags); | ||
1761 | |||
1762 | if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl()) | ||
1763 | omap3xxx_prm_reconfigure_io_chain(); | ||
1764 | else if (cpu_is_omap44xx()) | ||
1765 | omap44xx_prm_reconfigure_io_chain(); | ||
1766 | |||
1767 | spin_unlock_irqrestore(&io_chain_lock, flags); | ||
1768 | } | ||
1769 | |||
1770 | /** | ||
1741 | * _enable - enable an omap_hwmod | 1771 | * _enable - enable an omap_hwmod |
1742 | * @oh: struct omap_hwmod * | 1772 | * @oh: struct omap_hwmod * |
1743 | * | 1773 | * |
@@ -1793,8 +1823,10 @@ static int _enable(struct omap_hwmod *oh) | |||
1793 | /* Mux pins for device runtime if populated */ | 1823 | /* Mux pins for device runtime if populated */ |
1794 | if (oh->mux && (!oh->mux->enabled || | 1824 | if (oh->mux && (!oh->mux->enabled || |
1795 | ((oh->_state == _HWMOD_STATE_IDLE) && | 1825 | ((oh->_state == _HWMOD_STATE_IDLE) && |
1796 | oh->mux->pads_dynamic))) | 1826 | oh->mux->pads_dynamic))) { |
1797 | omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); | 1827 | omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); |
1828 | _reconfigure_io_chain(); | ||
1829 | } | ||
1798 | 1830 | ||
1799 | _add_initiator_dep(oh, mpu_oh); | 1831 | _add_initiator_dep(oh, mpu_oh); |
1800 | 1832 | ||
@@ -1883,8 +1915,10 @@ static int _idle(struct omap_hwmod *oh) | |||
1883 | clkdm_hwmod_disable(oh->clkdm, oh); | 1915 | clkdm_hwmod_disable(oh->clkdm, oh); |
1884 | 1916 | ||
1885 | /* Mux pins for device idle if populated */ | 1917 | /* Mux pins for device idle if populated */ |
1886 | if (oh->mux && oh->mux->pads_dynamic) | 1918 | if (oh->mux && oh->mux->pads_dynamic) { |
1887 | omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); | 1919 | omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); |
1920 | _reconfigure_io_chain(); | ||
1921 | } | ||
1888 | 1922 | ||
1889 | oh->_state = _HWMOD_STATE_IDLE; | 1923 | oh->_state = _HWMOD_STATE_IDLE; |
1890 | 1924 | ||
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 3a595e899724..e67d898433fb 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -72,33 +72,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm; | |||
72 | static struct powerdomain *core_pwrdm, *per_pwrdm; | 72 | static struct powerdomain *core_pwrdm, *per_pwrdm; |
73 | static struct powerdomain *cam_pwrdm; | 73 | static struct powerdomain *cam_pwrdm; |
74 | 74 | ||
75 | static void omap3_enable_io_chain(void) | ||
76 | { | ||
77 | int timeout = 0; | ||
78 | |||
79 | omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, | ||
80 | PM_WKEN); | ||
81 | /* Do a readback to assure write has been done */ | ||
82 | omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN); | ||
83 | |||
84 | while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN) & | ||
85 | OMAP3430_ST_IO_CHAIN_MASK)) { | ||
86 | timeout++; | ||
87 | if (timeout > 1000) { | ||
88 | pr_err("Wake up daisy chain activation failed.\n"); | ||
89 | return; | ||
90 | } | ||
91 | omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, | ||
92 | WKUP_MOD, PM_WKEN); | ||
93 | } | ||
94 | } | ||
95 | |||
96 | static void omap3_disable_io_chain(void) | ||
97 | { | ||
98 | omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, | ||
99 | PM_WKEN); | ||
100 | } | ||
101 | |||
102 | static void omap3_core_save_context(void) | 75 | static void omap3_core_save_context(void) |
103 | { | 76 | { |
104 | omap3_ctrl_save_padconf(); | 77 | omap3_ctrl_save_padconf(); |
@@ -299,13 +272,6 @@ void omap_sram_idle(void) | |||
299 | /* Enable IO-PAD and IO-CHAIN wakeups */ | 272 | /* Enable IO-PAD and IO-CHAIN wakeups */ |
300 | per_next_state = pwrdm_read_next_pwrst(per_pwrdm); | 273 | per_next_state = pwrdm_read_next_pwrst(per_pwrdm); |
301 | core_next_state = pwrdm_read_next_pwrst(core_pwrdm); | 274 | core_next_state = pwrdm_read_next_pwrst(core_pwrdm); |
302 | if (omap3_has_io_wakeup() && | ||
303 | (per_next_state < PWRDM_POWER_ON || | ||
304 | core_next_state < PWRDM_POWER_ON)) { | ||
305 | omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); | ||
306 | if (omap3_has_io_chain_ctrl()) | ||
307 | omap3_enable_io_chain(); | ||
308 | } | ||
309 | 275 | ||
310 | pwrdm_pre_transition(); | 276 | pwrdm_pre_transition(); |
311 | 277 | ||
@@ -378,16 +344,6 @@ void omap_sram_idle(void) | |||
378 | if (per_next_state < PWRDM_POWER_ON) | 344 | if (per_next_state < PWRDM_POWER_ON) |
379 | omap2_gpio_resume_after_idle(); | 345 | omap2_gpio_resume_after_idle(); |
380 | 346 | ||
381 | /* Disable IO-PAD and IO-CHAIN wakeup */ | ||
382 | if (omap3_has_io_wakeup() && | ||
383 | (per_next_state < PWRDM_POWER_ON || | ||
384 | core_next_state < PWRDM_POWER_ON)) { | ||
385 | omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, | ||
386 | PM_WKEN); | ||
387 | if (omap3_has_io_chain_ctrl()) | ||
388 | omap3_disable_io_chain(); | ||
389 | } | ||
390 | |||
391 | clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]); | 347 | clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]); |
392 | } | 348 | } |
393 | 349 | ||
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 6da3ba483ad1..fca23cbea708 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h | |||
@@ -410,6 +410,14 @@ | |||
410 | */ | 410 | */ |
411 | #define MAX_MODULE_HARDRESET_WAIT 10000 | 411 | #define MAX_MODULE_HARDRESET_WAIT 10000 |
412 | 412 | ||
413 | /* | ||
414 | * Maximum time(us) it takes to output the signal WUCLKOUT of the last | ||
415 | * pad of the I/O ring after asserting WUCLKIN high. Tero measured | ||
416 | * the actual time at 7 to 8 microseconds on OMAP3 and 2 to 4 | ||
417 | * microseconds on OMAP4, so this timeout may be too high. | ||
418 | */ | ||
419 | #define MAX_IOPAD_LATCH_TIME 100 | ||
420 | |||
413 | # ifndef __ASSEMBLER__ | 421 | # ifndef __ASSEMBLER__ |
414 | extern void __iomem *prm_base; | 422 | extern void __iomem *prm_base; |
415 | extern void __iomem *cm_base; | 423 | extern void __iomem *cm_base; |
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 21cb74003a56..e10fd1e9446b 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c | |||
@@ -302,17 +302,60 @@ void omap3xxx_prm_restore_irqen(u32 *saved_mask) | |||
302 | OMAP3_PRM_IRQENABLE_MPU_OFFSET); | 302 | OMAP3_PRM_IRQENABLE_MPU_OFFSET); |
303 | } | 303 | } |
304 | 304 | ||
305 | static int __init omap3xxx_prcm_init(void) | 305 | /** |
306 | * omap3xxx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain | ||
307 | * | ||
308 | * Clear any previously-latched I/O wakeup events and ensure that the | ||
309 | * I/O wakeup gates are aligned with the current mux settings. Works | ||
310 | * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then | ||
311 | * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit. No | ||
312 | * return value. | ||
313 | */ | ||
314 | void omap3xxx_prm_reconfigure_io_chain(void) | ||
315 | { | ||
316 | int i = 0; | ||
317 | |||
318 | omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, | ||
319 | PM_WKEN); | ||
320 | |||
321 | omap_test_timeout(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST) & | ||
322 | OMAP3430_ST_IO_CHAIN_MASK, | ||
323 | MAX_IOPAD_LATCH_TIME, i); | ||
324 | if (i == MAX_IOPAD_LATCH_TIME) | ||
325 | pr_warn("PRM: I/O chain clock line assertion timed out\n"); | ||
326 | |||
327 | omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD, | ||
328 | PM_WKEN); | ||
329 | |||
330 | omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, WKUP_MOD, | ||
331 | PM_WKST); | ||
332 | |||
333 | omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST); | ||
334 | } | ||
335 | |||
336 | /** | ||
337 | * omap3xxx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches | ||
338 | * | ||
339 | * Activates the I/O wakeup event latches and allows events logged by | ||
340 | * those latches to signal a wakeup event to the PRCM. For I/O | ||
341 | * wakeups to occur, WAKEUPENABLE bits must be set in the pad mux | ||
342 | * registers, and omap3xxx_prm_reconfigure_io_chain() must be called. | ||
343 | * No return value. | ||
344 | */ | ||
345 | static void __init omap3xxx_prm_enable_io_wakeup(void) | ||
306 | { | 346 | { |
307 | int ret = 0; | 347 | if (omap3_has_io_wakeup()) |
348 | omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, | ||
349 | PM_WKEN); | ||
350 | } | ||
308 | 351 | ||
352 | static int __init omap3xxx_prcm_init(void) | ||
353 | { | ||
309 | if (cpu_is_omap34xx()) { | 354 | if (cpu_is_omap34xx()) { |
310 | ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); | 355 | omap3xxx_prm_enable_io_wakeup(); |
311 | if (!ret) | 356 | return omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); |
312 | irq_set_status_flags(omap_prcm_event_to_irq("io"), | ||
313 | IRQ_NOAUTOEN); | ||
314 | } | 357 | } |
315 | 358 | ||
316 | return ret; | 359 | return 0; |
317 | } | 360 | } |
318 | subsys_initcall(omap3xxx_prcm_init); | 361 | subsys_initcall(omap3xxx_prcm_init); |
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index 70ac2a19dc5f..a8c946f318ab 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h | |||
@@ -303,6 +303,8 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); | |||
303 | extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); | 303 | extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); |
304 | extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); | 304 | extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); |
305 | 305 | ||
306 | #endif /* CONFIG_ARCH_OMAP4 */ | ||
307 | |||
306 | /* OMAP3-specific VP functions */ | 308 | /* OMAP3-specific VP functions */ |
307 | u32 omap3_prm_vp_check_txdone(u8 vp_id); | 309 | u32 omap3_prm_vp_check_txdone(u8 vp_id); |
308 | void omap3_prm_vp_clear_txdone(u8 vp_id); | 310 | void omap3_prm_vp_clear_txdone(u8 vp_id); |
@@ -315,14 +317,14 @@ extern u32 omap3_prm_vcvp_read(u8 offset); | |||
315 | extern void omap3_prm_vcvp_write(u32 val, u8 offset); | 317 | extern void omap3_prm_vcvp_write(u32 val, u8 offset); |
316 | extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); | 318 | extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); |
317 | 319 | ||
320 | extern void omap3xxx_prm_reconfigure_io_chain(void); | ||
321 | |||
318 | /* PRM interrupt-related functions */ | 322 | /* PRM interrupt-related functions */ |
319 | extern void omap3xxx_prm_read_pending_irqs(unsigned long *events); | 323 | extern void omap3xxx_prm_read_pending_irqs(unsigned long *events); |
320 | extern void omap3xxx_prm_ocp_barrier(void); | 324 | extern void omap3xxx_prm_ocp_barrier(void); |
321 | extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); | 325 | extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); |
322 | extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); | 326 | extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); |
323 | 327 | ||
324 | #endif /* CONFIG_ARCH_OMAP4 */ | ||
325 | |||
326 | #endif | 328 | #endif |
327 | 329 | ||
328 | /* | 330 | /* |
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index f106d21ff581..bb727c2d9337 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c | |||
@@ -233,10 +233,71 @@ void omap44xx_prm_restore_irqen(u32 *saved_mask) | |||
233 | OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); | 233 | OMAP4_PRM_IRQENABLE_MPU_2_OFFSET); |
234 | } | 234 | } |
235 | 235 | ||
236 | /** | ||
237 | * omap44xx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain | ||
238 | * | ||
239 | * Clear any previously-latched I/O wakeup events and ensure that the | ||
240 | * I/O wakeup gates are aligned with the current mux settings. Works | ||
241 | * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then | ||
242 | * deasserting WUCLKIN and waiting for WUCLKOUT to be deasserted. | ||
243 | * No return value. XXX Are the final two steps necessary? | ||
244 | */ | ||
245 | void omap44xx_prm_reconfigure_io_chain(void) | ||
246 | { | ||
247 | int i = 0; | ||
248 | |||
249 | /* Trigger WUCLKIN enable */ | ||
250 | omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, | ||
251 | OMAP4430_WUCLK_CTRL_MASK, | ||
252 | OMAP4430_PRM_DEVICE_INST, | ||
253 | OMAP4_PRM_IO_PMCTRL_OFFSET); | ||
254 | omap_test_timeout( | ||
255 | (((omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, | ||
256 | OMAP4_PRM_IO_PMCTRL_OFFSET) & | ||
257 | OMAP4430_WUCLK_STATUS_MASK) >> | ||
258 | OMAP4430_WUCLK_STATUS_SHIFT) == 1), | ||
259 | MAX_IOPAD_LATCH_TIME, i); | ||
260 | if (i == MAX_IOPAD_LATCH_TIME) | ||
261 | pr_warn("PRM: I/O chain clock line assertion timed out\n"); | ||
262 | |||
263 | /* Trigger WUCLKIN disable */ | ||
264 | omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0, | ||
265 | OMAP4430_PRM_DEVICE_INST, | ||
266 | OMAP4_PRM_IO_PMCTRL_OFFSET); | ||
267 | omap_test_timeout( | ||
268 | (((omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, | ||
269 | OMAP4_PRM_IO_PMCTRL_OFFSET) & | ||
270 | OMAP4430_WUCLK_STATUS_MASK) >> | ||
271 | OMAP4430_WUCLK_STATUS_SHIFT) == 0), | ||
272 | MAX_IOPAD_LATCH_TIME, i); | ||
273 | if (i == MAX_IOPAD_LATCH_TIME) | ||
274 | pr_warn("PRM: I/O chain clock line deassertion timed out\n"); | ||
275 | |||
276 | return; | ||
277 | } | ||
278 | |||
279 | /** | ||
280 | * omap44xx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches | ||
281 | * | ||
282 | * Activates the I/O wakeup event latches and allows events logged by | ||
283 | * those latches to signal a wakeup event to the PRCM. For I/O wakeups | ||
284 | * to occur, WAKEUPENABLE bits must be set in the pad mux registers, and | ||
285 | * omap44xx_prm_reconfigure_io_chain() must be called. No return value. | ||
286 | */ | ||
287 | static void __init omap44xx_prm_enable_io_wakeup(void) | ||
288 | { | ||
289 | omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK, | ||
290 | OMAP4430_GLOBAL_WUEN_MASK, | ||
291 | OMAP4430_PRM_DEVICE_INST, | ||
292 | OMAP4_PRM_IO_PMCTRL_OFFSET); | ||
293 | } | ||
294 | |||
236 | static int __init omap4xxx_prcm_init(void) | 295 | static int __init omap4xxx_prcm_init(void) |
237 | { | 296 | { |
238 | if (cpu_is_omap44xx()) | 297 | if (cpu_is_omap44xx()) { |
298 | omap44xx_prm_enable_io_wakeup(); | ||
239 | return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup); | 299 | return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup); |
300 | } | ||
240 | return 0; | 301 | return 0; |
241 | } | 302 | } |
242 | subsys_initcall(omap4xxx_prcm_init); | 303 | subsys_initcall(omap4xxx_prcm_init); |
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 7978092946db..ee72ae6bd8c9 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h | |||
@@ -763,6 +763,8 @@ extern u32 omap4_prm_vcvp_read(u8 offset); | |||
763 | extern void omap4_prm_vcvp_write(u32 val, u8 offset); | 763 | extern void omap4_prm_vcvp_write(u32 val, u8 offset); |
764 | extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); | 764 | extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); |
765 | 765 | ||
766 | extern void omap44xx_prm_reconfigure_io_chain(void); | ||
767 | |||
766 | /* PRM interrupt-related functions */ | 768 | /* PRM interrupt-related functions */ |
767 | extern void omap44xx_prm_read_pending_irqs(unsigned long *events); | 769 | extern void omap44xx_prm_read_pending_irqs(unsigned long *events); |
768 | extern void omap44xx_prm_ocp_barrier(void); | 770 | extern void omap44xx_prm_ocp_barrier(void); |