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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2013-03-27 03:55:54 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-04-01 22:02:16 -0400
commit99fb32b88be4e9b12c44f61b613a0936a62454b7 (patch)
tree1d7f7c70746029989f3ce411a9d21d5f40da3216
parentf5942c76217e3f4c2a62a72c9d64997b8765f9e2 (diff)
ARM: shmobile: sh7372: use fixed ratio clock
Current clock-sh7372 is using own implement for each divX clocks. This patch switches to use fixed ratio clock, and was tesed on mackerel board. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c44
1 files changed, 7 insertions, 37 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 6c23e3f22d62..7e105932c09d 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -21,6 +21,7 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/sh_clk.h> 22#include <linux/sh_clk.h>
23#include <linux/clkdev.h> 23#include <linux/clkdev.h>
24#include <mach/clock.h>
24#include <mach/common.h> 25#include <mach/common.h>
25 26
26/* SH7372 registers */ 27/* SH7372 registers */
@@ -83,39 +84,12 @@ struct clk sh7372_extal2_clk = {
83 .rate = 48000000, 84 .rate = 48000000,
84}; 85};
85 86
86/* A fixed divide-by-2 block */ 87SH_CLK_RATIO(div2, 1, 2);
87static unsigned long div2_recalc(struct clk *clk)
88{
89 return clk->parent->rate / 2;
90}
91
92static struct sh_clk_ops div2_clk_ops = {
93 .recalc = div2_recalc,
94};
95 88
96/* Divide dv_clki by two */ 89SH_FIXED_RATIO_CLKg(sh7372_dv_clki_div2_clk, sh7372_dv_clki_clk, div2);
97struct clk sh7372_dv_clki_div2_clk = { 90SH_FIXED_RATIO_CLK(extal1_div2_clk, sh7372_extal1_clk, div2);
98 .ops = &div2_clk_ops, 91SH_FIXED_RATIO_CLK(extal2_div2_clk, sh7372_extal2_clk, div2);
99 .parent = &sh7372_dv_clki_clk, 92SH_FIXED_RATIO_CLK(extal2_div4_clk, extal2_div2_clk, div2);
100};
101
102/* Divide extal1 by two */
103static struct clk extal1_div2_clk = {
104 .ops = &div2_clk_ops,
105 .parent = &sh7372_extal1_clk,
106};
107
108/* Divide extal2 by two */
109static struct clk extal2_div2_clk = {
110 .ops = &div2_clk_ops,
111 .parent = &sh7372_extal2_clk,
112};
113
114/* Divide extal2 by four */
115static struct clk extal2_div4_clk = {
116 .ops = &div2_clk_ops,
117 .parent = &extal2_div2_clk,
118};
119 93
120/* PLLC0 and PLLC1 */ 94/* PLLC0 and PLLC1 */
121static unsigned long pllc01_recalc(struct clk *clk) 95static unsigned long pllc01_recalc(struct clk *clk)
@@ -147,10 +121,7 @@ static struct clk pllc1_clk = {
147}; 121};
148 122
149/* Divide PLLC1 by two */ 123/* Divide PLLC1 by two */
150static struct clk pllc1_div2_clk = { 124SH_FIXED_RATIO_CLK(pllc1_div2_clk, pllc1_clk, div2);
151 .ops = &div2_clk_ops,
152 .parent = &pllc1_clk,
153};
154 125
155/* PLLC2 */ 126/* PLLC2 */
156 127
@@ -650,5 +621,4 @@ void __init sh7372_clock_init(void)
650 shmobile_clk_init(); 621 shmobile_clk_init();
651 else 622 else
652 panic("failed to setup sh7372 clocks\n"); 623 panic("failed to setup sh7372 clocks\n");
653
654} 624}