diff options
author | Reinette Chatre <reinette.chatre@intel.com> | 2008-03-14 13:38:45 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-03-25 16:41:50 -0400 |
commit | 99f7d39bb020a06c98cd42641b6193b761f763ca (patch) | |
tree | a513acadae99e245347d30f69ebc46702ac2d71c | |
parent | ff829ae01644c10722132a45981615be962c4a5c (diff) |
iwlwifi: remove macros containing offsets from eeprom struct
A user needing to access these fields can use offsetof() for
access. The comments still contain the offset to assist with
debugging.
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
CC: Michael Buesch <mb@bu3sch.de>
Signed-off-by: Assaf Krauss <assaf.krauss@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-3945-hw.h | 32 | ||||
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-eeprom.h | 32 |
2 files changed, 0 insertions, 64 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-hw.h b/drivers/net/wireless/iwlwifi/iwl-3945-hw.h index 1ca6fa494e4b..368da9852aab 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945-hw.h +++ b/drivers/net/wireless/iwlwifi/iwl-3945-hw.h | |||
@@ -198,43 +198,27 @@ struct iwl3945_eeprom_temperature_corr { | |||
198 | */ | 198 | */ |
199 | struct iwl3945_eeprom { | 199 | struct iwl3945_eeprom { |
200 | u8 reserved0[16]; | 200 | u8 reserved0[16]; |
201 | #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */ | ||
202 | u16 device_id; /* abs.ofs: 16 */ | 201 | u16 device_id; /* abs.ofs: 16 */ |
203 | u8 reserved1[2]; | 202 | u8 reserved1[2]; |
204 | #define EEPROM_PMC (2*0x0A) /* 2 bytes */ | ||
205 | u16 pmc; /* abs.ofs: 20 */ | 203 | u16 pmc; /* abs.ofs: 20 */ |
206 | u8 reserved2[20]; | 204 | u8 reserved2[20]; |
207 | #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */ | ||
208 | u8 mac_address[6]; /* abs.ofs: 42 */ | 205 | u8 mac_address[6]; /* abs.ofs: 42 */ |
209 | u8 reserved3[58]; | 206 | u8 reserved3[58]; |
210 | #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */ | ||
211 | u16 board_revision; /* abs.ofs: 106 */ | 207 | u16 board_revision; /* abs.ofs: 106 */ |
212 | u8 reserved4[11]; | 208 | u8 reserved4[11]; |
213 | #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */ | ||
214 | u8 board_pba_number[9]; /* abs.ofs: 119 */ | 209 | u8 board_pba_number[9]; /* abs.ofs: 119 */ |
215 | u8 reserved5[8]; | 210 | u8 reserved5[8]; |
216 | #define EEPROM_VERSION (2*0x44) /* 2 bytes */ | ||
217 | u16 version; /* abs.ofs: 136 */ | 211 | u16 version; /* abs.ofs: 136 */ |
218 | #define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */ | ||
219 | u8 sku_cap; /* abs.ofs: 138 */ | 212 | u8 sku_cap; /* abs.ofs: 138 */ |
220 | #define EEPROM_LEDS_MODE (2*0x45+1) /* 1 bytes */ | ||
221 | u8 leds_mode; /* abs.ofs: 139 */ | 213 | u8 leds_mode; /* abs.ofs: 139 */ |
222 | #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */ | ||
223 | u16 oem_mode; | 214 | u16 oem_mode; |
224 | #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */ | ||
225 | u16 wowlan_mode; /* abs.ofs: 142 */ | 215 | u16 wowlan_mode; /* abs.ofs: 142 */ |
226 | #define EEPROM_LEDS_TIME_INTERVAL (2*0x48) /* 2 bytes */ | ||
227 | u16 leds_time_interval; /* abs.ofs: 144 */ | 216 | u16 leds_time_interval; /* abs.ofs: 144 */ |
228 | #define EEPROM_LEDS_OFF_TIME (2*0x49) /* 1 bytes */ | ||
229 | u8 leds_off_time; /* abs.ofs: 146 */ | 217 | u8 leds_off_time; /* abs.ofs: 146 */ |
230 | #define EEPROM_LEDS_ON_TIME (2*0x49+1) /* 1 bytes */ | ||
231 | u8 leds_on_time; /* abs.ofs: 147 */ | 218 | u8 leds_on_time; /* abs.ofs: 147 */ |
232 | #define EEPROM_ALMGOR_M_VERSION (2*0x4A) /* 1 bytes */ | ||
233 | u8 almgor_m_version; /* abs.ofs: 148 */ | 219 | u8 almgor_m_version; /* abs.ofs: 148 */ |
234 | #define EEPROM_ANTENNA_SWITCH_TYPE (2*0x4A+1) /* 1 bytes */ | ||
235 | u8 antenna_switch_type; /* abs.ofs: 149 */ | 220 | u8 antenna_switch_type; /* abs.ofs: 149 */ |
236 | u8 reserved6[42]; | 221 | u8 reserved6[42]; |
237 | #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */ | ||
238 | u8 sku_id[4]; /* abs.ofs: 192 */ | 222 | u8 sku_id[4]; /* abs.ofs: 192 */ |
239 | 223 | ||
240 | /* | 224 | /* |
@@ -249,9 +233,7 @@ struct iwl3945_eeprom { | |||
249 | * | 233 | * |
250 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 | 234 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 |
251 | */ | 235 | */ |
252 | #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */ | ||
253 | u16 band_1_count; /* abs.ofs: 196 */ | 236 | u16 band_1_count; /* abs.ofs: 196 */ |
254 | #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */ | ||
255 | struct iwl3945_eeprom_channel band_1_channels[14]; /* abs.ofs: 196 */ | 237 | struct iwl3945_eeprom_channel band_1_channels[14]; /* abs.ofs: 196 */ |
256 | 238 | ||
257 | /* | 239 | /* |
@@ -259,36 +241,28 @@ struct iwl3945_eeprom { | |||
259 | * 5.0 GHz channels 7, 8, 11, 12, 16 | 241 | * 5.0 GHz channels 7, 8, 11, 12, 16 |
260 | * (4915-5080MHz) (none of these is ever supported) | 242 | * (4915-5080MHz) (none of these is ever supported) |
261 | */ | 243 | */ |
262 | #define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */ | ||
263 | u16 band_2_count; /* abs.ofs: 226 */ | 244 | u16 band_2_count; /* abs.ofs: 226 */ |
264 | #define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */ | ||
265 | struct iwl3945_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */ | 245 | struct iwl3945_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */ |
266 | 246 | ||
267 | /* | 247 | /* |
268 | * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 | 248 | * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 |
269 | * (5170-5320MHz) | 249 | * (5170-5320MHz) |
270 | */ | 250 | */ |
271 | #define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */ | ||
272 | u16 band_3_count; /* abs.ofs: 254 */ | 251 | u16 band_3_count; /* abs.ofs: 254 */ |
273 | #define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */ | ||
274 | struct iwl3945_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */ | 252 | struct iwl3945_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */ |
275 | 253 | ||
276 | /* | 254 | /* |
277 | * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 | 255 | * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 |
278 | * (5500-5700MHz) | 256 | * (5500-5700MHz) |
279 | */ | 257 | */ |
280 | #define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */ | ||
281 | u16 band_4_count; /* abs.ofs: 280 */ | 258 | u16 band_4_count; /* abs.ofs: 280 */ |
282 | #define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */ | ||
283 | struct iwl3945_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */ | 259 | struct iwl3945_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */ |
284 | 260 | ||
285 | /* | 261 | /* |
286 | * 5.7 GHz channels 145, 149, 153, 157, 161, 165 | 262 | * 5.7 GHz channels 145, 149, 153, 157, 161, 165 |
287 | * (5725-5825MHz) | 263 | * (5725-5825MHz) |
288 | */ | 264 | */ |
289 | #define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */ | ||
290 | u16 band_5_count; /* abs.ofs: 304 */ | 265 | u16 band_5_count; /* abs.ofs: 304 */ |
291 | #define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */ | ||
292 | struct iwl3945_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */ | 266 | struct iwl3945_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */ |
293 | 267 | ||
294 | u8 reserved9[194]; | 268 | u8 reserved9[194]; |
@@ -296,15 +270,9 @@ struct iwl3945_eeprom { | |||
296 | /* | 270 | /* |
297 | * 3945 Txpower calibration data. | 271 | * 3945 Txpower calibration data. |
298 | */ | 272 | */ |
299 | #define EEPROM_TXPOWER_CALIB_GROUP0 0x200 | ||
300 | #define EEPROM_TXPOWER_CALIB_GROUP1 0x240 | ||
301 | #define EEPROM_TXPOWER_CALIB_GROUP2 0x280 | ||
302 | #define EEPROM_TXPOWER_CALIB_GROUP3 0x2c0 | ||
303 | #define EEPROM_TXPOWER_CALIB_GROUP4 0x300 | ||
304 | #define IWL_NUM_TX_CALIB_GROUPS 5 | 273 | #define IWL_NUM_TX_CALIB_GROUPS 5 |
305 | struct iwl3945_eeprom_txpower_group groups[IWL_NUM_TX_CALIB_GROUPS]; | 274 | struct iwl3945_eeprom_txpower_group groups[IWL_NUM_TX_CALIB_GROUPS]; |
306 | /* abs.ofs: 512 */ | 275 | /* abs.ofs: 512 */ |
307 | #define EEPROM_CALIB_TEMPERATURE_CORRECT 0x340 | ||
308 | struct iwl3945_eeprom_temperature_corr corrections; /* abs.ofs: 832 */ | 276 | struct iwl3945_eeprom_temperature_corr corrections; /* abs.ofs: 832 */ |
309 | u8 reserved16[172]; /* fill out to full 1024 byte block */ | 277 | u8 reserved16[172]; /* fill out to full 1024 byte block */ |
310 | } __attribute__ ((packed)); | 278 | } __attribute__ ((packed)); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h index ad486fe7a96c..404c700c7c18 100644 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h | |||
@@ -228,49 +228,31 @@ struct iwl4965_eeprom_calib_info { | |||
228 | */ | 228 | */ |
229 | struct iwl4965_eeprom { | 229 | struct iwl4965_eeprom { |
230 | u8 reserved0[16]; | 230 | u8 reserved0[16]; |
231 | #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */ | ||
232 | u16 device_id; /* abs.ofs: 16 */ | 231 | u16 device_id; /* abs.ofs: 16 */ |
233 | u8 reserved1[2]; | 232 | u8 reserved1[2]; |
234 | #define EEPROM_PMC (2*0x0A) /* 2 bytes */ | ||
235 | u16 pmc; /* abs.ofs: 20 */ | 233 | u16 pmc; /* abs.ofs: 20 */ |
236 | u8 reserved2[20]; | 234 | u8 reserved2[20]; |
237 | #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */ | ||
238 | u8 mac_address[6]; /* abs.ofs: 42 */ | 235 | u8 mac_address[6]; /* abs.ofs: 42 */ |
239 | u8 reserved3[58]; | 236 | u8 reserved3[58]; |
240 | #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */ | ||
241 | u16 board_revision; /* abs.ofs: 106 */ | 237 | u16 board_revision; /* abs.ofs: 106 */ |
242 | u8 reserved4[11]; | 238 | u8 reserved4[11]; |
243 | #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */ | ||
244 | u8 board_pba_number[9]; /* abs.ofs: 119 */ | 239 | u8 board_pba_number[9]; /* abs.ofs: 119 */ |
245 | u8 reserved5[8]; | 240 | u8 reserved5[8]; |
246 | #define EEPROM_VERSION (2*0x44) /* 2 bytes */ | ||
247 | u16 version; /* abs.ofs: 136 */ | 241 | u16 version; /* abs.ofs: 136 */ |
248 | #define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */ | ||
249 | u8 sku_cap; /* abs.ofs: 138 */ | 242 | u8 sku_cap; /* abs.ofs: 138 */ |
250 | #define EEPROM_LEDS_MODE (2*0x45+1) /* 1 bytes */ | ||
251 | u8 leds_mode; /* abs.ofs: 139 */ | 243 | u8 leds_mode; /* abs.ofs: 139 */ |
252 | #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */ | ||
253 | u16 oem_mode; | 244 | u16 oem_mode; |
254 | #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */ | ||
255 | u16 wowlan_mode; /* abs.ofs: 142 */ | 245 | u16 wowlan_mode; /* abs.ofs: 142 */ |
256 | #define EEPROM_LEDS_TIME_INTERVAL (2*0x48) /* 2 bytes */ | ||
257 | u16 leds_time_interval; /* abs.ofs: 144 */ | 246 | u16 leds_time_interval; /* abs.ofs: 144 */ |
258 | #define EEPROM_LEDS_OFF_TIME (2*0x49) /* 1 bytes */ | ||
259 | u8 leds_off_time; /* abs.ofs: 146 */ | 247 | u8 leds_off_time; /* abs.ofs: 146 */ |
260 | #define EEPROM_LEDS_ON_TIME (2*0x49+1) /* 1 bytes */ | ||
261 | u8 leds_on_time; /* abs.ofs: 147 */ | 248 | u8 leds_on_time; /* abs.ofs: 147 */ |
262 | #define EEPROM_ALMGOR_M_VERSION (2*0x4A) /* 1 bytes */ | ||
263 | u8 almgor_m_version; /* abs.ofs: 148 */ | 249 | u8 almgor_m_version; /* abs.ofs: 148 */ |
264 | #define EEPROM_ANTENNA_SWITCH_TYPE (2*0x4A+1) /* 1 bytes */ | ||
265 | u8 antenna_switch_type; /* abs.ofs: 149 */ | 250 | u8 antenna_switch_type; /* abs.ofs: 149 */ |
266 | u8 reserved6[8]; | 251 | u8 reserved6[8]; |
267 | #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */ | ||
268 | u16 board_revision_4965; /* abs.ofs: 158 */ | 252 | u16 board_revision_4965; /* abs.ofs: 158 */ |
269 | u8 reserved7[13]; | 253 | u8 reserved7[13]; |
270 | #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */ | ||
271 | u8 board_pba_number_4965[9]; /* abs.ofs: 173 */ | 254 | u8 board_pba_number_4965[9]; /* abs.ofs: 173 */ |
272 | u8 reserved8[10]; | 255 | u8 reserved8[10]; |
273 | #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */ | ||
274 | u8 sku_id[4]; /* abs.ofs: 192 */ | 256 | u8 sku_id[4]; /* abs.ofs: 192 */ |
275 | 257 | ||
276 | /* | 258 | /* |
@@ -285,9 +267,7 @@ struct iwl4965_eeprom { | |||
285 | * | 267 | * |
286 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 | 268 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 |
287 | */ | 269 | */ |
288 | #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */ | ||
289 | u16 band_1_count; /* abs.ofs: 196 */ | 270 | u16 band_1_count; /* abs.ofs: 196 */ |
290 | #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */ | ||
291 | struct iwl4965_eeprom_channel band_1_channels[14]; /* abs.ofs: 196 */ | 271 | struct iwl4965_eeprom_channel band_1_channels[14]; /* abs.ofs: 196 */ |
292 | 272 | ||
293 | /* | 273 | /* |
@@ -295,36 +275,28 @@ struct iwl4965_eeprom { | |||
295 | * 5.0 GHz channels 7, 8, 11, 12, 16 | 275 | * 5.0 GHz channels 7, 8, 11, 12, 16 |
296 | * (4915-5080MHz) (none of these is ever supported) | 276 | * (4915-5080MHz) (none of these is ever supported) |
297 | */ | 277 | */ |
298 | #define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */ | ||
299 | u16 band_2_count; /* abs.ofs: 226 */ | 278 | u16 band_2_count; /* abs.ofs: 226 */ |
300 | #define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */ | ||
301 | struct iwl4965_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */ | 279 | struct iwl4965_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */ |
302 | 280 | ||
303 | /* | 281 | /* |
304 | * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 | 282 | * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 |
305 | * (5170-5320MHz) | 283 | * (5170-5320MHz) |
306 | */ | 284 | */ |
307 | #define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */ | ||
308 | u16 band_3_count; /* abs.ofs: 254 */ | 285 | u16 band_3_count; /* abs.ofs: 254 */ |
309 | #define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */ | ||
310 | struct iwl4965_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */ | 286 | struct iwl4965_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */ |
311 | 287 | ||
312 | /* | 288 | /* |
313 | * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 | 289 | * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 |
314 | * (5500-5700MHz) | 290 | * (5500-5700MHz) |
315 | */ | 291 | */ |
316 | #define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */ | ||
317 | u16 band_4_count; /* abs.ofs: 280 */ | 292 | u16 band_4_count; /* abs.ofs: 280 */ |
318 | #define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */ | ||
319 | struct iwl4965_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */ | 293 | struct iwl4965_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */ |
320 | 294 | ||
321 | /* | 295 | /* |
322 | * 5.7 GHz channels 145, 149, 153, 157, 161, 165 | 296 | * 5.7 GHz channels 145, 149, 153, 157, 161, 165 |
323 | * (5725-5825MHz) | 297 | * (5725-5825MHz) |
324 | */ | 298 | */ |
325 | #define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */ | ||
326 | u16 band_5_count; /* abs.ofs: 304 */ | 299 | u16 band_5_count; /* abs.ofs: 304 */ |
327 | #define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */ | ||
328 | struct iwl4965_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */ | 300 | struct iwl4965_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */ |
329 | 301 | ||
330 | u8 reserved10[2]; | 302 | u8 reserved10[2]; |
@@ -345,7 +317,6 @@ struct iwl4965_eeprom { | |||
345 | * | 317 | * |
346 | * NOTE: 4965 does not support FAT channels on 2.4 GHz. | 318 | * NOTE: 4965 does not support FAT channels on 2.4 GHz. |
347 | */ | 319 | */ |
348 | #define EEPROM_REGULATORY_BAND_24_FAT_CHANNELS (2*0xA0) /* 14 bytes */ | ||
349 | struct iwl4965_eeprom_channel band_24_channels[7]; /* abs.ofs: 320 */ | 320 | struct iwl4965_eeprom_channel band_24_channels[7]; /* abs.ofs: 320 */ |
350 | u8 reserved11[2]; | 321 | u8 reserved11[2]; |
351 | 322 | ||
@@ -353,7 +324,6 @@ struct iwl4965_eeprom { | |||
353 | * 5.2 GHz FAT channels 36 (40), 44 (48), 52 (56), 60 (64), | 324 | * 5.2 GHz FAT channels 36 (40), 44 (48), 52 (56), 60 (64), |
354 | * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161) | 325 | * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161) |
355 | */ | 326 | */ |
356 | #define EEPROM_REGULATORY_BAND_52_FAT_CHANNELS (2*0xA8) /* 22 bytes */ | ||
357 | struct iwl4965_eeprom_channel band_52_channels[11]; /* abs.ofs: 336 */ | 327 | struct iwl4965_eeprom_channel band_52_channels[11]; /* abs.ofs: 336 */ |
358 | u8 reserved12[6]; | 328 | u8 reserved12[6]; |
359 | 329 | ||
@@ -362,7 +332,6 @@ struct iwl4965_eeprom { | |||
362 | * Driver does not work with txpower calibration version < 5. | 332 | * Driver does not work with txpower calibration version < 5. |
363 | * This value is simply a 16-bit number, no major/minor versions here. | 333 | * This value is simply a 16-bit number, no major/minor versions here. |
364 | */ | 334 | */ |
365 | #define EEPROM_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */ | ||
366 | u16 calib_version; /* abs.ofs: 364 */ | 335 | u16 calib_version; /* abs.ofs: 364 */ |
367 | u8 reserved13[2]; | 336 | u8 reserved13[2]; |
368 | u8 reserved14[96]; /* abs.ofs: 368 */ | 337 | u8 reserved14[96]; /* abs.ofs: 368 */ |
@@ -370,7 +339,6 @@ struct iwl4965_eeprom { | |||
370 | /* | 339 | /* |
371 | * 4965 Txpower calibration data. | 340 | * 4965 Txpower calibration data. |
372 | */ | 341 | */ |
373 | #define EEPROM_IWL_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */ | ||
374 | struct iwl4965_eeprom_calib_info calib_info; /* abs.ofs: 464 */ | 342 | struct iwl4965_eeprom_calib_info calib_info; /* abs.ofs: 464 */ |
375 | 343 | ||
376 | u8 reserved16[140]; /* fill out to full 1024 byte block */ | 344 | u8 reserved16[140]; /* fill out to full 1024 byte block */ |