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authorTakashi Iwai <tiwai@suse.de>2014-08-18 07:47:50 -0400
committerTakashi Iwai <tiwai@suse.de>2014-08-19 02:04:34 -0400
commit98b248839474293481905562ae38dc2d6558ef20 (patch)
tree6d17c10c88b8ab9397b75f4bdd31b8d32ec239f8
parent1687ccc8b2229d05c579924086e9b42ada9db888 (diff)
ALSA: hda/realtek - Add alc_update_coef*_idx() helper
... and rewrite a few open codes with them. Signed-off-by: Takashi Iwai <tiwai@suse.de>
-rw-r--r--sound/pci/hda/patch_realtek.c277
1 files changed, 82 insertions, 195 deletions
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index 75614e53e60c..fe041fa4f2c3 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -155,6 +155,20 @@ static void alc_write_coefex_idx(struct hda_codec *codec, hda_nid_t nid,
155#define alc_write_coef_idx(codec, coef_idx, coef_val) \ 155#define alc_write_coef_idx(codec, coef_idx, coef_val) \
156 alc_write_coefex_idx(codec, 0x20, coef_idx, coef_val) 156 alc_write_coefex_idx(codec, 0x20, coef_idx, coef_val)
157 157
158static void alc_update_coefex_idx(struct hda_codec *codec, hda_nid_t nid,
159 unsigned int coef_idx, unsigned int mask,
160 unsigned int bits_set)
161{
162 unsigned int val = alc_read_coefex_idx(codec, nid, coef_idx);
163
164 if (val != -1)
165 alc_write_coefex_idx(codec, nid, coef_idx,
166 (val & ~mask) | bits_set);
167}
168
169#define alc_update_coef_idx(codec, coef_idx, mask, bits_set) \
170 alc_update_coefex_idx(codec, 0x20, coef_idx, mask, bits_set)
171
158/* a special bypass for COEF 0; read the cached value at the second time */ 172/* a special bypass for COEF 0; read the cached value at the second time */
159static unsigned int alc_get_coef0(struct hda_codec *codec) 173static unsigned int alc_get_coef0(struct hda_codec *codec)
160{ 174{
@@ -210,20 +224,10 @@ static const struct hda_verb alc_gpio3_init_verbs[] = {
210static void alc_fix_pll(struct hda_codec *codec) 224static void alc_fix_pll(struct hda_codec *codec)
211{ 225{
212 struct alc_spec *spec = codec->spec; 226 struct alc_spec *spec = codec->spec;
213 unsigned int val;
214 227
215 if (!spec->pll_nid) 228 if (spec->pll_nid)
216 return; 229 alc_update_coefex_idx(codec, spec->pll_nid, spec->pll_coef_idx,
217 snd_hda_codec_write(codec, spec->pll_nid, 0, AC_VERB_SET_COEF_INDEX, 230 1 << spec->pll_coef_bit, 0);
218 spec->pll_coef_idx);
219 val = snd_hda_codec_read(codec, spec->pll_nid, 0,
220 AC_VERB_GET_PROC_COEF, 0);
221 if (val == -1)
222 return;
223 snd_hda_codec_write(codec, spec->pll_nid, 0, AC_VERB_SET_COEF_INDEX,
224 spec->pll_coef_idx);
225 snd_hda_codec_write(codec, spec->pll_nid, 0, AC_VERB_SET_PROC_COEF,
226 val & ~(1 << spec->pll_coef_bit));
227} 231}
228 232
229static void alc_fix_pll_init(struct hda_codec *codec, hda_nid_t nid, 233static void alc_fix_pll_init(struct hda_codec *codec, hda_nid_t nid,
@@ -279,12 +283,7 @@ static void alc888_coef_init(struct hda_codec *codec)
279/* additional initialization for ALC889 variants */ 283/* additional initialization for ALC889 variants */
280static void alc889_coef_init(struct hda_codec *codec) 284static void alc889_coef_init(struct hda_codec *codec)
281{ 285{
282 unsigned int tmp; 286 alc_update_coef_idx(codec, 7, 0, 0x2010);
283
284 snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_COEF_INDEX, 7);
285 tmp = snd_hda_codec_read(codec, 0x20, 0, AC_VERB_GET_PROC_COEF, 0);
286 snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_COEF_INDEX, 7);
287 snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_PROC_COEF, tmp|0x2010);
288} 287}
289 288
290/* turn on/off EAPD control (only if available) */ 289/* turn on/off EAPD control (only if available) */
@@ -325,8 +324,6 @@ static void alc_eapd_shutup(struct hda_codec *codec)
325/* generic EAPD initialization */ 324/* generic EAPD initialization */
326static void alc_auto_init_amp(struct hda_codec *codec, int type) 325static void alc_auto_init_amp(struct hda_codec *codec, int type)
327{ 326{
328 unsigned int tmp;
329
330 alc_auto_setup_eapd(codec, true); 327 alc_auto_setup_eapd(codec, true);
331 switch (type) { 328 switch (type) {
332 case ALC_INIT_GPIO1: 329 case ALC_INIT_GPIO1:
@@ -341,15 +338,7 @@ static void alc_auto_init_amp(struct hda_codec *codec, int type)
341 case ALC_INIT_DEFAULT: 338 case ALC_INIT_DEFAULT:
342 switch (codec->vendor_id) { 339 switch (codec->vendor_id) {
343 case 0x10ec0260: 340 case 0x10ec0260:
344 snd_hda_codec_write(codec, 0x1a, 0, 341 alc_update_coefex_idx(codec, 0x1a, 7, 0, 0x2010);
345 AC_VERB_SET_COEF_INDEX, 7);
346 tmp = snd_hda_codec_read(codec, 0x1a, 0,
347 AC_VERB_GET_PROC_COEF, 0);
348 snd_hda_codec_write(codec, 0x1a, 0,
349 AC_VERB_SET_COEF_INDEX, 7);
350 snd_hda_codec_write(codec, 0x1a, 0,
351 AC_VERB_SET_PROC_COEF,
352 tmp | 0x2010);
353 break; 342 break;
354 case 0x10ec0262: 343 case 0x10ec0262:
355 case 0x10ec0880: 344 case 0x10ec0880:
@@ -366,15 +355,7 @@ static void alc_auto_init_amp(struct hda_codec *codec, int type)
366#if 0 /* XXX: This may cause the silent output on speaker on some machines */ 355#if 0 /* XXX: This may cause the silent output on speaker on some machines */
367 case 0x10ec0267: 356 case 0x10ec0267:
368 case 0x10ec0268: 357 case 0x10ec0268:
369 snd_hda_codec_write(codec, 0x20, 0, 358 alc_update_coef_idx(codec, 7, 0, 0x3000);
370 AC_VERB_SET_COEF_INDEX, 7);
371 tmp = snd_hda_codec_read(codec, 0x20, 0,
372 AC_VERB_GET_PROC_COEF, 0);
373 snd_hda_codec_write(codec, 0x20, 0,
374 AC_VERB_SET_COEF_INDEX, 7);
375 snd_hda_codec_write(codec, 0x20, 0,
376 AC_VERB_SET_PROC_COEF,
377 tmp | 0x3000);
378 break; 359 break;
379#endif /* XXX */ 360#endif /* XXX */
380 } 361 }
@@ -2504,13 +2485,7 @@ static int patch_alc262(struct hda_codec *codec)
2504 /* pshou 07/11/05 set a zero PCM sample to DAC when FIFO is 2485 /* pshou 07/11/05 set a zero PCM sample to DAC when FIFO is
2505 * under-run 2486 * under-run
2506 */ 2487 */
2507 { 2488 alc_update_coefex_idx(codec, 0x1a, 7, 0, 0x80);
2508 int tmp;
2509 snd_hda_codec_write(codec, 0x1a, 0, AC_VERB_SET_COEF_INDEX, 7);
2510 tmp = snd_hda_codec_read(codec, 0x20, 0, AC_VERB_GET_PROC_COEF, 0);
2511 snd_hda_codec_write(codec, 0x1a, 0, AC_VERB_SET_COEF_INDEX, 7);
2512 snd_hda_codec_write(codec, 0x1a, 0, AC_VERB_SET_PROC_COEF, tmp | 0x80);
2513 }
2514#endif 2489#endif
2515 alc_fix_pll_init(codec, 0x20, 0x0a, 10); 2490 alc_fix_pll_init(codec, 0x20, 0x0a, 10);
2516 2491
@@ -2796,14 +2771,7 @@ static void alc286_shutup(struct hda_codec *codec)
2796 2771
2797static void alc269vb_toggle_power_output(struct hda_codec *codec, int power_up) 2772static void alc269vb_toggle_power_output(struct hda_codec *codec, int power_up)
2798{ 2773{
2799 int val = alc_read_coef_idx(codec, 0x04); 2774 alc_update_coef_idx(codec, 0x04, 1 << 11, power_up ? (1 << 11) : 0);
2800 if (val == -1)
2801 return;
2802 if (power_up)
2803 val |= 1 << 11;
2804 else
2805 val &= ~(1 << 11);
2806 alc_write_coef_idx(codec, 0x04, val);
2807} 2775}
2808 2776
2809static void alc269_shutup(struct hda_codec *codec) 2777static void alc269_shutup(struct hda_codec *codec)
@@ -2821,8 +2789,6 @@ static void alc269_shutup(struct hda_codec *codec)
2821 2789
2822static void alc282_restore_default_value(struct hda_codec *codec) 2790static void alc282_restore_default_value(struct hda_codec *codec)
2823{ 2791{
2824 int val;
2825
2826 /* Power Down Control */ 2792 /* Power Down Control */
2827 alc_write_coef_idx(codec, 0x03, 0x0002); 2793 alc_write_coef_idx(codec, 0x03, 0x0002);
2828 /* FIFO and filter clock */ 2794 /* FIFO and filter clock */
@@ -2830,11 +2796,9 @@ static void alc282_restore_default_value(struct hda_codec *codec)
2830 /* DMIC control */ 2796 /* DMIC control */
2831 alc_write_coef_idx(codec, 0x07, 0x0200); 2797 alc_write_coef_idx(codec, 0x07, 0x0200);
2832 /* Analog clock */ 2798 /* Analog clock */
2833 val = alc_read_coef_idx(codec, 0x06); 2799 alc_update_coef_idx(codec, 0x06, 0x00f0, 0);
2834 alc_write_coef_idx(codec, 0x06, (val & ~0x00f0) | 0x0);
2835 /* JD */ 2800 /* JD */
2836 val = alc_read_coef_idx(codec, 0x08); 2801 alc_update_coef_idx(codec, 0x08, 0xfffc, 0x0c2c);
2837 alc_write_coef_idx(codec, 0x08, (val & ~0xfffc) | 0x0c2c);
2838 /* JD offset1 */ 2802 /* JD offset1 */
2839 alc_write_coef_idx(codec, 0x0a, 0xcccc); 2803 alc_write_coef_idx(codec, 0x0a, 0xcccc);
2840 /* JD offset2 */ 2804 /* JD offset2 */
@@ -2842,27 +2806,21 @@ static void alc282_restore_default_value(struct hda_codec *codec)
2842 /* LDO1/2/3, DAC/ADC */ 2806 /* LDO1/2/3, DAC/ADC */
2843 alc_write_coef_idx(codec, 0x0e, 0x6e00); 2807 alc_write_coef_idx(codec, 0x0e, 0x6e00);
2844 /* JD */ 2808 /* JD */
2845 val = alc_read_coef_idx(codec, 0x0f); 2809 alc_update_coef_idx(codec, 0x0f, 0xf800, 0x1000);
2846 alc_write_coef_idx(codec, 0x0f, (val & ~0xf800) | 0x1000);
2847 /* Capless */ 2810 /* Capless */
2848 val = alc_read_coef_idx(codec, 0x10); 2811 alc_update_coef_idx(codec, 0x10, 0xfc00, 0x0c00);
2849 alc_write_coef_idx(codec, 0x10, (val & ~0xfc00) | 0x0c00);
2850 /* Class D test 4 */ 2812 /* Class D test 4 */
2851 alc_write_coef_idx(codec, 0x6f, 0x0); 2813 alc_write_coef_idx(codec, 0x6f, 0x0);
2852 /* IO power down directly */ 2814 /* IO power down directly */
2853 val = alc_read_coef_idx(codec, 0x0c); 2815 alc_update_coef_idx(codec, 0x0c, 0xfe00, 0);
2854 alc_write_coef_idx(codec, 0x0c, (val & ~0xfe00) | 0x0);
2855 /* ANC */ 2816 /* ANC */
2856 alc_write_coef_idx(codec, 0x34, 0xa0c0); 2817 alc_write_coef_idx(codec, 0x34, 0xa0c0);
2857 /* AGC MUX */ 2818 /* AGC MUX */
2858 val = alc_read_coef_idx(codec, 0x16); 2819 alc_update_coef_idx(codec, 0x16, 0x0008, 0);
2859 alc_write_coef_idx(codec, 0x16, (val & ~0x0008) | 0x0);
2860 /* DAC simple content protection */ 2820 /* DAC simple content protection */
2861 val = alc_read_coef_idx(codec, 0x1d); 2821 alc_update_coef_idx(codec, 0x1d, 0x00e0, 0);
2862 alc_write_coef_idx(codec, 0x1d, (val & ~0x00e0) | 0x0);
2863 /* ADC simple content protection */ 2822 /* ADC simple content protection */
2864 val = alc_read_coef_idx(codec, 0x1f); 2823 alc_update_coef_idx(codec, 0x1f, 0x00e0, 0);
2865 alc_write_coef_idx(codec, 0x1f, (val & ~0x00e0) | 0x0);
2866 /* DAC ADC Zero Detection */ 2824 /* DAC ADC Zero Detection */
2867 alc_write_coef_idx(codec, 0x21, 0x8804); 2825 alc_write_coef_idx(codec, 0x21, 0x8804);
2868 /* PLL */ 2826 /* PLL */
@@ -2876,20 +2834,17 @@ static void alc282_restore_default_value(struct hda_codec *codec)
2876 /* capless control 5 */ 2834 /* capless control 5 */
2877 alc_write_coef_idx(codec, 0x6b, 0x0); 2835 alc_write_coef_idx(codec, 0x6b, 0x0);
2878 /* class D test 2 */ 2836 /* class D test 2 */
2879 val = alc_read_coef_idx(codec, 0x6d); 2837 alc_update_coef_idx(codec, 0x6d, 0x0fff, 0x0900);
2880 alc_write_coef_idx(codec, 0x6d, (val & ~0x0fff) | 0x0900);
2881 /* class D test 3 */ 2838 /* class D test 3 */
2882 alc_write_coef_idx(codec, 0x6e, 0x110a); 2839 alc_write_coef_idx(codec, 0x6e, 0x110a);
2883 /* class D test 5 */ 2840 /* class D test 5 */
2884 val = alc_read_coef_idx(codec, 0x70); 2841 alc_update_coef_idx(codec, 0x70, 0x00f8, 0x00d8);
2885 alc_write_coef_idx(codec, 0x70, (val & ~0x00f8) | 0x00d8);
2886 /* class D test 6 */ 2842 /* class D test 6 */
2887 alc_write_coef_idx(codec, 0x71, 0x0014); 2843 alc_write_coef_idx(codec, 0x71, 0x0014);
2888 /* classD OCP */ 2844 /* classD OCP */
2889 alc_write_coef_idx(codec, 0x72, 0xc2ba); 2845 alc_write_coef_idx(codec, 0x72, 0xc2ba);
2890 /* classD pure DC test */ 2846 /* classD pure DC test */
2891 val = alc_read_coef_idx(codec, 0x77); 2847 alc_update_coef_idx(codec, 0x77, 0x0f80, 0);
2892 alc_write_coef_idx(codec, 0x77, (val & ~0x0f80) | 0x0);
2893 /* Class D amp control */ 2848 /* Class D amp control */
2894 alc_write_coef_idx(codec, 0x6c, 0xfc06); 2849 alc_write_coef_idx(codec, 0x6c, 0xfc06);
2895} 2850}
@@ -2969,8 +2924,6 @@ static void alc282_shutup(struct hda_codec *codec)
2969 2924
2970static void alc283_restore_default_value(struct hda_codec *codec) 2925static void alc283_restore_default_value(struct hda_codec *codec)
2971{ 2926{
2972 int val;
2973
2974 /* Power Down Control */ 2927 /* Power Down Control */
2975 alc_write_coef_idx(codec, 0x03, 0x0002); 2928 alc_write_coef_idx(codec, 0x03, 0x0002);
2976 /* FIFO and filter clock */ 2929 /* FIFO and filter clock */
@@ -2978,11 +2931,9 @@ static void alc283_restore_default_value(struct hda_codec *codec)
2978 /* DMIC control */ 2931 /* DMIC control */
2979 alc_write_coef_idx(codec, 0x07, 0x0200); 2932 alc_write_coef_idx(codec, 0x07, 0x0200);
2980 /* Analog clock */ 2933 /* Analog clock */
2981 val = alc_read_coef_idx(codec, 0x06); 2934 alc_update_coef_idx(codec, 0x06, 0x00f0, 0);
2982 alc_write_coef_idx(codec, 0x06, (val & ~0x00f0) | 0x0);
2983 /* JD */ 2935 /* JD */
2984 val = alc_read_coef_idx(codec, 0x08); 2936 alc_update_coef_idx(codec, 0x08, 0xfffc, 0x0c2c);
2985 alc_write_coef_idx(codec, 0x08, (val & ~0xfffc) | 0x0c2c);
2986 /* JD offset1 */ 2937 /* JD offset1 */
2987 alc_write_coef_idx(codec, 0x0a, 0xcccc); 2938 alc_write_coef_idx(codec, 0x0a, 0xcccc);
2988 /* JD offset2 */ 2939 /* JD offset2 */
@@ -2990,27 +2941,21 @@ static void alc283_restore_default_value(struct hda_codec *codec)
2990 /* LDO1/2/3, DAC/ADC */ 2941 /* LDO1/2/3, DAC/ADC */
2991 alc_write_coef_idx(codec, 0x0e, 0x6fc0); 2942 alc_write_coef_idx(codec, 0x0e, 0x6fc0);
2992 /* JD */ 2943 /* JD */
2993 val = alc_read_coef_idx(codec, 0x0f); 2944 alc_update_coef_idx(codec, 0x0f, 0xf800, 0x1000);
2994 alc_write_coef_idx(codec, 0x0f, (val & ~0xf800) | 0x1000);
2995 /* Capless */ 2945 /* Capless */
2996 val = alc_read_coef_idx(codec, 0x10); 2946 alc_update_coef_idx(codec, 0x10, 0xfc00, 0x0c00);
2997 alc_write_coef_idx(codec, 0x10, (val & ~0xfc00) | 0x0c00);
2998 /* Class D test 4 */ 2947 /* Class D test 4 */
2999 alc_write_coef_idx(codec, 0x3a, 0x0); 2948 alc_write_coef_idx(codec, 0x3a, 0x0);
3000 /* IO power down directly */ 2949 /* IO power down directly */
3001 val = alc_read_coef_idx(codec, 0x0c); 2950 alc_update_coef_idx(codec, 0x0c, 0xfe00, 0x0);
3002 alc_write_coef_idx(codec, 0x0c, (val & ~0xfe00) | 0x0);
3003 /* ANC */ 2951 /* ANC */
3004 alc_write_coef_idx(codec, 0x22, 0xa0c0); 2952 alc_write_coef_idx(codec, 0x22, 0xa0c0);
3005 /* AGC MUX */ 2953 /* AGC MUX */
3006 val = alc_read_coefex_idx(codec, 0x53, 0x01); 2954 alc_update_coefex_idx(codec, 0x53, 0x01, 0x000f, 0x0008);
3007 alc_write_coefex_idx(codec, 0x53, 0x01, (val & ~0x000f) | 0x0008);
3008 /* DAC simple content protection */ 2955 /* DAC simple content protection */
3009 val = alc_read_coef_idx(codec, 0x1d); 2956 alc_update_coef_idx(codec, 0x1d, 0x00e0, 0x0);
3010 alc_write_coef_idx(codec, 0x1d, (val & ~0x00e0) | 0x0);
3011 /* ADC simple content protection */ 2957 /* ADC simple content protection */
3012 val = alc_read_coef_idx(codec, 0x1f); 2958 alc_update_coef_idx(codec, 0x1f, 0x00e0, 0x0);
3013 alc_write_coef_idx(codec, 0x1f, (val & ~0x00e0) | 0x0);
3014 /* DAC ADC Zero Detection */ 2959 /* DAC ADC Zero Detection */
3015 alc_write_coef_idx(codec, 0x21, 0x8804); 2960 alc_write_coef_idx(codec, 0x21, 0x8804);
3016 /* PLL */ 2961 /* PLL */
@@ -3024,28 +2969,23 @@ static void alc283_restore_default_value(struct hda_codec *codec)
3024 /* capless control 5 */ 2969 /* capless control 5 */
3025 alc_write_coef_idx(codec, 0x36, 0x0); 2970 alc_write_coef_idx(codec, 0x36, 0x0);
3026 /* class D test 2 */ 2971 /* class D test 2 */
3027 val = alc_read_coef_idx(codec, 0x38); 2972 alc_update_coef_idx(codec, 0x38, 0x0fff, 0x0900);
3028 alc_write_coef_idx(codec, 0x38, (val & ~0x0fff) | 0x0900);
3029 /* class D test 3 */ 2973 /* class D test 3 */
3030 alc_write_coef_idx(codec, 0x39, 0x110a); 2974 alc_write_coef_idx(codec, 0x39, 0x110a);
3031 /* class D test 5 */ 2975 /* class D test 5 */
3032 val = alc_read_coef_idx(codec, 0x3b); 2976 alc_update_coef_idx(codec, 0x3b, 0x00f8, 0x00d8);
3033 alc_write_coef_idx(codec, 0x3b, (val & ~0x00f8) | 0x00d8);
3034 /* class D test 6 */ 2977 /* class D test 6 */
3035 alc_write_coef_idx(codec, 0x3c, 0x0014); 2978 alc_write_coef_idx(codec, 0x3c, 0x0014);
3036 /* classD OCP */ 2979 /* classD OCP */
3037 alc_write_coef_idx(codec, 0x3d, 0xc2ba); 2980 alc_write_coef_idx(codec, 0x3d, 0xc2ba);
3038 /* classD pure DC test */ 2981 /* classD pure DC test */
3039 val = alc_read_coef_idx(codec, 0x42); 2982 alc_update_coef_idx(codec, 0x42, 0x0f80, 0x0);
3040 alc_write_coef_idx(codec, 0x42, (val & ~0x0f80) | 0x0);
3041 /* test mode */ 2983 /* test mode */
3042 alc_write_coef_idx(codec, 0x49, 0x0); 2984 alc_write_coef_idx(codec, 0x49, 0x0);
3043 /* Class D DC enable */ 2985 /* Class D DC enable */
3044 val = alc_read_coef_idx(codec, 0x40); 2986 alc_update_coef_idx(codec, 0x40, 0xf800, 0x9800);
3045 alc_write_coef_idx(codec, 0x40, (val & ~0xf800) | 0x9800);
3046 /* DC offset */ 2987 /* DC offset */
3047 val = alc_read_coef_idx(codec, 0x42); 2988 alc_update_coef_idx(codec, 0x42, 0xf000, 0x2000);
3048 alc_write_coef_idx(codec, 0x42, (val & ~0xf000) | 0x2000);
3049 /* Class D amp control */ 2989 /* Class D amp control */
3050 alc_write_coef_idx(codec, 0x37, 0xfc06); 2990 alc_write_coef_idx(codec, 0x37, 0xfc06);
3051} 2991}
@@ -3055,7 +2995,6 @@ static void alc283_init(struct hda_codec *codec)
3055 struct alc_spec *spec = codec->spec; 2995 struct alc_spec *spec = codec->spec;
3056 hda_nid_t hp_pin = spec->gen.autocfg.hp_pins[0]; 2996 hda_nid_t hp_pin = spec->gen.autocfg.hp_pins[0];
3057 bool hp_pin_sense; 2997 bool hp_pin_sense;
3058 int val;
3059 2998
3060 if (!spec->gen.autocfg.hp_outs) { 2999 if (!spec->gen.autocfg.hp_outs) {
3061 if (spec->gen.autocfg.line_out_type == AC_JACK_HP_OUT) 3000 if (spec->gen.autocfg.line_out_type == AC_JACK_HP_OUT)
@@ -3085,8 +3024,7 @@ static void alc283_init(struct hda_codec *codec)
3085 msleep(85); 3024 msleep(85);
3086 /* Index 0x46 Combo jack auto switch control 2 */ 3025 /* Index 0x46 Combo jack auto switch control 2 */
3087 /* 3k pull low control for Headset jack. */ 3026 /* 3k pull low control for Headset jack. */
3088 val = alc_read_coef_idx(codec, 0x46); 3027 alc_update_coef_idx(codec, 0x46, 3 << 12, 0);
3089 alc_write_coef_idx(codec, 0x46, val & ~(3 << 12));
3090 /* Headphone capless set to normal mode */ 3028 /* Headphone capless set to normal mode */
3091 alc_write_coef_idx(codec, 0x43, 0x9614); 3029 alc_write_coef_idx(codec, 0x43, 0x9614);
3092} 3030}
@@ -3096,7 +3034,6 @@ static void alc283_shutup(struct hda_codec *codec)
3096 struct alc_spec *spec = codec->spec; 3034 struct alc_spec *spec = codec->spec;
3097 hda_nid_t hp_pin = spec->gen.autocfg.hp_pins[0]; 3035 hda_nid_t hp_pin = spec->gen.autocfg.hp_pins[0];
3098 bool hp_pin_sense; 3036 bool hp_pin_sense;
3099 int val;
3100 3037
3101 if (!spec->gen.autocfg.hp_outs) { 3038 if (!spec->gen.autocfg.hp_outs) {
3102 if (spec->gen.autocfg.line_out_type == AC_JACK_HP_OUT) 3039 if (spec->gen.autocfg.line_out_type == AC_JACK_HP_OUT)
@@ -3121,8 +3058,7 @@ static void alc283_shutup(struct hda_codec *codec)
3121 snd_hda_codec_write(codec, hp_pin, 0, 3058 snd_hda_codec_write(codec, hp_pin, 0,
3122 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0); 3059 AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0);
3123 3060
3124 val = alc_read_coef_idx(codec, 0x46); 3061 alc_update_coef_idx(codec, 0x46, 0, 3 << 12);
3125 alc_write_coef_idx(codec, 0x46, val | (3 << 12));
3126 3062
3127 if (hp_pin_sense) 3063 if (hp_pin_sense)
3128 msleep(100); 3064 msleep(100);
@@ -3285,12 +3221,8 @@ static void alc269_fixup_pincfg_no_hp_to_lineout(struct hda_codec *codec,
3285static void alc269_fixup_hweq(struct hda_codec *codec, 3221static void alc269_fixup_hweq(struct hda_codec *codec,
3286 const struct hda_fixup *fix, int action) 3222 const struct hda_fixup *fix, int action)
3287{ 3223{
3288 int coef; 3224 if (action == HDA_FIXUP_ACT_INIT)
3289 3225 alc_update_coef_idx(codec, 0x1e, 0, 0x80);
3290 if (action != HDA_FIXUP_ACT_INIT)
3291 return;
3292 coef = alc_read_coef_idx(codec, 0x1e);
3293 alc_write_coef_idx(codec, 0x1e, coef | 0x80);
3294} 3226}
3295 3227
3296static void alc269_fixup_headset_mic(struct hda_codec *codec, 3228static void alc269_fixup_headset_mic(struct hda_codec *codec,
@@ -3338,17 +3270,13 @@ static void alc269_fixup_pcm_44k(struct hda_codec *codec,
3338static void alc269_fixup_stereo_dmic(struct hda_codec *codec, 3270static void alc269_fixup_stereo_dmic(struct hda_codec *codec,
3339 const struct hda_fixup *fix, int action) 3271 const struct hda_fixup *fix, int action)
3340{ 3272{
3341 int coef;
3342
3343 if (action != HDA_FIXUP_ACT_INIT)
3344 return;
3345 /* The digital-mic unit sends PDM (differential signal) instead of 3273 /* The digital-mic unit sends PDM (differential signal) instead of
3346 * the standard PCM, thus you can't record a valid mono stream as is. 3274 * the standard PCM, thus you can't record a valid mono stream as is.
3347 * Below is a workaround specific to ALC269 to control the dmic 3275 * Below is a workaround specific to ALC269 to control the dmic
3348 * signal source as mono. 3276 * signal source as mono.
3349 */ 3277 */
3350 coef = alc_read_coef_idx(codec, 0x07); 3278 if (action == HDA_FIXUP_ACT_INIT)
3351 alc_write_coef_idx(codec, 0x07, coef | 0x80); 3279 alc_update_coef_idx(codec, 0x07, 0, 0x80);
3352} 3280}
3353 3281
3354static void alc269_quanta_automute(struct hda_codec *codec) 3282static void alc269_quanta_automute(struct hda_codec *codec)
@@ -3602,8 +3530,6 @@ static void alc269_fixup_hp_line1_mic1_led(struct hda_codec *codec,
3602 3530
3603static void alc_headset_mode_unplugged(struct hda_codec *codec) 3531static void alc_headset_mode_unplugged(struct hda_codec *codec)
3604{ 3532{
3605 int val;
3606
3607 switch (codec->vendor_id) { 3533 switch (codec->vendor_id) {
3608 case 0x10ec0255: 3534 case 0x10ec0255:
3609 /* LDO and MISC control */ 3535 /* LDO and MISC control */
@@ -3611,8 +3537,7 @@ static void alc_headset_mode_unplugged(struct hda_codec *codec)
3611 /* UAJ function set to menual mode */ 3537 /* UAJ function set to menual mode */
3612 alc_write_coef_idx(codec, 0x45, 0xd089); 3538 alc_write_coef_idx(codec, 0x45, 0xd089);
3613 /* Direct Drive HP Amp control(Set to verb control)*/ 3539 /* Direct Drive HP Amp control(Set to verb control)*/
3614 val = alc_read_coefex_idx(codec, 0x57, 0x05); 3540 alc_update_coefex_idx(codec, 0x57, 0x05, 1<<14, 0);
3615 alc_write_coefex_idx(codec, 0x57, 0x05, val & ~(1<<14));
3616 /* Set MIC2 Vref gate with HP */ 3541 /* Set MIC2 Vref gate with HP */
3617 alc_write_coef_idx(codec, 0x06, 0x6104); 3542 alc_write_coef_idx(codec, 0x06, 0x6104);
3618 /* Direct Drive HP Amp control */ 3543 /* Direct Drive HP Amp control */
@@ -3622,8 +3547,7 @@ static void alc_headset_mode_unplugged(struct hda_codec *codec)
3622 case 0x10ec0283: 3547 case 0x10ec0283:
3623 alc_write_coef_idx(codec, 0x1b, 0x0c0b); 3548 alc_write_coef_idx(codec, 0x1b, 0x0c0b);
3624 alc_write_coef_idx(codec, 0x45, 0xc429); 3549 alc_write_coef_idx(codec, 0x45, 0xc429);
3625 val = alc_read_coef_idx(codec, 0x35); 3550 alc_update_coef_idx(codec, 0x35, 0x4000, 0);
3626 alc_write_coef_idx(codec, 0x35, val & 0xbfff);
3627 alc_write_coef_idx(codec, 0x06, 0x2104); 3551 alc_write_coef_idx(codec, 0x06, 0x2104);
3628 alc_write_coef_idx(codec, 0x1a, 0x0001); 3552 alc_write_coef_idx(codec, 0x1a, 0x0001);
3629 alc_write_coef_idx(codec, 0x26, 0x0004); 3553 alc_write_coef_idx(codec, 0x26, 0x0004);
@@ -3637,22 +3561,17 @@ static void alc_headset_mode_unplugged(struct hda_codec *codec)
3637 break; 3561 break;
3638 case 0x10ec0293: 3562 case 0x10ec0293:
3639 /* SET Line1 JD to 0 */ 3563 /* SET Line1 JD to 0 */
3640 val = alc_read_coef_idx(codec, 0x10); 3564 alc_update_coef_idx(codec, 0x10, 7<<8, 6<<8);
3641 alc_write_coef_idx(codec, 0x10, (val & ~(7<<8)) | 6<<8);
3642 /* SET charge pump by verb */ 3565 /* SET charge pump by verb */
3643 val = alc_read_coefex_idx(codec, 0x57, 0x05); 3566 alc_update_coefex_idx(codec, 0x57, 0x05, 1<<15|1<<13, 0x0);
3644 alc_write_coefex_idx(codec, 0x57, 0x05, (val & ~(1<<15|1<<13)) | 0x0);
3645 /* SET EN_OSW to 1 */ 3567 /* SET EN_OSW to 1 */
3646 val = alc_read_coefex_idx(codec, 0x57, 0x03); 3568 alc_update_coefex_idx(codec, 0x57, 0x03, 1<<10, 1<<10);
3647 alc_write_coefex_idx(codec, 0x57, 0x03, (val & ~(1<<10)) | (1<<10) );
3648 /* Combo JD gating with LINE1-VREFO */ 3569 /* Combo JD gating with LINE1-VREFO */
3649 val = alc_read_coef_idx(codec, 0x1a); 3570 alc_update_coef_idx(codec, 0x1a, 1<<3, 1<<3);
3650 alc_write_coef_idx(codec, 0x1a, (val & ~(1<<3)) | (1<<3));
3651 /* Set to TRS type */ 3571 /* Set to TRS type */
3652 alc_write_coef_idx(codec, 0x45, 0xc429); 3572 alc_write_coef_idx(codec, 0x45, 0xc429);
3653 /* Combo Jack auto detect */ 3573 /* Combo Jack auto detect */
3654 val = alc_read_coef_idx(codec, 0x4a); 3574 alc_update_coef_idx(codec, 0x4a, 0x000f, 0x000e);
3655 alc_write_coef_idx(codec, 0x4a, (val & 0xfff0) | 0x000e);
3656 break; 3575 break;
3657 case 0x10ec0668: 3576 case 0x10ec0668:
3658 alc_write_coef_idx(codec, 0x15, 0x0d40); 3577 alc_write_coef_idx(codec, 0x15, 0x0d40);
@@ -3666,8 +3585,6 @@ static void alc_headset_mode_unplugged(struct hda_codec *codec)
3666static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin, 3585static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin,
3667 hda_nid_t mic_pin) 3586 hda_nid_t mic_pin)
3668{ 3587{
3669 int val;
3670
3671 switch (codec->vendor_id) { 3588 switch (codec->vendor_id) {
3672 case 0x10ec0255: 3589 case 0x10ec0255:
3673 alc_write_coef_idx(codec, 0x45, 0xc489); 3590 alc_write_coef_idx(codec, 0x45, 0xc489);
@@ -3681,8 +3598,7 @@ static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin,
3681 case 0x10ec0283: 3598 case 0x10ec0283:
3682 alc_write_coef_idx(codec, 0x45, 0xc429); 3599 alc_write_coef_idx(codec, 0x45, 0xc429);
3683 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0); 3600 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
3684 val = alc_read_coef_idx(codec, 0x35); 3601 alc_update_coef_idx(codec, 0x35, 0, 1<<14);
3685 alc_write_coef_idx(codec, 0x35, val | 1<<14);
3686 alc_write_coef_idx(codec, 0x06, 0x2100); 3602 alc_write_coef_idx(codec, 0x06, 0x2100);
3687 alc_write_coef_idx(codec, 0x1a, 0x0021); 3603 alc_write_coef_idx(codec, 0x1a, 0x0021);
3688 alc_write_coef_idx(codec, 0x26, 0x008c); 3604 alc_write_coef_idx(codec, 0x26, 0x008c);
@@ -3698,14 +3614,11 @@ static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin,
3698 alc_write_coef_idx(codec, 0x45, 0xc429); 3614 alc_write_coef_idx(codec, 0x45, 0xc429);
3699 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0); 3615 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
3700 /* SET charge pump by verb */ 3616 /* SET charge pump by verb */
3701 val = alc_read_coefex_idx(codec, 0x57, 0x05); 3617 alc_update_coefex_idx(codec, 0x57, 0x05, 0, 1<<15|1<<13);
3702 alc_write_coefex_idx(codec, 0x57, 0x05, (val & ~(1<<15|1<<13)) | (1<<15|1<<13));
3703 /* SET EN_OSW to 0 */ 3618 /* SET EN_OSW to 0 */
3704 val = alc_read_coefex_idx(codec, 0x57, 0x03); 3619 alc_update_coefex_idx(codec, 0x57, 0x03, 1<<10, 0);
3705 alc_write_coefex_idx(codec, 0x57, 0x03, (val & ~(1<<10)) | 0x0);
3706 /* Combo JD gating without LINE1-VREFO */ 3620 /* Combo JD gating without LINE1-VREFO */
3707 val = alc_read_coef_idx(codec, 0x1a); 3621 alc_update_coef_idx(codec, 0x1a, 1<<3, 0);
3708 alc_write_coef_idx(codec, 0x1a, (val & ~(1<<3)) | 0x0);
3709 snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50); 3622 snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
3710 break; 3623 break;
3711 case 0x10ec0668: 3624 case 0x10ec0668:
@@ -3713,8 +3626,7 @@ static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin,
3713 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0); 3626 snd_hda_set_pin_ctl_cache(codec, hp_pin, 0);
3714 alc_write_coef_idx(codec, 0xb7, 0x802b); 3627 alc_write_coef_idx(codec, 0xb7, 0x802b);
3715 alc_write_coef_idx(codec, 0xb5, 0x1040); 3628 alc_write_coef_idx(codec, 0xb5, 0x1040);
3716 val = alc_read_coef_idx(codec, 0xc3); 3629 alc_update_coef_idx(codec, 0xc3, 0, 1<<12);
3717 alc_write_coef_idx(codec, 0xc3, val | 1<<12);
3718 snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50); 3630 snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50);
3719 break; 3631 break;
3720 } 3632 }
@@ -3723,8 +3635,6 @@ static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin,
3723 3635
3724static void alc_headset_mode_default(struct hda_codec *codec) 3636static void alc_headset_mode_default(struct hda_codec *codec)
3725{ 3637{
3726 int val;
3727
3728 switch (codec->vendor_id) { 3638 switch (codec->vendor_id) {
3729 case 0x10ec0255: 3639 case 0x10ec0255:
3730 alc_write_coef_idx(codec, 0x45, 0xc089); 3640 alc_write_coef_idx(codec, 0x45, 0xc089);
@@ -3745,13 +3655,11 @@ static void alc_headset_mode_default(struct hda_codec *codec)
3745 break; 3655 break;
3746 case 0x10ec0293: 3656 case 0x10ec0293:
3747 /* Combo Jack auto detect */ 3657 /* Combo Jack auto detect */
3748 val = alc_read_coef_idx(codec, 0x4a); 3658 alc_update_coef_idx(codec, 0x4a, 0x000f, 0x000e);
3749 alc_write_coef_idx(codec, 0x4a, (val & 0xfff0) | 0x000e);
3750 /* Set to TRS type */ 3659 /* Set to TRS type */
3751 alc_write_coef_idx(codec, 0x45, 0xC429); 3660 alc_write_coef_idx(codec, 0x45, 0xC429);
3752 /* Combo JD gating without LINE1-VREFO */ 3661 /* Combo JD gating without LINE1-VREFO */
3753 val = alc_read_coef_idx(codec, 0x1a); 3662 alc_update_coef_idx(codec, 0x1a, 1<<3, 0);
3754 alc_write_coef_idx(codec, 0x1a, (val & ~(1<<3)) | 0x0);
3755 break; 3663 break;
3756 case 0x10ec0668: 3664 case 0x10ec0668:
3757 alc_write_coef_idx(codec, 0x11, 0x0041); 3665 alc_write_coef_idx(codec, 0x11, 0x0041);
@@ -3765,8 +3673,6 @@ static void alc_headset_mode_default(struct hda_codec *codec)
3765/* Iphone type */ 3673/* Iphone type */
3766static void alc_headset_mode_ctia(struct hda_codec *codec) 3674static void alc_headset_mode_ctia(struct hda_codec *codec)
3767{ 3675{
3768 int val;
3769
3770 switch (codec->vendor_id) { 3676 switch (codec->vendor_id) {
3771 case 0x10ec0255: 3677 case 0x10ec0255:
3772 /* Set to CTIA type */ 3678 /* Set to CTIA type */
@@ -3789,8 +3695,7 @@ static void alc_headset_mode_ctia(struct hda_codec *codec)
3789 /* Set to ctia type */ 3695 /* Set to ctia type */
3790 alc_write_coef_idx(codec, 0x45, 0xd429); 3696 alc_write_coef_idx(codec, 0x45, 0xd429);
3791 /* SET Line1 JD to 1 */ 3697 /* SET Line1 JD to 1 */
3792 val = alc_read_coef_idx(codec, 0x10); 3698 alc_update_coef_idx(codec, 0x10, 7<<8, 7<<8);
3793 alc_write_coef_idx(codec, 0x10, (val & ~(7<<8)) | 7<<8);
3794 break; 3699 break;
3795 case 0x10ec0668: 3700 case 0x10ec0668:
3796 alc_write_coef_idx(codec, 0x11, 0x0001); 3701 alc_write_coef_idx(codec, 0x11, 0x0001);
@@ -3804,8 +3709,6 @@ static void alc_headset_mode_ctia(struct hda_codec *codec)
3804/* Nokia type */ 3709/* Nokia type */
3805static void alc_headset_mode_omtp(struct hda_codec *codec) 3710static void alc_headset_mode_omtp(struct hda_codec *codec)
3806{ 3711{
3807 int val;
3808
3809 switch (codec->vendor_id) { 3712 switch (codec->vendor_id) {
3810 case 0x10ec0255: 3713 case 0x10ec0255:
3811 /* Set to OMTP Type */ 3714 /* Set to OMTP Type */
@@ -3828,8 +3731,7 @@ static void alc_headset_mode_omtp(struct hda_codec *codec)
3828 /* Set to omtp type */ 3731 /* Set to omtp type */
3829 alc_write_coef_idx(codec, 0x45, 0xe429); 3732 alc_write_coef_idx(codec, 0x45, 0xe429);
3830 /* SET Line1 JD to 1 */ 3733 /* SET Line1 JD to 1 */
3831 val = alc_read_coef_idx(codec, 0x10); 3734 alc_update_coef_idx(codec, 0x10, 7<<8, 7<<8);
3832 alc_write_coef_idx(codec, 0x10, (val & ~(7<<8)) | 7<<8);
3833 break; 3735 break;
3834 case 0x10ec0668: 3736 case 0x10ec0668:
3835 alc_write_coef_idx(codec, 0x11, 0x0001); 3737 alc_write_coef_idx(codec, 0x11, 0x0001);
@@ -3871,8 +3773,7 @@ static void alc_determine_headset_type(struct hda_codec *codec)
3871 break; 3773 break;
3872 case 0x10ec0293: 3774 case 0x10ec0293:
3873 /* Combo Jack auto detect */ 3775 /* Combo Jack auto detect */
3874 val = alc_read_coef_idx(codec, 0x4a); 3776 alc_update_coef_idx(codec, 0x4a, 0x000f, 0x0008);
3875 alc_write_coef_idx(codec, 0x4a, (val & 0xfff0) | 0x0008);
3876 /* Set to ctia type */ 3777 /* Set to ctia type */
3877 alc_write_coef_idx(codec, 0x45, 0xD429); 3778 alc_write_coef_idx(codec, 0x45, 0xD429);
3878 msleep(300); 3779 msleep(300);
@@ -4118,10 +4019,8 @@ static void alc_fixup_headset_mode_alc668(struct hda_codec *codec,
4118 const struct hda_fixup *fix, int action) 4019 const struct hda_fixup *fix, int action)
4119{ 4020{
4120 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4021 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4121 int val;
4122 alc_write_coef_idx(codec, 0xc4, 0x8000); 4022 alc_write_coef_idx(codec, 0xc4, 0x8000);
4123 val = alc_read_coef_idx(codec, 0xc2); 4023 alc_update_coef_idx(codec, 0xc2, ~0xfe, 0);
4124 alc_write_coef_idx(codec, 0xc2, val & 0xfe);
4125 snd_hda_set_pin_ctl_cache(codec, 0x18, 0); 4024 snd_hda_set_pin_ctl_cache(codec, 0x18, 0);
4126 } 4025 }
4127 alc_fixup_headset_mode(codec, fix, action); 4026 alc_fixup_headset_mode(codec, fix, action);
@@ -4217,7 +4116,6 @@ static void alc283_fixup_chromebook(struct hda_codec *codec,
4217 const struct hda_fixup *fix, int action) 4116 const struct hda_fixup *fix, int action)
4218{ 4117{
4219 struct alc_spec *spec = codec->spec; 4118 struct alc_spec *spec = codec->spec;
4220 int val;
4221 4119
4222 switch (action) { 4120 switch (action) {
4223 case HDA_FIXUP_ACT_PRE_PROBE: 4121 case HDA_FIXUP_ACT_PRE_PROBE:
@@ -4228,11 +4126,9 @@ static void alc283_fixup_chromebook(struct hda_codec *codec,
4228 case HDA_FIXUP_ACT_INIT: 4126 case HDA_FIXUP_ACT_INIT:
4229 /* MIC2-VREF control */ 4127 /* MIC2-VREF control */
4230 /* Set to manual mode */ 4128 /* Set to manual mode */
4231 val = alc_read_coef_idx(codec, 0x06); 4129 alc_update_coef_idx(codec, 0x06, 0x000c, 0);
4232 alc_write_coef_idx(codec, 0x06, val & ~0x000c);
4233 /* Enable Line1 input control by verb */ 4130 /* Enable Line1 input control by verb */
4234 val = alc_read_coef_idx(codec, 0x1a); 4131 alc_update_coef_idx(codec, 0x1a, 0, 1 << 4);
4235 alc_write_coef_idx(codec, 0x1a, val | (1 << 4));
4236 break; 4132 break;
4237 } 4133 }
4238} 4134}
@@ -4241,7 +4137,6 @@ static void alc283_fixup_sense_combo_jack(struct hda_codec *codec,
4241 const struct hda_fixup *fix, int action) 4137 const struct hda_fixup *fix, int action)
4242{ 4138{
4243 struct alc_spec *spec = codec->spec; 4139 struct alc_spec *spec = codec->spec;
4244 int val;
4245 4140
4246 switch (action) { 4141 switch (action) {
4247 case HDA_FIXUP_ACT_PRE_PROBE: 4142 case HDA_FIXUP_ACT_PRE_PROBE:
@@ -4250,8 +4145,7 @@ static void alc283_fixup_sense_combo_jack(struct hda_codec *codec,
4250 case HDA_FIXUP_ACT_INIT: 4145 case HDA_FIXUP_ACT_INIT:
4251 /* MIC2-VREF control */ 4146 /* MIC2-VREF control */
4252 /* Set to manual mode */ 4147 /* Set to manual mode */
4253 val = alc_read_coef_idx(codec, 0x06); 4148 alc_update_coef_idx(codec, 0x06, 0x000c, 0);
4254 alc_write_coef_idx(codec, 0x06, val & ~0x000c);
4255 break; 4149 break;
4256 } 4150 }
4257} 4151}
@@ -5304,10 +5198,8 @@ static void alc269_fill_coef(struct hda_codec *codec)
5304 } 5198 }
5305 5199
5306 if ((alc_get_coef0(codec) & 0x00ff) == 0x017) { 5200 if ((alc_get_coef0(codec) & 0x00ff) == 0x017) {
5307 val = alc_read_coef_idx(codec, 0x04);
5308 /* Power up output pin */ 5201 /* Power up output pin */
5309 if (val != -1) 5202 alc_update_coef_idx(codec, 0x04, 0, 1<<11);
5310 alc_write_coef_idx(codec, 0x04, val | (1<<11));
5311 } 5203 }
5312 5204
5313 if ((alc_get_coef0(codec) & 0x00ff) == 0x018) { 5205 if ((alc_get_coef0(codec) & 0x00ff) == 0x018) {
@@ -5323,13 +5215,11 @@ static void alc269_fill_coef(struct hda_codec *codec)
5323 } 5215 }
5324 } 5216 }
5325 5217
5326 val = alc_read_coef_idx(codec, 0xd); /* Class D */ 5218 /* Class D */
5327 if (val != -1) 5219 alc_update_coef_idx(codec, 0xd, 0, 1<<14);
5328 alc_write_coef_idx(codec, 0xd, val | (1<<14));
5329 5220
5330 val = alc_read_coef_idx(codec, 0x4); /* HP */ 5221 /* HP */
5331 if (val != -1) 5222 alc_update_coef_idx(codec, 0x4, 0, 1<<11);
5332 alc_write_coef_idx(codec, 0x4, val | (1<<11));
5333} 5223}
5334 5224
5335/* 5225/*
@@ -6209,16 +6099,14 @@ static const struct snd_hda_pin_quirk alc662_pin_fixup_tbl[] = {
6209 6099
6210static void alc662_fill_coef(struct hda_codec *codec) 6100static void alc662_fill_coef(struct hda_codec *codec)
6211{ 6101{
6212 int val, coef; 6102 int coef;
6213 6103
6214 coef = alc_get_coef0(codec); 6104 coef = alc_get_coef0(codec);
6215 6105
6216 switch (codec->vendor_id) { 6106 switch (codec->vendor_id) {
6217 case 0x10ec0662: 6107 case 0x10ec0662:
6218 if ((coef & 0x00f0) == 0x0030) { 6108 if ((coef & 0x00f0) == 0x0030)
6219 val = alc_read_coef_idx(codec, 0x4); /* EAPD Ctrl */ 6109 alc_update_coef_idx(codec, 0x4, 1<<10, 0); /* EAPD Ctrl */
6220 alc_write_coef_idx(codec, 0x4, val & ~(1<<10));
6221 }
6222 break; 6110 break;
6223 case 0x10ec0272: 6111 case 0x10ec0272:
6224 case 0x10ec0273: 6112 case 0x10ec0273:
@@ -6227,8 +6115,7 @@ static void alc662_fill_coef(struct hda_codec *codec)
6227 case 0x10ec0670: 6115 case 0x10ec0670:
6228 case 0x10ec0671: 6116 case 0x10ec0671:
6229 case 0x10ec0672: 6117 case 0x10ec0672:
6230 val = alc_read_coef_idx(codec, 0xd); /* EAPD Ctrl */ 6118 alc_update_coef_idx(codec, 0xd, 0, 1<<14); /* EAPD Ctrl */
6231 alc_write_coef_idx(codec, 0xd, val | (1<<14));
6232 break; 6119 break;
6233 } 6120 }
6234} 6121}