ARM: EXYNOS: fix the secondary CPU boot of exynos4212

This patch fixes the offset of CPU boot address and changes
the parameter of smc call for SMC_CMD_CPU1BOOT command on
exynos4212.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

1 files changed, 14 insertions, 1 deletions

diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 932129ef26c6..aa01c4222b40 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -18,6 +18,8 @@
 
 #include <mach/map.h>
 
+#include <plat/cpu.h>
+
 #include "smc.h"
 
 static int exynos_do_idle(void)
@@ -28,13 +30,24 @@ static int exynos_do_idle(void)
 
 static int exynos_cpu_boot(int cpu)
 {
+        /*
+         * The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
+         * But, Exynos4212 has only one secondary CPU so second parameter
+         * isn't used for informing secure firmware about CPU id.
+         */
+        if (soc_is_exynos4212())
+                cpu = 0;
+
         exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
         return 0;
 }
 
 static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
 {
-        void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu;
+        void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c;
+
+        if (!soc_is_exynos4212())
+                boot_reg += 4*cpu;
 
         __raw_writel(boot_addr, boot_reg);
         return 0;