aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorNicolas Ferre <nicolas.ferre@atmel.com>2015-02-02 04:59:34 -0500
committerNicolas Ferre <nicolas.ferre@atmel.com>2015-02-02 04:59:34 -0500
commit980657d8cdff97343619cf2e3332b8307e9d07ea (patch)
tree67b44bc876b9ef48aa5c66fc85384b25ce58cbf4
parentc5517b1ea7b2f8e6acb8de194eef2e69c51c8994 (diff)
parent9726b6892beeaa736610370429a23a481d1b133e (diff)
Merge tag 'at91-cleanup3' into at91-3.20-soc
Diffstat
-rw-r--r--Documentation/arm/Atmel/README124
-rw-r--r--Documentation/devicetree/bindings/arm/atmel-at91.txt17
-rw-r--r--MAINTAINERS1
-rw-r--r--arch/arm/Kconfig.debug21
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi12
-rw-r--r--arch/arm/boot/dts/at91rm9200ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9261.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi12
-rw-r--r--arch/arm/boot/dts/at91sam9g20.dtsi9
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi7
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi12
-rw-r--r--arch/arm/boot/dts/at91sam9rl.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9xe.dtsi60
-rw-r--r--arch/arm/boot/dts/ethernut5.dts2
-rw-r--r--arch/arm/boot/dts/sama5d3.dtsi34
-rw-r--r--arch/arm/boot/dts/sama5d3xcm.dtsi1
-rw-r--r--arch/arm/boot/dts/sama5d3xmb.dtsi40
-rw-r--r--arch/arm/boot/dts/sama5d4.dtsi10
-rw-r--r--arch/arm/include/debug/at91.S (renamed from arch/arm/mach-at91/include/mach/debug-macro.S)19
-rw-r--r--arch/arm/mach-at91/Kconfig28
-rw-r--r--arch/arm/mach-at91/Makefile6
-rw-r--r--arch/arm/mach-at91/at91rm9200.c15
-rw-r--r--arch/arm/mach-at91/at91sam9260.c35
-rw-r--r--arch/arm/mach-at91/at91sam9261.c17
-rw-r--r--arch/arm/mach-at91/at91sam9263.c16
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c16
-rw-r--r--arch/arm/mach-at91/at91sam9n12.c12
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c28
-rw-r--r--arch/arm/mach-at91/at91sam9x5.c16
-rw-r--r--arch/arm/mach-at91/board-dt-rm9200.c15
-rw-r--r--arch/arm/mach-at91/board-dt-sam9.c56
-rw-r--r--arch/arm/mach-at91/board-dt-sama5.c1
-rw-r--r--arch/arm/mach-at91/generic.h23
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pio.h80
-rw-r--r--arch/arm/mach-at91/include/mach/at91_rtt.h35
-rw-r--r--arch/arm/mach-at91/include/mach/memory.h26
-rw-r--r--arch/arm/mach-at91/include/mach/system_rev.h27
-rw-r--r--arch/arm/mach-at91/pm.c116
-rw-r--r--arch/arm/mach-at91/pm_slowclock.S9
-rw-r--r--arch/arm/mach-at91/sama5d3.c12
-rw-r--r--arch/arm/mach-at91/sama5d4.c1
-rw-r--r--arch/arm/mach-at91/setup.c38
-rw-r--r--arch/arm/mach-at91/sysirq_mask.c75
-rw-r--r--drivers/clk/at91/pmc.c9
-rw-r--r--drivers/rtc/Kconfig28
47 files changed, 566 insertions, 579 deletions
diff --git a/Documentation/arm/Atmel/README b/Documentation/arm/Atmel/README
new file mode 100644
index 000000000000..c53a19b4aab2
--- /dev/null
+++ b/Documentation/arm/Atmel/README
@@ -0,0 +1,124 @@
1ARM Atmel SoCs (aka AT91)
2=========================
3
4
5Introduction
6------------
7This document gives useful information about the ARM Atmel SoCs that are
8currently supported in Linux Mainline (you know, the one on kernel.org).
9
10It is important to note that the Atmel | SMART ARM-based MPU product line is
11historically named "AT91" or "at91" throughout the Linux kernel development
12process even if this product prefix has completely disappeared from the
13official Atmel product name. Anyway, files, directories, git trees,
14git branches/tags and email subject always contain this "at91" sub-string.
15
16
17AT91 SoCs
18---------
19Documentation and detailled datasheet for each product are available on
20the Atmel website: http://www.atmel.com.
21
22 Flavors:
23 * ARM 920 based SoC
24 - at91rm9200
25 + Datasheet
26 http://www.atmel.com/Images/doc1768.pdf
27
28 * ARM 926 based SoCs
29 - at91sam9260
30 + Datasheet
31 http://www.atmel.com/Images/doc6221.pdf
32
33 - at91sam9xe
34 + Datasheet
35 http://www.atmel.com/Images/Atmel-6254-32-bit-ARM926EJ-S-Embedded-Microprocessor-SAM9XE_Datasheet.pdf
36
37 - at91sam9261
38 + Datasheet
39 http://www.atmel.com/Images/doc6062.pdf
40
41 - at91sam9263
42 + Datasheet
43 http://www.atmel.com/Images/Atmel_6249_32-bit-ARM926EJ-S-Microcontroller_SAM9263_Datasheet.pdf
44
45 - at91sam9rl
46 + Datasheet
47 http://www.atmel.com/Images/doc6289.pdf
48
49 - at91sam9g20
50 + Datasheet
51 http://www.atmel.com/Images/doc6384.pdf
52
53 - at91sam9g45 family
54 - at91sam9g45
55 - at91sam9g46
56 - at91sam9m10
57 - at91sam9m11 (device superset)
58 + Datasheet
59 http://www.atmel.com/Images/Atmel-6437-32-bit-ARM926-Embedded-Microprocessor-SAM9M11_Datasheet.pdf
60
61 - at91sam9x5 family (aka "The 5 series")
62 - at91sam9g15
63 - at91sam9g25
64 - at91sam9g35
65 - at91sam9x25
66 - at91sam9x35
67 + Datasheet (can be considered as covering the whole family)
68 http://www.atmel.com/Images/Atmel_11055_32-bit-ARM926EJ-S-Microcontroller_SAM9X35_Datasheet.pdf
69
70 - at91sam9n12
71 + Datasheet
72 http://www.atmel.com/Images/Atmel_11063_32-bit-ARM926EJ-S-Microcontroller_SAM9N12CN11CN12_Datasheet.pdf
73
74 * ARM Cortex-A5 based SoCs
75 - sama5d3 family
76 - sama5d31
77 - sama5d33
78 - sama5d34
79 - sama5d35
80 - sama5d36 (device superset)
81 + Datasheet
82 http://www.atmel.com/Images/Atmel-11121-32-bit-Cortex-A5-Microcontroller-SAMA5D3_Datasheet.pdf
83
84 * ARM Cortex-A5 + NEON based SoCs
85 - sama5d4 family
86 - sama5d41
87 - sama5d42
88 - sama5d43
89 - sama5d44 (device superset)
90 + Datasheet
91 http://www.atmel.com/Images/Atmel-11238-32-bit-Cortex-A5-Microcontroller-SAMA5D4_Datasheet.pdf
92
93
94Linux kernel information
95------------------------
96Linux kernel mach directory: arch/arm/mach-at91
97MAINTAINERS entry is: "ARM/ATMEL AT91RM9200 AND AT91SAM ARM ARCHITECTURES"
98
99
100Device Tree for AT91 SoCs and boards
101------------------------------------
102All AT91 SoCs are converted to Device Tree. Since Linux 3.19, these products
103must use this method to boot the Linux kernel.
104
105Work In Progress statement:
106Device Tree files and Device Tree bindings that apply to AT91 SoCs and boards are
107considered as "Unstable". To be completely clear, any at91 binding can change at
108any time. So, be sure to use a Device Tree Binary and a Kernel Image generated from
109the same source tree.
110Please refer to the Documentation/devicetree/bindings/ABI.txt file for a
111definition of a "Stable" binding/ABI.
112This statement will be removed by AT91 MAINTAINERS when appropriate.
113
114Naming conventions and best practice:
115- SoCs Device Tree Source Include files are named after the official name of
116 the product (at91sam9g20.dtsi or sama5d33.dtsi for instance).
117- Device Tree Source Include files (.dtsi) are used to collect common nodes that can be
118 shared across SoCs or boards (sama5d3.dtsi or at91sam9x5cm.dtsi for instance).
119 When collecting nodes for a particular peripheral or topic, the identifier have to
120 be placed at the end of the file name, separated with a "_" (at91sam9x5_can.dtsi
121 or sama5d3_gmac.dtsi for example).
122- board Device Tree Source files (.dts) are prefixed by the string "at91-" so
123 that they can be identified easily. Note that some files are historical exceptions
124 to this rule (sama5d3[13456]ek.dts, usb_a9g20.dts or animeo_ip.dts for example).
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 562cda9d86d9..ad319f84f560 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -24,6 +24,7 @@ compatible: must be one of:
24 o "atmel,at91sam9g45" 24 o "atmel,at91sam9g45"
25 o "atmel,at91sam9n12" 25 o "atmel,at91sam9n12"
26 o "atmel,at91sam9rl" 26 o "atmel,at91sam9rl"
27 o "atmel,at91sam9xe"
27 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific 28 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
28 SoC family: 29 SoC family:
29 o "atmel,sama5d3" shall be extended with the specific SoC compatible: 30 o "atmel,sama5d3" shall be extended with the specific SoC compatible:
@@ -136,3 +137,19 @@ Example:
136 compatible = "atmel,at91sam9260-rstc"; 137 compatible = "atmel,at91sam9260-rstc";
137 reg = <0xfffffd00 0x10>; 138 reg = <0xfffffd00 0x10>;
138 }; 139 };
140
141Special Function Registers (SFR)
142
143Special Function Registers (SFR) manage specific aspects of the integrated
144memory, bridge implementations, processor and other functionality not controlled
145elsewhere.
146
147required properties:
148- compatible: Should be "atmel,<chip>-sfr", "syscon".
149 <chip> can be "sama5d3" or "sama5d4".
150- reg: Should contain registers location and length
151
152 sfr@f0038000 {
153 compatible = "atmel,sama5d3-sfr", "syscon";
154 reg = <0xf0038000 0x60>;
155 };
diff --git a/MAINTAINERS b/MAINTAINERS
index 3589d67437f8..8c25979a3c43 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -877,6 +877,7 @@ F: arch/arm/boot/dts/at91*.dts
877F: arch/arm/boot/dts/at91*.dtsi 877F: arch/arm/boot/dts/at91*.dtsi
878F: arch/arm/boot/dts/sama*.dts 878F: arch/arm/boot/dts/sama*.dts
879F: arch/arm/boot/dts/sama*.dtsi 879F: arch/arm/boot/dts/sama*.dtsi
880F: arch/arm/include/debug/at91.S
880 881
881ARM/ATMEL AT91 Clock Support 882ARM/ATMEL AT91 Clock Support
882M: Boris Brezillon <boris.brezillon@free-electrons.com> 883M: Boris Brezillon <boris.brezillon@free-electrons.com>
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 5ddd4906f7a7..575db67a61d6 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -115,16 +115,22 @@ choice
115 0x80024000 | 0xf0024000 | UART9 115 0x80024000 | 0xf0024000 | UART9
116 116
117 config AT91_DEBUG_LL_DBGU0 117 config AT91_DEBUG_LL_DBGU0
118 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" 118 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10, 9rl, 9x5, 9n12"
119 depends on HAVE_AT91_DBGU0 119 select DEBUG_AT91_UART
120 depends on ARCH_AT91
121 depends on SOC_AT91RM9200 || SOC_AT91SAM9
120 122
121 config AT91_DEBUG_LL_DBGU1 123 config AT91_DEBUG_LL_DBGU1
122 bool "Kernel low-level debugging on 9263 and 9g45" 124 bool "Kernel low-level debugging on 9263, 9g45 and sama5d3"
123 depends on HAVE_AT91_DBGU1 125 select DEBUG_AT91_UART
126 depends on ARCH_AT91
127 depends on SOC_AT91SAM9 || SOC_SAMA5
124 128
125 config AT91_DEBUG_LL_DBGU2 129 config AT91_DEBUG_LL_DBGU2
126 bool "Kernel low-level debugging on sama5d4" 130 bool "Kernel low-level debugging on sama5d4"
127 depends on HAVE_AT91_DBGU2 131 select DEBUG_AT91_UART
132 depends on ARCH_AT91
133 depends on SOC_SAMA5
128 134
129 config DEBUG_BCM2835 135 config DEBUG_BCM2835
130 bool "Kernel low-level debugging on BCM2835 PL011 UART" 136 bool "Kernel low-level debugging on BCM2835 PL011 UART"
@@ -1109,6 +1115,10 @@ choice
1109 1115
1110endchoice 1116endchoice
1111 1117
1118config DEBUG_AT91_UART
1119 bool
1120 depends on ARCH_AT91
1121
1112config DEBUG_EXYNOS_UART 1122config DEBUG_EXYNOS_UART
1113 bool 1123 bool
1114 1124
@@ -1165,6 +1175,7 @@ config DEBUG_LL_INCLUDE
1165 string 1175 string
1166 default "debug/sa1100.S" if DEBUG_SA1100 1176 default "debug/sa1100.S" if DEBUG_SA1100
1167 default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250 1177 default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
1178 default "debug/at91.S" if DEBUG_AT91_UART
1168 default "debug/asm9260.S" if DEBUG_ASM9260_UART 1179 default "debug/asm9260.S" if DEBUG_ASM9260_UART
1169 default "debug/clps711x.S" if DEBUG_CLPS711X_UART1 || DEBUG_CLPS711X_UART2 1180 default "debug/clps711x.S" if DEBUG_CLPS711X_UART1 || DEBUG_CLPS711X_UART2
1170 default "debug/meson.S" if DEBUG_MESON_UARTAO 1181 default "debug/meson.S" if DEBUG_MESON_UARTAO
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 6c97d4af61ee..21c2b504f977 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -66,6 +66,11 @@
66 }; 66 };
67 }; 67 };
68 68
69 sram: sram@00200000 {
70 compatible = "mmio-sram";
71 reg = <0x00200000 0x4000>;
72 };
73
69 ahb { 74 ahb {
70 compatible = "simple-bus"; 75 compatible = "simple-bus";
71 #address-cells = <1>; 76 #address-cells = <1>;
@@ -356,6 +361,13 @@
356 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 361 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
357 }; 362 };
358 363
364 rtc: rtc@fffffe00 {
365 compatible = "atmel,at91rm9200-rtc";
366 reg = <0xfffffe00 0x40>;
367 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
368 status = "disabled";
369 };
370
359 tcb0: timer@fffa0000 { 371 tcb0: timer@fffa0000 {
360 compatible = "atmel,at91rm9200-tcb"; 372 compatible = "atmel,at91rm9200-tcb";
361 reg = <0xfffa0000 0x100>; 373 reg = <0xfffa0000 0x100>;
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index 43eb779dd6f6..2a5d21247d7e 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -77,6 +77,10 @@
77 dbgu: serial@fffff200 { 77 dbgu: serial@fffff200 {
78 status = "okay"; 78 status = "okay";
79 }; 79 };
80
81 rtc: rtc@fffffe00 {
82 status = "okay";
83 };
80 }; 84 };
81 85
82 usb0: ohci@00300000 { 86 usb0: ohci@00300000 {
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index dd1313cbc314..fff0ee69aab4 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -69,6 +69,11 @@
69 }; 69 };
70 }; 70 };
71 71
72 sram0: sram@002ff000 {
73 compatible = "mmio-sram";
74 reg = <0x002ff000 0x2000>;
75 };
76
72 ahb { 77 ahb {
73 compatible = "simple-bus"; 78 compatible = "simple-bus";
74 #address-cells = <1>; 79 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index cdb9ed612109..e247b0b5fdab 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -60,6 +60,11 @@
60 }; 60 };
61 }; 61 };
62 62
63 sram: sram@00300000 {
64 compatible = "mmio-sram";
65 reg = <0x00300000 0x28000>;
66 };
67
63 ahb { 68 ahb {
64 compatible = "simple-bus"; 69 compatible = "simple-bus";
65 #address-cells = <1>; 70 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index e8c6c600a5b6..e087a93bea26 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -62,6 +62,16 @@
62 }; 62 };
63 }; 63 };
64 64
65 sram0: sram@00300000 {
66 compatible = "mmio-sram";
67 reg = <0x00300000 0x14000>;
68 };
69
70 sram1: sram@00500000 {
71 compatible = "mmio-sram";
72 reg = <0x00300000 0x4000>;
73 };
74
65 ahb { 75 ahb {
66 compatible = "simple-bus"; 76 compatible = "simple-bus";
67 #address-cells = <1>; 77 #address-cells = <1>;
@@ -294,7 +304,7 @@
294 reg = <17>; 304 reg = <17>;
295 }; 305 };
296 306
297 ac91_clk: ac97_clk { 307 ac97_clk: ac97_clk {
298 #clock-cells = <0>; 308 #clock-cells = <0>;
299 reg = <18>; 309 reg = <18>;
300 }; 310 };
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index a50ee587a7af..f59301618163 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -16,6 +16,15 @@
16 reg = <0x20000000 0x08000000>; 16 reg = <0x20000000 0x08000000>;
17 }; 17 };
18 18
19 sram0: sram@002ff000 {
20 status = "disabled";
21 };
22
23 sram1: sram@002fc000 {
24 compatible = "mmio-sram";
25 reg = <0x002fc000 0x8000>;
26 };
27
19 ahb { 28 ahb {
20 apb { 29 apb {
21 i2c0: i2c@fffac000 { 30 i2c0: i2c@fffac000 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 2a8da8a884b4..ee80aa9c0759 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -74,6 +74,11 @@
74 }; 74 };
75 }; 75 };
76 76
77 sram: sram@00300000 {
78 compatible = "mmio-sram";
79 reg = <0x00300000 0x10000>;
80 };
81
77 ahb { 82 ahb {
78 compatible = "simple-bus"; 83 compatible = "simple-bus";
79 #address-cells = <1>; 84 #address-cells = <1>;
@@ -1287,7 +1292,6 @@
1287 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1292 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1288 reg = <0x00700000 0x100000>; 1293 reg = <0x00700000 0x100000>;
1289 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1294 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1290 //TODO
1291 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; 1295 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1292 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; 1296 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1293 status = "disabled"; 1297 status = "disabled";
@@ -1297,7 +1301,6 @@
1297 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1301 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1298 reg = <0x00800000 0x100000>; 1302 reg = <0x00800000 0x100000>;
1299 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1303 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1300 //TODO
1301 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; 1304 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1302 clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck"; 1305 clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
1303 status = "disabled"; 1306 status = "disabled";
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 68eb9aded164..c2666a7cb5b1 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -64,6 +64,11 @@
64 }; 64 };
65 }; 65 };
66 66
67 sram: sram@00300000 {
68 compatible = "mmio-sram";
69 reg = <0x00300000 0x8000>;
70 };
71
67 ahb { 72 ahb {
68 compatible = "simple-bus"; 73 compatible = "simple-bus";
69 #address-cells = <1>; 74 #address-cells = <1>;
@@ -893,6 +898,13 @@
893 status = "disabled"; 898 status = "disabled";
894 }; 899 };
895 900
901 rtc@fffffeb0 {
902 compatible = "atmel,at91rm9200-rtc";
903 reg = <0xfffffeb0 0x40>;
904 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
905 status = "disabled";
906 };
907
896 pwm0: pwm@f8034000 { 908 pwm0: pwm@f8034000 {
897 compatible = "atmel,at91sam9rl-pwm"; 909 compatible = "atmel,at91sam9rl-pwm";
898 reg = <0xf8034000 0x300>; 910 reg = <0xf8034000 0x300>;
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index 72424371413e..40f645b8fe25 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -70,6 +70,11 @@
70 }; 70 };
71 }; 71 };
72 72
73 sram: sram@00300000 {
74 compatible = "mmio-sram";
75 reg = <0x00300000 0x10000>;
76 };
77
73 ahb { 78 ahb {
74 compatible = "simple-bus"; 79 compatible = "simple-bus";
75 #address-cells = <1>; 80 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index bbb3ba65165f..818dabdd8c0e 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -72,6 +72,11 @@
72 }; 72 };
73 }; 73 };
74 74
75 sram: sram@00300000 {
76 compatible = "mmio-sram";
77 reg = <0x00300000 0x8000>;
78 };
79
75 ahb { 80 ahb {
76 compatible = "simple-bus"; 81 compatible = "simple-bus";
77 #address-cells = <1>; 82 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9xe.dtsi b/arch/arm/boot/dts/at91sam9xe.dtsi
new file mode 100644
index 000000000000..0278f63b2daf
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9xe.dtsi
@@ -0,0 +1,60 @@
1/*
2 * at91sam9xe.dtsi - Device Tree Include file for AT91SAM9XE family SoC
3 *
4 * Copyright (C) 2015 Atmel,
5 * 2015 Alexandre Belloni <alexandre.Belloni@free-electrons.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45
46#include "at91sam9260.dtsi"
47
48/ {
49 model = "Atmel AT91SAM9XE family SoC";
50 compatible = "atmel,at91sam9xe", "atmel,at91sam9260";
51
52 sram0: sram@002ff000 {
53 status = "disabled";
54 };
55
56 sram1: sram@00300000 {
57 compatible = "mmio-sram";
58 reg = <0x00300000 0x4000>;
59 };
60};
diff --git a/arch/arm/boot/dts/ethernut5.dts b/arch/arm/boot/dts/ethernut5.dts
index 8f941c2db7c6..243044343ee8 100644
--- a/arch/arm/boot/dts/ethernut5.dts
+++ b/arch/arm/boot/dts/ethernut5.dts
@@ -6,7 +6,7 @@
6 * Licensed under GPLv2. 6 * Licensed under GPLv2.
7 */ 7 */
8/dts-v1/; 8/dts-v1/;
9#include "at91sam9260.dtsi" 9#include "at91sam9xe.dtsi"
10 10
11/ { 11/ {
12 model = "Ethernut 5"; 12 model = "Ethernut 5";
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 5f4144d1e3a1..261311bdf65b 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -78,6 +78,11 @@
78 }; 78 };
79 }; 79 };
80 80
81 sram: sram@00300000 {
82 compatible = "mmio-sram";
83 reg = <0x00300000 0x20000>;
84 };
85
81 ahb { 86 ahb {
82 compatible = "simple-bus"; 87 compatible = "simple-bus";
83 #address-cells = <1>; 88 #address-cells = <1>;
@@ -214,7 +219,20 @@
214 compatible = "atmel,at91sam9g45-isi"; 219 compatible = "atmel,at91sam9g45-isi";
215 reg = <0xf0034000 0x4000>; 220 reg = <0xf0034000 0x4000>;
216 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>; 221 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_isi_data_0_7>;
224 clocks = <&isi_clk>;
225 clock-names = "isi_clk";
217 status = "disabled"; 226 status = "disabled";
227 port {
228 #address-cells = <1>;
229 #size-cells = <0>;
230 };
231 };
232
233 sfr: sfr@f0038000 {
234 compatible = "atmel,sama5d3-sfr", "syscon";
235 reg = <0xf0038000 0x60>;
218 }; 236 };
219 237
220 mmc1: mmc@f8000000 { 238 mmc1: mmc@f8000000 {
@@ -545,7 +563,7 @@
545 }; 563 };
546 564
547 isi { 565 isi {
548 pinctrl_isi: isi-0 { 566 pinctrl_isi_data_0_7: isi-0-data-0-7 {
549 atmel,pins = 567 atmel,pins =
550 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ 568 <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
551 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ 569 AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
@@ -557,13 +575,19 @@
557 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ 575 AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
558 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ 576 AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
559 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ 577 AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
560 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ 578 AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
561 AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ 579 };
580
581 pinctrl_isi_data_8_9: isi-0-data-8-9 {
582 atmel,pins =
583 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
562 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ 584 AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
563 }; 585 };
564 pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 { 586
587 pinctrl_isi_data_10_11: isi-0-data-10-11 {
565 atmel,pins = 588 atmel,pins =
566 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */ 589 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC27 periph C ISI_PD10, conflicts with SPI1_NPCS2, TWCK1 */
590 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC26 periph C ISI_PD11, conflicts with SPI1_NPCS1, TWD1 */
567 }; 591 };
568 }; 592 };
569 593
diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index cfcd200b0c17..7d6babdab039 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -122,6 +122,7 @@
122 d2 { 122 d2 {
123 label = "d2"; 123 label = "d2";
124 gpios = <&pioE 25 GPIO_ACTIVE_LOW>; /* PE25, conflicts with A25, RXD2 */ 124 gpios = <&pioE 25 GPIO_ACTIVE_LOW>; /* PE25, conflicts with A25, RXD2 */
125 linux,default-trigger = "heartbeat";
125 }; 126 };
126 }; 127 };
127}; 128};
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi
index 77e03655aca3..be2ccc53abb5 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -52,6 +52,29 @@
52 }; 52 };
53 }; 53 };
54 54
55 i2c1: i2c@f0018000 {
56 ov2640: camera@0x30 {
57 compatible = "ovti,ov2640";
58 reg = <0x30>;
59 pinctrl-names = "default";
60 pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
61 resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>;
62 pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
63 /* use pck1 for the master clock of ov2640 */
64 clocks = <&pck1>;
65 clock-names = "xvclk";
66 assigned-clocks = <&pck1>;
67 assigned-clock-rates = <25000000>;
68
69 port {
70 ov2640_0: endpoint {
71 remote-endpoint = <&isi_0>;
72 bus-width = <8>;
73 };
74 };
75 };
76 };
77
55 usart1: serial@f0020000 { 78 usart1: serial@f0020000 {
56 dmas = <0>, <0>; /* Do not use DMA for usart1 */ 79 dmas = <0>, <0>; /* Do not use DMA for usart1 */
57 pinctrl-names = "default"; 80 pinctrl-names = "default";
@@ -60,8 +83,12 @@
60 }; 83 };
61 84
62 isi: isi@f0034000 { 85 isi: isi@f0034000 {
63 pinctrl-names = "default"; 86 port {
64 pinctrl-0 = <&pinctrl_isi &pinctrl_isi_pck_as_mck &pinctrl_isi_power &pinctrl_isi_reset>; 87 isi_0: endpoint {
88 remote-endpoint = <&ov2640_0>;
89 bus-width = <8>;
90 };
91 };
65 }; 92 };
66 93
67 mmc1: mmc@f8000000 { 94 mmc1: mmc@f8000000 {
@@ -117,12 +144,17 @@
117 <AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD30 periph B */ 144 <AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD30 periph B */
118 }; 145 };
119 146
120 pinctrl_isi_reset: isi_reset-0 { 147 pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 {
148 atmel,pins =
149 <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
150 };
151
152 pinctrl_sensor_reset: sensor_reset-0 {
121 atmel,pins = 153 atmel,pins =
122 <AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE24 gpio */ 154 <AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE24 gpio */
123 }; 155 };
124 156
125 pinctrl_isi_power: isi_power-0 { 157 pinctrl_sensor_power: sensor_power-0 {
126 atmel,pins = 158 atmel,pins =
127 <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */ 159 <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */
128 }; 160 };
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index b94995d1889f..2a31d66164ac 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -103,6 +103,11 @@
103 }; 103 };
104 }; 104 };
105 105
106 ns_sram: sram@00210000 {
107 compatible = "mmio-sram";
108 reg = <0x00210000 0x10000>;
109 };
110
106 ahb { 111 ahb {
107 compatible = "simple-bus"; 112 compatible = "simple-bus";
108 #address-cells = <1>; 113 #address-cells = <1>;
@@ -870,6 +875,11 @@
870 status = "disabled"; 875 status = "disabled";
871 }; 876 };
872 877
878 sfr: sfr@f8028000 {
879 compatible = "atmel,sama5d4-sfr", "syscon";
880 reg = <0xf8028000 0x60>;
881 };
882
873 mmc1: mmc@fc000000 { 883 mmc1: mmc@fc000000 {
874 compatible = "atmel,hsmci"; 884 compatible = "atmel,hsmci";
875 reg = <0xfc000000 0x600>; 885 reg = <0xfc000000 0x600>;
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/include/debug/at91.S
index 2103a90f2261..80a6501b4d50 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/include/debug/at91.S
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/arm/mach-at91/include/mach/debug-macro.S
3 *
4 * Copyright (C) 2003-2005 SAN People 2 * Copyright (C) 2003-2005 SAN People
5 * 3 *
6 * Debugging macro include header 4 * Debugging macro include header
@@ -11,18 +9,23 @@
11 * 9 *
12*/ 10*/
13 11
14#include <mach/hardware.h>
15#include <mach/at91_dbgu.h>
16
17#if defined(CONFIG_AT91_DEBUG_LL_DBGU0) 12#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
18#define AT91_DBGU AT91_BASE_DBGU0 13#define AT91_DBGU 0xfffff200 /* AT91_BASE_DBGU0 */
19#elif defined(CONFIG_AT91_DEBUG_LL_DBGU1) 14#elif defined(CONFIG_AT91_DEBUG_LL_DBGU1)
20#define AT91_DBGU AT91_BASE_DBGU1 15#define AT91_DBGU 0xffffee00 /* AT91_BASE_DBGU1 */
21#else 16#else
22/* On sama5d4, use USART3 as low level serial console */ 17/* On sama5d4, use USART3 as low level serial console */
23#define AT91_DBGU SAMA5D4_BASE_USART3 18#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
24#endif 19#endif
25 20
21/* Keep in sync with mach-at91/include/mach/hardware.h */
22#define AT91_IO_P2V(x) ((x) - 0x01000000)
23
24#define AT91_DBGU_SR (0x14) /* Status Register */
25#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
26#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */
27#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */
28
26 .macro addruart, rp, rv, tmp 29 .macro addruart, rp, rv, tmp
27 ldr \rp, =AT91_DBGU @ System peripherals (phys address) 30 ldr \rp, =AT91_DBGU @ System peripherals (phys address)
28 ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address) 31 ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 2395c68b3e32..c6956b863b9d 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -6,15 +6,6 @@ config HAVE_AT91_UTMI
6config HAVE_AT91_USB_CLK 6config HAVE_AT91_USB_CLK
7 bool 7 bool
8 8
9config HAVE_AT91_DBGU0
10 bool
11
12config HAVE_AT91_DBGU1
13 bool
14
15config HAVE_AT91_DBGU2
16 bool
17
18config COMMON_CLK_AT91 9config COMMON_CLK_AT91
19 bool 10 bool
20 select COMMON_CLK 11 select COMMON_CLK
@@ -70,7 +61,6 @@ config SOC_SAMA5D3
70 bool "SAMA5D3 family" 61 bool "SAMA5D3 family"
71 select SOC_SAMA5 62 select SOC_SAMA5
72 select HAVE_FB_ATMEL 63 select HAVE_FB_ATMEL
73 select HAVE_AT91_DBGU1
74 select HAVE_AT91_UTMI 64 select HAVE_AT91_UTMI
75 select HAVE_AT91_SMD 65 select HAVE_AT91_SMD
76 select HAVE_AT91_USB_CLK 66 select HAVE_AT91_USB_CLK
@@ -81,7 +71,6 @@ config SOC_SAMA5D3
81config SOC_SAMA5D4 71config SOC_SAMA5D4
82 bool "SAMA5D4 family" 72 bool "SAMA5D4 family"
83 select SOC_SAMA5 73 select SOC_SAMA5
84 select HAVE_AT91_DBGU2
85 select CLKSRC_MMIO 74 select CLKSRC_MMIO
86 select CACHE_L2X0 75 select CACHE_L2X0
87 select CACHE_PL310 76 select CACHE_PL310
@@ -101,12 +90,10 @@ config SOC_AT91RM9200
101 select COMMON_CLK_AT91 90 select COMMON_CLK_AT91
102 select CPU_ARM920T 91 select CPU_ARM920T
103 select GENERIC_CLOCKEVENTS 92 select GENERIC_CLOCKEVENTS
104 select HAVE_AT91_DBGU0
105 select HAVE_AT91_USB_CLK 93 select HAVE_AT91_USB_CLK
106 94
107config SOC_AT91SAM9260 95config SOC_AT91SAM9260
108 bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20" 96 bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
109 select HAVE_AT91_DBGU0
110 select SOC_AT91SAM9 97 select SOC_AT91SAM9
111 select HAVE_AT91_USB_CLK 98 select HAVE_AT91_USB_CLK
112 help 99 help
@@ -115,7 +102,6 @@ config SOC_AT91SAM9260
115 102
116config SOC_AT91SAM9261 103config SOC_AT91SAM9261
117 bool "AT91SAM9261 or AT91SAM9G10" 104 bool "AT91SAM9261 or AT91SAM9G10"
118 select HAVE_AT91_DBGU0
119 select HAVE_FB_ATMEL 105 select HAVE_FB_ATMEL
120 select SOC_AT91SAM9 106 select SOC_AT91SAM9
121 select HAVE_AT91_USB_CLK 107 select HAVE_AT91_USB_CLK
@@ -124,21 +110,18 @@ config SOC_AT91SAM9261
124 110
125config SOC_AT91SAM9263 111config SOC_AT91SAM9263
126 bool "AT91SAM9263" 112 bool "AT91SAM9263"
127 select HAVE_AT91_DBGU1
128 select HAVE_FB_ATMEL 113 select HAVE_FB_ATMEL
129 select SOC_AT91SAM9 114 select SOC_AT91SAM9
130 select HAVE_AT91_USB_CLK 115 select HAVE_AT91_USB_CLK
131 116
132config SOC_AT91SAM9RL 117config SOC_AT91SAM9RL
133 bool "AT91SAM9RL" 118 bool "AT91SAM9RL"
134 select HAVE_AT91_DBGU0
135 select HAVE_FB_ATMEL 119 select HAVE_FB_ATMEL
136 select SOC_AT91SAM9 120 select SOC_AT91SAM9
137 select HAVE_AT91_UTMI 121 select HAVE_AT91_UTMI
138 122
139config SOC_AT91SAM9G45 123config SOC_AT91SAM9G45
140 bool "AT91SAM9G45 or AT91SAM9M10 families" 124 bool "AT91SAM9G45 or AT91SAM9M10 families"
141 select HAVE_AT91_DBGU1
142 select HAVE_FB_ATMEL 125 select HAVE_FB_ATMEL
143 select SOC_AT91SAM9 126 select SOC_AT91SAM9
144 select HAVE_AT91_UTMI 127 select HAVE_AT91_UTMI
@@ -149,7 +132,6 @@ config SOC_AT91SAM9G45
149 132
150config SOC_AT91SAM9X5 133config SOC_AT91SAM9X5
151 bool "AT91SAM9x5 family" 134 bool "AT91SAM9x5 family"
152 select HAVE_AT91_DBGU0
153 select HAVE_FB_ATMEL 135 select HAVE_FB_ATMEL
154 select SOC_AT91SAM9 136 select SOC_AT91SAM9
155 select HAVE_AT91_UTMI 137 select HAVE_AT91_UTMI
@@ -164,7 +146,6 @@ config SOC_AT91SAM9X5
164 146
165config SOC_AT91SAM9N12 147config SOC_AT91SAM9N12
166 bool "AT91SAM9N12 family" 148 bool "AT91SAM9N12 family"
167 select HAVE_AT91_DBGU0
168 select HAVE_FB_ATMEL 149 select HAVE_FB_ATMEL
169 select SOC_AT91SAM9 150 select SOC_AT91SAM9
170 select HAVE_AT91_USB_CLK 151 select HAVE_AT91_USB_CLK
@@ -174,18 +155,11 @@ config SOC_AT91SAM9N12
174# ---------------------------------------------------------- 155# ----------------------------------------------------------
175endif # SOC_SAM_V4_V5 156endif # SOC_SAM_V4_V5
176 157
177config MACH_AT91RM9200_DT
178 def_bool SOC_AT91RM9200
179
180config MACH_AT91SAM9_DT
181 def_bool SOC_AT91SAM9
182
183# ----------------------------------------------------------
184
185comment "AT91 Feature Selections" 158comment "AT91 Feature Selections"
186 159
187config AT91_SLOW_CLOCK 160config AT91_SLOW_CLOCK
188 bool "Suspend-to-RAM disables main oscillator" 161 bool "Suspend-to-RAM disables main oscillator"
162 select SRAM
189 depends on SUSPEND 163 depends on SUSPEND
190 help 164 help
191 Select this if you want Suspend-to-RAM to save the most power 165 Select this if you want Suspend-to-RAM to save the most power
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 7b6424d40764..8ef7d9a2e855 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5obj-y := setup.o sysirq_mask.o 5obj-y := setup.o
6 6
7obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o 7obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
8 8
@@ -19,8 +19,8 @@ obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o
19obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o 19obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o
20 20
21# AT91SAM board with device-tree 21# AT91SAM board with device-tree
22obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o 22obj-$(CONFIG_SOC_AT91RM9200) += board-dt-rm9200.o
23obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o 23obj-$(CONFIG_SOC_AT91SAM9) += board-dt-sam9.o
24 24
25# SAMA5 board with device-tree 25# SAMA5 board with device-tree
26obj-$(CONFIG_SOC_SAMA5) += board-dt-sama5.o 26obj-$(CONFIG_SOC_SAMA5) += board-dt-sama5.o
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index b52916947535..3be1963f5c56 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -21,14 +21,6 @@
21#include "soc.h" 21#include "soc.h"
22#include "generic.h" 22#include "generic.h"
23 23
24static void at91rm9200_idle(void)
25{
26 /*
27 * Disable the processor clock. The processor will be automatically
28 * re-enabled by an interrupt or by a reset.
29 */
30 at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
31}
32 24
33static void at91rm9200_restart(enum reboot_mode reboot_mode, const char *cmd) 25static void at91rm9200_restart(enum reboot_mode reboot_mode, const char *cmd)
34{ 26{
@@ -42,11 +34,6 @@ static void at91rm9200_restart(enum reboot_mode reboot_mode, const char *cmd)
42/* -------------------------------------------------------------------- 34/* --------------------------------------------------------------------
43 * AT91RM9200 processor initialization 35 * AT91RM9200 processor initialization
44 * -------------------------------------------------------------------- */ 36 * -------------------------------------------------------------------- */
45static void __init at91rm9200_map_io(void)
46{
47 /* Map peripherals */
48 at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE);
49}
50 37
51static void __init at91rm9200_initialize(void) 38static void __init at91rm9200_initialize(void)
52{ 39{
@@ -54,8 +41,6 @@ static void __init at91rm9200_initialize(void)
54 arm_pm_restart = at91rm9200_restart; 41 arm_pm_restart = at91rm9200_restart;
55} 42}
56 43
57
58AT91_SOC_START(at91rm9200) 44AT91_SOC_START(at91rm9200)
59 .map_io = at91rm9200_map_io,
60 .init = at91rm9200_initialize, 45 .init = at91rm9200_initialize,
61AT91_SOC_END 46AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 78137c24d90b..37b7ce4c6a3b 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -22,40 +22,5 @@
22 * AT91SAM9260 processor initialization 22 * AT91SAM9260 processor initialization
23 * -------------------------------------------------------------------- */ 23 * -------------------------------------------------------------------- */
24 24
25static void __init at91sam9xe_map_io(void)
26{
27 unsigned long sram_size;
28
29 switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
30 case AT91_CIDR_SRAMSIZ_32K:
31 sram_size = 2 * SZ_16K;
32 break;
33 case AT91_CIDR_SRAMSIZ_16K:
34 default:
35 sram_size = SZ_16K;
36 }
37
38 at91_init_sram(0, AT91SAM9XE_SRAM_BASE, sram_size);
39}
40
41static void __init at91sam9260_map_io(void)
42{
43 if (cpu_is_at91sam9xe())
44 at91sam9xe_map_io();
45 else if (cpu_is_at91sam9g20())
46 at91_init_sram(0, AT91SAM9G20_SRAM_BASE, AT91SAM9G20_SRAM_SIZE);
47 else
48 at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE);
49}
50
51static void __init at91sam9260_initialize(void)
52{
53 arm_pm_idle = at91sam9_idle;
54
55 at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT);
56}
57
58AT91_SOC_START(at91sam9260) 25AT91_SOC_START(at91sam9260)
59 .map_io = at91sam9260_map_io,
60 .init = at91sam9260_initialize,
61AT91_SOC_END 26AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index d29953ecb0c4..aebbf76b6038 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -21,22 +21,5 @@
21 * AT91SAM9261 processor initialization 21 * AT91SAM9261 processor initialization
22 * -------------------------------------------------------------------- */ 22 * -------------------------------------------------------------------- */
23 23
24static void __init at91sam9261_map_io(void)
25{
26 if (cpu_is_at91sam9g10())
27 at91_init_sram(0, AT91SAM9G10_SRAM_BASE, AT91SAM9G10_SRAM_SIZE);
28 else
29 at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
30}
31
32static void __init at91sam9261_initialize(void)
33{
34 arm_pm_idle = at91sam9_idle;
35
36 at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT);
37}
38
39AT91_SOC_START(at91sam9261) 24AT91_SOC_START(at91sam9261)
40 .map_io = at91sam9261_map_io,
41 .init = at91sam9261_initialize,
42AT91_SOC_END 25AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index e7ad14864083..dca29457d9cc 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -20,21 +20,5 @@
20 * AT91SAM9263 processor initialization 20 * AT91SAM9263 processor initialization
21 * -------------------------------------------------------------------- */ 21 * -------------------------------------------------------------------- */
22 22
23static void __init at91sam9263_map_io(void)
24{
25 at91_init_sram(0, AT91SAM9263_SRAM0_BASE, AT91SAM9263_SRAM0_SIZE);
26 at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
27}
28
29static void __init at91sam9263_initialize(void)
30{
31 arm_pm_idle = at91sam9_idle;
32
33 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0);
34 at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1);
35}
36
37AT91_SOC_START(at91sam9263) 23AT91_SOC_START(at91sam9263)
38 .map_io = at91sam9263_map_io,
39 .init = at91sam9263_initialize,
40AT91_SOC_END 24AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index b6117bea9a6f..4957a9ef748a 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <asm/system_misc.h> 13#include <asm/system_misc.h>
14#include <asm/irq.h>
15#include <mach/hardware.h> 14#include <mach/hardware.h>
16 15
17#include "soc.h" 16#include "soc.h"
@@ -21,20 +20,5 @@
21 * AT91SAM9G45 processor initialization 20 * AT91SAM9G45 processor initialization
22 * -------------------------------------------------------------------- */ 21 * -------------------------------------------------------------------- */
23 22
24static void __init at91sam9g45_map_io(void)
25{
26 at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE);
27}
28
29static void __init at91sam9g45_initialize(void)
30{
31 arm_pm_idle = at91sam9_idle;
32
33 at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC);
34 at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT);
35}
36
37AT91_SOC_START(at91sam9g45) 23AT91_SOC_START(at91sam9g45)
38 .map_io = at91sam9g45_map_io,
39 .init = at91sam9g45_initialize,
40AT91_SOC_END 24AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index dee569b1987e..b5ea69a3eaf6 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -16,17 +16,5 @@
16 * AT91SAM9N12 processor initialization 16 * AT91SAM9N12 processor initialization
17 * -------------------------------------------------------------------- */ 17 * -------------------------------------------------------------------- */
18 18
19static void __init at91sam9n12_map_io(void)
20{
21 at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);
22}
23
24static void __init at91sam9n12_initialize(void)
25{
26 at91_sysirq_mask_rtc(AT91SAM9N12_BASE_RTC);
27}
28
29AT91_SOC_START(at91sam9n12) 19AT91_SOC_START(at91sam9n12)
30 .map_io = at91sam9n12_map_io,
31 .init = at91sam9n12_initialize,
32AT91_SOC_END 20AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index f25b9aec9c50..6cb40e4ec20f 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -10,7 +10,6 @@
10 */ 10 */
11 11
12#include <asm/system_misc.h> 12#include <asm/system_misc.h>
13#include <asm/irq.h>
14#include <mach/cpu.h> 13#include <mach/cpu.h>
15#include <mach/at91_dbgu.h> 14#include <mach/at91_dbgu.h>
16#include <mach/hardware.h> 15#include <mach/hardware.h>
@@ -22,32 +21,5 @@
22 * AT91SAM9RL processor initialization 21 * AT91SAM9RL processor initialization
23 * -------------------------------------------------------------------- */ 22 * -------------------------------------------------------------------- */
24 23
25static void __init at91sam9rl_map_io(void)
26{
27 unsigned long sram_size;
28
29 switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
30 case AT91_CIDR_SRAMSIZ_32K:
31 sram_size = 2 * SZ_16K;
32 break;
33 case AT91_CIDR_SRAMSIZ_16K:
34 default:
35 sram_size = SZ_16K;
36 }
37
38 /* Map SRAM */
39 at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
40}
41
42static void __init at91sam9rl_initialize(void)
43{
44 arm_pm_idle = at91sam9_idle;
45
46 at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC);
47 at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT);
48}
49
50AT91_SOC_START(at91sam9rl) 24AT91_SOC_START(at91sam9rl)
51 .map_io = at91sam9rl_map_io,
52 .init = at91sam9rl_initialize,
53AT91_SOC_END 25AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index f0d5a69a7237..7b60a529db01 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -16,21 +16,5 @@
16 * AT91SAM9x5 processor initialization 16 * AT91SAM9x5 processor initialization
17 * -------------------------------------------------------------------- */ 17 * -------------------------------------------------------------------- */
18 18
19static void __init at91sam9x5_map_io(void)
20{
21 at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
22}
23
24static void __init at91sam9x5_initialize(void)
25{
26 at91_sysirq_mask_rtc(AT91SAM9X5_BASE_RTC);
27}
28
29/* --------------------------------------------------------------------
30 * Interrupt initialization
31 * -------------------------------------------------------------------- */
32
33AT91_SOC_START(at91sam9x5) 19AT91_SOC_START(at91sam9x5)
34 .map_io = at91sam9x5_map_io,
35 .init = at91sam9x5_initialize,
36AT91_SOC_END 20AT91_SOC_END
diff --git a/arch/arm/mach-at91/board-dt-rm9200.c b/arch/arm/mach-at91/board-dt-rm9200.c
index 76dfe8f9af50..d47c4433444d 100644
--- a/arch/arm/mach-at91/board-dt-rm9200.c
+++ b/arch/arm/mach-at91/board-dt-rm9200.c
@@ -14,6 +14,7 @@
14#include <linux/gpio.h> 14#include <linux/gpio.h>
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/of_irq.h> 16#include <linux/of_irq.h>
17#include <linux/of_platform.h>
17#include <linux/clk-provider.h> 18#include <linux/clk-provider.h>
18 19
19#include <asm/setup.h> 20#include <asm/setup.h>
@@ -30,7 +31,16 @@ static void __init at91rm9200_dt_timer_init(void)
30 at91rm9200_timer_init(); 31 at91rm9200_timer_init();
31} 32}
32 33
33static const char *at91rm9200_dt_board_compat[] __initdata = { 34static void __init rm9200_dt_device_init(void)
35{
36 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
37
38 at91_rm9200_pm_init();
39}
40
41
42
43static const char *at91rm9200_dt_board_compat[] __initconst = {
34 "atmel,at91rm9200", 44 "atmel,at91rm9200",
35 NULL 45 NULL
36}; 46};
@@ -38,6 +48,7 @@ static const char *at91rm9200_dt_board_compat[] __initdata = {
38DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)") 48DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)")
39 .init_time = at91rm9200_dt_timer_init, 49 .init_time = at91rm9200_dt_timer_init,
40 .map_io = at91_map_io, 50 .map_io = at91_map_io,
41 .init_early = at91rm9200_dt_initialize, 51 .init_early = at91_dt_initialize,
52 .init_machine = rm9200_dt_device_init,
42 .dt_compat = at91rm9200_dt_board_compat, 53 .dt_compat = at91rm9200_dt_board_compat,
43MACHINE_END 54MACHINE_END
diff --git a/arch/arm/mach-at91/board-dt-sam9.c b/arch/arm/mach-at91/board-dt-sam9.c
index f99246aa9b38..f5d922e57655 100644
--- a/arch/arm/mach-at91/board-dt-sam9.c
+++ b/arch/arm/mach-at91/board-dt-sam9.c
@@ -13,8 +13,10 @@
13#include <linux/gpio.h> 13#include <linux/gpio.h>
14#include <linux/of.h> 14#include <linux/of.h>
15#include <linux/of_irq.h> 15#include <linux/of_irq.h>
16#include <linux/of_platform.h>
16#include <linux/clk-provider.h> 17#include <linux/clk-provider.h>
17 18
19#include <asm/system_misc.h>
18#include <asm/setup.h> 20#include <asm/setup.h>
19#include <asm/irq.h> 21#include <asm/irq.h>
20#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
@@ -23,7 +25,15 @@
23 25
24#include "generic.h" 26#include "generic.h"
25 27
26static const char *at91_dt_board_compat[] __initdata = { 28static void __init sam9_dt_device_init(void)
29{
30 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
31
32 arm_pm_idle = at91sam9_idle;
33 at91_sam9260_pm_init();
34}
35
36static const char *at91_dt_board_compat[] __initconst = {
27 "atmel,at91sam9", 37 "atmel,at91sam9",
28 NULL 38 NULL
29}; 39};
@@ -32,5 +42,49 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
32 /* Maintainer: Atmel */ 42 /* Maintainer: Atmel */
33 .map_io = at91_map_io, 43 .map_io = at91_map_io,
34 .init_early = at91_dt_initialize, 44 .init_early = at91_dt_initialize,
45 .init_machine = sam9_dt_device_init,
35 .dt_compat = at91_dt_board_compat, 46 .dt_compat = at91_dt_board_compat,
36MACHINE_END 47MACHINE_END
48
49static void __init sam9g45_dt_device_init(void)
50{
51 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
52
53 arm_pm_idle = at91sam9_idle;
54 at91_sam9g45_pm_init();
55}
56
57static const char *at91_9g45_board_compat[] __initconst = {
58 "atmel,at91sam9g45",
59 NULL
60};
61
62DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45")
63 /* Maintainer: Atmel */
64 .map_io = at91_map_io,
65 .init_early = at91_dt_initialize,
66 .init_machine = sam9g45_dt_device_init,
67 .dt_compat = at91_9g45_board_compat,
68MACHINE_END
69
70static void __init sam9x5_dt_device_init(void)
71{
72 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
73
74 arm_pm_idle = at91sam9_idle;
75 at91_sam9x5_pm_init();
76}
77
78static const char *at91_9x5_board_compat[] __initconst = {
79 "atmel,at91sam9x5",
80 "atmel,at91sam9n12",
81 NULL
82};
83
84DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9")
85 /* Maintainer: Atmel */
86 .map_io = at91_map_io,
87 .init_early = at91_dt_initialize,
88 .init_machine = sam9x5_dt_device_init,
89 .dt_compat = at91_9x5_board_compat,
90MACHINE_END
diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c
index 97f7367d32b8..3ffe46c2bd4c 100644
--- a/arch/arm/mach-at91/board-dt-sama5.c
+++ b/arch/arm/mach-at91/board-dt-sama5.c
@@ -47,6 +47,7 @@ static void __init sama5_dt_device_init(void)
47 } 47 }
48 48
49 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 49 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
50 at91_sam9x5_pm_init();
50} 51}
51 52
52static const char *sama5_dt_board_compat[] __initconst = { 53static const char *sama5_dt_board_compat[] __initconst = {
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index d53324210adf..a8ee83ef6cd4 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -17,24 +17,31 @@
17 /* Map io */ 17 /* Map io */
18extern void __init at91_map_io(void); 18extern void __init at91_map_io(void);
19extern void __init at91_alt_map_io(void); 19extern void __init at91_alt_map_io(void);
20extern void __init at91_init_sram(int bank, unsigned long base,
21 unsigned int length);
22 20
23 /* Processors */ 21 /* Processors */
24extern void __init at91rm9200_set_type(int type);
25extern void __init at91rm9200_dt_initialize(void);
26extern void __init at91_dt_initialize(void); 22extern void __init at91_dt_initialize(void);
27 23
28 /* Interrupts */
29extern void __init at91_sysirq_mask_rtc(u32 rtc_base);
30extern void __init at91_sysirq_mask_rtt(u32 rtt_base);
31
32 /* Timer */ 24 /* Timer */
33extern void at91rm9200_timer_init(void); 25extern void at91rm9200_timer_init(void);
34 26
35/* idle */ 27/* idle */
28extern void at91rm9200_idle(void);
36extern void at91sam9_idle(void); 29extern void at91sam9_idle(void);
37 30
38/* Matrix */ 31/* Matrix */
39extern void at91_ioremap_matrix(u32 base_addr); 32extern void at91_ioremap_matrix(u32 base_addr);
33
34
35#ifdef CONFIG_PM
36extern void __init at91_rm9200_pm_init(void);
37extern void __init at91_sam9260_pm_init(void);
38extern void __init at91_sam9g45_pm_init(void);
39extern void __init at91_sam9x5_pm_init(void);
40#else
41void __init at91_rm9200_pm_init(void) { }
42void __init at91_sam9260_pm_init(void) { }
43void __init at91_sam9g45_pm_init(void) { }
44void __init at91_sam9x5_pm_init(void) { }
45#endif
46
40#endif /* _AT91_GENERIC_H */ 47#endif /* _AT91_GENERIC_H */
diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h
deleted file mode 100644
index 7b7366253ceb..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_pio.h
+++ /dev/null
@@ -1,80 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91_pio.h
3 *
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
6 *
7 * Parallel I/O Controller (PIO) - System peripherals registers.
8 * Based on AT91RM9200 datasheet revision E.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_PIO_H
17#define AT91_PIO_H
18
19#define PIO_PER 0x00 /* Enable Register */
20#define PIO_PDR 0x04 /* Disable Register */
21#define PIO_PSR 0x08 /* Status Register */
22#define PIO_OER 0x10 /* Output Enable Register */
23#define PIO_ODR 0x14 /* Output Disable Register */
24#define PIO_OSR 0x18 /* Output Status Register */
25#define PIO_IFER 0x20 /* Glitch Input Filter Enable */
26#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */
27#define PIO_IFSR 0x28 /* Glitch Input Filter Status */
28#define PIO_SODR 0x30 /* Set Output Data Register */
29#define PIO_CODR 0x34 /* Clear Output Data Register */
30#define PIO_ODSR 0x38 /* Output Data Status Register */
31#define PIO_PDSR 0x3c /* Pin Data Status Register */
32#define PIO_IER 0x40 /* Interrupt Enable Register */
33#define PIO_IDR 0x44 /* Interrupt Disable Register */
34#define PIO_IMR 0x48 /* Interrupt Mask Register */
35#define PIO_ISR 0x4c /* Interrupt Status Register */
36#define PIO_MDER 0x50 /* Multi-driver Enable Register */
37#define PIO_MDDR 0x54 /* Multi-driver Disable Register */
38#define PIO_MDSR 0x58 /* Multi-driver Status Register */
39#define PIO_PUDR 0x60 /* Pull-up Disable Register */
40#define PIO_PUER 0x64 /* Pull-up Enable Register */
41#define PIO_PUSR 0x68 /* Pull-up Status Register */
42#define PIO_ASR 0x70 /* Peripheral A Select Register */
43#define PIO_ABCDSR1 0x70 /* Peripheral ABCD Select Register 1 [some sam9 only] */
44#define PIO_BSR 0x74 /* Peripheral B Select Register */
45#define PIO_ABCDSR2 0x74 /* Peripheral ABCD Select Register 2 [some sam9 only] */
46#define PIO_ABSR 0x78 /* AB Status Register */
47#define PIO_IFSCDR 0x80 /* Input Filter Slow Clock Disable Register */
48#define PIO_IFSCER 0x84 /* Input Filter Slow Clock Enable Register */
49#define PIO_IFSCSR 0x88 /* Input Filter Slow Clock Status Register */
50#define PIO_SCDR 0x8c /* Slow Clock Divider Debouncing Register */
51#define PIO_SCDR_DIV (0x3fff << 0) /* Slow Clock Divider Mask */
52#define PIO_PPDDR 0x90 /* Pad Pull-down Disable Register */
53#define PIO_PPDER 0x94 /* Pad Pull-down Enable Register */
54#define PIO_PPDSR 0x98 /* Pad Pull-down Status Register */
55#define PIO_OWER 0xa0 /* Output Write Enable Register */
56#define PIO_OWDR 0xa4 /* Output Write Disable Register */
57#define PIO_OWSR 0xa8 /* Output Write Status Register */
58#define PIO_AIMER 0xb0 /* Additional Interrupt Modes Enable Register */
59#define PIO_AIMDR 0xb4 /* Additional Interrupt Modes Disable Register */
60#define PIO_AIMMR 0xb8 /* Additional Interrupt Modes Mask Register */
61#define PIO_ESR 0xc0 /* Edge Select Register */
62#define PIO_LSR 0xc4 /* Level Select Register */
63#define PIO_ELSR 0xc8 /* Edge/Level Status Register */
64#define PIO_FELLSR 0xd0 /* Falling Edge/Low Level Select Register */
65#define PIO_REHLSR 0xd4 /* Rising Edge/ High Level Select Register */
66#define PIO_FRLHSR 0xd8 /* Fall/Rise - Low/High Status Register */
67#define PIO_SCHMITT 0x100 /* Schmitt Trigger Register */
68
69#define ABCDSR_PERIPH_A 0x0
70#define ABCDSR_PERIPH_B 0x1
71#define ABCDSR_PERIPH_C 0x2
72#define ABCDSR_PERIPH_D 0x3
73
74#define SAMA5D3_PIO_DRIVER1 0x118 /*PIO Driver 1 register offset*/
75#define SAMA5D3_PIO_DRIVER2 0x11C /*PIO Driver 2 register offset*/
76
77#define AT91SAM9X5_PIO_DRIVER1 0x114 /*PIO Driver 1 register offset*/
78#define AT91SAM9X5_PIO_DRIVER2 0x118 /*PIO Driver 2 register offset*/
79
80#endif
diff --git a/arch/arm/mach-at91/include/mach/at91_rtt.h b/arch/arm/mach-at91/include/mach/at91_rtt.h
deleted file mode 100644
index 7ec75de8bbb6..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_rtt.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/at91_rtt.h
3 *
4 * Copyright (C) 2007 Andrew Victor
5 * Copyright (C) 2007 Atmel Corporation.
6 *
7 * Real-time Timer (RTT) - System peripherals regsters.
8 * Based on AT91SAM9261 datasheet revision D.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91_RTT_H
17#define AT91_RTT_H
18
19#define AT91_RTT_MR 0x00 /* Real-time Mode Register */
20#define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */
21#define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */
22#define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */
23#define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */
24
25#define AT91_RTT_AR 0x04 /* Real-time Alarm Register */
26#define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */
27
28#define AT91_RTT_VR 0x08 /* Real-time Value Register */
29#define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */
30
31#define AT91_RTT_SR 0x0c /* Real-time Status Register */
32#define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */
33#define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */
34
35#endif
diff --git a/arch/arm/mach-at91/include/mach/memory.h b/arch/arm/mach-at91/include/mach/memory.h
deleted file mode 100644
index 401c207f2f39..000000000000
--- a/arch/arm/mach-at91/include/mach/memory.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * arch/arm/mach-at91/include/mach/memory.h
3 *
4 * Copyright (C) 2004 SAN People
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARCH_MEMORY_H
22#define __ASM_ARCH_MEMORY_H
23
24#include <mach/hardware.h>
25
26#endif
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h
deleted file mode 100644
index ef79a9aafc08..000000000000
--- a/arch/arm/mach-at91/include/mach/system_rev.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
3 *
4 * Under GPLv2 only
5 */
6
7#ifndef __ARCH_SYSTEM_REV_H__
8#define __ARCH_SYSTEM_REV_H__
9
10#include <asm/system_info.h>
11
12/*
13 * board revision encoding
14 * mach specific
15 * the 16-31 bit are reserved for at91 generic information
16 *
17 * bit 31:
18 * 0 => nand 8 bit
19 * 1 => nand 16 bit
20 */
21#define BOARD_HAVE_NAND_16BIT (1 << 31)
22static inline int board_have_nand_16bit(void)
23{
24 return (system_rev & BOARD_HAVE_NAND_16BIT) ? 1 : 0;
25}
26
27#endif /* __ARCH_SYSTEM_REV_H__ */
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 9b15169a1c62..87c1fd8aa1b6 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -14,9 +14,12 @@
14#include <linux/suspend.h> 14#include <linux/suspend.h>
15#include <linux/sched.h> 15#include <linux/sched.h>
16#include <linux/proc_fs.h> 16#include <linux/proc_fs.h>
17#include <linux/genalloc.h>
17#include <linux/interrupt.h> 18#include <linux/interrupt.h>
18#include <linux/sysfs.h> 19#include <linux/sysfs.h>
19#include <linux/module.h> 20#include <linux/module.h>
21#include <linux/of.h>
22#include <linux/of_platform.h>
20#include <linux/platform_device.h> 23#include <linux/platform_device.h>
21#include <linux/io.h> 24#include <linux/io.h>
22#include <linux/clk/at91_pmc.h> 25#include <linux/clk/at91_pmc.h>
@@ -32,6 +35,11 @@
32#include "generic.h" 35#include "generic.h"
33#include "pm.h" 36#include "pm.h"
34 37
38static struct {
39 unsigned long uhp_udp_mask;
40 int memctrl;
41} at91_pm_data;
42
35static void (*at91_pm_standby)(void); 43static void (*at91_pm_standby)(void);
36 44
37static int at91_pm_valid_state(suspend_state_t state) 45static int at91_pm_valid_state(suspend_state_t state)
@@ -71,17 +79,9 @@ static int at91_pm_verify_clocks(void)
71 scsr = at91_pmc_read(AT91_PMC_SCSR); 79 scsr = at91_pmc_read(AT91_PMC_SCSR);
72 80
73 /* USB must not be using PLLB */ 81 /* USB must not be using PLLB */
74 if (cpu_is_at91rm9200()) { 82 if ((scsr & at91_pm_data.uhp_udp_mask) != 0) {
75 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) { 83 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
76 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); 84 return 0;
77 return 0;
78 }
79 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()
80 || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) {
81 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) {
82 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
83 return 0;
84 }
85 } 85 }
86 86
87 /* PCK0..PCK3 must be disabled, or configured to use clk32k */ 87 /* PCK0..PCK3 must be disabled, or configured to use clk32k */
@@ -149,18 +149,13 @@ static int at91_pm_enter(suspend_state_t state)
149 * turning off the main oscillator; reverse on wakeup. 149 * turning off the main oscillator; reverse on wakeup.
150 */ 150 */
151 if (slow_clock) { 151 if (slow_clock) {
152 int memctrl = AT91_MEMCTRL_SDRAMC;
153
154 if (cpu_is_at91rm9200())
155 memctrl = AT91_MEMCTRL_MC;
156 else if (cpu_is_at91sam9g45())
157 memctrl = AT91_MEMCTRL_DDRSDR;
158#ifdef CONFIG_AT91_SLOW_CLOCK 152#ifdef CONFIG_AT91_SLOW_CLOCK
159 /* copy slow_clock handler to SRAM, and call it */ 153 /* copy slow_clock handler to SRAM, and call it */
160 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz); 154 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
161#endif 155#endif
162 slow_clock(at91_pmc_base, at91_ramc_base[0], 156 slow_clock(at91_pmc_base, at91_ramc_base[0],
163 at91_ramc_base[1], memctrl); 157 at91_ramc_base[1],
158 at91_pm_data.memctrl);
164 break; 159 break;
165 } else { 160 } else {
166 pr_info("AT91: PM - no slow clock mode enabled ...\n"); 161 pr_info("AT91: PM - no slow clock mode enabled ...\n");
@@ -229,23 +224,92 @@ void at91_pm_set_standby(void (*at91_standby)(void))
229 } 224 }
230} 225}
231 226
232static int __init at91_pm_init(void) 227#ifdef CONFIG_AT91_SLOW_CLOCK
228static void __init at91_pm_sram_init(void)
229{
230 struct gen_pool *sram_pool;
231 phys_addr_t sram_pbase;
232 unsigned long sram_base;
233 struct device_node *node;
234 struct platform_device *pdev;
235
236 node = of_find_compatible_node(NULL, NULL, "mmio-sram");
237 if (!node) {
238 pr_warn("%s: failed to find sram node!\n", __func__);
239 return;
240 }
241
242 pdev = of_find_device_by_node(node);
243 if (!pdev) {
244 pr_warn("%s: failed to find sram device!\n", __func__);
245 goto put_node;
246 }
247
248 sram_pool = dev_get_gen_pool(&pdev->dev);
249 if (!sram_pool) {
250 pr_warn("%s: sram pool unavailable!\n", __func__);
251 goto put_node;
252 }
253
254 sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz);
255 if (!sram_base) {
256 pr_warn("%s: unable to alloc ocram!\n", __func__);
257 goto put_node;
258 }
259
260 sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base);
261 slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false);
262
263put_node:
264 of_node_put(node);
265}
266#endif
267
268
269static void __init at91_pm_init(void)
233{ 270{
234#ifdef CONFIG_AT91_SLOW_CLOCK 271#ifdef CONFIG_AT91_SLOW_CLOCK
235 slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz); 272 at91_pm_sram_init();
236#endif 273#endif
237 274
238 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : "")); 275 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
239 276
240 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
241 if (cpu_is_at91rm9200())
242 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
243
244 if (at91_cpuidle_device.dev.platform_data) 277 if (at91_cpuidle_device.dev.platform_data)
245 platform_device_register(&at91_cpuidle_device); 278 platform_device_register(&at91_cpuidle_device);
246 279
247 suspend_set_ops(&at91_pm_ops); 280 suspend_set_ops(&at91_pm_ops);
281}
248 282
249 return 0; 283void __init at91_rm9200_pm_init(void)
284{
285 /*
286 * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.
287 */
288 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
289
290 at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP;
291 at91_pm_data.memctrl = AT91_MEMCTRL_MC;
292
293 at91_pm_init();
294}
295
296void __init at91_sam9260_pm_init(void)
297{
298 at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC;
299 at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
300 return at91_pm_init();
301}
302
303void __init at91_sam9g45_pm_init(void)
304{
305 at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP;
306 at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
307 return at91_pm_init();
308}
309
310void __init at91_sam9x5_pm_init(void)
311{
312 at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
313 at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
314 return at91_pm_init();
250} 315}
251arch_initcall(at91_pm_init);
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 20018779bae7..556151e85ec4 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -17,15 +17,6 @@
17#include <mach/hardware.h> 17#include <mach/hardware.h>
18#include <mach/at91_ramc.h> 18#include <mach/at91_ramc.h>
19 19
20
21#ifdef CONFIG_SOC_AT91SAM9263
22/*
23 * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
24 * handle those cases both here and in the Suspend-To-RAM support.
25 */
26#warning Assuming EB1 SDRAM controller is *NOT* used
27#endif
28
29/* 20/*
30 * When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master 21 * When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master
31 * clock during suspend by adjusting its prescalar and divisor. 22 * clock during suspend by adjusting its prescalar and divisor.
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index 3d775d08de08..b7c64ca7107f 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -25,17 +25,5 @@
25 * AT91SAM9x5 processor initialization 25 * AT91SAM9x5 processor initialization
26 * -------------------------------------------------------------------- */ 26 * -------------------------------------------------------------------- */
27 27
28static void __init sama5d3_map_io(void)
29{
30 at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE);
31}
32
33static void __init sama5d3_initialize(void)
34{
35 at91_sysirq_mask_rtc(SAMA5D3_BASE_RTC);
36}
37
38AT91_SOC_START(sama5d3) 28AT91_SOC_START(sama5d3)
39 .map_io = sama5d3_map_io,
40 .init = sama5d3_initialize,
41AT91_SOC_END 29AT91_SOC_END
diff --git a/arch/arm/mach-at91/sama5d4.c b/arch/arm/mach-at91/sama5d4.c
index 7638509639f4..fa127fb79221 100644
--- a/arch/arm/mach-at91/sama5d4.c
+++ b/arch/arm/mach-at91/sama5d4.c
@@ -56,7 +56,6 @@ static struct map_desc at91_io_desc[] __initdata = {
56static void __init sama5d4_map_io(void) 56static void __init sama5d4_map_io(void)
57{ 57{
58 iotable_init(at91_io_desc, ARRAY_SIZE(at91_io_desc)); 58 iotable_init(at91_io_desc, ARRAY_SIZE(at91_io_desc));
59 at91_init_sram(0, SAMA5D4_NS_SRAM_BASE, SAMA5D4_NS_SRAM_SIZE);
60} 59}
61 60
62AT91_SOC_START(sama5d4) 61AT91_SOC_START(sama5d4)
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index ce25e85720fb..4c184285d38f 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -31,40 +31,9 @@ struct at91_init_soc __initdata at91_boot_soc;
31struct at91_socinfo at91_soc_initdata; 31struct at91_socinfo at91_soc_initdata;
32EXPORT_SYMBOL(at91_soc_initdata); 32EXPORT_SYMBOL(at91_soc_initdata);
33 33
34void __init at91rm9200_set_type(int type)
35{
36 if (type == ARCH_REVISON_9200_PQFP)
37 at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP;
38 else
39 at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
40
41 pr_info("filled in soc subtype: %s\n",
42 at91_get_soc_subtype(&at91_soc_initdata));
43}
44
45void __iomem *at91_ramc_base[2]; 34void __iomem *at91_ramc_base[2];
46EXPORT_SYMBOL_GPL(at91_ramc_base); 35EXPORT_SYMBOL_GPL(at91_ramc_base);
47 36
48static struct map_desc sram_desc[2] __initdata;
49
50void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
51{
52 struct map_desc *desc = &sram_desc[bank];
53
54 desc->virtual = (unsigned long)AT91_IO_VIRT_BASE - length;
55 if (bank > 0)
56 desc->virtual -= sram_desc[bank - 1].length;
57
58 desc->pfn = __phys_to_pfn(base);
59 desc->length = length;
60 desc->type = MT_MEMORY_RWX_NONCACHED;
61
62 pr_info("sram at 0x%lx of 0x%x mapped at 0x%lx\n",
63 base, length, desc->virtual);
64
65 iotable_init(desc, 1);
66}
67
68static struct map_desc at91_io_desc __initdata __maybe_unused = { 37static struct map_desc at91_io_desc __initdata __maybe_unused = {
69 .virtual = (unsigned long)AT91_VA_BASE_SYS, 38 .virtual = (unsigned long)AT91_VA_BASE_SYS,
70 .pfn = __phys_to_pfn(AT91_BASE_SYS), 39 .pfn = __phys_to_pfn(AT91_BASE_SYS),
@@ -429,13 +398,6 @@ static void at91_dt_ramc(void)
429 at91_pm_set_standby(standby); 398 at91_pm_set_standby(standby);
430} 399}
431 400
432void __init at91rm9200_dt_initialize(void)
433{
434 at91_dt_ramc();
435
436 at91_boot_soc.init();
437}
438
439void __init at91_dt_initialize(void) 401void __init at91_dt_initialize(void)
440{ 402{
441 at91_dt_ramc(); 403 at91_dt_ramc();
diff --git a/arch/arm/mach-at91/sysirq_mask.c b/arch/arm/mach-at91/sysirq_mask.c
deleted file mode 100644
index f8bc3511a8c8..000000000000
--- a/arch/arm/mach-at91/sysirq_mask.c
+++ /dev/null
@@ -1,75 +0,0 @@
1/*
2 * sysirq_mask.c - System-interrupt masking
3 *
4 * Copyright (C) 2013 Johan Hovold <jhovold@gmail.com>
5 *
6 * Functions to disable system interrupts from backup-powered peripherals.
7 *
8 * The RTC and RTT-peripherals are generally powered by backup power (VDDBU)
9 * and are not reset on wake-up, user, watchdog or software reset. This means
10 * that their interrupts may be enabled during early boot (e.g. after a user
11 * reset).
12 *
13 * As the RTC and RTT share the system-interrupt line with the PIT, an
14 * interrupt occurring before a handler has been installed would lead to the
15 * system interrupt being disabled and prevent the system from booting.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 */
22
23#include <linux/io.h>
24#include <mach/at91_rtt.h>
25
26#include "generic.h"
27
28#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */
29#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */
30#define AT91_RTC_IRQ_MASK 0x1f /* Available IRQs mask */
31
32void __init at91_sysirq_mask_rtc(u32 rtc_base)
33{
34 void __iomem *base;
35
36 base = ioremap(rtc_base, 64);
37 if (!base)
38 return;
39
40 /*
41 * sam9x5 SoCs have the following errata:
42 * "RTC: Interrupt Mask Register cannot be used
43 * Interrupt Mask Register read always returns 0."
44 *
45 * Hence we're not relying on IMR values to disable
46 * interrupts.
47 */
48 writel_relaxed(AT91_RTC_IRQ_MASK, base + AT91_RTC_IDR);
49 (void)readl_relaxed(base + AT91_RTC_IMR); /* flush */
50
51 iounmap(base);
52}
53
54void __init at91_sysirq_mask_rtt(u32 rtt_base)
55{
56 void __iomem *base;
57 void __iomem *reg;
58 u32 mode;
59
60 base = ioremap(rtt_base, 16);
61 if (!base)
62 return;
63
64 reg = base + AT91_RTT_MR;
65
66 mode = readl_relaxed(reg);
67 if (mode & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)) {
68 pr_info("AT91: Disabling rtt irq\n");
69 mode &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
70 writel_relaxed(mode, reg);
71 (void)readl_relaxed(reg); /* flush */
72 }
73
74 iounmap(base);
75}
diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c
index 386999b4f8eb..f07c8152e5cc 100644
--- a/drivers/clk/at91/pmc.c
+++ b/drivers/clk/at91/pmc.c
@@ -27,6 +27,15 @@
27void __iomem *at91_pmc_base; 27void __iomem *at91_pmc_base;
28EXPORT_SYMBOL_GPL(at91_pmc_base); 28EXPORT_SYMBOL_GPL(at91_pmc_base);
29 29
30void at91rm9200_idle(void)
31{
32 /*
33 * Disable the processor clock. The processor will be automatically
34 * re-enabled by an interrupt or by a reset.
35 */
36 at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
37}
38
30void at91sam9_idle(void) 39void at91sam9_idle(void)
31{ 40{
32 at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK); 41 at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index f15cddfeb897..f211dfb7b913 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1141,34 +1141,6 @@ config RTC_DRV_AT91SAM9
1141 probably want to use the real RTC block instead of the "RTT as an 1141 probably want to use the real RTC block instead of the "RTT as an
1142 RTC" driver. 1142 RTC" driver.
1143 1143
1144config RTC_DRV_AT91SAM9_RTT
1145 int
1146 range 0 1
1147 default 0
1148 depends on RTC_DRV_AT91SAM9
1149 help
1150 This option is only relevant for legacy board support and
1151 won't be used when booting a DT board.
1152
1153 More than one RTT module is available. You can choose which
1154 one will be used as an RTC. The default of zero is normally
1155 OK to use, though some systems use that for non-RTC purposes.
1156
1157config RTC_DRV_AT91SAM9_GPBR
1158 int
1159 range 0 3
1160 default 0
1161 prompt "Backup Register Number"
1162 depends on RTC_DRV_AT91SAM9
1163 help
1164 This option is only relevant for legacy board support and
1165 won't be used when booting a DT board.
1166
1167 The RTC driver needs to use one of the General Purpose Backup
1168 Registers (GPBRs) as well as the RTT. You can choose which one
1169 will be used. The default of zero is normally OK to use, but
1170 on some systems other software needs to use that register.
1171
1172config RTC_DRV_AU1XXX 1144config RTC_DRV_AU1XXX
1173 tristate "Au1xxx Counter0 RTC support" 1145 tristate "Au1xxx Counter0 RTC support"
1174 depends on MIPS_ALCHEMY 1146 depends on MIPS_ALCHEMY
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-20 12:49:22 -0400