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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2012-09-11 08:27:22 -0400
committerJason Cooper <jason@lakedaemon.net>2012-09-21 14:04:05 -0400
commit9758e70a448f92fb850712650a0394d8532c17ff (patch)
tree79b1634dddc4de7ff8cb5fc758582a7422f595a7
parent3904a39321422d424f790d18a4746b99e1aed0e9 (diff)
arm: mach-mvebu: use IOMEM() for base address definitions
We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-mvebu code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r--arch/arm/mach-mvebu/armada-370-xp.c2
-rw-r--r--arch/arm/mach-mvebu/include/mach/armada-370-xp.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index 4ef923b032ec..dfe635b48136 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -25,7 +25,7 @@
25 25
26static struct map_desc armada_370_xp_io_desc[] __initdata = { 26static struct map_desc armada_370_xp_io_desc[] __initdata = {
27 { 27 {
28 .virtual = ARMADA_370_XP_REGS_VIRT_BASE, 28 .virtual = (unsigned long) ARMADA_370_XP_REGS_VIRT_BASE,
29 .pfn = __phys_to_pfn(ARMADA_370_XP_REGS_PHYS_BASE), 29 .pfn = __phys_to_pfn(ARMADA_370_XP_REGS_PHYS_BASE),
30 .length = ARMADA_370_XP_REGS_SIZE, 30 .length = ARMADA_370_XP_REGS_SIZE,
31 .type = MT_DEVICE, 31 .type = MT_DEVICE,
diff --git a/arch/arm/mach-mvebu/include/mach/armada-370-xp.h b/arch/arm/mach-mvebu/include/mach/armada-370-xp.h
index 25f0ca8d7820..aac9bebc6b03 100644
--- a/arch/arm/mach-mvebu/include/mach/armada-370-xp.h
+++ b/arch/arm/mach-mvebu/include/mach/armada-370-xp.h
@@ -16,7 +16,7 @@
16#define __MACH_ARMADA_370_XP_H 16#define __MACH_ARMADA_370_XP_H
17 17
18#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000 18#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000
19#define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000 19#define ARMADA_370_XP_REGS_VIRT_BASE IOMEM(0xfeb00000)
20#define ARMADA_370_XP_REGS_SIZE SZ_1M 20#define ARMADA_370_XP_REGS_SIZE SZ_1M
21 21
22#endif /* __MACH_ARMADA_370_XP_H */ 22#endif /* __MACH_ARMADA_370_XP_H */