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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-04-04 06:00:25 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-04-04 06:00:25 -0400
commit97498bb5764b8ddb3e14f7699c50e6bacbc4581c (patch)
tree5e515025c7a94399771344a55c48abeb15878651
parentc4151700bbf661d0f73c1beffb35b2039f5306fd (diff)
Revert "Staging: sm750fb: Fix C99 Comments"
This reverts commit 6ad6b5ed3e2472b399b567a2f036006bf25df467. It added a file that should not be in the kernel source tree. Cc: Amitoj Kaur Chawla <amitoj1606@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/staging/sm750fb/ddk750_chip.c10
-rw-r--r--ret.ou0
2 files changed, 8 insertions, 2 deletions
diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c
index 9b5bb7eba279..7b28328c92f8 100644
--- a/drivers/staging/sm750fb/ddk750_chip.c
+++ b/drivers/staging/sm750fb/ddk750_chip.c
@@ -17,7 +17,7 @@ logical_chip_type_t getChipType(void)
17 char physicalRev; 17 char physicalRev;
18 logical_chip_type_t chip; 18 logical_chip_type_t chip;
19 19
20 physicalID = devId750; /* either 0x718 or 0x750 */ 20 physicalID = devId750;//either 0x718 or 0x750
21 physicalRev = revId750; 21 physicalRev = revId750;
22 22
23 if (physicalID == 0x718) 23 if (physicalID == 0x718)
@@ -257,7 +257,7 @@ int ddk750_initHw(initchip_param_t *pInitParam)
257 257
258 unsigned int ulReg; 258 unsigned int ulReg;
259#if 0 259#if 0
260 /* move the code to map regiter function. */ 260 //move the code to map regiter function.
261 if (getChipType() == SM718) { 261 if (getChipType() == SM718) {
262 /* turn on big endian bit*/ 262 /* turn on big endian bit*/
263 ulReg = PEEK32(0x74); 263 ulReg = PEEK32(0x74);
@@ -488,6 +488,7 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
488 } 488 }
489 } 489 }
490 490
491 //printk("Finally: pll->n[%lu],m[%lu],od[%lu],pod[%lu]\n",pll->N,pll->M,pll->OD,pll->POD);
491 return ret; 492 return ret;
492} 493}
493 494
@@ -579,9 +580,14 @@ pll_value_t *pPLL /* Structure to hold the value to be set in PLL */
579 } 580 }
580 581
581 /* Restore input frequency from Khz to hz unit */ 582 /* Restore input frequency from Khz to hz unit */
583// pPLL->inputFreq *= 1000;
582 ulRequestClk *= 1000; 584 ulRequestClk *= 1000;
583 pPLL->inputFreq = DEFAULT_INPUT_CLOCK; /* Default reference clock */ 585 pPLL->inputFreq = DEFAULT_INPUT_CLOCK; /* Default reference clock */
584 586
587 /* Output debug information */
588 //DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Requested Frequency = %d\n", ulRequestClk));
589 //DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Input CLK = %dHz, M=%d, N=%d, OD=%d, POD=%d\n", pPLL->inputFreq, pPLL->M, pPLL->N, pPLL->OD, pPLL->POD));
590
585 /* Return actual frequency that the PLL can set */ 591 /* Return actual frequency that the PLL can set */
586 ret = calcPLL(pPLL); 592 ret = calcPLL(pPLL);
587 return ret; 593 return ret;
diff --git a/ret.ou b/ret.ou
deleted file mode 100644
index e69de29bb2d1..000000000000
--- a/ret.ou
+++ /dev/null