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authorBen Skeggs <bskeggs@redhat.com>2015-01-14 00:35:00 -0500
committerBen Skeggs <bskeggs@redhat.com>2015-01-21 21:18:06 -0500
commit9719047b4d985ca7a46819956047cca04213d63e (patch)
treeb6d260c4c32bfab742eb34a4bee1c94b113758ea
parenta56866a9809d276e3bf9aee27466cee385d2b5e6 (diff)
drm/nouveau/device: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/device.h2
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/core/device.h14
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/core/os.h2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drm.c4
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/Kbuild4
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.c9
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.h9
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/base.c249
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c66
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c (renamed from drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c)24
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c (renamed from drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c)18
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c8
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c8
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c20
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c12
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c14
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c36
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c32
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h14
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h3
20 files changed, 280 insertions, 268 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvif/device.h b/drivers/gpu/drm/nouveau/include/nvif/device.h
index 1d186e21d123..1fafcac299d3 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/device.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/device.h
@@ -50,7 +50,7 @@ void nvif_device_ref(struct nvif_device *, struct nvif_device **);
50#define nvxx_wait_cb(a,b,c) nv_wait_cb(nvxx_timer(a), (b), (c)) 50#define nvxx_wait_cb(a,b,c) nv_wait_cb(nvxx_timer(a), (b), (c))
51#define nvxx_therm(a) nouveau_therm(nvxx_device(a)) 51#define nvxx_therm(a) nouveau_therm(nvxx_device(a))
52 52
53#include <engine/device.h> 53#include <core/device.h>
54#include <engine/fifo.h> 54#include <engine/fifo.h>
55#include <engine/gr.h> 55#include <engine/gr.h>
56#include <engine/sw.h> 56#include <engine/sw.h>
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
index 9c2f13694a57..333db33a162c 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
@@ -84,4 +84,18 @@ nv_device_resource_len(struct nvkm_device *device, unsigned int bar);
84 84
85int 85int
86nv_device_get_irq(struct nvkm_device *device, bool stall); 86nv_device_get_irq(struct nvkm_device *device, bool stall);
87
88struct platform_device;
89
90enum nv_bus_type {
91 NVKM_BUS_PCI,
92 NVKM_BUS_PLATFORM,
93};
94
95#define nvkm_device_create(p,t,n,s,c,d,u) \
96 nvkm_device_create_((void *)(p), (t), (n), (s), (c), (d), \
97 sizeof(**u), (void **)u)
98int nvkm_device_create_(void *, enum nv_bus_type type, u64 name,
99 const char *sname, const char *cfg, const char *dbg,
100 int, void **);
87#endif 101#endif
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/os.h b/drivers/gpu/drm/nouveau/include/nvkm/core/os.h
index 0b35ba672265..537db3a512c8 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/os.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/os.h
@@ -253,5 +253,7 @@
253#define nouveau_gr nvkm_gr 253#define nouveau_gr nvkm_gr
254#define nouveau_sw nvkm_sw 254#define nouveau_sw nvkm_sw
255#define nouveau_sw_chan nvkm_sw_chan 255#define nouveau_sw_chan nvkm_sw_chan
256#define nouveau_device_create nvkm_device_create
257#define nouveau_device_create_ nvkm_device_create_
256 258
257#endif 259#endif
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c
index 1de82ec6c276..f4ac7b5af85e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
@@ -318,7 +318,7 @@ static int nouveau_drm_probe(struct pci_dev *pdev,
318 remove_conflicting_framebuffers(aper, "nouveaufb", boot); 318 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
319 kfree(aper); 319 kfree(aper);
320 320
321 ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI, 321 ret = nouveau_device_create(pdev, NVKM_BUS_PCI,
322 nouveau_pci_name(pdev), pci_name(pdev), 322 nouveau_pci_name(pdev), pci_name(pdev),
323 nouveau_config, nouveau_debug, &device); 323 nouveau_config, nouveau_debug, &device);
324 if (ret) 324 if (ret)
@@ -1056,7 +1056,7 @@ nouveau_platform_device_create_(struct platform_device *pdev, int size,
1056 struct drm_device *drm; 1056 struct drm_device *drm;
1057 int err; 1057 int err;
1058 1058
1059 err = nouveau_device_create_(pdev, NOUVEAU_BUS_PLATFORM, 1059 err = nouveau_device_create_(pdev, NVKM_BUS_PLATFORM,
1060 nouveau_platform_name(pdev), 1060 nouveau_platform_name(pdev),
1061 dev_name(&pdev->dev), nouveau_config, 1061 dev_name(&pdev->dev), nouveau_config,
1062 nouveau_debug, size, pobject); 1062 nouveau_debug, size, pobject);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/device/Kbuild
index 77d06d46eff4..de1bf092b2b2 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/Kbuild
@@ -7,6 +7,6 @@ nvkm-y += nvkm/engine/device/nv20.o
7nvkm-y += nvkm/engine/device/nv30.o 7nvkm-y += nvkm/engine/device/nv30.o
8nvkm-y += nvkm/engine/device/nv40.o 8nvkm-y += nvkm/engine/device/nv40.o
9nvkm-y += nvkm/engine/device/nv50.o 9nvkm-y += nvkm/engine/device/nv50.o
10nvkm-y += nvkm/engine/device/nvc0.o 10nvkm-y += nvkm/engine/device/gf100.o
11nvkm-y += nvkm/engine/device/nve0.o 11nvkm-y += nvkm/engine/device/gk104.o
12nvkm-y += nvkm/engine/device/gm100.o 12nvkm-y += nvkm/engine/device/gm100.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.c
index 4dbf0ba89e5c..f42706e1d5db 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.c
@@ -21,14 +21,15 @@
21 * 21 *
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24
25#include "acpi.h" 24#include "acpi.h"
26 25
26#include <core/device.h>
27
27#ifdef CONFIG_ACPI 28#ifdef CONFIG_ACPI
28static int 29static int
29nvkm_acpi_ntfy(struct notifier_block *nb, unsigned long val, void *data) 30nvkm_acpi_ntfy(struct notifier_block *nb, unsigned long val, void *data)
30{ 31{
31 struct nouveau_device *device = 32 struct nvkm_device *device =
32 container_of(nb, typeof(*device), acpi.nb); 33 container_of(nb, typeof(*device), acpi.nb);
33 struct acpi_bus_event *info = data; 34 struct acpi_bus_event *info = data;
34 35
@@ -40,7 +41,7 @@ nvkm_acpi_ntfy(struct notifier_block *nb, unsigned long val, void *data)
40#endif 41#endif
41 42
42int 43int
43nvkm_acpi_fini(struct nouveau_device *device, bool suspend) 44nvkm_acpi_fini(struct nvkm_device *device, bool suspend)
44{ 45{
45#ifdef CONFIG_ACPI 46#ifdef CONFIG_ACPI
46 unregister_acpi_notifier(&device->acpi.nb); 47 unregister_acpi_notifier(&device->acpi.nb);
@@ -49,7 +50,7 @@ nvkm_acpi_fini(struct nouveau_device *device, bool suspend)
49} 50}
50 51
51int 52int
52nvkm_acpi_init(struct nouveau_device *device) 53nvkm_acpi_init(struct nvkm_device *device)
53{ 54{
54#ifdef CONFIG_ACPI 55#ifdef CONFIG_ACPI
55 device->acpi.nb.notifier_call = nvkm_acpi_ntfy; 56 device->acpi.nb.notifier_call = nvkm_acpi_ntfy;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.h b/drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.h
index cc49f4f568cd..82dd359ddfa4 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.h
@@ -1,9 +1,8 @@
1#ifndef __NVKM_DEVICE_ACPI_H__ 1#ifndef __NVKM_DEVICE_ACPI_H__
2#define __NVKM_DEVICE_ACPI_H__ 2#define __NVKM_DEVICE_ACPI_H__
3#include <core/os.h>
4struct nvkm_device;
3 5
4#include <engine/device.h> 6int nvkm_acpi_init(struct nvkm_device *);
5 7int nvkm_acpi_fini(struct nvkm_device *, bool);
6int nvkm_acpi_init(struct nouveau_device *);
7int nvkm_acpi_fini(struct nouveau_device *, bool);
8
9#endif 8#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index ae2ad8b4e5df..29bd539af183 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -21,29 +21,27 @@
21 * 21 *
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24#include "priv.h"
25#include "acpi.h"
24 26
25#include <core/notify.h>
26#include <core/object.h>
27#include <core/device.h>
28#include <core/client.h> 27#include <core/client.h>
29#include <core/option.h> 28#include <core/option.h>
30#include <nvif/unpack.h> 29#include <core/notify.h>
31#include <nvif/class.h> 30#include <core/parent.h>
32
33#include <subdev/bios.h> 31#include <subdev/bios.h>
34#include <subdev/fb.h> 32#include <subdev/fb.h>
35#include <subdev/instmem.h> 33#include <subdev/instmem.h>
36 34
37#include "priv.h" 35#include <nvif/class.h>
38#include "acpi.h" 36#include <nvif/unpack.h>
39 37
40static DEFINE_MUTEX(nv_devices_mutex); 38static DEFINE_MUTEX(nv_devices_mutex);
41static LIST_HEAD(nv_devices); 39static LIST_HEAD(nv_devices);
42 40
43struct nouveau_device * 41struct nvkm_device *
44nouveau_device_find(u64 name) 42nvkm_device_find(u64 name)
45{ 43{
46 struct nouveau_device *device, *match = NULL; 44 struct nvkm_device *device, *match = NULL;
47 mutex_lock(&nv_devices_mutex); 45 mutex_lock(&nv_devices_mutex);
48 list_for_each_entry(device, &nv_devices, head) { 46 list_for_each_entry(device, &nv_devices, head) {
49 if (device->handle == name) { 47 if (device->handle == name) {
@@ -56,9 +54,9 @@ nouveau_device_find(u64 name)
56} 54}
57 55
58int 56int
59nouveau_device_list(u64 *name, int size) 57nvkm_device_list(u64 *name, int size)
60{ 58{
61 struct nouveau_device *device; 59 struct nvkm_device *device;
62 int nr = 0; 60 int nr = 0;
63 mutex_lock(&nv_devices_mutex); 61 mutex_lock(&nv_devices_mutex);
64 list_for_each_entry(device, &nv_devices, head) { 62 list_for_each_entry(device, &nv_devices, head) {
@@ -70,20 +68,20 @@ nouveau_device_list(u64 *name, int size)
70} 68}
71 69
72/****************************************************************************** 70/******************************************************************************
73 * nouveau_devobj (0x0080): class implementation 71 * nvkm_devobj (0x0080): class implementation
74 *****************************************************************************/ 72 *****************************************************************************/
75 73
76struct nouveau_devobj { 74struct nvkm_devobj {
77 struct nouveau_parent base; 75 struct nvkm_parent base;
78 struct nouveau_object *subdev[NVDEV_SUBDEV_NR]; 76 struct nvkm_object *subdev[NVDEV_SUBDEV_NR];
79}; 77};
80 78
81static int 79static int
82nouveau_devobj_info(struct nouveau_object *object, void *data, u32 size) 80nvkm_devobj_info(struct nvkm_object *object, void *data, u32 size)
83{ 81{
84 struct nouveau_device *device = nv_device(object); 82 struct nvkm_device *device = nv_device(object);
85 struct nouveau_fb *pfb = nouveau_fb(device); 83 struct nvkm_fb *pfb = nvkm_fb(device);
86 struct nouveau_instmem *imem = nouveau_instmem(device); 84 struct nvkm_instmem *imem = nvkm_instmem(device);
87 union { 85 union {
88 struct nv_device_info_v0 v0; 86 struct nv_device_info_v0 v0;
89 } *args = data; 87 } *args = data;
@@ -148,12 +146,11 @@ nouveau_devobj_info(struct nouveau_object *object, void *data, u32 size)
148} 146}
149 147
150static int 148static int
151nouveau_devobj_mthd(struct nouveau_object *object, u32 mthd, 149nvkm_devobj_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size)
152 void *data, u32 size)
153{ 150{
154 switch (mthd) { 151 switch (mthd) {
155 case NV_DEVICE_V0_INFO: 152 case NV_DEVICE_V0_INFO:
156 return nouveau_devobj_info(object, data, size); 153 return nvkm_devobj_info(object, data, size);
157 default: 154 default:
158 break; 155 break;
159 } 156 }
@@ -161,45 +158,45 @@ nouveau_devobj_mthd(struct nouveau_object *object, u32 mthd,
161} 158}
162 159
163static u8 160static u8
164nouveau_devobj_rd08(struct nouveau_object *object, u64 addr) 161nvkm_devobj_rd08(struct nvkm_object *object, u64 addr)
165{ 162{
166 return nv_rd08(object->engine, addr); 163 return nv_rd08(object->engine, addr);
167} 164}
168 165
169static u16 166static u16
170nouveau_devobj_rd16(struct nouveau_object *object, u64 addr) 167nvkm_devobj_rd16(struct nvkm_object *object, u64 addr)
171{ 168{
172 return nv_rd16(object->engine, addr); 169 return nv_rd16(object->engine, addr);
173} 170}
174 171
175static u32 172static u32
176nouveau_devobj_rd32(struct nouveau_object *object, u64 addr) 173nvkm_devobj_rd32(struct nvkm_object *object, u64 addr)
177{ 174{
178 return nv_rd32(object->engine, addr); 175 return nv_rd32(object->engine, addr);
179} 176}
180 177
181static void 178static void
182nouveau_devobj_wr08(struct nouveau_object *object, u64 addr, u8 data) 179nvkm_devobj_wr08(struct nvkm_object *object, u64 addr, u8 data)
183{ 180{
184 nv_wr08(object->engine, addr, data); 181 nv_wr08(object->engine, addr, data);
185} 182}
186 183
187static void 184static void
188nouveau_devobj_wr16(struct nouveau_object *object, u64 addr, u16 data) 185nvkm_devobj_wr16(struct nvkm_object *object, u64 addr, u16 data)
189{ 186{
190 nv_wr16(object->engine, addr, data); 187 nv_wr16(object->engine, addr, data);
191} 188}
192 189
193static void 190static void
194nouveau_devobj_wr32(struct nouveau_object *object, u64 addr, u32 data) 191nvkm_devobj_wr32(struct nvkm_object *object, u64 addr, u32 data)
195{ 192{
196 nv_wr32(object->engine, addr, data); 193 nv_wr32(object->engine, addr, data);
197} 194}
198 195
199static int 196static int
200nouveau_devobj_map(struct nouveau_object *object, u64 *addr, u32 *size) 197nvkm_devobj_map(struct nvkm_object *object, u64 *addr, u32 *size)
201{ 198{
202 struct nouveau_device *device = nv_device(object); 199 struct nvkm_device *device = nv_device(object);
203 *addr = nv_device_resource_start(device, 0); 200 *addr = nv_device_resource_start(device, 0);
204 *size = nv_device_resource_len(device, 0); 201 *size = nv_device_resource_len(device, 0);
205 return 0; 202 return 0;
@@ -248,47 +245,46 @@ static const u64 disable_map[] = {
248}; 245};
249 246
250static void 247static void
251nouveau_devobj_dtor(struct nouveau_object *object) 248nvkm_devobj_dtor(struct nvkm_object *object)
252{ 249{
253 struct nouveau_devobj *devobj = (void *)object; 250 struct nvkm_devobj *devobj = (void *)object;
254 int i; 251 int i;
255 252
256 for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) 253 for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--)
257 nouveau_object_ref(NULL, &devobj->subdev[i]); 254 nvkm_object_ref(NULL, &devobj->subdev[i]);
258 255
259 nouveau_parent_destroy(&devobj->base); 256 nvkm_parent_destroy(&devobj->base);
260} 257}
261 258
262static struct nouveau_oclass 259static struct nvkm_oclass
263nouveau_devobj_oclass_super = { 260nvkm_devobj_oclass_super = {
264 .handle = NV_DEVICE, 261 .handle = NV_DEVICE,
265 .ofuncs = &(struct nouveau_ofuncs) { 262 .ofuncs = &(struct nvkm_ofuncs) {
266 .dtor = nouveau_devobj_dtor, 263 .dtor = nvkm_devobj_dtor,
267 .init = _nouveau_parent_init, 264 .init = _nvkm_parent_init,
268 .fini = _nouveau_parent_fini, 265 .fini = _nvkm_parent_fini,
269 .mthd = nouveau_devobj_mthd, 266 .mthd = nvkm_devobj_mthd,
270 .map = nouveau_devobj_map, 267 .map = nvkm_devobj_map,
271 .rd08 = nouveau_devobj_rd08, 268 .rd08 = nvkm_devobj_rd08,
272 .rd16 = nouveau_devobj_rd16, 269 .rd16 = nvkm_devobj_rd16,
273 .rd32 = nouveau_devobj_rd32, 270 .rd32 = nvkm_devobj_rd32,
274 .wr08 = nouveau_devobj_wr08, 271 .wr08 = nvkm_devobj_wr08,
275 .wr16 = nouveau_devobj_wr16, 272 .wr16 = nvkm_devobj_wr16,
276 .wr32 = nouveau_devobj_wr32, 273 .wr32 = nvkm_devobj_wr32,
277 } 274 }
278}; 275};
279 276
280static int 277static int
281nouveau_devobj_ctor(struct nouveau_object *parent, 278nvkm_devobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
282 struct nouveau_object *engine, 279 struct nvkm_oclass *oclass, void *data, u32 size,
283 struct nouveau_oclass *oclass, void *data, u32 size, 280 struct nvkm_object **pobject)
284 struct nouveau_object **pobject)
285{ 281{
286 union { 282 union {
287 struct nv_device_v0 v0; 283 struct nv_device_v0 v0;
288 } *args = data; 284 } *args = data;
289 struct nouveau_client *client = nv_client(parent); 285 struct nvkm_client *client = nv_client(parent);
290 struct nouveau_device *device; 286 struct nvkm_device *device;
291 struct nouveau_devobj *devobj; 287 struct nvkm_devobj *devobj;
292 u32 boot0, strap; 288 u32 boot0, strap;
293 u64 disable, mmio_base, mmio_size; 289 u64 disable, mmio_base, mmio_size;
294 void __iomem *map; 290 void __iomem *map;
@@ -305,22 +301,22 @@ nouveau_devobj_ctor(struct nouveau_object *parent,
305 301
306 /* give priviledged clients register access */ 302 /* give priviledged clients register access */
307 if (client->super) 303 if (client->super)
308 oclass = &nouveau_devobj_oclass_super; 304 oclass = &nvkm_devobj_oclass_super;
309 305
310 /* find the device subdev that matches what the client requested */ 306 /* find the device subdev that matches what the client requested */
311 device = nv_device(client->device); 307 device = nv_device(client->device);
312 if (args->v0.device != ~0) { 308 if (args->v0.device != ~0) {
313 device = nouveau_device_find(args->v0.device); 309 device = nvkm_device_find(args->v0.device);
314 if (!device) 310 if (!device)
315 return -ENODEV; 311 return -ENODEV;
316 } 312 }
317 313
318 ret = nouveau_parent_create(parent, nv_object(device), oclass, 0, 314 ret = nvkm_parent_create(parent, nv_object(device), oclass, 0,
319 nouveau_control_oclass, 315 nvkm_control_oclass,
320 (1ULL << NVDEV_ENGINE_DMAOBJ) | 316 (1ULL << NVDEV_ENGINE_DMAOBJ) |
321 (1ULL << NVDEV_ENGINE_FIFO) | 317 (1ULL << NVDEV_ENGINE_FIFO) |
322 (1ULL << NVDEV_ENGINE_DISP) | 318 (1ULL << NVDEV_ENGINE_DISP) |
323 (1ULL << NVDEV_ENGINE_PM ), &devobj); 319 (1ULL << NVDEV_ENGINE_PM), &devobj);
324 *pobject = nv_object(devobj); 320 *pobject = nv_object(devobj);
325 if (ret) 321 if (ret)
326 return ret; 322 return ret;
@@ -403,8 +399,8 @@ nouveau_devobj_ctor(struct nouveau_object *parent,
403 case NV_30: ret = nv30_identify(device); break; 399 case NV_30: ret = nv30_identify(device); break;
404 case NV_40: ret = nv40_identify(device); break; 400 case NV_40: ret = nv40_identify(device); break;
405 case NV_50: ret = nv50_identify(device); break; 401 case NV_50: ret = nv50_identify(device); break;
406 case NV_C0: ret = nvc0_identify(device); break; 402 case NV_C0: ret = gf100_identify(device); break;
407 case NV_E0: ret = nve0_identify(device); break; 403 case NV_E0: ret = gk104_identify(device); break;
408 case GM100: ret = gm100_identify(device); break; 404 case GM100: ret = gm100_identify(device); break;
409 default: 405 default:
410 ret = -EINVAL; 406 ret = -EINVAL;
@@ -439,7 +435,7 @@ nouveau_devobj_ctor(struct nouveau_object *parent,
439 } else 435 } else
440 if ( (args->v0.disable & NV_DEVICE_V0_DISABLE_IDENTIFY)) { 436 if ( (args->v0.disable & NV_DEVICE_V0_DISABLE_IDENTIFY)) {
441 device->cname = "NULL"; 437 device->cname = "NULL";
442 device->oclass[NVDEV_SUBDEV_VBIOS] = &nouveau_bios_oclass; 438 device->oclass[NVDEV_SUBDEV_VBIOS] = &nvkm_bios_oclass;
443 } 439 }
444 440
445 if (!(args->v0.disable & NV_DEVICE_V0_DISABLE_MMIO) && 441 if (!(args->v0.disable & NV_DEVICE_V0_DISABLE_MMIO) &&
@@ -457,14 +453,12 @@ nouveau_devobj_ctor(struct nouveau_object *parent,
457 continue; 453 continue;
458 454
459 if (device->subdev[i]) { 455 if (device->subdev[i]) {
460 nouveau_object_ref(device->subdev[i], 456 nvkm_object_ref(device->subdev[i], &devobj->subdev[i]);
461 &devobj->subdev[i]);
462 continue; 457 continue;
463 } 458 }
464 459
465 ret = nouveau_object_ctor(nv_object(device), NULL, 460 ret = nvkm_object_ctor(nv_object(device), NULL, oclass,
466 oclass, NULL, i, 461 NULL, i, &devobj->subdev[i]);
467 &devobj->subdev[i]);
468 if (ret == -ENODEV) 462 if (ret == -ENODEV)
469 continue; 463 continue;
470 if (ret) 464 if (ret)
@@ -482,15 +476,15 @@ nouveau_devobj_ctor(struct nouveau_object *parent,
482 * subdev in turn as they're created. 476 * subdev in turn as they're created.
483 */ 477 */
484 while (i >= NVDEV_SUBDEV_DEVINIT_LAST && c <= i) { 478 while (i >= NVDEV_SUBDEV_DEVINIT_LAST && c <= i) {
485 struct nouveau_object *subdev = devobj->subdev[c++]; 479 struct nvkm_object *subdev = devobj->subdev[c++];
486 if (subdev && !nv_iclass(subdev, NV_ENGINE_CLASS)) { 480 if (subdev && !nv_iclass(subdev, NV_ENGINE_CLASS)) {
487 ret = nouveau_object_inc(subdev); 481 ret = nvkm_object_inc(subdev);
488 if (ret) 482 if (ret)
489 return ret; 483 return ret;
490 atomic_dec(&nv_object(device)->usecount); 484 atomic_dec(&nv_object(device)->usecount);
491 } else 485 } else
492 if (subdev) { 486 if (subdev) {
493 nouveau_subdev_reset(subdev); 487 nvkm_subdev_reset(subdev);
494 } 488 }
495 } 489 }
496 } 490 }
@@ -498,23 +492,23 @@ nouveau_devobj_ctor(struct nouveau_object *parent,
498 return 0; 492 return 0;
499} 493}
500 494
501static struct nouveau_ofuncs 495static struct nvkm_ofuncs
502nouveau_devobj_ofuncs = { 496nvkm_devobj_ofuncs = {
503 .ctor = nouveau_devobj_ctor, 497 .ctor = nvkm_devobj_ctor,
504 .dtor = nouveau_devobj_dtor, 498 .dtor = nvkm_devobj_dtor,
505 .init = _nouveau_parent_init, 499 .init = _nvkm_parent_init,
506 .fini = _nouveau_parent_fini, 500 .fini = _nvkm_parent_fini,
507 .mthd = nouveau_devobj_mthd, 501 .mthd = nvkm_devobj_mthd,
508}; 502};
509 503
510/****************************************************************************** 504/******************************************************************************
511 * nouveau_device: engine functions 505 * nvkm_device: engine functions
512 *****************************************************************************/ 506 *****************************************************************************/
513 507
514struct nouveau_device * 508struct nvkm_device *
515nv_device(void *obj) 509nv_device(void *obj)
516{ 510{
517 struct nouveau_object *device = nv_object(obj); 511 struct nvkm_object *device = nv_object(obj);
518 if (device->engine == NULL) { 512 if (device->engine == NULL) {
519 while (device && device->parent) 513 while (device && device->parent)
520 device = device->parent; 514 device = device->parent;
@@ -530,15 +524,15 @@ nv_device(void *obj)
530 return (void *)device; 524 return (void *)device;
531} 525}
532 526
533static struct nouveau_oclass 527static struct nvkm_oclass
534nouveau_device_sclass[] = { 528nvkm_device_sclass[] = {
535 { 0x0080, &nouveau_devobj_ofuncs }, 529 { 0x0080, &nvkm_devobj_ofuncs },
536 {} 530 {}
537}; 531};
538 532
539static int 533static int
540nouveau_device_event_ctor(struct nouveau_object *object, void *data, u32 size, 534nvkm_device_event_ctor(struct nvkm_object *object, void *data, u32 size,
541 struct nvkm_notify *notify) 535 struct nvkm_notify *notify)
542{ 536{
543 if (!WARN_ON(size != 0)) { 537 if (!WARN_ON(size != 0)) {
544 notify->size = 0; 538 notify->size = 0;
@@ -550,21 +544,21 @@ nouveau_device_event_ctor(struct nouveau_object *object, void *data, u32 size,
550} 544}
551 545
552static const struct nvkm_event_func 546static const struct nvkm_event_func
553nouveau_device_event_func = { 547nvkm_device_event_func = {
554 .ctor = nouveau_device_event_ctor, 548 .ctor = nvkm_device_event_ctor,
555}; 549};
556 550
557static int 551static int
558nouveau_device_fini(struct nouveau_object *object, bool suspend) 552nvkm_device_fini(struct nvkm_object *object, bool suspend)
559{ 553{
560 struct nouveau_device *device = (void *)object; 554 struct nvkm_device *device = (void *)object;
561 struct nouveau_object *subdev; 555 struct nvkm_object *subdev;
562 int ret, i; 556 int ret, i;
563 557
564 for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) { 558 for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) {
565 if ((subdev = device->subdev[i])) { 559 if ((subdev = device->subdev[i])) {
566 if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { 560 if (!nv_iclass(subdev, NV_ENGINE_CLASS)) {
567 ret = nouveau_object_dec(subdev, suspend); 561 ret = nvkm_object_dec(subdev, suspend);
568 if (ret && suspend) 562 if (ret && suspend)
569 goto fail; 563 goto fail;
570 } 564 }
@@ -576,7 +570,7 @@ fail:
576 for (; ret && i < NVDEV_SUBDEV_NR; i++) { 570 for (; ret && i < NVDEV_SUBDEV_NR; i++) {
577 if ((subdev = device->subdev[i])) { 571 if ((subdev = device->subdev[i])) {
578 if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { 572 if (!nv_iclass(subdev, NV_ENGINE_CLASS)) {
579 ret = nouveau_object_inc(subdev); 573 ret = nvkm_object_inc(subdev);
580 if (ret) { 574 if (ret) {
581 /* XXX */ 575 /* XXX */
582 } 576 }
@@ -588,10 +582,10 @@ fail:
588} 582}
589 583
590static int 584static int
591nouveau_device_init(struct nouveau_object *object) 585nvkm_device_init(struct nvkm_object *object)
592{ 586{
593 struct nouveau_device *device = (void *)object; 587 struct nvkm_device *device = (void *)object;
594 struct nouveau_object *subdev; 588 struct nvkm_object *subdev;
595 int ret, i = 0; 589 int ret, i = 0;
596 590
597 ret = nvkm_acpi_init(device); 591 ret = nvkm_acpi_init(device);
@@ -601,11 +595,11 @@ nouveau_device_init(struct nouveau_object *object)
601 for (i = 0; i < NVDEV_SUBDEV_NR; i++) { 595 for (i = 0; i < NVDEV_SUBDEV_NR; i++) {
602 if ((subdev = device->subdev[i])) { 596 if ((subdev = device->subdev[i])) {
603 if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { 597 if (!nv_iclass(subdev, NV_ENGINE_CLASS)) {
604 ret = nouveau_object_inc(subdev); 598 ret = nvkm_object_inc(subdev);
605 if (ret) 599 if (ret)
606 goto fail; 600 goto fail;
607 } else { 601 } else {
608 nouveau_subdev_reset(subdev); 602 nvkm_subdev_reset(subdev);
609 } 603 }
610 } 604 }
611 } 605 }
@@ -615,7 +609,7 @@ fail:
615 for (--i; ret && i >= 0; i--) { 609 for (--i; ret && i >= 0; i--) {
616 if ((subdev = device->subdev[i])) { 610 if ((subdev = device->subdev[i])) {
617 if (!nv_iclass(subdev, NV_ENGINE_CLASS)) 611 if (!nv_iclass(subdev, NV_ENGINE_CLASS))
618 nouveau_object_dec(subdev, false); 612 nvkm_object_dec(subdev, false);
619 } 613 }
620 } 614 }
621 615
@@ -625,9 +619,9 @@ fail:
625} 619}
626 620
627static void 621static void
628nouveau_device_dtor(struct nouveau_object *object) 622nvkm_device_dtor(struct nvkm_object *object)
629{ 623{
630 struct nouveau_device *device = (void *)object; 624 struct nvkm_device *device = (void *)object;
631 625
632 nvkm_event_fini(&device->event); 626 nvkm_event_fini(&device->event);
633 627
@@ -638,11 +632,11 @@ nouveau_device_dtor(struct nouveau_object *object)
638 if (nv_subdev(device)->mmio) 632 if (nv_subdev(device)->mmio)
639 iounmap(nv_subdev(device)->mmio); 633 iounmap(nv_subdev(device)->mmio);
640 634
641 nouveau_engine_destroy(&device->engine); 635 nvkm_engine_destroy(&device->engine);
642} 636}
643 637
644resource_size_t 638resource_size_t
645nv_device_resource_start(struct nouveau_device *device, unsigned int bar) 639nv_device_resource_start(struct nvkm_device *device, unsigned int bar)
646{ 640{
647 if (nv_device_is_pci(device)) { 641 if (nv_device_is_pci(device)) {
648 return pci_resource_start(device->pdev, bar); 642 return pci_resource_start(device->pdev, bar);
@@ -657,7 +651,7 @@ nv_device_resource_start(struct nouveau_device *device, unsigned int bar)
657} 651}
658 652
659resource_size_t 653resource_size_t
660nv_device_resource_len(struct nouveau_device *device, unsigned int bar) 654nv_device_resource_len(struct nvkm_device *device, unsigned int bar)
661{ 655{
662 if (nv_device_is_pci(device)) { 656 if (nv_device_is_pci(device)) {
663 return pci_resource_len(device->pdev, bar); 657 return pci_resource_len(device->pdev, bar);
@@ -672,7 +666,7 @@ nv_device_resource_len(struct nouveau_device *device, unsigned int bar)
672} 666}
673 667
674int 668int
675nv_device_get_irq(struct nouveau_device *device, bool stall) 669nv_device_get_irq(struct nvkm_device *device, bool stall)
676{ 670{
677 if (nv_device_is_pci(device)) { 671 if (nv_device_is_pci(device)) {
678 return device->pdev->irq; 672 return device->pdev->irq;
@@ -682,22 +676,22 @@ nv_device_get_irq(struct nouveau_device *device, bool stall)
682 } 676 }
683} 677}
684 678
685static struct nouveau_oclass 679static struct nvkm_oclass
686nouveau_device_oclass = { 680nvkm_device_oclass = {
687 .handle = NV_ENGINE(DEVICE, 0x00), 681 .handle = NV_ENGINE(DEVICE, 0x00),
688 .ofuncs = &(struct nouveau_ofuncs) { 682 .ofuncs = &(struct nvkm_ofuncs) {
689 .dtor = nouveau_device_dtor, 683 .dtor = nvkm_device_dtor,
690 .init = nouveau_device_init, 684 .init = nvkm_device_init,
691 .fini = nouveau_device_fini, 685 .fini = nvkm_device_fini,
692 }, 686 },
693}; 687};
694 688
695int 689int
696nouveau_device_create_(void *dev, enum nv_bus_type type, u64 name, 690nvkm_device_create_(void *dev, enum nv_bus_type type, u64 name,
697 const char *sname, const char *cfg, const char *dbg, 691 const char *sname, const char *cfg, const char *dbg,
698 int length, void **pobject) 692 int length, void **pobject)
699{ 693{
700 struct nouveau_device *device; 694 struct nvkm_device *device;
701 int ret = -EEXIST; 695 int ret = -EEXIST;
702 696
703 mutex_lock(&nv_devices_mutex); 697 mutex_lock(&nv_devices_mutex);
@@ -706,17 +700,17 @@ nouveau_device_create_(void *dev, enum nv_bus_type type, u64 name,
706 goto done; 700 goto done;
707 } 701 }
708 702
709 ret = nouveau_engine_create_(NULL, NULL, &nouveau_device_oclass, true, 703 ret = nvkm_engine_create_(NULL, NULL, &nvkm_device_oclass, true,
710 "DEVICE", "device", length, pobject); 704 "DEVICE", "device", length, pobject);
711 device = *pobject; 705 device = *pobject;
712 if (ret) 706 if (ret)
713 goto done; 707 goto done;
714 708
715 switch (type) { 709 switch (type) {
716 case NOUVEAU_BUS_PCI: 710 case NVKM_BUS_PCI:
717 device->pdev = dev; 711 device->pdev = dev;
718 break; 712 break;
719 case NOUVEAU_BUS_PLATFORM: 713 case NVKM_BUS_PLATFORM:
720 device->platformdev = dev; 714 device->platformdev = dev;
721 break; 715 break;
722 } 716 }
@@ -725,12 +719,11 @@ nouveau_device_create_(void *dev, enum nv_bus_type type, u64 name,
725 device->dbgopt = dbg; 719 device->dbgopt = dbg;
726 device->name = sname; 720 device->name = sname;
727 721
728 nv_subdev(device)->debug = nouveau_dbgopt(device->dbgopt, "DEVICE"); 722 nv_subdev(device)->debug = nvkm_dbgopt(device->dbgopt, "DEVICE");
729 nv_engine(device)->sclass = nouveau_device_sclass; 723 nv_engine(device)->sclass = nvkm_device_sclass;
730 list_add(&device->head, &nv_devices); 724 list_add(&device->head, &nv_devices);
731 725
732 ret = nvkm_event_init(&nouveau_device_event_func, 1, 1, 726 ret = nvkm_event_init(&nvkm_device_event_func, 1, 1, &device->event);
733 &device->event);
734done: 727done:
735 mutex_unlock(&nv_devices_mutex); 728 mutex_unlock(&nv_devices_mutex);
736 return ret; 729 return ret;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c
index 7a7632e65c77..0b794b13cec3 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c
@@ -21,25 +21,22 @@
21 * 21 *
22 * Authors: Ben Skeggs <bskeggs@redhat.com> 22 * Authors: Ben Skeggs <bskeggs@redhat.com>
23 */ 23 */
24#include "priv.h"
24 25
25#include <core/client.h> 26#include <core/client.h>
26#include <core/object.h>
27#include <nvif/unpack.h>
28#include <nvif/class.h>
29#include <nvif/ioctl.h>
30
31#include <subdev/clk.h> 27#include <subdev/clk.h>
32 28
33#include "priv.h" 29#include <nvif/class.h>
30#include <nvif/ioctl.h>
31#include <nvif/unpack.h>
34 32
35static int 33static int
36nouveau_control_mthd_pstate_info(struct nouveau_object *object, 34nvkm_control_mthd_pstate_info(struct nvkm_object *object, void *data, u32 size)
37 void *data, u32 size)
38{ 35{
39 union { 36 union {
40 struct nvif_control_pstate_info_v0 v0; 37 struct nvif_control_pstate_info_v0 v0;
41 } *args = data; 38 } *args = data;
42 struct nouveau_clk *clk = nouveau_clk(object); 39 struct nvkm_clk *clk = nvkm_clk(object);
43 int ret; 40 int ret;
44 41
45 nv_ioctl(object, "control pstate info size %d\n", size); 42 nv_ioctl(object, "control pstate info size %d\n", size);
@@ -67,16 +64,15 @@ nouveau_control_mthd_pstate_info(struct nouveau_object *object,
67} 64}
68 65
69static int 66static int
70nouveau_control_mthd_pstate_attr(struct nouveau_object *object, 67nvkm_control_mthd_pstate_attr(struct nvkm_object *object, void *data, u32 size)
71 void *data, u32 size)
72{ 68{
73 union { 69 union {
74 struct nvif_control_pstate_attr_v0 v0; 70 struct nvif_control_pstate_attr_v0 v0;
75 } *args = data; 71 } *args = data;
76 struct nouveau_clk *clk = nouveau_clk(object); 72 struct nvkm_clk *clk = nvkm_clk(object);
77 struct nouveau_domain *domain; 73 struct nvkm_domain *domain;
78 struct nouveau_pstate *pstate; 74 struct nvkm_pstate *pstate;
79 struct nouveau_cstate *cstate; 75 struct nvkm_cstate *cstate;
80 int i = 0, j = -1; 76 int i = 0, j = -1;
81 u32 lo, hi; 77 u32 lo, hi;
82 int ret; 78 int ret;
@@ -141,13 +137,12 @@ nouveau_control_mthd_pstate_attr(struct nouveau_object *object,
141} 137}
142 138
143static int 139static int
144nouveau_control_mthd_pstate_user(struct nouveau_object *object, 140nvkm_control_mthd_pstate_user(struct nvkm_object *object, void *data, u32 size)
145 void *data, u32 size)
146{ 141{
147 union { 142 union {
148 struct nvif_control_pstate_user_v0 v0; 143 struct nvif_control_pstate_user_v0 v0;
149 } *args = data; 144 } *args = data;
150 struct nouveau_clk *clk = nouveau_clk(object); 145 struct nvkm_clk *clk = nvkm_clk(object);
151 int ret; 146 int ret;
152 147
153 nv_ioctl(object, "control pstate user size %d\n", size); 148 nv_ioctl(object, "control pstate user size %d\n", size);
@@ -161,45 +156,44 @@ nouveau_control_mthd_pstate_user(struct nouveau_object *object,
161 return ret; 156 return ret;
162 157
163 if (args->v0.pwrsrc >= 0) { 158 if (args->v0.pwrsrc >= 0) {
164 ret |= nouveau_clk_ustate(clk, args->v0.ustate, args->v0.pwrsrc); 159 ret |= nvkm_clk_ustate(clk, args->v0.ustate, args->v0.pwrsrc);
165 } else { 160 } else {
166 ret |= nouveau_clk_ustate(clk, args->v0.ustate, 0); 161 ret |= nvkm_clk_ustate(clk, args->v0.ustate, 0);
167 ret |= nouveau_clk_ustate(clk, args->v0.ustate, 1); 162 ret |= nvkm_clk_ustate(clk, args->v0.ustate, 1);
168 } 163 }
169 164
170 return ret; 165 return ret;
171} 166}
172 167
173static int 168static int
174nouveau_control_mthd(struct nouveau_object *object, u32 mthd, 169nvkm_control_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size)
175 void *data, u32 size)
176{ 170{
177 switch (mthd) { 171 switch (mthd) {
178 case NVIF_CONTROL_PSTATE_INFO: 172 case NVIF_CONTROL_PSTATE_INFO:
179 return nouveau_control_mthd_pstate_info(object, data, size); 173 return nvkm_control_mthd_pstate_info(object, data, size);
180 case NVIF_CONTROL_PSTATE_ATTR: 174 case NVIF_CONTROL_PSTATE_ATTR:
181 return nouveau_control_mthd_pstate_attr(object, data, size); 175 return nvkm_control_mthd_pstate_attr(object, data, size);
182 case NVIF_CONTROL_PSTATE_USER: 176 case NVIF_CONTROL_PSTATE_USER:
183 return nouveau_control_mthd_pstate_user(object, data, size); 177 return nvkm_control_mthd_pstate_user(object, data, size);
184 default: 178 default:
185 break; 179 break;
186 } 180 }
187 return -EINVAL; 181 return -EINVAL;
188} 182}
189 183
190static struct nouveau_ofuncs 184static struct nvkm_ofuncs
191nouveau_control_ofuncs = { 185nvkm_control_ofuncs = {
192 .ctor = _nouveau_object_ctor, 186 .ctor = _nvkm_object_ctor,
193 .dtor = nouveau_object_destroy, 187 .dtor = nvkm_object_destroy,
194 .init = nouveau_object_init, 188 .init = nvkm_object_init,
195 .fini = nouveau_object_fini, 189 .fini = nvkm_object_fini,
196 .mthd = nouveau_control_mthd, 190 .mthd = nvkm_control_mthd,
197}; 191};
198 192
199struct nouveau_oclass 193struct nvkm_oclass
200nouveau_control_oclass[] = { 194nvkm_control_oclass[] = {
201 { .handle = NVIF_IOCTL_NEW_V0_CONTROL, 195 { .handle = NVIF_IOCTL_NEW_V0_CONTROL,
202 .ofuncs = &nouveau_control_ofuncs 196 .ofuncs = &nvkm_control_ofuncs
203 }, 197 },
204 {} 198 {}
205}; 199};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c
index 887ec05d0c3c..82b38d7e9730 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c
@@ -21,6 +21,7 @@
21 * 21 *
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24#include "priv.h"
24 25
25#include <subdev/bios.h> 26#include <subdev/bios.h>
26#include <subdev/bus.h> 27#include <subdev/bus.h>
@@ -42,7 +43,6 @@
42#include <subdev/pmu.h> 43#include <subdev/pmu.h>
43#include <subdev/volt.h> 44#include <subdev/volt.h>
44 45
45#include <engine/device.h>
46#include <engine/dmaobj.h> 46#include <engine/dmaobj.h>
47#include <engine/fifo.h> 47#include <engine/fifo.h>
48#include <engine/sw.h> 48#include <engine/sw.h>
@@ -56,12 +56,12 @@
56#include <engine/pm.h> 56#include <engine/pm.h>
57 57
58int 58int
59nvc0_identify(struct nouveau_device *device) 59gf100_identify(struct nvkm_device *device)
60{ 60{
61 switch (device->chipset) { 61 switch (device->chipset) {
62 case 0xc0: 62 case 0xc0:
63 device->cname = "GF100"; 63 device->cname = "GF100";
64 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 64 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
65 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 65 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
66 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 66 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
67 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 67 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -94,7 +94,7 @@ nvc0_identify(struct nouveau_device *device)
94 break; 94 break;
95 case 0xc4: 95 case 0xc4:
96 device->cname = "GF104"; 96 device->cname = "GF104";
97 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 97 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
98 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 98 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
99 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 99 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
100 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 100 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -127,7 +127,7 @@ nvc0_identify(struct nouveau_device *device)
127 break; 127 break;
128 case 0xc3: 128 case 0xc3:
129 device->cname = "GF106"; 129 device->cname = "GF106";
130 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 130 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
131 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 131 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
132 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 132 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
133 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 133 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -159,7 +159,7 @@ nvc0_identify(struct nouveau_device *device)
159 break; 159 break;
160 case 0xce: 160 case 0xce:
161 device->cname = "GF114"; 161 device->cname = "GF114";
162 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 162 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
163 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 163 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
164 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 164 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
165 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 165 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -192,7 +192,7 @@ nvc0_identify(struct nouveau_device *device)
192 break; 192 break;
193 case 0xcf: 193 case 0xcf:
194 device->cname = "GF116"; 194 device->cname = "GF116";
195 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 195 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
196 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 196 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
197 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 197 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
198 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 198 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -224,7 +224,7 @@ nvc0_identify(struct nouveau_device *device)
224 break; 224 break;
225 case 0xc1: 225 case 0xc1:
226 device->cname = "GF108"; 226 device->cname = "GF108";
227 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 227 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
228 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 228 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
229 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 229 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
230 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 230 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -256,7 +256,7 @@ nvc0_identify(struct nouveau_device *device)
256 break; 256 break;
257 case 0xc8: 257 case 0xc8:
258 device->cname = "GF110"; 258 device->cname = "GF110";
259 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 259 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
260 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 260 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
261 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 261 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
262 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 262 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -289,7 +289,7 @@ nvc0_identify(struct nouveau_device *device)
289 break; 289 break;
290 case 0xd9: 290 case 0xd9:
291 device->cname = "GF119"; 291 device->cname = "GF119";
292 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 292 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
293 device->oclass[NVDEV_SUBDEV_GPIO ] = gf110_gpio_oclass; 293 device->oclass[NVDEV_SUBDEV_GPIO ] = gf110_gpio_oclass;
294 device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass; 294 device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
295 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 295 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -321,7 +321,7 @@ nvc0_identify(struct nouveau_device *device)
321 break; 321 break;
322 case 0xd7: 322 case 0xd7:
323 device->cname = "GF117"; 323 device->cname = "GF117";
324 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 324 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
325 device->oclass[NVDEV_SUBDEV_GPIO ] = gf110_gpio_oclass; 325 device->oclass[NVDEV_SUBDEV_GPIO ] = gf110_gpio_oclass;
326 device->oclass[NVDEV_SUBDEV_I2C ] = gf117_i2c_oclass; 326 device->oclass[NVDEV_SUBDEV_I2C ] = gf117_i2c_oclass;
327 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 327 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -355,4 +355,4 @@ nvc0_identify(struct nouveau_device *device)
355 } 355 }
356 356
357 return 0; 357 return 0;
358 } 358}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c
index faaf87b462a6..bf5893458a47 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c
@@ -21,6 +21,7 @@
21 * 21 *
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24#include "priv.h"
24 25
25#include <subdev/bios.h> 26#include <subdev/bios.h>
26#include <subdev/bus.h> 27#include <subdev/bus.h>
@@ -42,7 +43,6 @@
42#include <subdev/pmu.h> 43#include <subdev/pmu.h>
43#include <subdev/volt.h> 44#include <subdev/volt.h>
44 45
45#include <engine/device.h>
46#include <engine/dmaobj.h> 46#include <engine/dmaobj.h>
47#include <engine/fifo.h> 47#include <engine/fifo.h>
48#include <engine/sw.h> 48#include <engine/sw.h>
@@ -56,12 +56,12 @@
56#include <engine/pm.h> 56#include <engine/pm.h>
57 57
58int 58int
59nve0_identify(struct nouveau_device *device) 59gk104_identify(struct nvkm_device *device)
60{ 60{
61 switch (device->chipset) { 61 switch (device->chipset) {
62 case 0xe4: 62 case 0xe4:
63 device->cname = "GK104"; 63 device->cname = "GK104";
64 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 64 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
65 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; 65 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
66 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; 66 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
67 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 67 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -95,7 +95,7 @@ nve0_identify(struct nouveau_device *device)
95 break; 95 break;
96 case 0xe7: 96 case 0xe7:
97 device->cname = "GK107"; 97 device->cname = "GK107";
98 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 98 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
99 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; 99 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
100 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; 100 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
101 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 101 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -129,7 +129,7 @@ nve0_identify(struct nouveau_device *device)
129 break; 129 break;
130 case 0xe6: 130 case 0xe6:
131 device->cname = "GK106"; 131 device->cname = "GK106";
132 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 132 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
133 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; 133 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
134 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; 134 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
135 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 135 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -185,7 +185,7 @@ nve0_identify(struct nouveau_device *device)
185 break; 185 break;
186 case 0xf0: 186 case 0xf0:
187 device->cname = "GK110"; 187 device->cname = "GK110";
188 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 188 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
189 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; 189 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
190 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; 190 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
191 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 191 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -219,7 +219,7 @@ nve0_identify(struct nouveau_device *device)
219 break; 219 break;
220 case 0xf1: 220 case 0xf1:
221 device->cname = "GK110B"; 221 device->cname = "GK110B";
222 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 222 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
223 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; 223 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
224 device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass; 224 device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
225 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 225 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -253,7 +253,7 @@ nve0_identify(struct nouveau_device *device)
253 break; 253 break;
254 case 0x106: 254 case 0x106:
255 device->cname = "GK208B"; 255 device->cname = "GK208B";
256 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 256 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
257 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; 257 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
258 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; 258 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
259 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 259 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
@@ -286,7 +286,7 @@ nve0_identify(struct nouveau_device *device)
286 break; 286 break;
287 case 0x108: 287 case 0x108:
288 device->cname = "GK208"; 288 device->cname = "GK208";
289 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 289 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
290 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; 290 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
291 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass; 291 device->oclass[NVDEV_SUBDEV_I2C ] = gk104_i2c_oclass;
292 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; 292 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
index ffa2da42f397..539561ed3281 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
@@ -21,6 +21,7 @@
21 * 21 *
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24#include "priv.h"
24 25
25#include <subdev/bios.h> 26#include <subdev/bios.h>
26#include <subdev/bus.h> 27#include <subdev/bus.h>
@@ -42,7 +43,6 @@
42#include <subdev/pmu.h> 43#include <subdev/pmu.h>
43#include <subdev/volt.h> 44#include <subdev/volt.h>
44 45
45#include <engine/device.h>
46#include <engine/dmaobj.h> 46#include <engine/dmaobj.h>
47#include <engine/fifo.h> 47#include <engine/fifo.h>
48#include <engine/sw.h> 48#include <engine/sw.h>
@@ -56,12 +56,12 @@
56#include <engine/pm.h> 56#include <engine/pm.h>
57 57
58int 58int
59gm100_identify(struct nouveau_device *device) 59gm100_identify(struct nvkm_device *device)
60{ 60{
61 switch (device->chipset) { 61 switch (device->chipset) {
62 case 0x117: 62 case 0x117:
63 device->cname = "GM107"; 63 device->cname = "GM107";
64 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 64 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
65 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; 65 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
66 device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass; 66 device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
67 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass; 67 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
@@ -101,7 +101,7 @@ gm100_identify(struct nouveau_device *device)
101 break; 101 break;
102 case 0x124: 102 case 0x124:
103 device->cname = "GM204"; 103 device->cname = "GM204";
104 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 104 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
105 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass; 105 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
106 device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass; 106 device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
107 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass; 107 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c
index 1d409af560da..5a2ae043b478 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c
@@ -21,6 +21,7 @@
21 * 21 *
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24#include "priv.h"
24 25
25#include <subdev/bios.h> 26#include <subdev/bios.h>
26#include <subdev/bus.h> 27#include <subdev/bus.h>
@@ -33,7 +34,6 @@
33#include <subdev/instmem.h> 34#include <subdev/instmem.h>
34#include <subdev/mmu.h> 35#include <subdev/mmu.h>
35 36
36#include <engine/device.h>
37#include <engine/dmaobj.h> 37#include <engine/dmaobj.h>
38#include <engine/fifo.h> 38#include <engine/fifo.h>
39#include <engine/sw.h> 39#include <engine/sw.h>
@@ -41,12 +41,12 @@
41#include <engine/disp.h> 41#include <engine/disp.h>
42 42
43int 43int
44nv04_identify(struct nouveau_device *device) 44nv04_identify(struct nvkm_device *device)
45{ 45{
46 switch (device->chipset) { 46 switch (device->chipset) {
47 case 0x04: 47 case 0x04:
48 device->cname = "NV04"; 48 device->cname = "NV04";
49 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 49 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
50 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 50 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
51 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 51 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
52 device->oclass[NVDEV_SUBDEV_DEVINIT] = nv04_devinit_oclass; 52 device->oclass[NVDEV_SUBDEV_DEVINIT] = nv04_devinit_oclass;
@@ -64,7 +64,7 @@ nv04_identify(struct nouveau_device *device)
64 break; 64 break;
65 case 0x05: 65 case 0x05:
66 device->cname = "NV05"; 66 device->cname = "NV05";
67 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 67 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
68 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 68 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
69 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 69 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
70 device->oclass[NVDEV_SUBDEV_DEVINIT] = nv05_devinit_oclass; 70 device->oclass[NVDEV_SUBDEV_DEVINIT] = nv05_devinit_oclass;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c
index 66d8c338ae98..94a1ca45e94a 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c
@@ -21,6 +21,7 @@
21 * 21 *
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24#include "priv.h"
24 25
25#include <subdev/bios.h> 26#include <subdev/bios.h>
26#include <subdev/bus.h> 27#include <subdev/bus.h>
@@ -34,7 +35,6 @@
34#include <subdev/instmem.h> 35#include <subdev/instmem.h>
35#include <subdev/mmu.h> 36#include <subdev/mmu.h>
36 37
37#include <engine/device.h>
38#include <engine/dmaobj.h> 38#include <engine/dmaobj.h>
39#include <engine/fifo.h> 39#include <engine/fifo.h>
40#include <engine/sw.h> 40#include <engine/sw.h>
@@ -42,12 +42,12 @@
42#include <engine/disp.h> 42#include <engine/disp.h>
43 43
44int 44int
45nv10_identify(struct nouveau_device *device) 45nv10_identify(struct nvkm_device *device)
46{ 46{
47 switch (device->chipset) { 47 switch (device->chipset) {
48 case 0x10: 48 case 0x10:
49 device->cname = "NV10"; 49 device->cname = "NV10";
50 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 50 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
51 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 51 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
52 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 52 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
53 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 53 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -64,7 +64,7 @@ nv10_identify(struct nouveau_device *device)
64 break; 64 break;
65 case 0x15: 65 case 0x15:
66 device->cname = "NV15"; 66 device->cname = "NV15";
67 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 67 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
68 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 68 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
69 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 69 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
70 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 70 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -83,7 +83,7 @@ nv10_identify(struct nouveau_device *device)
83 break; 83 break;
84 case 0x16: 84 case 0x16:
85 device->cname = "NV16"; 85 device->cname = "NV16";
86 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 86 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
87 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 87 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
88 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 88 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
89 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 89 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -102,7 +102,7 @@ nv10_identify(struct nouveau_device *device)
102 break; 102 break;
103 case 0x1a: 103 case 0x1a:
104 device->cname = "nForce"; 104 device->cname = "nForce";
105 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 105 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
106 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 106 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
107 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 107 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
108 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 108 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -121,7 +121,7 @@ nv10_identify(struct nouveau_device *device)
121 break; 121 break;
122 case 0x11: 122 case 0x11:
123 device->cname = "NV11"; 123 device->cname = "NV11";
124 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 124 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
125 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 125 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
126 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 126 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
127 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 127 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -140,7 +140,7 @@ nv10_identify(struct nouveau_device *device)
140 break; 140 break;
141 case 0x17: 141 case 0x17:
142 device->cname = "NV17"; 142 device->cname = "NV17";
143 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 143 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
144 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 144 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
145 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 145 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
146 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 146 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -159,7 +159,7 @@ nv10_identify(struct nouveau_device *device)
159 break; 159 break;
160 case 0x1f: 160 case 0x1f:
161 device->cname = "nForce2"; 161 device->cname = "nForce2";
162 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 162 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
163 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 163 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
164 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 164 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
165 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 165 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -178,7 +178,7 @@ nv10_identify(struct nouveau_device *device)
178 break; 178 break;
179 case 0x18: 179 case 0x18:
180 device->cname = "NV18"; 180 device->cname = "NV18";
181 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 181 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
182 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 182 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
183 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 183 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
184 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 184 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c
index 59cefdd46897..d5ec8937df68 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c
@@ -21,6 +21,7 @@
21 * 21 *
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24#include "priv.h"
24 25
25#include <subdev/bios.h> 26#include <subdev/bios.h>
26#include <subdev/bus.h> 27#include <subdev/bus.h>
@@ -35,7 +36,6 @@
35#include <subdev/instmem.h> 36#include <subdev/instmem.h>
36#include <subdev/mmu.h> 37#include <subdev/mmu.h>
37 38
38#include <engine/device.h>
39#include <engine/dmaobj.h> 39#include <engine/dmaobj.h>
40#include <engine/fifo.h> 40#include <engine/fifo.h>
41#include <engine/sw.h> 41#include <engine/sw.h>
@@ -43,12 +43,12 @@
43#include <engine/disp.h> 43#include <engine/disp.h>
44 44
45int 45int
46nv20_identify(struct nouveau_device *device) 46nv20_identify(struct nvkm_device *device)
47{ 47{
48 switch (device->chipset) { 48 switch (device->chipset) {
49 case 0x20: 49 case 0x20:
50 device->cname = "NV20"; 50 device->cname = "NV20";
51 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 51 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
52 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 52 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
53 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 53 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
54 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 54 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -67,7 +67,7 @@ nv20_identify(struct nouveau_device *device)
67 break; 67 break;
68 case 0x25: 68 case 0x25:
69 device->cname = "NV25"; 69 device->cname = "NV25";
70 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 70 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
71 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 71 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
72 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 72 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
73 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 73 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -86,7 +86,7 @@ nv20_identify(struct nouveau_device *device)
86 break; 86 break;
87 case 0x28: 87 case 0x28:
88 device->cname = "NV28"; 88 device->cname = "NV28";
89 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 89 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
90 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 90 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
91 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 91 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
92 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 92 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -105,7 +105,7 @@ nv20_identify(struct nouveau_device *device)
105 break; 105 break;
106 case 0x2a: 106 case 0x2a:
107 device->cname = "NV2A"; 107 device->cname = "NV2A";
108 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 108 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
109 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 109 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
110 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 110 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
111 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 111 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c
index dfb610f837b0..dda09621e898 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c
@@ -21,6 +21,7 @@
21 * 21 *
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24#include "priv.h"
24 25
25#include <subdev/bios.h> 26#include <subdev/bios.h>
26#include <subdev/bus.h> 27#include <subdev/bus.h>
@@ -34,7 +35,6 @@
34#include <subdev/instmem.h> 35#include <subdev/instmem.h>
35#include <subdev/mmu.h> 36#include <subdev/mmu.h>
36 37
37#include <engine/device.h>
38#include <engine/dmaobj.h> 38#include <engine/dmaobj.h>
39#include <engine/fifo.h> 39#include <engine/fifo.h>
40#include <engine/sw.h> 40#include <engine/sw.h>
@@ -43,12 +43,12 @@
43#include <engine/disp.h> 43#include <engine/disp.h>
44 44
45int 45int
46nv30_identify(struct nouveau_device *device) 46nv30_identify(struct nvkm_device *device)
47{ 47{
48 switch (device->chipset) { 48 switch (device->chipset) {
49 case 0x30: 49 case 0x30:
50 device->cname = "NV30"; 50 device->cname = "NV30";
51 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 51 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
52 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 52 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
53 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 53 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
54 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 54 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -67,7 +67,7 @@ nv30_identify(struct nouveau_device *device)
67 break; 67 break;
68 case 0x35: 68 case 0x35:
69 device->cname = "NV35"; 69 device->cname = "NV35";
70 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 70 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
71 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 71 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
72 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 72 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
73 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 73 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -86,7 +86,7 @@ nv30_identify(struct nouveau_device *device)
86 break; 86 break;
87 case 0x31: 87 case 0x31:
88 device->cname = "NV31"; 88 device->cname = "NV31";
89 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 89 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
90 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 90 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
91 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 91 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
92 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 92 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -106,7 +106,7 @@ nv30_identify(struct nouveau_device *device)
106 break; 106 break;
107 case 0x36: 107 case 0x36:
108 device->cname = "NV36"; 108 device->cname = "NV36";
109 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 109 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
110 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 110 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
111 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 111 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
112 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 112 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
@@ -126,7 +126,7 @@ nv30_identify(struct nouveau_device *device)
126 break; 126 break;
127 case 0x34: 127 case 0x34:
128 device->cname = "NV34"; 128 device->cname = "NV34";
129 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 129 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
130 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 130 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
131 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 131 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
132 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; 132 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c
index 7bdb7d6729b7..c6301361d14f 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c
@@ -21,6 +21,7 @@
21 * 21 *
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24#include "priv.h"
24 25
25#include <subdev/bios.h> 26#include <subdev/bios.h>
26#include <subdev/bus.h> 27#include <subdev/bus.h>
@@ -37,7 +38,6 @@
37#include <subdev/mmu.h> 38#include <subdev/mmu.h>
38#include <subdev/volt.h> 39#include <subdev/volt.h>
39 40
40#include <engine/device.h>
41#include <engine/dmaobj.h> 41#include <engine/dmaobj.h>
42#include <engine/fifo.h> 42#include <engine/fifo.h>
43#include <engine/sw.h> 43#include <engine/sw.h>
@@ -47,12 +47,12 @@
47#include <engine/pm.h> 47#include <engine/pm.h>
48 48
49int 49int
50nv40_identify(struct nouveau_device *device) 50nv40_identify(struct nvkm_device *device)
51{ 51{
52 switch (device->chipset) { 52 switch (device->chipset) {
53 case 0x40: 53 case 0x40:
54 device->cname = "NV40"; 54 device->cname = "NV40";
55 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 55 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
56 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 56 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
57 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 57 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
58 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 58 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -75,7 +75,7 @@ nv40_identify(struct nouveau_device *device)
75 break; 75 break;
76 case 0x41: 76 case 0x41:
77 device->cname = "NV41"; 77 device->cname = "NV41";
78 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 78 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
79 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 79 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
80 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 80 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
81 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 81 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -98,7 +98,7 @@ nv40_identify(struct nouveau_device *device)
98 break; 98 break;
99 case 0x42: 99 case 0x42:
100 device->cname = "NV42"; 100 device->cname = "NV42";
101 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 101 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
102 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 102 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
103 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 103 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
104 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 104 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -121,7 +121,7 @@ nv40_identify(struct nouveau_device *device)
121 break; 121 break;
122 case 0x43: 122 case 0x43:
123 device->cname = "NV43"; 123 device->cname = "NV43";
124 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 124 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
125 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 125 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
126 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 126 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
127 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 127 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -144,7 +144,7 @@ nv40_identify(struct nouveau_device *device)
144 break; 144 break;
145 case 0x45: 145 case 0x45:
146 device->cname = "NV45"; 146 device->cname = "NV45";
147 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 147 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
148 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 148 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
149 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 149 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
150 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 150 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -167,7 +167,7 @@ nv40_identify(struct nouveau_device *device)
167 break; 167 break;
168 case 0x47: 168 case 0x47:
169 device->cname = "G70"; 169 device->cname = "G70";
170 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 170 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
171 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 171 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
172 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 172 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
173 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 173 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -190,7 +190,7 @@ nv40_identify(struct nouveau_device *device)
190 break; 190 break;
191 case 0x49: 191 case 0x49:
192 device->cname = "G71"; 192 device->cname = "G71";
193 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 193 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
194 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 194 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
195 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 195 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
196 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 196 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -213,7 +213,7 @@ nv40_identify(struct nouveau_device *device)
213 break; 213 break;
214 case 0x4b: 214 case 0x4b:
215 device->cname = "G73"; 215 device->cname = "G73";
216 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 216 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
217 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 217 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
218 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 218 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
219 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 219 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -236,7 +236,7 @@ nv40_identify(struct nouveau_device *device)
236 break; 236 break;
237 case 0x44: 237 case 0x44:
238 device->cname = "NV44"; 238 device->cname = "NV44";
239 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 239 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
240 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 240 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
241 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 241 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
242 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 242 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -259,7 +259,7 @@ nv40_identify(struct nouveau_device *device)
259 break; 259 break;
260 case 0x46: 260 case 0x46:
261 device->cname = "G72"; 261 device->cname = "G72";
262 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 262 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
263 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 263 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
264 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 264 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
265 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 265 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -282,7 +282,7 @@ nv40_identify(struct nouveau_device *device)
282 break; 282 break;
283 case 0x4a: 283 case 0x4a:
284 device->cname = "NV44A"; 284 device->cname = "NV44A";
285 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 285 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
286 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 286 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
287 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 287 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
288 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 288 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -305,7 +305,7 @@ nv40_identify(struct nouveau_device *device)
305 break; 305 break;
306 case 0x4c: 306 case 0x4c:
307 device->cname = "C61"; 307 device->cname = "C61";
308 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 308 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
309 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 309 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
310 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 310 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
311 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 311 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -328,7 +328,7 @@ nv40_identify(struct nouveau_device *device)
328 break; 328 break;
329 case 0x4e: 329 case 0x4e:
330 device->cname = "C51"; 330 device->cname = "C51";
331 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 331 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
332 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 332 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
333 device->oclass[NVDEV_SUBDEV_I2C ] = nv4e_i2c_oclass; 333 device->oclass[NVDEV_SUBDEV_I2C ] = nv4e_i2c_oclass;
334 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 334 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -351,7 +351,7 @@ nv40_identify(struct nouveau_device *device)
351 break; 351 break;
352 case 0x63: 352 case 0x63:
353 device->cname = "C73"; 353 device->cname = "C73";
354 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 354 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
355 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 355 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
356 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 356 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
357 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 357 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -374,7 +374,7 @@ nv40_identify(struct nouveau_device *device)
374 break; 374 break;
375 case 0x67: 375 case 0x67:
376 device->cname = "C67"; 376 device->cname = "C67";
377 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 377 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
378 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 378 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
379 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 379 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
380 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 380 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
@@ -397,7 +397,7 @@ nv40_identify(struct nouveau_device *device)
397 break; 397 break;
398 case 0x68: 398 case 0x68:
399 device->cname = "C68"; 399 device->cname = "C68";
400 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 400 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
401 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; 401 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
402 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; 402 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
403 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass; 403 device->oclass[NVDEV_SUBDEV_CLK ] = &nv40_clk_oclass;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
index 36944babbb53..249b84454612 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
@@ -21,6 +21,7 @@
21 * 21 *
22 * Authors: Ben Skeggs 22 * Authors: Ben Skeggs
23 */ 23 */
24#include "priv.h"
24 25
25#include <subdev/bios.h> 26#include <subdev/bios.h>
26#include <subdev/bus.h> 27#include <subdev/bus.h>
@@ -40,7 +41,6 @@
40#include <subdev/pmu.h> 41#include <subdev/pmu.h>
41#include <subdev/volt.h> 42#include <subdev/volt.h>
42 43
43#include <engine/device.h>
44#include <engine/dmaobj.h> 44#include <engine/dmaobj.h>
45#include <engine/fifo.h> 45#include <engine/fifo.h>
46#include <engine/sw.h> 46#include <engine/sw.h>
@@ -58,12 +58,12 @@
58#include <engine/pm.h> 58#include <engine/pm.h>
59 59
60int 60int
61nv50_identify(struct nouveau_device *device) 61nv50_identify(struct nvkm_device *device)
62{ 62{
63 switch (device->chipset) { 63 switch (device->chipset) {
64 case 0x50: 64 case 0x50:
65 device->cname = "G80"; 65 device->cname = "G80";
66 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 66 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
67 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass; 67 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
68 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; 68 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
69 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 69 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -89,7 +89,7 @@ nv50_identify(struct nouveau_device *device)
89 break; 89 break;
90 case 0x84: 90 case 0x84:
91 device->cname = "G84"; 91 device->cname = "G84";
92 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 92 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
93 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass; 93 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
94 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; 94 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
95 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 95 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -118,7 +118,7 @@ nv50_identify(struct nouveau_device *device)
118 break; 118 break;
119 case 0x86: 119 case 0x86:
120 device->cname = "G86"; 120 device->cname = "G86";
121 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 121 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
122 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass; 122 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
123 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; 123 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
124 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 124 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -147,7 +147,7 @@ nv50_identify(struct nouveau_device *device)
147 break; 147 break;
148 case 0x92: 148 case 0x92:
149 device->cname = "G92"; 149 device->cname = "G92";
150 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 150 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
151 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass; 151 device->oclass[NVDEV_SUBDEV_GPIO ] = nv50_gpio_oclass;
152 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; 152 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
153 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 153 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -176,7 +176,7 @@ nv50_identify(struct nouveau_device *device)
176 break; 176 break;
177 case 0x94: 177 case 0x94:
178 device->cname = "G94"; 178 device->cname = "G94";
179 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 179 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
180 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 180 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
181 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 181 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
182 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 182 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -205,7 +205,7 @@ nv50_identify(struct nouveau_device *device)
205 break; 205 break;
206 case 0x96: 206 case 0x96:
207 device->cname = "G96"; 207 device->cname = "G96";
208 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 208 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
209 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 209 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
210 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 210 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
211 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 211 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -234,7 +234,7 @@ nv50_identify(struct nouveau_device *device)
234 break; 234 break;
235 case 0x98: 235 case 0x98:
236 device->cname = "G98"; 236 device->cname = "G98";
237 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 237 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
238 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 238 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
239 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 239 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
240 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 240 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -263,7 +263,7 @@ nv50_identify(struct nouveau_device *device)
263 break; 263 break;
264 case 0xa0: 264 case 0xa0:
265 device->cname = "G200"; 265 device->cname = "G200";
266 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 266 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
267 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 267 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
268 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass; 268 device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
269 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 269 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -292,7 +292,7 @@ nv50_identify(struct nouveau_device *device)
292 break; 292 break;
293 case 0xaa: 293 case 0xaa:
294 device->cname = "MCP77/MCP78"; 294 device->cname = "MCP77/MCP78";
295 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 295 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
296 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 296 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
297 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 297 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
298 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 298 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -321,7 +321,7 @@ nv50_identify(struct nouveau_device *device)
321 break; 321 break;
322 case 0xac: 322 case 0xac:
323 device->cname = "MCP79/MCP7A"; 323 device->cname = "MCP79/MCP7A";
324 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 324 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
325 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 325 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
326 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 326 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
327 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 327 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -350,7 +350,7 @@ nv50_identify(struct nouveau_device *device)
350 break; 350 break;
351 case 0xa3: 351 case 0xa3:
352 device->cname = "GT215"; 352 device->cname = "GT215";
353 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 353 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
354 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 354 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
355 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 355 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
356 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 356 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -381,7 +381,7 @@ nv50_identify(struct nouveau_device *device)
381 break; 381 break;
382 case 0xa5: 382 case 0xa5:
383 device->cname = "GT216"; 383 device->cname = "GT216";
384 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 384 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
385 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 385 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
386 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 386 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
387 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 387 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -411,7 +411,7 @@ nv50_identify(struct nouveau_device *device)
411 break; 411 break;
412 case 0xa8: 412 case 0xa8:
413 device->cname = "GT218"; 413 device->cname = "GT218";
414 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 414 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
415 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 415 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
416 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 416 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
417 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 417 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
@@ -441,7 +441,7 @@ nv50_identify(struct nouveau_device *device)
441 break; 441 break;
442 case 0xaf: 442 case 0xaf:
443 device->cname = "MCP89"; 443 device->cname = "MCP89";
444 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 444 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
445 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass; 445 device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
446 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass; 446 device->oclass[NVDEV_SUBDEV_I2C ] = g94_i2c_oclass;
447 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass; 447 device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h
index 035fd5b9cfc3..8d3590e7bd87 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h
@@ -1,8 +1,16 @@
1#ifndef __NVKM_DEVICE_PRIV_H__ 1#ifndef __NVKM_DEVICE_PRIV_H__
2#define __NVKM_DEVICE_PRIV_H__ 2#define __NVKM_DEVICE_PRIV_H__
3#include <core/device.h>
3 4
4#include <engine/device.h> 5extern struct nvkm_oclass nvkm_control_oclass[];
5
6extern struct nouveau_oclass nouveau_control_oclass[];
7 6
7int nv04_identify(struct nvkm_device *);
8int nv10_identify(struct nvkm_device *);
9int nv20_identify(struct nvkm_device *);
10int nv30_identify(struct nvkm_device *);
11int nv40_identify(struct nvkm_device *);
12int nv50_identify(struct nvkm_device *);
13int gf100_identify(struct nvkm_device *);
14int gk104_identify(struct nvkm_device *);
15int gm100_identify(struct nvkm_device *);
8#endif 16#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h
index 131619bda22f..d852bd6de571 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.h
@@ -1,7 +1,8 @@
1#ifndef __NV40_GR_H__ 1#ifndef __NV40_GR_H__
2#define __NV40_GR_H__ 2#define __NV40_GR_H__
3#include <engine/gr.h> 3#include <engine/gr.h>
4#include <engine/device.h> 4
5#include <core/device.h>
5struct nvkm_gpuobj; 6struct nvkm_gpuobj;
6 7
7/* returns 1 if device is one of the nv4x using the 0x4497 object class, 8/* returns 1 if device is one of the nv4x using the 0x4497 object class,
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-07 13:30:46 -0400