diff options
author | Jiang Liu <jiang.liu@linux.intel.com> | 2014-06-09 04:19:48 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2014-06-21 17:05:42 -0400 |
commit | 95d76acc7518d566df18d67c1343bb375b78d1f3 (patch) | |
tree | d0e826c07402d4df28042792951b4b647048c5a1 | |
parent | 6532ce994c304835f3bfc8479acce9d102cd8b5b (diff) |
x86, irq: Count legacy IRQs by legacy_pic->nr_legacy_irqs instead of NR_IRQS_LEGACY
Some platforms, such as Intel MID and mshypv, do not support legacy
interrupt controllers. So count legacy IRQs by legacy_pic->nr_legacy_irqs
instead of hard-coded NR_IRQS_LEGACY.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: xen-devel@lists.xenproject.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Len Brown <len.brown@intel.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Tony Lindgren <tony@atomide.com>
Acked-by: David Vrabel <david.vrabel@citrix.com>
Link: http://lkml.kernel.org/r/1402302011-23642-20-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r-- | arch/x86/include/asm/i8259.h | 5 | ||||
-rw-r--r-- | arch/x86/kernel/acpi/boot.c | 13 | ||||
-rw-r--r-- | arch/x86/kernel/apic/io_apic.c | 43 | ||||
-rw-r--r-- | arch/x86/kernel/devicetree.c | 13 | ||||
-rw-r--r-- | arch/x86/kernel/irqinit.c | 6 | ||||
-rw-r--r-- | arch/x86/pci/xen.c | 7 |
6 files changed, 51 insertions, 36 deletions
diff --git a/arch/x86/include/asm/i8259.h b/arch/x86/include/asm/i8259.h index a20365953bf8..ccffa53750a8 100644 --- a/arch/x86/include/asm/i8259.h +++ b/arch/x86/include/asm/i8259.h | |||
@@ -67,4 +67,9 @@ struct legacy_pic { | |||
67 | extern struct legacy_pic *legacy_pic; | 67 | extern struct legacy_pic *legacy_pic; |
68 | extern struct legacy_pic null_legacy_pic; | 68 | extern struct legacy_pic null_legacy_pic; |
69 | 69 | ||
70 | static inline int nr_legacy_irqs(void) | ||
71 | { | ||
72 | return legacy_pic->nr_legacy_irqs; | ||
73 | } | ||
74 | |||
70 | #endif /* _ASM_X86_I8259_H */ | 75 | #endif /* _ASM_X86_I8259_H */ |
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index f3bafcd32b98..b12976590a72 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <asm/io.h> | 43 | #include <asm/io.h> |
44 | #include <asm/mpspec.h> | 44 | #include <asm/mpspec.h> |
45 | #include <asm/smp.h> | 45 | #include <asm/smp.h> |
46 | #include <asm/i8259.h> | ||
46 | 47 | ||
47 | #include "sleep.h" /* To include x86_acpi_suspend_lowlevel */ | 48 | #include "sleep.h" /* To include x86_acpi_suspend_lowlevel */ |
48 | static int __initdata acpi_force = 0; | 49 | static int __initdata acpi_force = 0; |
@@ -101,10 +102,10 @@ static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = { | |||
101 | 102 | ||
102 | static unsigned int gsi_to_irq(unsigned int gsi) | 103 | static unsigned int gsi_to_irq(unsigned int gsi) |
103 | { | 104 | { |
104 | unsigned int irq = gsi + NR_IRQS_LEGACY; | 105 | unsigned int irq = gsi + nr_legacy_irqs(); |
105 | unsigned int i; | 106 | unsigned int i; |
106 | 107 | ||
107 | for (i = 0; i < NR_IRQS_LEGACY; i++) { | 108 | for (i = 0; i < nr_legacy_irqs(); i++) { |
108 | if (isa_irq_to_gsi[i] == gsi) { | 109 | if (isa_irq_to_gsi[i] == gsi) { |
109 | return i; | 110 | return i; |
110 | } | 111 | } |
@@ -114,7 +115,7 @@ static unsigned int gsi_to_irq(unsigned int gsi) | |||
114 | * except on truly weird platforms that have | 115 | * except on truly weird platforms that have |
115 | * non isa irqs in the first 16 gsis. | 116 | * non isa irqs in the first 16 gsis. |
116 | */ | 117 | */ |
117 | if (gsi >= NR_IRQS_LEGACY) | 118 | if (gsi >= nr_legacy_irqs()) |
118 | irq = gsi; | 119 | irq = gsi; |
119 | else | 120 | else |
120 | irq = gsi_top + gsi; | 121 | irq = gsi_top + gsi; |
@@ -371,7 +372,7 @@ static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, | |||
371 | * otherwise there will be more than one entry with the same GSI | 372 | * otherwise there will be more than one entry with the same GSI |
372 | * and acpi_isa_irq_to_gsi() may give wrong result. | 373 | * and acpi_isa_irq_to_gsi() may give wrong result. |
373 | */ | 374 | */ |
374 | if (gsi < NR_IRQS_LEGACY && isa_irq_to_gsi[gsi] == gsi) | 375 | if (gsi < nr_legacy_irqs() && isa_irq_to_gsi[gsi] == gsi) |
375 | isa_irq_to_gsi[gsi] = ACPI_INVALID_GSI; | 376 | isa_irq_to_gsi[gsi] = ACPI_INVALID_GSI; |
376 | isa_irq_to_gsi[bus_irq] = gsi; | 377 | isa_irq_to_gsi[bus_irq] = gsi; |
377 | } | 378 | } |
@@ -628,7 +629,7 @@ EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); | |||
628 | 629 | ||
629 | int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi) | 630 | int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi) |
630 | { | 631 | { |
631 | if (isa_irq < NR_IRQS_LEGACY && | 632 | if (isa_irq < nr_legacy_irqs() && |
632 | isa_irq_to_gsi[isa_irq] != ACPI_INVALID_GSI) { | 633 | isa_irq_to_gsi[isa_irq] != ACPI_INVALID_GSI) { |
633 | *gsi = isa_irq_to_gsi[isa_irq]; | 634 | *gsi = isa_irq_to_gsi[isa_irq]; |
634 | return 0; | 635 | return 0; |
@@ -1017,7 +1018,7 @@ static void __init mp_config_acpi_legacy_irqs(void) | |||
1017 | * Use the default configuration for the IRQs 0-15. Unless | 1018 | * Use the default configuration for the IRQs 0-15. Unless |
1018 | * overridden by (MADT) interrupt source override entries. | 1019 | * overridden by (MADT) interrupt source override entries. |
1019 | */ | 1020 | */ |
1020 | for (i = 0; i < NR_IRQS_LEGACY; i++) { | 1021 | for (i = 0; i < nr_legacy_irqs(); i++) { |
1021 | int ioapic, pin; | 1022 | int ioapic, pin; |
1022 | unsigned int dstapic; | 1023 | unsigned int dstapic; |
1023 | int idx; | 1024 | int idx; |
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 424f795a1c78..4208ea9edc10 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -129,10 +129,17 @@ u32 mp_pin_to_gsi(int ioapic, int pin) | |||
129 | return mp_ioapic_gsi_routing(ioapic)->gsi_base + pin; | 129 | return mp_ioapic_gsi_routing(ioapic)->gsi_base + pin; |
130 | } | 130 | } |
131 | 131 | ||
132 | /* Initialize all legacy IRQs and all pins on the first IOAPIC at boot */ | 132 | /* |
133 | * Initialize all legacy IRQs and all pins on the first IOAPIC | ||
134 | * if we have legacy interrupt controller. Kernel boot option "pirq=" | ||
135 | * may rely on non-legacy pins on the first IOAPIC. | ||
136 | */ | ||
133 | static inline int mp_init_irq_at_boot(int ioapic, int irq) | 137 | static inline int mp_init_irq_at_boot(int ioapic, int irq) |
134 | { | 138 | { |
135 | return ioapic == 0 || (irq >= 0 && irq < NR_IRQS_LEGACY); | 139 | if (!nr_legacy_irqs()) |
140 | return 0; | ||
141 | |||
142 | return ioapic == 0 || (irq >= 0 && irq < nr_legacy_irqs()); | ||
136 | } | 143 | } |
137 | 144 | ||
138 | int nr_ioapics; | 145 | int nr_ioapics; |
@@ -216,7 +223,7 @@ int __init arch_early_irq_init(void) | |||
216 | struct irq_cfg *cfg; | 223 | struct irq_cfg *cfg; |
217 | int count, node, i; | 224 | int count, node, i; |
218 | 225 | ||
219 | if (!legacy_pic->nr_legacy_irqs) | 226 | if (!nr_legacy_irqs()) |
220 | io_apic_irqs = ~0UL; | 227 | io_apic_irqs = ~0UL; |
221 | 228 | ||
222 | for_each_ioapic(i) { | 229 | for_each_ioapic(i) { |
@@ -239,7 +246,7 @@ int __init arch_early_irq_init(void) | |||
239 | * For legacy IRQ's, start with assigning irq0 to irq15 to | 246 | * For legacy IRQ's, start with assigning irq0 to irq15 to |
240 | * IRQ0_VECTOR to IRQ15_VECTOR for all cpu's. | 247 | * IRQ0_VECTOR to IRQ15_VECTOR for all cpu's. |
241 | */ | 248 | */ |
242 | if (i < legacy_pic->nr_legacy_irqs) { | 249 | if (i < nr_legacy_irqs()) { |
243 | cfg[i].vector = IRQ0_VECTOR + i; | 250 | cfg[i].vector = IRQ0_VECTOR + i; |
244 | cpumask_setall(cfg[i].domain); | 251 | cpumask_setall(cfg[i].domain); |
245 | } | 252 | } |
@@ -823,7 +830,7 @@ static int __init find_isa_irq_apic(int irq, int type) | |||
823 | */ | 830 | */ |
824 | static int EISA_ELCR(unsigned int irq) | 831 | static int EISA_ELCR(unsigned int irq) |
825 | { | 832 | { |
826 | if (irq < legacy_pic->nr_legacy_irqs) { | 833 | if (irq < nr_legacy_irqs()) { |
827 | unsigned int port = 0x4d0 + (irq >> 3); | 834 | unsigned int port = 0x4d0 + (irq >> 3); |
828 | return (inb(port) >> (irq & 7)) & 1; | 835 | return (inb(port) >> (irq & 7)) & 1; |
829 | } | 836 | } |
@@ -980,7 +987,7 @@ static int pin_2_irq(int idx, int apic, int pin) | |||
980 | } else { | 987 | } else { |
981 | u32 gsi = gsi_cfg->gsi_base + pin; | 988 | u32 gsi = gsi_cfg->gsi_base + pin; |
982 | 989 | ||
983 | if (gsi >= NR_IRQS_LEGACY) | 990 | if (gsi >= nr_legacy_irqs()) |
984 | irq = gsi; | 991 | irq = gsi; |
985 | else | 992 | else |
986 | irq = gsi_top + gsi; | 993 | irq = gsi_top + gsi; |
@@ -1357,7 +1364,7 @@ static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg, | |||
1357 | } | 1364 | } |
1358 | 1365 | ||
1359 | ioapic_register_intr(irq, cfg, attr->trigger); | 1366 | ioapic_register_intr(irq, cfg, attr->trigger); |
1360 | if (irq < legacy_pic->nr_legacy_irqs) | 1367 | if (irq < nr_legacy_irqs()) |
1361 | legacy_pic->mask(irq); | 1368 | legacy_pic->mask(irq); |
1362 | 1369 | ||
1363 | ioapic_write_entry(attr->ioapic, attr->ioapic_pin, entry); | 1370 | ioapic_write_entry(attr->ioapic, attr->ioapic_pin, entry); |
@@ -1782,7 +1789,7 @@ __apicdebuginit(void) print_PIC(void) | |||
1782 | unsigned int v; | 1789 | unsigned int v; |
1783 | unsigned long flags; | 1790 | unsigned long flags; |
1784 | 1791 | ||
1785 | if (!legacy_pic->nr_legacy_irqs) | 1792 | if (!nr_legacy_irqs()) |
1786 | return; | 1793 | return; |
1787 | 1794 | ||
1788 | printk(KERN_DEBUG "\nprinting PIC contents\n"); | 1795 | printk(KERN_DEBUG "\nprinting PIC contents\n"); |
@@ -1854,7 +1861,7 @@ void __init enable_IO_APIC(void) | |||
1854 | int i8259_apic, i8259_pin; | 1861 | int i8259_apic, i8259_pin; |
1855 | int apic, pin; | 1862 | int apic, pin; |
1856 | 1863 | ||
1857 | if (!legacy_pic->nr_legacy_irqs) | 1864 | if (!nr_legacy_irqs()) |
1858 | return; | 1865 | return; |
1859 | 1866 | ||
1860 | for_each_ioapic_pin(apic, pin) { | 1867 | for_each_ioapic_pin(apic, pin) { |
@@ -1939,7 +1946,7 @@ void disable_IO_APIC(void) | |||
1939 | */ | 1946 | */ |
1940 | clear_IO_APIC(); | 1947 | clear_IO_APIC(); |
1941 | 1948 | ||
1942 | if (!legacy_pic->nr_legacy_irqs) | 1949 | if (!nr_legacy_irqs()) |
1943 | return; | 1950 | return; |
1944 | 1951 | ||
1945 | x86_io_apic_ops.disable(); | 1952 | x86_io_apic_ops.disable(); |
@@ -2143,7 +2150,7 @@ static unsigned int startup_ioapic_irq(struct irq_data *data) | |||
2143 | unsigned long flags; | 2150 | unsigned long flags; |
2144 | 2151 | ||
2145 | raw_spin_lock_irqsave(&ioapic_lock, flags); | 2152 | raw_spin_lock_irqsave(&ioapic_lock, flags); |
2146 | if (irq < legacy_pic->nr_legacy_irqs) { | 2153 | if (irq < nr_legacy_irqs()) { |
2147 | legacy_pic->mask(irq); | 2154 | legacy_pic->mask(irq); |
2148 | if (legacy_pic->irq_pending(irq)) | 2155 | if (legacy_pic->irq_pending(irq)) |
2149 | was_pending = 1; | 2156 | was_pending = 1; |
@@ -2542,7 +2549,7 @@ static inline void init_IO_APIC_traps(void) | |||
2542 | * so default to an old-fashioned 8259 | 2549 | * so default to an old-fashioned 8259 |
2543 | * interrupt if we can.. | 2550 | * interrupt if we can.. |
2544 | */ | 2551 | */ |
2545 | if (irq < legacy_pic->nr_legacy_irqs) | 2552 | if (irq < nr_legacy_irqs()) |
2546 | legacy_pic->make_irq(irq); | 2553 | legacy_pic->make_irq(irq); |
2547 | else | 2554 | else |
2548 | /* Strange. Oh, well.. */ | 2555 | /* Strange. Oh, well.. */ |
@@ -2839,7 +2846,7 @@ void __init setup_IO_APIC(void) | |||
2839 | /* | 2846 | /* |
2840 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP | 2847 | * calling enable_IO_APIC() is moved to setup_local_APIC for BP |
2841 | */ | 2848 | */ |
2842 | io_apic_irqs = legacy_pic->nr_legacy_irqs ? ~PIC_IRQS : ~0UL; | 2849 | io_apic_irqs = nr_legacy_irqs() ? ~PIC_IRQS : ~0UL; |
2843 | 2850 | ||
2844 | apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n"); | 2851 | apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n"); |
2845 | /* | 2852 | /* |
@@ -2850,7 +2857,7 @@ void __init setup_IO_APIC(void) | |||
2850 | sync_Arb_IDs(); | 2857 | sync_Arb_IDs(); |
2851 | setup_IO_APIC_irqs(); | 2858 | setup_IO_APIC_irqs(); |
2852 | init_IO_APIC_traps(); | 2859 | init_IO_APIC_traps(); |
2853 | if (legacy_pic->nr_legacy_irqs) | 2860 | if (nr_legacy_irqs()) |
2854 | check_timer(); | 2861 | check_timer(); |
2855 | } | 2862 | } |
2856 | 2863 | ||
@@ -3348,7 +3355,7 @@ static int __init io_apic_get_redir_entries(int ioapic) | |||
3348 | 3355 | ||
3349 | unsigned int arch_dynirq_lower_bound(unsigned int from) | 3356 | unsigned int arch_dynirq_lower_bound(unsigned int from) |
3350 | { | 3357 | { |
3351 | unsigned int min = gsi_top + NR_IRQS_LEGACY; | 3358 | unsigned int min = gsi_top + nr_legacy_irqs(); |
3352 | 3359 | ||
3353 | return from < min ? min : from; | 3360 | return from < min ? min : from; |
3354 | } | 3361 | } |
@@ -3360,17 +3367,17 @@ int __init arch_probe_nr_irqs(void) | |||
3360 | if (nr_irqs > (NR_VECTORS * nr_cpu_ids)) | 3367 | if (nr_irqs > (NR_VECTORS * nr_cpu_ids)) |
3361 | nr_irqs = NR_VECTORS * nr_cpu_ids; | 3368 | nr_irqs = NR_VECTORS * nr_cpu_ids; |
3362 | 3369 | ||
3363 | nr = (gsi_top + NR_IRQS_LEGACY) + 8 * nr_cpu_ids; | 3370 | nr = (gsi_top + nr_legacy_irqs()) + 8 * nr_cpu_ids; |
3364 | #if defined(CONFIG_PCI_MSI) || defined(CONFIG_HT_IRQ) | 3371 | #if defined(CONFIG_PCI_MSI) || defined(CONFIG_HT_IRQ) |
3365 | /* | 3372 | /* |
3366 | * for MSI and HT dyn irq | 3373 | * for MSI and HT dyn irq |
3367 | */ | 3374 | */ |
3368 | nr += (gsi_top + NR_IRQS_LEGACY) * 16; | 3375 | nr += gsi_top * 16; |
3369 | #endif | 3376 | #endif |
3370 | if (nr < nr_irqs) | 3377 | if (nr < nr_irqs) |
3371 | nr_irqs = nr; | 3378 | nr_irqs = nr; |
3372 | 3379 | ||
3373 | return NR_IRQS_LEGACY; | 3380 | return nr_legacy_irqs(); |
3374 | } | 3381 | } |
3375 | 3382 | ||
3376 | int io_apic_set_pci_routing(struct device *dev, int irq, | 3383 | int io_apic_set_pci_routing(struct device *dev, int irq, |
diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c index 7db54b5d5f86..b4680058db8b 100644 --- a/arch/x86/kernel/devicetree.c +++ b/arch/x86/kernel/devicetree.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <asm/apic.h> | 21 | #include <asm/apic.h> |
22 | #include <asm/pci_x86.h> | 22 | #include <asm/pci_x86.h> |
23 | #include <asm/setup.h> | 23 | #include <asm/setup.h> |
24 | #include <asm/i8259.h> | ||
24 | 25 | ||
25 | __initdata u64 initial_dtb; | 26 | __initdata u64 initial_dtb; |
26 | char __initdata cmd_line[COMMAND_LINE_SIZE]; | 27 | char __initdata cmd_line[COMMAND_LINE_SIZE]; |
@@ -314,7 +315,7 @@ static void dt_add_ioapic_domain(unsigned int ioapic_num, | |||
314 | struct irq_domain *id; | 315 | struct irq_domain *id; |
315 | struct mp_ioapic_gsi *gsi_cfg; | 316 | struct mp_ioapic_gsi *gsi_cfg; |
316 | int ret; | 317 | int ret; |
317 | int num; | 318 | int num, legacy_irqs = nr_legacy_irqs(); |
318 | 319 | ||
319 | gsi_cfg = mp_ioapic_gsi_routing(ioapic_num); | 320 | gsi_cfg = mp_ioapic_gsi_routing(ioapic_num); |
320 | num = gsi_cfg->gsi_end - gsi_cfg->gsi_base + 1; | 321 | num = gsi_cfg->gsi_end - gsi_cfg->gsi_base + 1; |
@@ -324,17 +325,17 @@ static void dt_add_ioapic_domain(unsigned int ioapic_num, | |||
324 | BUG_ON(!id); | 325 | BUG_ON(!id); |
325 | if (gsi_cfg->gsi_base == 0) { | 326 | if (gsi_cfg->gsi_base == 0) { |
326 | /* | 327 | /* |
327 | * The first NR_IRQS_LEGACY irq descs are allocated in | 328 | * The first nr_legacy_irqs() irq descs are allocated in |
328 | * early_irq_init() and need just a mapping. The | 329 | * early_irq_init() and need just a mapping. The |
329 | * remaining irqs need both. All of them are preallocated | 330 | * remaining irqs need both. All of them are preallocated |
330 | * and assigned so we can keep the 1:1 mapping which the ioapic | 331 | * and assigned so we can keep the 1:1 mapping which the ioapic |
331 | * is having. | 332 | * is having. |
332 | */ | 333 | */ |
333 | irq_domain_associate_many(id, 0, 0, NR_IRQS_LEGACY); | 334 | irq_domain_associate_many(id, 0, 0, legacy_irqs); |
334 | 335 | ||
335 | if (num > NR_IRQS_LEGACY) { | 336 | if (num > legacy_irqs) { |
336 | ret = irq_create_strict_mappings(id, NR_IRQS_LEGACY, | 337 | ret = irq_create_strict_mappings(id, legacy_irqs, |
337 | NR_IRQS_LEGACY, num - NR_IRQS_LEGACY); | 338 | legacy_irqs, num - legacy_irqs); |
338 | if (ret) | 339 | if (ret) |
339 | pr_err("Error creating mapping for the " | 340 | pr_err("Error creating mapping for the " |
340 | "remaining IRQs: %d\n", ret); | 341 | "remaining IRQs: %d\n", ret); |
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c index 7f50156542fb..a0111e91eb4b 100644 --- a/arch/x86/kernel/irqinit.c +++ b/arch/x86/kernel/irqinit.c | |||
@@ -78,7 +78,7 @@ void __init init_ISA_irqs(void) | |||
78 | #endif | 78 | #endif |
79 | legacy_pic->init(0); | 79 | legacy_pic->init(0); |
80 | 80 | ||
81 | for (i = 0; i < legacy_pic->nr_legacy_irqs; i++) | 81 | for (i = 0; i < nr_legacy_irqs(); i++) |
82 | irq_set_chip_and_handler_name(i, chip, handle_level_irq, name); | 82 | irq_set_chip_and_handler_name(i, chip, handle_level_irq, name); |
83 | } | 83 | } |
84 | 84 | ||
@@ -100,7 +100,7 @@ void __init init_IRQ(void) | |||
100 | * then this vector space can be freed and re-used dynamically as the | 100 | * then this vector space can be freed and re-used dynamically as the |
101 | * irq's migrate etc. | 101 | * irq's migrate etc. |
102 | */ | 102 | */ |
103 | for (i = 0; i < legacy_pic->nr_legacy_irqs; i++) | 103 | for (i = 0; i < nr_legacy_irqs(); i++) |
104 | per_cpu(vector_irq, 0)[IRQ0_VECTOR + i] = i; | 104 | per_cpu(vector_irq, 0)[IRQ0_VECTOR + i] = i; |
105 | 105 | ||
106 | x86_init.irqs.intr_init(); | 106 | x86_init.irqs.intr_init(); |
@@ -121,7 +121,7 @@ void setup_vector_irq(int cpu) | |||
121 | * legacy PIC, for the new cpu that is coming online, setup the static | 121 | * legacy PIC, for the new cpu that is coming online, setup the static |
122 | * legacy vector to irq mapping: | 122 | * legacy vector to irq mapping: |
123 | */ | 123 | */ |
124 | for (irq = 0; irq < legacy_pic->nr_legacy_irqs; irq++) | 124 | for (irq = 0; irq < nr_legacy_irqs(); irq++) |
125 | per_cpu(vector_irq, cpu)[IRQ0_VECTOR + irq] = irq; | 125 | per_cpu(vector_irq, cpu)[IRQ0_VECTOR + irq] = irq; |
126 | #endif | 126 | #endif |
127 | 127 | ||
diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index 905956f16465..093f5f4272d3 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <xen/features.h> | 23 | #include <xen/features.h> |
24 | #include <xen/events.h> | 24 | #include <xen/events.h> |
25 | #include <asm/xen/pci.h> | 25 | #include <asm/xen/pci.h> |
26 | #include <asm/i8259.h> | ||
26 | 27 | ||
27 | static int xen_pcifront_enable_irq(struct pci_dev *dev) | 28 | static int xen_pcifront_enable_irq(struct pci_dev *dev) |
28 | { | 29 | { |
@@ -40,7 +41,7 @@ static int xen_pcifront_enable_irq(struct pci_dev *dev) | |||
40 | /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/ | 41 | /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/ |
41 | pirq = gsi; | 42 | pirq = gsi; |
42 | 43 | ||
43 | if (gsi < NR_IRQS_LEGACY) | 44 | if (gsi < nr_legacy_irqs()) |
44 | share = 0; | 45 | share = 0; |
45 | 46 | ||
46 | rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront"); | 47 | rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront"); |
@@ -511,7 +512,7 @@ int __init pci_xen_initial_domain(void) | |||
511 | xen_setup_acpi_sci(); | 512 | xen_setup_acpi_sci(); |
512 | __acpi_register_gsi = acpi_register_gsi_xen; | 513 | __acpi_register_gsi = acpi_register_gsi_xen; |
513 | /* Pre-allocate legacy irqs */ | 514 | /* Pre-allocate legacy irqs */ |
514 | for (irq = 0; irq < NR_IRQS_LEGACY; irq++) { | 515 | for (irq = 0; irq < nr_legacy_irqs(); irq++) { |
515 | int trigger, polarity; | 516 | int trigger, polarity; |
516 | 517 | ||
517 | if (acpi_get_override_irq(irq, &trigger, &polarity) == -1) | 518 | if (acpi_get_override_irq(irq, &trigger, &polarity) == -1) |
@@ -522,7 +523,7 @@ int __init pci_xen_initial_domain(void) | |||
522 | true /* Map GSI to PIRQ */); | 523 | true /* Map GSI to PIRQ */); |
523 | } | 524 | } |
524 | if (0 == nr_ioapics) { | 525 | if (0 == nr_ioapics) { |
525 | for (irq = 0; irq < NR_IRQS_LEGACY; irq++) | 526 | for (irq = 0; irq < nr_legacy_irqs(); irq++) |
526 | xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic"); | 527 | xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic"); |
527 | } | 528 | } |
528 | return 0; | 529 | return 0; |