diff options
| author | Mike Travis <travis@sgi.com> | 2008-12-16 20:33:54 -0500 |
|---|---|---|
| committer | Mike Travis <travis@sgi.com> | 2008-12-16 20:40:56 -0500 |
| commit | 95d313cf1c1ecedc8bec5727b09bdacbf67dfc45 (patch) | |
| tree | ee4aa8aff232bb30bb725c5670bb67d73484022d | |
| parent | a1681965011916c2f1f0f1f87e70784f5d5d5be5 (diff) | |
x86: Add cpu_mask_to_apicid_and
Impact: new API
Add a helper function that takes two cpumask's, and's them and then
returns the apicid of the result. This removes a need in io_apic.c
that uses a temporary cpumask to hold (mask & cfg->domain).
Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| -rw-r--r-- | arch/x86/include/asm/bigsmp/apic.h | 16 | ||||
| -rw-r--r-- | arch/x86/include/asm/es7000/apic.h | 47 | ||||
| -rw-r--r-- | arch/x86/include/asm/genapic_32.h | 3 | ||||
| -rw-r--r-- | arch/x86/include/asm/genapic_64.h | 2 | ||||
| -rw-r--r-- | arch/x86/include/asm/mach-default/mach_apic.h | 10 | ||||
| -rw-r--r-- | arch/x86/include/asm/mach-generic/mach_apic.h | 1 | ||||
| -rw-r--r-- | arch/x86/include/asm/numaq/apic.h | 6 | ||||
| -rw-r--r-- | arch/x86/include/asm/summit/apic.h | 39 | ||||
| -rw-r--r-- | arch/x86/kernel/genapic_flat_64.c | 26 | ||||
| -rw-r--r-- | arch/x86/kernel/genx2apic_cluster.c | 16 | ||||
| -rw-r--r-- | arch/x86/kernel/genx2apic_phys.c | 16 | ||||
| -rw-r--r-- | arch/x86/kernel/genx2apic_uv_x.c | 16 |
12 files changed, 198 insertions, 0 deletions
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h index dc6225ca48ad..99f9abacf6a2 100644 --- a/arch/x86/include/asm/bigsmp/apic.h +++ b/arch/x86/include/asm/bigsmp/apic.h | |||
| @@ -129,6 +129,22 @@ static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
| 129 | return apicid; | 129 | return apicid; |
| 130 | } | 130 | } |
| 131 | 131 | ||
| 132 | static inline unsigned int cpu_mask_to_apicid_and(const cpumask_t *cpumask, | ||
| 133 | const cpumask_t *andmask) | ||
| 134 | { | ||
| 135 | int cpu; | ||
| 136 | |||
| 137 | /* | ||
| 138 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | ||
| 139 | * May as well be the first. | ||
| 140 | */ | ||
| 141 | while ((cpu = next_cpu(-1, *cpumask)) < nr_cpu_ids) | ||
| 142 | if (cpu_isset(cpu, *andmask)) | ||
| 143 | return cpu_to_logical_apicid(cpu); | ||
| 144 | |||
| 145 | return BAD_APICID; | ||
| 146 | } | ||
| 147 | |||
| 132 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | 148 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) |
| 133 | { | 149 | { |
| 134 | return cpuid_apic >> index_msb; | 150 | return cpuid_apic >> index_msb; |
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h index 4cac0837bb40..c2bed772af88 100644 --- a/arch/x86/include/asm/es7000/apic.h +++ b/arch/x86/include/asm/es7000/apic.h | |||
| @@ -214,6 +214,53 @@ static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
| 214 | return apicid; | 214 | return apicid; |
| 215 | } | 215 | } |
| 216 | 216 | ||
| 217 | static inline unsigned int cpu_mask_to_apicid_and(const cpumask_t *cpumask, | ||
| 218 | const cpumask_t *andmask) | ||
| 219 | { | ||
| 220 | int num_bits_set; | ||
| 221 | int num_bits_set2; | ||
| 222 | int cpus_found = 0; | ||
| 223 | int cpu; | ||
| 224 | int apicid = 0; | ||
| 225 | |||
| 226 | num_bits_set = cpus_weight(*cpumask); | ||
| 227 | num_bits_set2 = cpus_weight(*andmask); | ||
| 228 | num_bits_set = min_t(int, num_bits_set, num_bits_set2); | ||
| 229 | /* Return id to all */ | ||
| 230 | if (num_bits_set >= nr_cpu_ids) | ||
| 231 | #if defined CONFIG_ES7000_CLUSTERED_APIC | ||
| 232 | return 0xFF; | ||
| 233 | #else | ||
| 234 | return cpu_to_logical_apicid(0); | ||
| 235 | #endif | ||
| 236 | /* | ||
| 237 | * The cpus in the mask must all be on the apic cluster. If are not | ||
| 238 | * on the same apicid cluster return default value of TARGET_CPUS. | ||
| 239 | */ | ||
| 240 | while ((cpu = next_cpu(-1, *cpumask)) < nr_cpu_ids) | ||
| 241 | if (cpu_isset(cpu, *andmask) | ||
| 242 | apicid = cpu_to_logical_apicid(cpu); | ||
| 243 | while (cpus_found < num_bits_set) { | ||
| 244 | if (cpu_isset(cpu, *cpumask) && cpu_isset(cpu, *andmask)) { | ||
| 245 | int new_apicid = cpu_to_logical_apicid(cpu); | ||
| 246 | if (apicid_cluster(apicid) != | ||
| 247 | apicid_cluster(new_apicid)) { | ||
| 248 | printk(KERN_WARNING | ||
| 249 | "%s: Not a valid mask!\n", __func__); | ||
| 250 | #if defined CONFIG_ES7000_CLUSTERED_APIC | ||
| 251 | return 0xFF; | ||
| 252 | #else | ||
| 253 | return cpu_to_logical_apicid(0); | ||
| 254 | #endif | ||
| 255 | } | ||
| 256 | apicid = new_apicid; | ||
| 257 | cpus_found++; | ||
| 258 | } | ||
| 259 | cpu++; | ||
| 260 | } | ||
| 261 | return apicid; | ||
| 262 | } | ||
| 263 | |||
| 217 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | 264 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) |
| 218 | { | 265 | { |
| 219 | return cpuid_apic >> index_msb; | 266 | return cpuid_apic >> index_msb; |
diff --git a/arch/x86/include/asm/genapic_32.h b/arch/x86/include/asm/genapic_32.h index b21ed21c574d..325298a82237 100644 --- a/arch/x86/include/asm/genapic_32.h +++ b/arch/x86/include/asm/genapic_32.h | |||
| @@ -58,6 +58,8 @@ struct genapic { | |||
| 58 | unsigned (*get_apic_id)(unsigned long x); | 58 | unsigned (*get_apic_id)(unsigned long x); |
| 59 | unsigned long apic_id_mask; | 59 | unsigned long apic_id_mask; |
| 60 | unsigned int (*cpu_mask_to_apicid)(const cpumask_t *cpumask); | 60 | unsigned int (*cpu_mask_to_apicid)(const cpumask_t *cpumask); |
| 61 | unsigned int (*cpu_mask_to_apicid_and)(const cpumask_t *cpumask, | ||
| 62 | const cpumask_t *andmask); | ||
| 61 | void (*vector_allocation_domain)(int cpu, cpumask_t *retmask); | 63 | void (*vector_allocation_domain)(int cpu, cpumask_t *retmask); |
| 62 | 64 | ||
| 63 | #ifdef CONFIG_SMP | 65 | #ifdef CONFIG_SMP |
| @@ -115,6 +117,7 @@ struct genapic { | |||
| 115 | APICFUNC(get_apic_id) \ | 117 | APICFUNC(get_apic_id) \ |
| 116 | .apic_id_mask = APIC_ID_MASK, \ | 118 | .apic_id_mask = APIC_ID_MASK, \ |
| 117 | APICFUNC(cpu_mask_to_apicid) \ | 119 | APICFUNC(cpu_mask_to_apicid) \ |
| 120 | APICFUNC(cpu_mask_to_apicid_and) \ | ||
| 118 | APICFUNC(vector_allocation_domain) \ | 121 | APICFUNC(vector_allocation_domain) \ |
| 119 | APICFUNC(acpi_madt_oem_check) \ | 122 | APICFUNC(acpi_madt_oem_check) \ |
| 120 | IPIFUNC(send_IPI_mask) \ | 123 | IPIFUNC(send_IPI_mask) \ |
diff --git a/arch/x86/include/asm/genapic_64.h b/arch/x86/include/asm/genapic_64.h index a020e7d35a40..301c7f41125d 100644 --- a/arch/x86/include/asm/genapic_64.h +++ b/arch/x86/include/asm/genapic_64.h | |||
| @@ -31,6 +31,8 @@ struct genapic { | |||
| 31 | void (*send_IPI_self)(int vector); | 31 | void (*send_IPI_self)(int vector); |
| 32 | /* */ | 32 | /* */ |
| 33 | unsigned int (*cpu_mask_to_apicid)(const cpumask_t *cpumask); | 33 | unsigned int (*cpu_mask_to_apicid)(const cpumask_t *cpumask); |
| 34 | unsigned int (*cpu_mask_to_apicid_and)(const cpumask_t *cpumask, | ||
| 35 | const cpumask_t *andmask); | ||
| 34 | unsigned int (*phys_pkg_id)(int index_msb); | 36 | unsigned int (*phys_pkg_id)(int index_msb); |
| 35 | unsigned int (*get_apic_id)(unsigned long x); | 37 | unsigned int (*get_apic_id)(unsigned long x); |
| 36 | unsigned long (*set_apic_id)(unsigned int id); | 38 | unsigned long (*set_apic_id)(unsigned int id); |
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h index c18896b0508c..229b605d104e 100644 --- a/arch/x86/include/asm/mach-default/mach_apic.h +++ b/arch/x86/include/asm/mach-default/mach_apic.h | |||
| @@ -28,6 +28,7 @@ static inline const cpumask_t *target_cpus(void) | |||
| 28 | #define apic_id_registered (genapic->apic_id_registered) | 28 | #define apic_id_registered (genapic->apic_id_registered) |
| 29 | #define init_apic_ldr (genapic->init_apic_ldr) | 29 | #define init_apic_ldr (genapic->init_apic_ldr) |
| 30 | #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) | 30 | #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) |
| 31 | #define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and) | ||
| 31 | #define phys_pkg_id (genapic->phys_pkg_id) | 32 | #define phys_pkg_id (genapic->phys_pkg_id) |
| 32 | #define vector_allocation_domain (genapic->vector_allocation_domain) | 33 | #define vector_allocation_domain (genapic->vector_allocation_domain) |
| 33 | #define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID))) | 34 | #define read_apic_id() (GET_APIC_ID(apic_read(APIC_ID))) |
| @@ -66,6 +67,15 @@ static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
| 66 | return cpus_addr(*cpumask)[0]; | 67 | return cpus_addr(*cpumask)[0]; |
| 67 | } | 68 | } |
| 68 | 69 | ||
| 70 | static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask, | ||
| 71 | const cpumask_t *andmask) | ||
| 72 | { | ||
| 73 | unsigned long mask1 = cpus_addr(*cpumask)[0]; | ||
| 74 | unsigned long mask2 = cpus_addr(*andmask)[0]; | ||
| 75 | |||
| 76 | return (unsigned int)(mask1 & mask2); | ||
| 77 | } | ||
| 78 | |||
| 69 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | 79 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) |
| 70 | { | 80 | { |
| 71 | return cpuid_apic >> index_msb; | 81 | return cpuid_apic >> index_msb; |
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h index e430f47df667..48553e958ad5 100644 --- a/arch/x86/include/asm/mach-generic/mach_apic.h +++ b/arch/x86/include/asm/mach-generic/mach_apic.h | |||
| @@ -24,6 +24,7 @@ | |||
| 24 | #define check_phys_apicid_present (genapic->check_phys_apicid_present) | 24 | #define check_phys_apicid_present (genapic->check_phys_apicid_present) |
| 25 | #define check_apicid_used (genapic->check_apicid_used) | 25 | #define check_apicid_used (genapic->check_apicid_used) |
| 26 | #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) | 26 | #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) |
| 27 | #define cpu_mask_to_apicid_and (genapic->cpu_mask_to_apicid_and) | ||
| 27 | #define vector_allocation_domain (genapic->vector_allocation_domain) | 28 | #define vector_allocation_domain (genapic->vector_allocation_domain) |
| 28 | #define enable_apic_mode (genapic->enable_apic_mode) | 29 | #define enable_apic_mode (genapic->enable_apic_mode) |
| 29 | #define phys_pkg_id (genapic->phys_pkg_id) | 30 | #define phys_pkg_id (genapic->phys_pkg_id) |
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h index 1df7ebe738e5..abf668ced503 100644 --- a/arch/x86/include/asm/numaq/apic.h +++ b/arch/x86/include/asm/numaq/apic.h | |||
| @@ -127,6 +127,12 @@ static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
| 127 | return (int) 0xF; | 127 | return (int) 0xF; |
| 128 | } | 128 | } |
| 129 | 129 | ||
| 130 | static inline unsigned int cpu_mask_to_apicid_and(const cpumask_t *cpumask, | ||
| 131 | const cpumask_t *andmask) | ||
| 132 | { | ||
| 133 | return (int) 0xF; | ||
| 134 | } | ||
| 135 | |||
| 130 | /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */ | 136 | /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */ |
| 131 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | 137 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) |
| 132 | { | 138 | { |
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h index 437dc83725ca..cbcc2c7eb1d5 100644 --- a/arch/x86/include/asm/summit/apic.h +++ b/arch/x86/include/asm/summit/apic.h | |||
| @@ -170,6 +170,45 @@ static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
| 170 | return apicid; | 170 | return apicid; |
| 171 | } | 171 | } |
| 172 | 172 | ||
| 173 | static inline unsigned int cpu_mask_to_apicid_and(const cpumask_t *cpumask, | ||
| 174 | const cpumask_t *andmask) | ||
| 175 | { | ||
| 176 | int num_bits_set; | ||
| 177 | int num_bits_set2; | ||
| 178 | int cpus_found = 0; | ||
| 179 | int cpu; | ||
| 180 | int apicid = 0; | ||
| 181 | |||
| 182 | num_bits_set = cpus_weight(*cpumask); | ||
| 183 | num_bits_set2 = cpus_weight(*andmask); | ||
| 184 | num_bits_set = min_t(int, num_bits_set, num_bits_set2); | ||
| 185 | /* Return id to all */ | ||
| 186 | if (num_bits_set >= nr_cpu_ids) | ||
| 187 | return 0xFF; | ||
| 188 | /* | ||
| 189 | * The cpus in the mask must all be on the apic cluster. If are not | ||
| 190 | * on the same apicid cluster return default value of TARGET_CPUS. | ||
| 191 | */ | ||
| 192 | while ((cpu = next_cpu(-1, *cpumask)) < nr_cpu_ids) | ||
| 193 | if (cpu_isset(cpu, *andmask) | ||
| 194 | apicid = cpu_to_logical_apicid(cpu); | ||
| 195 | while (cpus_found < num_bits_set) { | ||
| 196 | if (cpu_isset(cpu, *cpumask) && cpu_isset(cpu, *andmask)) { | ||
| 197 | int new_apicid = cpu_to_logical_apicid(cpu); | ||
| 198 | if (apicid_cluster(apicid) != | ||
| 199 | apicid_cluster(new_apicid)) { | ||
| 200 | printk(KERN_WARNING | ||
| 201 | "%s: Not a valid mask!\n", __func__); | ||
| 202 | return 0xFF; | ||
| 203 | } | ||
| 204 | apicid = apicid | new_apicid; | ||
| 205 | cpus_found++; | ||
| 206 | } | ||
| 207 | cpu++; | ||
| 208 | } | ||
| 209 | return apicid; | ||
| 210 | } | ||
| 211 | |||
| 173 | /* cpuid returns the value latched in the HW at reset, not the APIC ID | 212 | /* cpuid returns the value latched in the HW at reset, not the APIC ID |
| 174 | * register's value. For any box whose BIOS changes APIC IDs, like | 213 | * register's value. For any box whose BIOS changes APIC IDs, like |
| 175 | * clustered APIC systems, we must use hard_smp_processor_id. | 214 | * clustered APIC systems, we must use hard_smp_processor_id. |
diff --git a/arch/x86/kernel/genapic_flat_64.c b/arch/x86/kernel/genapic_flat_64.c index 50eebd0328fe..1efecd206a74 100644 --- a/arch/x86/kernel/genapic_flat_64.c +++ b/arch/x86/kernel/genapic_flat_64.c | |||
| @@ -158,6 +158,15 @@ static unsigned int flat_cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
| 158 | return cpus_addr(*cpumask)[0] & APIC_ALL_CPUS; | 158 | return cpus_addr(*cpumask)[0] & APIC_ALL_CPUS; |
| 159 | } | 159 | } |
| 160 | 160 | ||
| 161 | static unsigned int flat_cpu_mask_to_apicid_and(const cpumask_t *cpumask, | ||
| 162 | const cpumask_t *andmask) | ||
| 163 | { | ||
| 164 | unsigned long mask1 = cpus_addr(*cpumask)[0] & APIC_ALL_CPUS; | ||
| 165 | unsigned long mask2 = cpus_addr(*andmask)[0] & APIC_ALL_CPUS; | ||
| 166 | |||
| 167 | return (int)(mask1 & mask2); | ||
| 168 | } | ||
| 169 | |||
| 161 | static unsigned int phys_pkg_id(int index_msb) | 170 | static unsigned int phys_pkg_id(int index_msb) |
| 162 | { | 171 | { |
| 163 | return hard_smp_processor_id() >> index_msb; | 172 | return hard_smp_processor_id() >> index_msb; |
| @@ -178,6 +187,7 @@ struct genapic apic_flat = { | |||
| 178 | .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself, | 187 | .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself, |
| 179 | .send_IPI_self = apic_send_IPI_self, | 188 | .send_IPI_self = apic_send_IPI_self, |
| 180 | .cpu_mask_to_apicid = flat_cpu_mask_to_apicid, | 189 | .cpu_mask_to_apicid = flat_cpu_mask_to_apicid, |
| 190 | .cpu_mask_to_apicid_and = flat_cpu_mask_to_apicid_and, | ||
| 181 | .phys_pkg_id = phys_pkg_id, | 191 | .phys_pkg_id = phys_pkg_id, |
| 182 | .get_apic_id = get_apic_id, | 192 | .get_apic_id = get_apic_id, |
| 183 | .set_apic_id = set_apic_id, | 193 | .set_apic_id = set_apic_id, |
| @@ -254,6 +264,21 @@ static unsigned int physflat_cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
| 254 | return BAD_APICID; | 264 | return BAD_APICID; |
| 255 | } | 265 | } |
| 256 | 266 | ||
| 267 | static unsigned int physflat_cpu_mask_to_apicid_and(const cpumask_t *cpumask, | ||
| 268 | const cpumask_t *andmask) | ||
| 269 | { | ||
| 270 | int cpu; | ||
| 271 | |||
| 272 | /* | ||
| 273 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | ||
| 274 | * May as well be the first. | ||
| 275 | */ | ||
| 276 | while ((cpu = next_cpu(-1, *cpumask)) < nr_cpu_ids) | ||
| 277 | if (cpu_isset(cpu, *andmask)) | ||
| 278 | return per_cpu(x86_cpu_to_apicid, cpu); | ||
| 279 | return BAD_APICID; | ||
| 280 | } | ||
| 281 | |||
| 257 | struct genapic apic_physflat = { | 282 | struct genapic apic_physflat = { |
| 258 | .name = "physical flat", | 283 | .name = "physical flat", |
| 259 | .acpi_madt_oem_check = physflat_acpi_madt_oem_check, | 284 | .acpi_madt_oem_check = physflat_acpi_madt_oem_check, |
| @@ -269,6 +294,7 @@ struct genapic apic_physflat = { | |||
| 269 | .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself, | 294 | .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself, |
| 270 | .send_IPI_self = apic_send_IPI_self, | 295 | .send_IPI_self = apic_send_IPI_self, |
| 271 | .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid, | 296 | .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid, |
| 297 | .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and, | ||
| 272 | .phys_pkg_id = phys_pkg_id, | 298 | .phys_pkg_id = phys_pkg_id, |
| 273 | .get_apic_id = get_apic_id, | 299 | .get_apic_id = get_apic_id, |
| 274 | .set_apic_id = set_apic_id, | 300 | .set_apic_id = set_apic_id, |
diff --git a/arch/x86/kernel/genx2apic_cluster.c b/arch/x86/kernel/genx2apic_cluster.c index f5fa9a91ad38..fd8047f4e455 100644 --- a/arch/x86/kernel/genx2apic_cluster.c +++ b/arch/x86/kernel/genx2apic_cluster.c | |||
| @@ -123,6 +123,21 @@ static unsigned int x2apic_cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
| 123 | return BAD_APICID; | 123 | return BAD_APICID; |
| 124 | } | 124 | } |
| 125 | 125 | ||
| 126 | static unsigned int x2apic_cpu_mask_to_apicid_and(const cpumask_t *cpumask, | ||
| 127 | const cpumask_t *andmask) | ||
| 128 | { | ||
| 129 | int cpu; | ||
| 130 | |||
| 131 | /* | ||
| 132 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | ||
| 133 | * May as well be the first. | ||
| 134 | */ | ||
| 135 | while ((cpu = next_cpu(-1, *cpumask)) < nr_cpu_ids) | ||
| 136 | if (cpu_isset(cpu, *andmask)) | ||
| 137 | return per_cpu(x86_cpu_to_apicid, cpu); | ||
| 138 | return BAD_APICID; | ||
| 139 | } | ||
| 140 | |||
| 126 | static unsigned int get_apic_id(unsigned long x) | 141 | static unsigned int get_apic_id(unsigned long x) |
| 127 | { | 142 | { |
| 128 | unsigned int id; | 143 | unsigned int id; |
| @@ -172,6 +187,7 @@ struct genapic apic_x2apic_cluster = { | |||
| 172 | .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, | 187 | .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, |
| 173 | .send_IPI_self = x2apic_send_IPI_self, | 188 | .send_IPI_self = x2apic_send_IPI_self, |
| 174 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, | 189 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, |
| 190 | .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, | ||
| 175 | .phys_pkg_id = phys_pkg_id, | 191 | .phys_pkg_id = phys_pkg_id, |
| 176 | .get_apic_id = get_apic_id, | 192 | .get_apic_id = get_apic_id, |
| 177 | .set_apic_id = set_apic_id, | 193 | .set_apic_id = set_apic_id, |
diff --git a/arch/x86/kernel/genx2apic_phys.c b/arch/x86/kernel/genx2apic_phys.c index 41c27b2f3d01..d5578bb8f165 100644 --- a/arch/x86/kernel/genx2apic_phys.c +++ b/arch/x86/kernel/genx2apic_phys.c | |||
| @@ -122,6 +122,21 @@ static unsigned int x2apic_cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
| 122 | return BAD_APICID; | 122 | return BAD_APICID; |
| 123 | } | 123 | } |
| 124 | 124 | ||
| 125 | static unsigned int x2apic_cpu_mask_to_apicid_and(const cpumask_t *cpumask, | ||
| 126 | const cpumask_t *andmask) | ||
| 127 | { | ||
| 128 | int cpu; | ||
| 129 | |||
| 130 | /* | ||
| 131 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | ||
| 132 | * May as well be the first. | ||
| 133 | */ | ||
| 134 | while ((cpu = next_cpu(-1, *cpumask)) < nr_cpu_ids) | ||
| 135 | if (cpu_isset(cpu, *andmask)) | ||
| 136 | return per_cpu(x86_cpu_to_apicid, cpu); | ||
| 137 | return BAD_APICID; | ||
| 138 | } | ||
| 139 | |||
| 125 | static unsigned int get_apic_id(unsigned long x) | 140 | static unsigned int get_apic_id(unsigned long x) |
| 126 | { | 141 | { |
| 127 | unsigned int id; | 142 | unsigned int id; |
| @@ -168,6 +183,7 @@ struct genapic apic_x2apic_phys = { | |||
| 168 | .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, | 183 | .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, |
| 169 | .send_IPI_self = x2apic_send_IPI_self, | 184 | .send_IPI_self = x2apic_send_IPI_self, |
| 170 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, | 185 | .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, |
| 186 | .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and, | ||
| 171 | .phys_pkg_id = phys_pkg_id, | 187 | .phys_pkg_id = phys_pkg_id, |
| 172 | .get_apic_id = get_apic_id, | 188 | .get_apic_id = get_apic_id, |
| 173 | .set_apic_id = set_apic_id, | 189 | .set_apic_id = set_apic_id, |
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c index 010659415ae4..53bd2570272c 100644 --- a/arch/x86/kernel/genx2apic_uv_x.c +++ b/arch/x86/kernel/genx2apic_uv_x.c | |||
| @@ -179,6 +179,21 @@ static unsigned int uv_cpu_mask_to_apicid(const cpumask_t *cpumask) | |||
| 179 | return BAD_APICID; | 179 | return BAD_APICID; |
| 180 | } | 180 | } |
| 181 | 181 | ||
| 182 | static unsigned int uv_cpu_mask_to_apicid_and(const cpumask_t *cpumask, | ||
| 183 | const cpumask_t *andmask) | ||
| 184 | { | ||
| 185 | int cpu; | ||
| 186 | |||
| 187 | /* | ||
| 188 | * We're using fixed IRQ delivery, can only return one phys APIC ID. | ||
| 189 | * May as well be the first. | ||
| 190 | */ | ||
| 191 | while ((cpu = next_cpu(-1, *cpumask)) < nr_cpu_ids) | ||
| 192 | if (cpu_isset(cpu, *andmask)) | ||
| 193 | return per_cpu(x86_cpu_to_apicid, cpu); | ||
| 194 | return BAD_APICID; | ||
| 195 | } | ||
| 196 | |||
| 182 | static unsigned int get_apic_id(unsigned long x) | 197 | static unsigned int get_apic_id(unsigned long x) |
| 183 | { | 198 | { |
| 184 | unsigned int id; | 199 | unsigned int id; |
| @@ -229,6 +244,7 @@ struct genapic apic_x2apic_uv_x = { | |||
| 229 | .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself, | 244 | .send_IPI_mask_allbutself = uv_send_IPI_mask_allbutself, |
| 230 | .send_IPI_self = uv_send_IPI_self, | 245 | .send_IPI_self = uv_send_IPI_self, |
| 231 | .cpu_mask_to_apicid = uv_cpu_mask_to_apicid, | 246 | .cpu_mask_to_apicid = uv_cpu_mask_to_apicid, |
| 247 | .cpu_mask_to_apicid_and = uv_cpu_mask_to_apicid_and, | ||
| 232 | .phys_pkg_id = phys_pkg_id, | 248 | .phys_pkg_id = phys_pkg_id, |
| 233 | .get_apic_id = get_apic_id, | 249 | .get_apic_id = get_apic_id, |
| 234 | .set_apic_id = set_apic_id, | 250 | .set_apic_id = set_apic_id, |
