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authorVineet Gupta <vgupta@synopsys.com>2013-04-12 02:50:23 -0400
committerVineet Gupta <vgupta@synopsys.com>2013-05-07 09:38:13 -0400
commit94bad1afeeefbd1b27d7f642de12c04339501a99 (patch)
tree0113eafd9ff09c96053c34acc5edb6b3e03bb820
parent7586bf7286097cd47299c44192c30e01f0d55391 (diff)
ARC: [mm] consolidate icache/dcache sync code
Now that we have same helper used for all icache invalidates (i.e. vaddr+paddr based exact line invalidate), consolidate the open coded calls into one place. Also rename flush_icache_range_vaddr => __sync_icache_dcache Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
-rw-r--r--arch/arc/include/asm/cacheflush.h5
-rw-r--r--arch/arc/mm/cache_arc700.c32
2 files changed, 18 insertions, 19 deletions
diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h
index 46f13e7314dc..65ed8d2d4597 100644
--- a/arch/arc/include/asm/cacheflush.h
+++ b/arch/arc/include/asm/cacheflush.h
@@ -31,8 +31,7 @@
31void flush_cache_all(void); 31void flush_cache_all(void);
32 32
33void flush_icache_range(unsigned long start, unsigned long end); 33void flush_icache_range(unsigned long start, unsigned long end);
34void flush_icache_range_vaddr(unsigned long paddr, unsigned long u_vaddr, 34void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len);
35 int len);
36void __inv_icache_page(unsigned long paddr, unsigned long vaddr); 35void __inv_icache_page(unsigned long paddr, unsigned long vaddr);
37 36
38#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 37#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
@@ -66,7 +65,7 @@ void dma_cache_wback(unsigned long start, unsigned long sz);
66do { \ 65do { \
67 memcpy(dst, src, len); \ 66 memcpy(dst, src, len); \
68 if (vma->vm_flags & VM_EXEC) \ 67 if (vma->vm_flags & VM_EXEC) \
69 flush_icache_range_vaddr((unsigned long)(dst), vaddr, len);\ 68 __sync_icache_dcache((unsigned long)(dst), vaddr, len); \
70} while (0) 69} while (0)
71 70
72#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 71#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c
index 5651e7bd3b7e..5aaa955a3aac 100644
--- a/arch/arc/mm/cache_arc700.c
+++ b/arch/arc/mm/cache_arc700.c
@@ -652,7 +652,6 @@ void flush_icache_range(unsigned long kstart, unsigned long kend)
652{ 652{
653 unsigned int tot_sz, off, sz; 653 unsigned int tot_sz, off, sz;
654 unsigned long phy, pfn; 654 unsigned long phy, pfn;
655 unsigned long flags;
656 655
657 /* printk("Kernel Cache Cohenercy: %lx to %lx\n",kstart, kend); */ 656 /* printk("Kernel Cache Cohenercy: %lx to %lx\n",kstart, kend); */
658 657
@@ -679,8 +678,7 @@ void flush_icache_range(unsigned long kstart, unsigned long kend)
679 * given the callers for this case: kprobe/kgdb in built-in 678 * given the callers for this case: kprobe/kgdb in built-in
680 * kernel code only. 679 * kernel code only.
681 */ 680 */
682 __ic_line_inv_vaddr(kstart, kstart, kend - kstart); 681 __sync_icache_dcache(kstart, kstart, kend - kstart);
683 __dc_line_op(kstart, kend - kstart, OP_FLUSH);
684 return; 682 return;
685 } 683 }
686 684
@@ -698,28 +696,30 @@ void flush_icache_range(unsigned long kstart, unsigned long kend)
698 pfn = vmalloc_to_pfn((void *)kstart); 696 pfn = vmalloc_to_pfn((void *)kstart);
699 phy = (pfn << PAGE_SHIFT) + off; 697 phy = (pfn << PAGE_SHIFT) + off;
700 sz = min_t(unsigned int, tot_sz, PAGE_SIZE - off); 698 sz = min_t(unsigned int, tot_sz, PAGE_SIZE - off);
701 local_irq_save(flags); 699 __sync_icache_dcache(phy, kstart, sz);
702 __dc_line_op(phy, sz, OP_FLUSH);
703 __ic_line_inv_vaddr(phy, kstart, sz);
704 local_irq_restore(flags);
705 kstart += sz; 700 kstart += sz;
706 tot_sz -= sz; 701 tot_sz -= sz;
707 } 702 }
708} 703}
709 704
710/* 705/*
711 * Optimised ver of flush_icache_range() with spec callers: ptrace/signals 706 * General purpose helper to make I and D cache lines consistent.
712 * where vaddr is also available. This allows passing both vaddr and paddr 707 * @paddr is phy addr of region
713 * bits to CDU for cache flush, short-circuting the current pessimistic algo 708 * @vaddr is typically user or kernel vaddr (vmalloc)
714 * which kills all possible aliases. 709 * Howver in one instance, flush_icache_range() by kprobe (for a breakpt in
715 * An added adv of knowing that vaddr is user-vaddr avoids various checks 710 * builtin kernel code) @vaddr will be paddr only, meaning CDU operation will
716 * and handling for k-vaddr, k-paddr as done in orig ver above 711 * use a paddr to index the cache (despite VIPT). This is fine since since a
712 * built-in kernel page will not have any virtual mappings (not even kernel)
713 * kprobe on loadable module is different as it will have kvaddr.
717 */ 714 */
718void flush_icache_range_vaddr(unsigned long paddr, unsigned long u_vaddr, 715void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len)
719 int len)
720{ 716{
721 __ic_line_inv_vaddr(paddr, u_vaddr, len); 717 unsigned long flags;
718
719 local_irq_save(flags);
720 __ic_line_inv_vaddr(paddr, vaddr, len);
722 __dc_line_op(paddr, len, OP_FLUSH); 721 __dc_line_op(paddr, len, OP_FLUSH);
722 local_irq_restore(flags);
723} 723}
724 724
725/* wrapper to compile time eliminate alignment checks in flush loop */ 725/* wrapper to compile time eliminate alignment checks in flush loop */