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authorEric Millbrandt <emillbrandt@dekaresearch.com>2010-08-06 22:49:19 -0400
committerGrant Likely <grant.likely@secretlab.ca>2010-08-06 22:49:19 -0400
commit949ad0a783729ad8c2e8e5bcbbad5d05a60de616 (patch)
tree8fe9937ab4df880e276be4b6eb64c627b54deb0e
parentcfa6a88c83f639f17b96a34dc0bf93faf432e73a (diff)
sound/soc: mpc5200_psc_ac97: Use gpio pins for cold reset
Call the gpio reset platform function instead of using the flawed ac97 functionality of the MPC5200(b) From MPC5200B User's Manual: "Some AC97 devices goes to a test mode, if the Sync line is high during the Res line is low (reset phase). To avoid this behavior the Sync line must be also forced to zero during the reset phase. To do that, the pin muxing should switch to GPIO mode and the GPIO control register should be used to control the output lines." Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
-rw-r--r--sound/soc/fsl/mpc5200_psc_ac97.c22
1 files changed, 18 insertions, 4 deletions
diff --git a/sound/soc/fsl/mpc5200_psc_ac97.c b/sound/soc/fsl/mpc5200_psc_ac97.c
index e2ee220bfb7e..e7f5d50ed084 100644
--- a/sound/soc/fsl/mpc5200_psc_ac97.c
+++ b/sound/soc/fsl/mpc5200_psc_ac97.c
@@ -20,6 +20,7 @@
20 20
21#include <asm/time.h> 21#include <asm/time.h>
22#include <asm/delay.h> 22#include <asm/delay.h>
23#include <asm/mpc52xx.h>
23#include <asm/mpc52xx_psc.h> 24#include <asm/mpc52xx_psc.h>
24 25
25#include "mpc5200_dma.h" 26#include "mpc5200_dma.h"
@@ -100,19 +101,32 @@ static void psc_ac97_warm_reset(struct snd_ac97 *ac97)
100{ 101{
101 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; 102 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
102 103
104 mutex_lock(&psc_dma->mutex);
105
103 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR); 106 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
104 udelay(3); 107 udelay(3);
105 out_be32(&regs->sicr, psc_dma->sicr); 108 out_be32(&regs->sicr, psc_dma->sicr);
109
110 mutex_unlock(&psc_dma->mutex);
106} 111}
107 112
108static void psc_ac97_cold_reset(struct snd_ac97 *ac97) 113static void psc_ac97_cold_reset(struct snd_ac97 *ac97)
109{ 114{
110 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; 115 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
111 116
112 /* Do a cold reset */ 117 mutex_lock(&psc_dma->mutex);
113 out_8(&regs->op1, MPC52xx_PSC_OP_RES); 118 dev_dbg(psc_dma->dev, "cold reset\n");
114 udelay(10); 119
115 out_8(&regs->op0, MPC52xx_PSC_OP_RES); 120 mpc5200_psc_ac97_gpio_reset(psc_dma->id);
121
122 /* Notify the PSC that a reset has occurred */
123 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB);
124
125 /* Re-enable RX and TX */
126 out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
127
128 mutex_unlock(&psc_dma->mutex);
129
116 msleep(1); 130 msleep(1);
117 psc_ac97_warm_reset(ac97); 131 psc_ac97_warm_reset(ac97);
118} 132}