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authorShawn Guo <shawn.guo@linaro.org>2013-05-30 10:23:32 -0400
committerVinod Koul <vinod.koul@intel.com>2013-07-05 02:10:40 -0400
commit9479e17c9bb455c01b369d294e01de8fa9b0a8d3 (patch)
treea451ce4afb0c68c4a206f35d23cd899131f60a5d
parentadd93b578edda2a952b9b481ce8da2a9dc412cee (diff)
dma: imx-sdma: move to generic device tree bindings
Update imx-sdma driver to adopt generic DMA device tree bindings. It calls of_dma_controller_register() with imx-sdma specific of_dma_xlate to get the generic DMA device tree helper support. The #dma-cells for imx-sdma must be 3, which includes request ID, peripheral type and priority. The existing way of requesting channel, clients directly call dma_request_channel(), still work there, and will be removed after all imx-sdma clients get converted to generic DMA device tree helper. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt56
-rw-r--r--drivers/dma/imx-sdma.c40
2 files changed, 96 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
index d1e3f443e205..68cee4f5539f 100644
--- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
@@ -4,14 +4,70 @@ Required properties:
4- compatible : Should be "fsl,<chip>-sdma" 4- compatible : Should be "fsl,<chip>-sdma"
5- reg : Should contain SDMA registers location and length 5- reg : Should contain SDMA registers location and length
6- interrupts : Should contain SDMA interrupt 6- interrupts : Should contain SDMA interrupt
7- #dma-cells : Must be <3>.
8 The first cell specifies the DMA request/event ID. See details below
9 about the second and third cell.
7- fsl,sdma-ram-script-name : Should contain the full path of SDMA RAM 10- fsl,sdma-ram-script-name : Should contain the full path of SDMA RAM
8 scripts firmware 11 scripts firmware
9 12
13The second cell of dma phandle specifies the peripheral type of DMA transfer.
14The full ID of peripheral types can be found below.
15
16 ID transfer type
17 ---------------------
18 0 MCU domain SSI
19 1 Shared SSI
20 2 MMC
21 3 SDHC
22 4 MCU domain UART
23 5 Shared UART
24 6 FIRI
25 7 MCU domain CSPI
26 8 Shared CSPI
27 9 SIM
28 10 ATA
29 11 CCM
30 12 External peripheral
31 13 Memory Stick Host Controller
32 14 Shared Memory Stick Host Controller
33 15 DSP
34 16 Memory
35 17 FIFO type Memory
36 18 SPDIF
37 19 IPU Memory
38 20 ASRC
39 21 ESAI
40
41The third cell specifies the transfer priority as below.
42
43 ID transfer priority
44 -------------------------
45 0 High
46 1 Medium
47 2 Low
48
10Examples: 49Examples:
11 50
12sdma@83fb0000 { 51sdma@83fb0000 {
13 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; 52 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
14 reg = <0x83fb0000 0x4000>; 53 reg = <0x83fb0000 0x4000>;
15 interrupts = <6>; 54 interrupts = <6>;
55 #dma-cells = <3>;
16 fsl,sdma-ram-script-name = "sdma-imx51.bin"; 56 fsl,sdma-ram-script-name = "sdma-imx51.bin";
17}; 57};
58
59DMA clients connected to the i.MX SDMA controller must use the format
60described in the dma.txt file.
61
62Examples:
63
64ssi2: ssi@70014000 {
65 compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
66 reg = <0x70014000 0x4000>;
67 interrupts = <30>;
68 clocks = <&clks 49>;
69 dmas = <&sdma 24 1 0>,
70 <&sdma 25 1 0>;
71 dma-names = "rx", "tx";
72 fsl,fifo-depth = <15>;
73};
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 092867bf795c..1e44b8cf95da 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -36,6 +36,7 @@
36#include <linux/dmaengine.h> 36#include <linux/dmaengine.h>
37#include <linux/of.h> 37#include <linux/of.h>
38#include <linux/of_device.h> 38#include <linux/of_device.h>
39#include <linux/of_dma.h>
39 40
40#include <asm/irq.h> 41#include <asm/irq.h>
41#include <linux/platform_data/dma-imx-sdma.h> 42#include <linux/platform_data/dma-imx-sdma.h>
@@ -1296,6 +1297,35 @@ err_dma_alloc:
1296 return ret; 1297 return ret;
1297} 1298}
1298 1299
1300static bool sdma_filter_fn(struct dma_chan *chan, void *fn_param)
1301{
1302 struct imx_dma_data *data = fn_param;
1303
1304 if (!imx_dma_is_general_purpose(chan))
1305 return false;
1306
1307 chan->private = data;
1308
1309 return true;
1310}
1311
1312static struct dma_chan *sdma_xlate(struct of_phandle_args *dma_spec,
1313 struct of_dma *ofdma)
1314{
1315 struct sdma_engine *sdma = ofdma->of_dma_data;
1316 dma_cap_mask_t mask = sdma->dma_device.cap_mask;
1317 struct imx_dma_data data;
1318
1319 if (dma_spec->args_count != 3)
1320 return NULL;
1321
1322 data.dma_request = dma_spec->args[0];
1323 data.peripheral_type = dma_spec->args[1];
1324 data.priority = dma_spec->args[2];
1325
1326 return dma_request_channel(mask, sdma_filter_fn, &data);
1327}
1328
1299static int __init sdma_probe(struct platform_device *pdev) 1329static int __init sdma_probe(struct platform_device *pdev)
1300{ 1330{
1301 const struct of_device_id *of_id = 1331 const struct of_device_id *of_id =
@@ -1443,10 +1473,20 @@ static int __init sdma_probe(struct platform_device *pdev)
1443 goto err_init; 1473 goto err_init;
1444 } 1474 }
1445 1475
1476 if (np) {
1477 ret = of_dma_controller_register(np, sdma_xlate, sdma);
1478 if (ret) {
1479 dev_err(&pdev->dev, "failed to register controller\n");
1480 goto err_register;
1481 }
1482 }
1483
1446 dev_info(sdma->dev, "initialized\n"); 1484 dev_info(sdma->dev, "initialized\n");
1447 1485
1448 return 0; 1486 return 0;
1449 1487
1488err_register:
1489 dma_async_device_unregister(&sdma->dma_device);
1450err_init: 1490err_init:
1451 kfree(sdma->script_addrs); 1491 kfree(sdma->script_addrs);
1452err_alloc: 1492err_alloc: