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authorBen Widawsky <benjamin.widawsky@intel.com>2013-11-03 19:53:55 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-11-08 12:09:39 -0500
commit9459d252378aea80d28dc12bfec9a0d31b2a61bf (patch)
treeaf6ebccd4074194aa16d836bd2508591dac57851
parent4e0bbc316ef2a7d804cef3e0247fd782382f5bd4 (diff)
drm/i915/bdw: support GMS and GGMS changes
All the BARs have the ability to grow. v2: Pulled out the simulator workaround to a separate patch. Rebased. v3: Rebase onto latest vlv patches from Jesse. v4: Rebased on top of the early stolen quirk patch from Jesse. v5: Use the new macro names. s/INTEL_BDW_PCI_IDS_D/INTEL_BDW_D_IDS s/INTEL_BDW_PCI_IDS_M/INTEL_BDW_M_IDS It's Jesse's fault for not following the convention I originally set. Cc: Ingo Molnar <mingo@kernel.org> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--arch/x86/kernel/early-quirks.c12
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c29
-rw-r--r--include/drm/i915_drm.h4
3 files changed, 42 insertions, 3 deletions
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index b3cd3ebae077..96f958d8cd45 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -313,6 +313,16 @@ static size_t __init gen6_stolen_size(int num, int slot, int func)
313 return gmch_ctrl << 25; /* 32 MB units */ 313 return gmch_ctrl << 25; /* 32 MB units */
314} 314}
315 315
316static inline size_t gen8_stolen_size(int num, int slot, int func)
317{
318 u16 gmch_ctrl;
319
320 gmch_ctrl = read_pci_config_16(num, slot, func, SNB_GMCH_CTRL);
321 gmch_ctrl >>= BDW_GMCH_GMS_SHIFT;
322 gmch_ctrl &= BDW_GMCH_GMS_MASK;
323 return gmch_ctrl << 25; /* 32 MB units */
324}
325
316typedef size_t (*stolen_size_fn)(int num, int slot, int func); 326typedef size_t (*stolen_size_fn)(int num, int slot, int func);
317 327
318static struct pci_device_id intel_stolen_ids[] __initdata = { 328static struct pci_device_id intel_stolen_ids[] __initdata = {
@@ -336,6 +346,8 @@ static struct pci_device_id intel_stolen_ids[] __initdata = {
336 INTEL_IVB_D_IDS(gen6_stolen_size), 346 INTEL_IVB_D_IDS(gen6_stolen_size),
337 INTEL_HSW_D_IDS(gen6_stolen_size), 347 INTEL_HSW_D_IDS(gen6_stolen_size),
338 INTEL_HSW_M_IDS(gen6_stolen_size), 348 INTEL_HSW_M_IDS(gen6_stolen_size),
349 INTEL_BDW_M_IDS(gen8_stolen_size),
350 INTEL_BDW_D_IDS(gen8_stolen_size)
339}; 351};
340 352
341static void __init intel_graphics_stolen(int num, int slot, int func) 353static void __init intel_graphics_stolen(int num, int slot, int func)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 7d5a51fea1bb..074aec11fc9b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -869,6 +869,15 @@ static inline unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl)
869 return snb_gmch_ctl << 20; 869 return snb_gmch_ctl << 20;
870} 870}
871 871
872static inline unsigned int gen8_get_total_gtt_size(u16 bdw_gmch_ctl)
873{
874 bdw_gmch_ctl >>= BDW_GMCH_GGMS_SHIFT;
875 bdw_gmch_ctl &= BDW_GMCH_GGMS_MASK;
876 if (bdw_gmch_ctl)
877 bdw_gmch_ctl = 1 << bdw_gmch_ctl;
878 return bdw_gmch_ctl << 20;
879}
880
872static inline size_t gen6_get_stolen_size(u16 snb_gmch_ctl) 881static inline size_t gen6_get_stolen_size(u16 snb_gmch_ctl)
873{ 882{
874 snb_gmch_ctl >>= SNB_GMCH_GMS_SHIFT; 883 snb_gmch_ctl >>= SNB_GMCH_GMS_SHIFT;
@@ -876,6 +885,13 @@ static inline size_t gen6_get_stolen_size(u16 snb_gmch_ctl)
876 return snb_gmch_ctl << 25; /* 32 MB units */ 885 return snb_gmch_ctl << 25; /* 32 MB units */
877} 886}
878 887
888static inline size_t gen8_get_stolen_size(u16 bdw_gmch_ctl)
889{
890 bdw_gmch_ctl >>= BDW_GMCH_GMS_SHIFT;
891 bdw_gmch_ctl &= BDW_GMCH_GMS_MASK;
892 return bdw_gmch_ctl << 25; /* 32 MB units */
893}
894
879static int gen6_gmch_probe(struct drm_device *dev, 895static int gen6_gmch_probe(struct drm_device *dev,
880 size_t *gtt_total, 896 size_t *gtt_total,
881 size_t *stolen, 897 size_t *stolen,
@@ -903,10 +919,16 @@ static int gen6_gmch_probe(struct drm_device *dev,
903 if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40))) 919 if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
904 pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40)); 920 pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
905 pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl); 921 pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
906 gtt_size = gen6_get_total_gtt_size(snb_gmch_ctl);
907 922
908 *stolen = gen6_get_stolen_size(snb_gmch_ctl); 923 if (IS_GEN8(dev)) {
909 *gtt_total = (gtt_size / sizeof(gen6_gtt_pte_t)) << PAGE_SHIFT; 924 gtt_size = gen8_get_total_gtt_size(snb_gmch_ctl);
925 *gtt_total = (gtt_size / 8) << PAGE_SHIFT;
926 *stolen = gen8_get_stolen_size(snb_gmch_ctl);
927 } else {
928 gtt_size = gen6_get_total_gtt_size(snb_gmch_ctl);
929 *gtt_total = (gtt_size / sizeof(gen6_gtt_pte_t)) << PAGE_SHIFT;
930 *stolen = gen6_get_stolen_size(snb_gmch_ctl);
931 }
910 932
911 /* For Modern GENs the PTEs and register space are split in the BAR */ 933 /* For Modern GENs the PTEs and register space are split in the BAR */
912 gtt_bus_addr = pci_resource_start(dev->pdev, 0) + 934 gtt_bus_addr = pci_resource_start(dev->pdev, 0) +
@@ -916,6 +938,7 @@ static int gen6_gmch_probe(struct drm_device *dev,
916 if (!dev_priv->gtt.gsm) { 938 if (!dev_priv->gtt.gsm) {
917 DRM_ERROR("Failed to map the gtt page table\n"); 939 DRM_ERROR("Failed to map the gtt page table\n");
918 return -ENOMEM; 940 return -ENOMEM;
941
919 } 942 }
920 943
921 ret = setup_scratch_page(dev); 944 ret = setup_scratch_page(dev);
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 3abfa6ea226e..97d5497debc1 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -49,6 +49,10 @@ extern bool i915_gpu_turbo_disable(void);
49#define SNB_GMCH_GGMS_MASK 0x3 49#define SNB_GMCH_GGMS_MASK 0x3
50#define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */ 50#define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */
51#define SNB_GMCH_GMS_MASK 0x1f 51#define SNB_GMCH_GMS_MASK 0x1f
52#define BDW_GMCH_GGMS_SHIFT 6
53#define BDW_GMCH_GGMS_MASK 0x3
54#define BDW_GMCH_GMS_SHIFT 8
55#define BDW_GMCH_GMS_MASK 0xff
52 56
53#define I830_GMCH_CTRL 0x52 57#define I830_GMCH_CTRL 0x52
54 58