[MIPS] Only build r4k clocksource for systems that work ok with it.

In particular as-is it's not suited for multicore and mutiprocessors
systems where there is on guarantee that the counter are synchronized
or running from the same clock at all.  This broke Sibyte and probably
others since the "[MIPS] Handle R4000/R4400 mfc0 from count register."
commit.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

9 files changed, 142 insertions, 25 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 2f2ce0c28bc0..7750829b416a 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -22,6 +22,7 @@ config MACH_ALCHEMY
 config BASLER_EXCITE
         bool "Basler eXcite smart camera"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_COHERENT
         select HW_HAS_PCI
         select IRQ_CPU
@@ -49,6 +50,7 @@ config BASLER_EXCITE_PROTOTYPE
 config BCM47XX
         bool "BCM47XX based boards"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select HW_HAS_PCI
         select IRQ_CPU
@@ -66,6 +68,7 @@ config BCM47XX
 config MIPS_COBALT
         bool "Cobalt Server"
         select CEVT_R4K
+        select CSRC_R4K
         select CEVT_GT641XX
         select DMA_NONCOHERENT
         select HW_HAS_PCI
@@ -85,6 +88,7 @@ config MACH_DECSTATION
         bool "DECstations"
         select BOOT_ELF32
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select NO_IOPORT
         select IRQ_CPU
@@ -117,6 +121,7 @@ config MACH_JAZZ
         select ARC32
         select ARCH_MAY_HAVE_PC_FDC
         select CEVT_R4K
+        select CSRC_R4K
         select GENERIC_ISA_DMA
         select IRQ_CPU
         select I8253
@@ -137,6 +142,7 @@ config MACH_JAZZ
 config LASAT
         bool "LASAT Networks platforms"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select SYS_HAS_EARLY_PRINTK
         select HW_HAS_PCI
@@ -154,6 +160,7 @@ config LEMOTE_FULONG
         bool "Lemote Fulong mini-PC"
         select ARCH_SPARSEMEM_ENABLE
         select CEVT_R4K
+        select CSRC_R4K
         select SYS_HAS_CPU_LOONGSON2
         select DMA_NONCOHERENT
         select BOOT_ELF32
@@ -179,6 +186,7 @@ config MIPS_ATLAS
         bool "MIPS Atlas board"
         select BOOT_ELF32
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select SYS_HAS_EARLY_PRINTK
         select IRQ_CPU
@@ -210,6 +218,7 @@ config MIPS_MALTA
         select ARCH_MAY_HAVE_PC_FDC
         select BOOT_ELF32
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select GENERIC_ISA_DMA
         select IRQ_CPU
@@ -241,6 +250,7 @@ config MIPS_MALTA
 config MIPS_SEAD
         bool "MIPS SEAD board"
         select CEVT_R4K
+        select CSRC_R4K
         select IRQ_CPU
         select DMA_NONCOHERENT
         select SYS_HAS_EARLY_PRINTK
@@ -260,6 +270,7 @@ config MIPS_SEAD
 config MIPS_SIM
         bool 'MIPS simulator (MIPSsim)'
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select SYS_HAS_EARLY_PRINTK
         select IRQ_CPU
@@ -278,6 +289,7 @@ config MIPS_SIM
 config MARKEINS
         bool "NEC EMMA2RH Mark-eins"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select HW_HAS_PCI
         select IRQ_CPU
@@ -293,6 +305,7 @@ config MARKEINS
 config MACH_VR41XX
         bool "NEC VR4100 series based machines"
         select CEVT_R4K
+        select CSRC_R4K
         select SYS_HAS_CPU_VR41XX
         select GENERIC_HARDIRQS_NO__DO_IRQ
 
@@ -330,6 +343,7 @@ config PMC_MSP
 config PMC_YOSEMITE
         bool "PMC-Sierra Yosemite eval board"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_COHERENT
         select HW_HAS_PCI
         select IRQ_CPU
@@ -351,6 +365,7 @@ config PMC_YOSEMITE
 config QEMU
         bool "Qemu"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_COHERENT
         select GENERIC_ISA_DMA
         select HAVE_STD_PC_SERIAL_PORT
@@ -382,6 +397,7 @@ config SGI_IP22
         select ARC32
         select BOOT_ELF32
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select HW_HAS_EISA
         select I8253
@@ -427,6 +443,7 @@ config SGI_IP32
         select ARC32
         select BOOT_ELF32
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select HW_HAS_PCI
         select IRQ_CPU
@@ -556,6 +573,7 @@ config SNI_RM
         select ARCH_MAY_HAVE_PC_FDC
         select BOOT_ELF32
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select GENERIC_ISA_DMA
         select HW_HAS_EISA
@@ -599,6 +617,7 @@ config TOSHIBA_JMR3927
 config TOSHIBA_RBTX4927
         bool "Toshiba RBTX49[23]7 board"
         select CEVT_R4K
+        select CSRC_R4K
         select CEVT_TXX9
         select DMA_NONCOHERENT
         select HAS_TXX9_SERIAL
@@ -621,6 +640,7 @@ config TOSHIBA_RBTX4927
 config TOSHIBA_RBTX4938
         bool "Toshiba RBTX4938 board"
         select CEVT_R4K
+        select CSRC_R4K
         select CEVT_TXX9
         select DMA_NONCOHERENT
         select HAS_TXX9_SERIAL
@@ -642,6 +662,7 @@ config TOSHIBA_RBTX4938
 config WR_PPMC
         bool "Wind River PPMC board"
         select CEVT_R4K
+        select CSRC_R4K
         select IRQ_CPU
         select BOOT_ELF32
         select DMA_NONCOHERENT
@@ -752,6 +773,9 @@ config CEVT_TXX9
 config CSRC_BCM1480
         bool
 
+config CSRC_R4K
+        bool
+
 config CSRC_SB1250
         bool
 
diff --git a/arch/mips/au1000/Kconfig b/arch/mips/au1000/Kconfig
index b36cec58a9a8..05d1354aad3a 100644
--- a/arch/mips/au1000/Kconfig
+++ b/arch/mips/au1000/Kconfig
@@ -138,6 +138,7 @@ config SOC_AU1X00
         bool
         select 64BIT_PHYS_ADDR
         select CEVT_R4K
+        select CSRC_R4K
         select IRQ_CPU
         select SYS_HAS_CPU_MIPS32_R1
         select SYS_SUPPORTS_32BIT_KERNEL
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index b551535b7e48..ffa08362de17 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_CEVT_GT641XX)	+= cevt-gt641xx.o
 obj-$(CONFIG_CEVT_SB1250)       += cevt-sb1250.o
 obj-$(CONFIG_CEVT_TXX9)         += cevt-txx9.o
 obj-$(CONFIG_CSRC_BCM1480)      += csrc-bcm1480.o
+obj-$(CONFIG_CSRC_R4K)          += csrc-r4k.o
 obj-$(CONFIG_CSRC_SB1250)       += csrc-sb1250.o
 
 binfmt_irix-objs        := irixelf.o irixinv.o irixioctl.o irixsig.o    \
@@ -43,6 +44,7 @@ obj-$(CONFIG_CPU_TX49XX)	+= r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_VR41XX)        += r4k_fpu.o r4k_switch.o
 
 obj-$(CONFIG_SMP)               += smp.o
+obj-$(CONFIG_SMP_UP)            += smp-up.o
 
 obj-$(CONFIG_MIPS_MT)           += mips-mt.o
 obj-$(CONFIG_MIPS_MT_FPAFF)     += mips-mt-fpaff.o
diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c
new file mode 100644
index 000000000000..74c5c62365a8
--- /dev/null
+++ b/arch/mips/kernel/csrc-r4k.c
@@ -0,0 +1,29 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2007 by Ralf Baechle
+ */
+
+static cycle_t c0_hpt_read(void)
+{
+        return read_c0_count();
+}
+
+static struct clocksource clocksource_mips = {
+        .name           = "MIPS",
+        .read           = c0_hpt_read,
+        .mask           = CLOCKSOURCE_MASK(32),
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static void __init init_mips_clocksource(void)
+{
+        /* Calclate a somewhat reasonable rating value */
+        clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
+
+        clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
+
+        clocksource_register(&clocksource_mips);
+}
diff --git a/arch/mips/kernel/smp-up.c b/arch/mips/kernel/smp-up.c
new file mode 100644
index 000000000000..ead6c30eeb14
--- /dev/null
+++ b/arch/mips/kernel/smp-up.c
@@ -0,0 +1,67 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2006, 07 by Ralf Baechle (ralf@linux-mips.org)
+ *
+ * Symmetric Uniprocessor (TM) Support
+ */
+#include <linux/kernel.h>
+#include <linux/sched.h>
+
+/*
+ * Send inter-processor interrupt
+ */
+void up_send_ipi_single(int cpu, unsigned int action)
+{
+        panic(KERN_ERR "%s called", __func__);
+}
+
+static inline void up_send_ipi_mask(cpumask_t mask, unsigned int action)
+{
+        panic(KERN_ERR "%s called", __func__);
+}
+
+/*
+ *  After we've done initial boot, this function is called to allow the
+ *  board code to clean up state, if needed
+ */
+void __cpuinit up_init_secondary(void)
+{
+}
+
+void __cpuinit up_smp_finish(void)
+{
+}
+
+/* Hook for after all CPUs are online */
+void up_cpus_done(void)
+{
+}
+
+/*
+ * Firmware CPU startup hook
+ */
+void __cpuinit up_boot_secondary(int cpu, struct task_struct *idle)
+{
+}
+
+void __init up_smp_setup(void)
+{
+}
+
+void __init up_prepare_cpus(unsigned int max_cpus)
+{
+}
+
+struct plat_smp_ops up_smp_ops = {
+        .send_ipi_single        = up_send_ipi_single,
+        .send_ipi_mask          = up_send_ipi_mask,
+        .init_secondary         = up_init_secondary,
+        .smp_finish             = up_smp_finish,
+        .cpus_done              = up_cpus_done,
+        .boot_secondary         = up_boot_secondary,
+        .smp_setup              = up_smp_setup,
+        .prepare_cpus           = up_prepare_cpus,
+};
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index d7d52efff51f..52075426c373 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -50,14 +50,6 @@ int update_persistent_clock(struct timespec now)
         return rtc_mips_set_mmss(now.tv_sec);
 }
 
-/*
- * High precision timer functions for a R4k-compatible timer.
- */
-static cycle_t c0_hpt_read(void)
-{
-        return read_c0_count();
-}
-
 int (*mips_timer_state)(void);
 
 int null_perf_irq(void)
@@ -84,13 +76,6 @@ EXPORT_SYMBOL(perf_irq);
 
 unsigned int mips_hpt_frequency;
 
-static struct clocksource clocksource_mips = {
-        .name           = "MIPS",
-        .read           = c0_hpt_read,
-        .mask           = CLOCKSOURCE_MASK(32),
-        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
 void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
 {
         u64 temp;
@@ -124,16 +109,6 @@ void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
         cd->mult = (u32) temp;
 }
 
-static void __init init_mips_clocksource(void)
-{
-        /* Calclate a somewhat reasonable rating value */
-        clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
-
-        clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
-
-        clocksource_register(&clocksource_mips);
-}
-
 void __init __weak plat_time_init(void)
 {
 }
diff --git a/arch/mips/pmc-sierra/Kconfig b/arch/mips/pmc-sierra/Kconfig
index 6b293ce0935f..90261b83db04 100644
--- a/arch/mips/pmc-sierra/Kconfig
+++ b/arch/mips/pmc-sierra/Kconfig
@@ -5,12 +5,14 @@ choice
 config PMC_MSP4200_EVAL
         bool "PMC-Sierra MSP4200 Eval Board"
         select CEVT_R4K
+        select CSRC_R4K
         select IRQ_MSP_SLP
         select HW_HAS_PCI
 
 config PMC_MSP4200_GW
         bool "PMC-Sierra MSP4200 VoIP Gateway"
         select CEVT_R4K
+        select CSRC_R4K
         select IRQ_MSP_SLP
         select HW_HAS_PCI
 
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
index eeb089f20c0d..559acc09c819 100644
--- a/arch/mips/vr41xx/Kconfig
+++ b/arch/mips/vr41xx/Kconfig
@@ -6,6 +6,7 @@ choice
 config CASIO_E55
         bool "CASIO CASSIOPEIA E-10/15/55/65"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select IRQ_CPU
         select ISA
@@ -15,6 +16,7 @@ config CASIO_E55
 config IBM_WORKPAD
         bool "IBM WorkPad z50"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select IRQ_CPU
         select ISA
@@ -24,6 +26,7 @@ config IBM_WORKPAD
 config NEC_CMBVR4133
         bool "NEC CMB-VR4133"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select IRQ_CPU
         select HW_HAS_PCI
@@ -33,6 +36,7 @@ config NEC_CMBVR4133
 config TANBAC_TB022X
         bool "TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select IRQ_CPU
         select HW_HAS_PCI
@@ -48,6 +52,7 @@ config TANBAC_TB022X
 config VICTOR_MPC30X
         bool "Victor MP-C303/304"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select IRQ_CPU
         select HW_HAS_PCI
@@ -58,6 +63,7 @@ config VICTOR_MPC30X
 config ZAO_CAPCELLA
         bool "ZAO Networks Capcella"
         select CEVT_R4K
+        select CSRC_R4K
         select DMA_NONCOHERENT
         select IRQ_CPU
         select HW_HAS_PCI
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index 1922494a0d9e..7717934f94c3 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -67,6 +67,17 @@ static inline int mips_clockevent_init(void)
 }
 #endif
 
+/*
+ * Initialize the count register as a clocksource
+ */
+#ifdef CONFIG_CEVT_R4K
+extern void init_mips_clocksource(void);
+#else
+static inline void init_mips_clocksource(void)
+{
+}
+#endif
+
 extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock);
 extern void clockevent_set_clock(struct clock_event_device *cd,
                 unsigned int clock);