Merge branch 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux into drm-next

mode validation, deep color and pageflipping fixes.

* 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: Fix radeon_irq_kms_pflip_irq_get/put() imbalance
  Revert "drm/radeon: remove drm_vblank_get|put from pflip handling"
  drm/radeon: improve dvi_mode_valid
  drm/radeon: update mode_valid testing for DP
  drm/radeon: Use dce5/6 hdmi deep color clock setup also on dce8+

3 files changed, 41 insertions, 15 deletions

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 9758f9170fce..a03c73411a56 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1052,7 +1052,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode
         int encoder_mode = atombios_get_encoder_mode(radeon_crtc->encoder);
 
         /* pass the actual clock to atombios_crtc_program_pll for DCE5,6 for HDMI */
-        if (ASIC_IS_DCE5(rdev) && !ASIC_IS_DCE8(rdev) &&
+        if (ASIC_IS_DCE5(rdev) &&
             (encoder_mode == ATOM_ENCODER_MODE_HDMI) &&
             (radeon_crtc->bpc > 8))
                 clock = radeon_crtc->adjusted_clock;
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 933c5c39654d..1b9177ed181f 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -1288,17 +1288,15 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector,
                     (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
                     (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
                         return MODE_OK;
-                else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
-                        if (ASIC_IS_DCE6(rdev)) {
-                                /* HDMI 1.3+ supports max clock of 340 Mhz */
-                                if (mode->clock > 340000)
-                                        return MODE_CLOCK_HIGH;
-                                else
-                                        return MODE_OK;
-                        } else
+                else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
+                        /* HDMI 1.3+ supports max clock of 340 Mhz */
+                        if (mode->clock > 340000)
                                 return MODE_CLOCK_HIGH;
-                } else
+                        else
+                                return MODE_OK;
+                } else {
                         return MODE_CLOCK_HIGH;
+                }
         }
 
         /* check against the max pixel clock */
@@ -1549,6 +1547,8 @@ out:
 static int radeon_dp_mode_valid(struct drm_connector *connector,
                                   struct drm_display_mode *mode)
 {
+        struct drm_device *dev = connector->dev;
+        struct radeon_device *rdev = dev->dev_private;
         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
         struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
 
@@ -1579,14 +1579,23 @@ static int radeon_dp_mode_valid(struct drm_connector *connector,
                                         return MODE_PANEL;
                         }
                 }
-                return MODE_OK;
         } else {
                 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
-                    (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
+                    (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
                         return radeon_dp_mode_valid_helper(connector, mode);
-                else
-                        return MODE_OK;
+                } else {
+                        if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
+                                /* HDMI 1.3+ supports max clock of 340 Mhz */
+                                if (mode->clock > 340000)
+                                        return MODE_CLOCK_HIGH;
+                        } else {
+                                if (mode->clock > 165000)
+                                        return MODE_CLOCK_HIGH;
+                        }
+                }
         }
+
+        return MODE_OK;
 }
 
 static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 4db26420f38a..8fc362aa6a1a 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -358,8 +358,9 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
 
         spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);
 
+        drm_vblank_put(rdev->ddev, radeon_crtc->crtc_id);
         radeon_fence_unref(&work->fence);
-        radeon_irq_kms_pflip_irq_get(rdev, work->crtc_id);
+        radeon_irq_kms_pflip_irq_put(rdev, work->crtc_id);
         queue_work(radeon_crtc->flip_queue, &work->unpin_work);
 }
 
@@ -460,6 +461,12 @@ static void radeon_flip_work_func(struct work_struct *__work)
                 base &= ~7;
         }
 
+        r = drm_vblank_get(crtc->dev, radeon_crtc->crtc_id);
+        if (r) {
+                DRM_ERROR("failed to get vblank before flip\n");
+                goto pflip_cleanup;
+        }
+
         /* We borrow the event spin lock for protecting flip_work */
         spin_lock_irqsave(&crtc->dev->event_lock, flags);
 
@@ -474,6 +481,16 @@ static void radeon_flip_work_func(struct work_struct *__work)
 
         return;
 
+pflip_cleanup:
+        if (unlikely(radeon_bo_reserve(work->new_rbo, false) != 0)) {
+                DRM_ERROR("failed to reserve new rbo in error path\n");
+                goto cleanup;
+        }
+        if (unlikely(radeon_bo_unpin(work->new_rbo) != 0)) {
+                DRM_ERROR("failed to unpin new rbo in error path\n");
+        }
+        radeon_bo_unreserve(work->new_rbo);
+
 cleanup:
         drm_gem_object_unreference_unlocked(&work->old_rbo->gem_base);
         radeon_fence_unref(&work->fence);